1 #define NVOC_KERNEL_SEC2_H_PRIVATE_ACCESS_ALLOWED
2 #include "nvoc/runtime.h"
3 #include "nvoc/rtti.h"
4 #include "nvtypes.h"
5 #include "nvport/nvport.h"
6 #include "nvport/inline/util_valist.h"
7 #include "utils/nvassert.h"
8 #include "g_kernel_sec2_nvoc.h"
9 
10 #ifdef DEBUG
11 char __nvoc_class_id_uniqueness_check_0x2f36c9 = 1;
12 #endif
13 
14 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSec2;
15 
16 extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
17 
18 extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE;
19 
20 extern const struct NVOC_CLASS_DEF __nvoc_class_def_IntrService;
21 
22 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon;
23 
24 void __nvoc_init_KernelSec2(KernelSec2*, RmHalspecOwner* );
25 void __nvoc_init_funcTable_KernelSec2(KernelSec2*, RmHalspecOwner* );
26 NV_STATUS __nvoc_ctor_KernelSec2(KernelSec2*, RmHalspecOwner* );
27 void __nvoc_init_dataField_KernelSec2(KernelSec2*, RmHalspecOwner* );
28 void __nvoc_dtor_KernelSec2(KernelSec2*);
29 extern const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelSec2;
30 
31 static const struct NVOC_RTTI __nvoc_rtti_KernelSec2_KernelSec2 = {
32     /*pClassDef=*/          &__nvoc_class_def_KernelSec2,
33     /*dtor=*/               (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_KernelSec2,
34     /*offset=*/             0,
35 };
36 
37 static const struct NVOC_RTTI __nvoc_rtti_KernelSec2_Object = {
38     /*pClassDef=*/          &__nvoc_class_def_Object,
39     /*dtor=*/               &__nvoc_destructFromBase,
40     /*offset=*/             NV_OFFSETOF(KernelSec2, __nvoc_base_OBJENGSTATE.__nvoc_base_Object),
41 };
42 
43 static const struct NVOC_RTTI __nvoc_rtti_KernelSec2_OBJENGSTATE = {
44     /*pClassDef=*/          &__nvoc_class_def_OBJENGSTATE,
45     /*dtor=*/               &__nvoc_destructFromBase,
46     /*offset=*/             NV_OFFSETOF(KernelSec2, __nvoc_base_OBJENGSTATE),
47 };
48 
49 static const struct NVOC_RTTI __nvoc_rtti_KernelSec2_IntrService = {
50     /*pClassDef=*/          &__nvoc_class_def_IntrService,
51     /*dtor=*/               &__nvoc_destructFromBase,
52     /*offset=*/             NV_OFFSETOF(KernelSec2, __nvoc_base_IntrService),
53 };
54 
55 static const struct NVOC_RTTI __nvoc_rtti_KernelSec2_KernelFalcon = {
56     /*pClassDef=*/          &__nvoc_class_def_KernelFalcon,
57     /*dtor=*/               &__nvoc_destructFromBase,
58     /*offset=*/             NV_OFFSETOF(KernelSec2, __nvoc_base_KernelFalcon),
59 };
60 
61 static const struct NVOC_CASTINFO __nvoc_castinfo_KernelSec2 = {
62     /*numRelatives=*/       5,
63     /*relatives=*/ {
64         &__nvoc_rtti_KernelSec2_KernelSec2,
65         &__nvoc_rtti_KernelSec2_KernelFalcon,
66         &__nvoc_rtti_KernelSec2_IntrService,
67         &__nvoc_rtti_KernelSec2_OBJENGSTATE,
68         &__nvoc_rtti_KernelSec2_Object,
69     },
70 };
71 
72 const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSec2 =
73 {
74     /*classInfo=*/ {
75         /*size=*/               sizeof(KernelSec2),
76         /*classId=*/            classId(KernelSec2),
77         /*providerId=*/         &__nvoc_rtti_provider,
78 #if NV_PRINTF_STRINGS_ALLOWED
79         /*name=*/               "KernelSec2",
80 #endif
81     },
82     /*objCreatefn=*/        (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_KernelSec2,
83     /*pCastInfo=*/          &__nvoc_castinfo_KernelSec2,
84     /*pExportInfo=*/        &__nvoc_export_info_KernelSec2
85 };
86 
87 static NV_STATUS __nvoc_thunk_KernelSec2_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, ENGDESCRIPTOR arg0) {
88     return ksec2ConstructEngine(pGpu, (struct KernelSec2 *)(((unsigned char *)pKernelSec2) - __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0);
89 }
90 
91 static void __nvoc_thunk_KernelSec2_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelSec2, IntrServiceRecord pRecords[166]) {
92     ksec2RegisterIntrService(pGpu, (struct KernelSec2 *)(((unsigned char *)pKernelSec2) - __nvoc_rtti_KernelSec2_IntrService.offset), pRecords);
93 }
94 
95 static NV_STATUS __nvoc_thunk_KernelSec2_intrservServiceNotificationInterrupt(struct OBJGPU *arg0, struct IntrService *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) {
96     return ksec2ServiceNotificationInterrupt(arg0, (struct KernelSec2 *)(((unsigned char *)arg1) - __nvoc_rtti_KernelSec2_IntrService.offset), arg2);
97 }
98 
99 static NV_STATUS __nvoc_thunk_KernelSec2_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelSec2) {
100     return ksec2ResetHw(pGpu, (struct KernelSec2 *)(((unsigned char *)pKernelSec2) - __nvoc_rtti_KernelSec2_KernelFalcon.offset));
101 }
102 
103 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StateLoad(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) {
104     return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0);
105 }
106 
107 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StateUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) {
108     return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0);
109 }
110 
111 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StateInitLocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) {
112     return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset));
113 }
114 
115 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePreLoad(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) {
116     return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0);
117 }
118 
119 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePostUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) {
120     return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0);
121 }
122 
123 static void __nvoc_thunk_OBJENGSTATE_ksec2StateDestroy(POBJGPU pGpu, struct KernelSec2 *pEngstate) {
124     engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset));
125 }
126 
127 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePreUnload(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) {
128     return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0);
129 }
130 
131 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StateInitUnlocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) {
132     return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset));
133 }
134 
135 static void __nvoc_thunk_OBJENGSTATE_ksec2InitMissing(POBJGPU pGpu, struct KernelSec2 *pEngstate) {
136     engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset));
137 }
138 
139 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePreInitLocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) {
140     return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset));
141 }
142 
143 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked(POBJGPU pGpu, struct KernelSec2 *pEngstate) {
144     return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset));
145 }
146 
147 static NvBool __nvoc_thunk_IntrService_ksec2ClearInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceClearInterruptArguments *pParams) {
148     return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelSec2_IntrService.offset), pParams);
149 }
150 
151 static NV_STATUS __nvoc_thunk_OBJENGSTATE_ksec2StatePostLoad(POBJGPU pGpu, struct KernelSec2 *pEngstate, NvU32 arg0) {
152     return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg0);
153 }
154 
155 static NvBool __nvoc_thunk_OBJENGSTATE_ksec2IsPresent(POBJGPU pGpu, struct KernelSec2 *pEngstate) {
156     return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset));
157 }
158 
159 static NvU32 __nvoc_thunk_IntrService_ksec2ServiceInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams) {
160     return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelSec2_IntrService.offset), pParams);
161 }
162 
163 const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelSec2 =
164 {
165     /*numEntries=*/     0,
166     /*pExportEntries=*/  0
167 };
168 
169 void __nvoc_dtor_OBJENGSTATE(OBJENGSTATE*);
170 void __nvoc_dtor_IntrService(IntrService*);
171 void __nvoc_dtor_KernelFalcon(KernelFalcon*);
172 void __nvoc_dtor_KernelSec2(KernelSec2 *pThis) {
173     __nvoc_ksec2Destruct(pThis);
174     __nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
175     __nvoc_dtor_IntrService(&pThis->__nvoc_base_IntrService);
176     __nvoc_dtor_KernelFalcon(&pThis->__nvoc_base_KernelFalcon);
177     PORT_UNREFERENCED_VARIABLE(pThis);
178 }
179 
180 void __nvoc_init_dataField_KernelSec2(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecowner) {
181     RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
182     const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
183     ChipHal *chipHal = &pRmhalspecowner->chipHal;
184     const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
185     PORT_UNREFERENCED_VARIABLE(pThis);
186     PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
187     PORT_UNREFERENCED_VARIABLE(rmVariantHal);
188     PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
189     PORT_UNREFERENCED_VARIABLE(chipHal);
190     PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
191 }
192 
193 NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* );
194 NV_STATUS __nvoc_ctor_IntrService(IntrService* );
195 NV_STATUS __nvoc_ctor_KernelFalcon(KernelFalcon* , RmHalspecOwner* );
196 NV_STATUS __nvoc_ctor_KernelSec2(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecowner) {
197     NV_STATUS status = NV_OK;
198     status = __nvoc_ctor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
199     if (status != NV_OK) goto __nvoc_ctor_KernelSec2_fail_OBJENGSTATE;
200     status = __nvoc_ctor_IntrService(&pThis->__nvoc_base_IntrService);
201     if (status != NV_OK) goto __nvoc_ctor_KernelSec2_fail_IntrService;
202     status = __nvoc_ctor_KernelFalcon(&pThis->__nvoc_base_KernelFalcon, pRmhalspecowner);
203     if (status != NV_OK) goto __nvoc_ctor_KernelSec2_fail_KernelFalcon;
204     __nvoc_init_dataField_KernelSec2(pThis, pRmhalspecowner);
205     goto __nvoc_ctor_KernelSec2_exit; // Success
206 
207 __nvoc_ctor_KernelSec2_fail_KernelFalcon:
208     __nvoc_dtor_IntrService(&pThis->__nvoc_base_IntrService);
209 __nvoc_ctor_KernelSec2_fail_IntrService:
210     __nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
211 __nvoc_ctor_KernelSec2_fail_OBJENGSTATE:
212 __nvoc_ctor_KernelSec2_exit:
213 
214     return status;
215 }
216 
217 static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecowner) {
218     RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
219     const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
220     ChipHal *chipHal = &pRmhalspecowner->chipHal;
221     const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
222     PORT_UNREFERENCED_VARIABLE(pThis);
223     PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
224     PORT_UNREFERENCED_VARIABLE(rmVariantHal);
225     PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
226     PORT_UNREFERENCED_VARIABLE(chipHal);
227     PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
228 
229     // Hal function -- ksec2ConstructEngine
230     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
231     {
232         pThis->__ksec2ConstructEngine__ = &ksec2ConstructEngine_IMPL;
233     }
234 
235     // Hal function -- ksec2RegisterIntrService
236     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
237     {
238         pThis->__ksec2RegisterIntrService__ = &ksec2RegisterIntrService_IMPL;
239     }
240 
241     // Hal function -- ksec2ServiceNotificationInterrupt
242     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
243     {
244         pThis->__ksec2ServiceNotificationInterrupt__ = &ksec2ServiceNotificationInterrupt_IMPL;
245     }
246 
247     // Hal function -- ksec2ConfigureFalcon
248     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
249     {
250         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
251         {
252             pThis->__ksec2ConfigureFalcon__ = &ksec2ConfigureFalcon_TU102;
253         }
254         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
255         {
256             pThis->__ksec2ConfigureFalcon__ = &ksec2ConfigureFalcon_GA100;
257         }
258         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
259         {
260             pThis->__ksec2ConfigureFalcon__ = &ksec2ConfigureFalcon_GA102;
261         }
262     }
263 
264     // Hal function -- ksec2ResetHw
265     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
266     {
267         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
268         {
269             pThis->__ksec2ResetHw__ = &ksec2ResetHw_TU102;
270         }
271     }
272 
273     // Hal function -- ksec2ReadUcodeFuseVersion
274     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
275     {
276         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
277         {
278             pThis->__ksec2ReadUcodeFuseVersion__ = &ksec2ReadUcodeFuseVersion_b2b553;
279         }
280         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
281         {
282             pThis->__ksec2ReadUcodeFuseVersion__ = &ksec2ReadUcodeFuseVersion_GA100;
283         }
284     }
285 
286     // Hal function -- ksec2GetBinArchiveBlUcode
287     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
288     {
289         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 */
290         {
291             pThis->__ksec2GetBinArchiveBlUcode__ = &ksec2GetBinArchiveBlUcode_TU102;
292         }
293         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
294         {
295             pThis->__ksec2GetBinArchiveBlUcode__ = &ksec2GetBinArchiveBlUcode_80f438;
296         }
297     }
298 
299     // Hal function -- ksec2GetGenericBlUcode
300     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
301     {
302         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 */
303         {
304             pThis->__ksec2GetGenericBlUcode__ = &ksec2GetGenericBlUcode_TU102;
305         }
306         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
307         {
308             pThis->__ksec2GetGenericBlUcode__ = &ksec2GetGenericBlUcode_5baef9;
309         }
310     }
311 
312     // Hal function -- ksec2GetBinArchiveSecurescrubUcode
313     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
314     {
315         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */
316         {
317             pThis->__ksec2GetBinArchiveSecurescrubUcode__ = &ksec2GetBinArchiveSecurescrubUcode_AD10X;
318         }
319         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x1000ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | GH100 */
320         {
321             pThis->__ksec2GetBinArchiveSecurescrubUcode__ = &ksec2GetBinArchiveSecurescrubUcode_80f438;
322         }
323     }
324 
325     pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelSec2_engstateConstructEngine;
326 
327     pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelSec2_intrservRegisterIntrService;
328 
329     pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_thunk_KernelSec2_intrservServiceNotificationInterrupt;
330 
331     pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_thunk_KernelSec2_kflcnResetHw;
332 
333     pThis->__ksec2StateLoad__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateLoad;
334 
335     pThis->__ksec2StateUnload__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateUnload;
336 
337     pThis->__ksec2StateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateInitLocked;
338 
339     pThis->__ksec2StatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePreLoad;
340 
341     pThis->__ksec2StatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePostUnload;
342 
343     pThis->__ksec2StateDestroy__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateDestroy;
344 
345     pThis->__ksec2StatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePreUnload;
346 
347     pThis->__ksec2StateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_ksec2StateInitUnlocked;
348 
349     pThis->__ksec2InitMissing__ = &__nvoc_thunk_OBJENGSTATE_ksec2InitMissing;
350 
351     pThis->__ksec2StatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePreInitLocked;
352 
353     pThis->__ksec2StatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked;
354 
355     pThis->__ksec2ClearInterrupt__ = &__nvoc_thunk_IntrService_ksec2ClearInterrupt;
356 
357     pThis->__ksec2StatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_ksec2StatePostLoad;
358 
359     pThis->__ksec2IsPresent__ = &__nvoc_thunk_OBJENGSTATE_ksec2IsPresent;
360 
361     pThis->__ksec2ServiceInterrupt__ = &__nvoc_thunk_IntrService_ksec2ServiceInterrupt;
362 }
363 
364 void __nvoc_init_funcTable_KernelSec2(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecowner) {
365     __nvoc_init_funcTable_KernelSec2_1(pThis, pRmhalspecowner);
366 }
367 
368 void __nvoc_init_OBJENGSTATE(OBJENGSTATE*);
369 void __nvoc_init_IntrService(IntrService*);
370 void __nvoc_init_KernelFalcon(KernelFalcon*, RmHalspecOwner* );
371 void __nvoc_init_KernelSec2(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecowner) {
372     pThis->__nvoc_pbase_KernelSec2 = pThis;
373     pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object;
374     pThis->__nvoc_pbase_OBJENGSTATE = &pThis->__nvoc_base_OBJENGSTATE;
375     pThis->__nvoc_pbase_IntrService = &pThis->__nvoc_base_IntrService;
376     pThis->__nvoc_pbase_KernelFalcon = &pThis->__nvoc_base_KernelFalcon;
377     __nvoc_init_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
378     __nvoc_init_IntrService(&pThis->__nvoc_base_IntrService);
379     __nvoc_init_KernelFalcon(&pThis->__nvoc_base_KernelFalcon, pRmhalspecowner);
380     __nvoc_init_funcTable_KernelSec2(pThis, pRmhalspecowner);
381 }
382 
383 NV_STATUS __nvoc_objCreate_KernelSec2(KernelSec2 **ppThis, Dynamic *pParent, NvU32 createFlags) {
384     NV_STATUS status;
385     Object *pParentObj;
386     KernelSec2 *pThis;
387     RmHalspecOwner *pRmhalspecowner;
388 
389     status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(KernelSec2), (void**)&pThis, (void**)ppThis);
390     if (status != NV_OK)
391         return status;
392 
393     portMemSet(pThis, 0, sizeof(KernelSec2));
394 
395     __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_KernelSec2);
396 
397     pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.createFlags = createFlags;
398 
399     if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
400     {
401         pParentObj = dynamicCast(pParent, Object);
402         objAddChild(pParentObj, &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object);
403     }
404     else
405     {
406         pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.pParent = NULL;
407     }
408 
409     if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL)
410         pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent);
411     NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT);
412 
413     __nvoc_init_KernelSec2(pThis, pRmhalspecowner);
414     status = __nvoc_ctor_KernelSec2(pThis, pRmhalspecowner);
415     if (status != NV_OK) goto __nvoc_objCreate_KernelSec2_cleanup;
416 
417     *ppThis = pThis;
418 
419     return NV_OK;
420 
421 __nvoc_objCreate_KernelSec2_cleanup:
422     // do not call destructors here since the constructor already called them
423     if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
424         portMemSet(pThis, 0, sizeof(KernelSec2));
425     else
426         portMemFree(pThis);
427 
428     // coverity[leaked_storage:FALSE]
429     return status;
430 }
431 
432 NV_STATUS __nvoc_objCreateDynamic_KernelSec2(KernelSec2 **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
433     NV_STATUS status;
434 
435     status = __nvoc_objCreate_KernelSec2(ppThis, pParent, createFlags);
436 
437     return status;
438 }
439 
440