1 #ifndef _G_KERNEL_VGPU_MGR_NVOC_H_ 2 #define _G_KERNEL_VGPU_MGR_NVOC_H_ 3 #include "nvoc/runtime.h" 4 5 #ifdef __cplusplus 6 extern "C" { 7 #endif 8 9 /* 10 * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 11 * SPDX-License-Identifier: MIT 12 * 13 * Permission is hereby granted, free of charge, to any person obtaining a 14 * copy of this software and associated documentation files (the "Software"), 15 * to deal in the Software without restriction, including without limitation 16 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 17 * and/or sell copies of the Software, and to permit persons to whom the 18 * Software is furnished to do so, subject to the following conditions: 19 * 20 * The above copyright notice and this permission notice shall be included in 21 * all copies or substantial portions of the Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 29 * DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include "g_kernel_vgpu_mgr_nvoc.h" 33 34 #ifndef __kernel_vgpu_mgr_h__ 35 #define __kernel_vgpu_mgr_h__ 36 37 #include "ctrl/ctrl2080/ctrl2080vgpumgrinternal.h" 38 #include "ctrl/ctrla081.h" 39 #include "ctrl/ctrla084.h" 40 #include "ctrl/ctrlc637.h" 41 42 #include "gpu/gpu.h" 43 #include "nv-hypervisor.h" 44 #include "nvlimits.h" 45 #include "core/core.h" 46 #include "resserv/resserv.h" 47 #include "nvoc/prelude.h" 48 #include "kernel/gpu/fifo/kernel_fifo.h" 49 #include "virtualization/common_vgpu_mgr.h" 50 51 struct PhysMemSubAlloc; 52 53 #ifndef __NVOC_CLASS_PhysMemSubAlloc_TYPEDEF__ 54 #define __NVOC_CLASS_PhysMemSubAlloc_TYPEDEF__ 55 typedef struct PhysMemSubAlloc PhysMemSubAlloc; 56 #endif /* __NVOC_CLASS_PhysMemSubAlloc_TYPEDEF__ */ 57 58 #ifndef __nvoc_class_id_PhysMemSubAlloc 59 #define __nvoc_class_id_PhysMemSubAlloc 0x2351fc 60 #endif /* __nvoc_class_id_PhysMemSubAlloc */ 61 62 63 struct VgpuConfigApi; 64 65 #ifndef __NVOC_CLASS_VgpuConfigApi_TYPEDEF__ 66 #define __NVOC_CLASS_VgpuConfigApi_TYPEDEF__ 67 typedef struct VgpuConfigApi VgpuConfigApi; 68 #endif /* __NVOC_CLASS_VgpuConfigApi_TYPEDEF__ */ 69 70 #ifndef __nvoc_class_id_VgpuConfigApi 71 #define __nvoc_class_id_VgpuConfigApi 0x4d560a 72 #endif /* __nvoc_class_id_VgpuConfigApi */ 73 74 75 typedef struct KERNEL_MIG_GPU_INSTANCE KERNEL_MIG_GPU_INSTANCE; 76 77 /* vGPU events info lookup node*/ 78 typedef struct VGPU_EVENT_INFO_NODE 79 { 80 NvHandle hClient; 81 NvHandle hVgpuConfig; 82 struct VgpuConfigApi *pVgpuConfigApi; 83 } VGPU_CONFIG_EVENT_INFO_NODE; 84 85 MAKE_LIST(VGPU_CONFIG_EVENT_INFO_NODE_LIST, VGPU_CONFIG_EVENT_INFO_NODE); 86 87 /* This structure represents vGPU guest's (VM's) information */ 88 typedef struct 89 { 90 VM_ID_TYPE vmIdType; 91 VM_ID guestVmId; 92 NvU8 vmName[NVA081_VM_NAME_SIZE]; /* Used only on KVM */ 93 } KERNEL_GUEST_VM_INFO; 94 95 /* This structure represents vgpu device's FB information 96 * which is visible to that guest. Here, 'offset' is offset 97 * from start of physical FB addresses in host FB space. 98 */ 99 typedef struct VGPU_DEVICE_GUEST_FB_INFO 100 { 101 NvU64 offset; 102 NvU64 length; 103 NvBool bValid; 104 } VGPU_DEVICE_GUEST_FB_INFO; 105 106 /* This structure represents guest vgpu device's (assigned to VM) information. 107 For VGPU-GSP, only KERNEL_HOST_VGPU_DEVICE is avaliable on kernel. */ 108 typedef struct KERNEL_HOST_VGPU_DEVICE 109 { 110 NvU32 vgpuType; 111 NvHandle hClient; /*Internal RM client to dup smcPartition*/ 112 struct KERNEL_VGPU_GUEST *vgpuGuest; 113 NvU32 gfid; 114 NvU32 swizzId; 115 NvU32 numPluginChannels; 116 NvU32 chidOffset[RM_ENGINE_TYPE_LAST]; 117 NvU32 channelCount[RM_ENGINE_TYPE_LAST]; /*Number of channels available to the VF*/ 118 NvU8 vgpuUuid[RM_SHA1_GID_SIZE]; 119 void *pVgpuVfioRef; 120 struct REQUEST_VGPU_INFO_NODE *pRequestVgpuInfoNode; 121 struct PhysMemSubAlloc *pPhysMemSubAlloc; 122 struct HOST_VGPU_DEVICE *pHostVgpuDevice; 123 // Legacy fields 124 NvHandle hPluginFBAllocationClient; 125 VGPU_DEVICE_GUEST_FB_INFO vgpuDeviceGuestFbInfo; 126 NvU32 *pGuestFbSegment; 127 NvU64 guestFbSegmentPageSize; 128 NvBool bOfflinedPageInfoValid; 129 NvU32 offlinedPageCount; /* offlined page count */ 130 NvU64 offlinedPageGpa[NV2080_CTRL_FB_OFFLINED_PAGES_MAX_PAGES]; 131 MEMORY_DESCRIPTOR *pGspPluginHeapMemDesc; 132 NvBool bDisableDefaultSmcExecPartRestore; 133 struct GPUMGR_SAVE_COMPUTE_INSTANCE savedExecPartitions[NVC637_CTRL_MAX_EXEC_PARTITIONS]; 134 } KERNEL_HOST_VGPU_DEVICE; 135 136 MAKE_LIST(KERNEL_HOST_VGPU_DEVICE_LIST, KERNEL_HOST_VGPU_DEVICE); 137 138 /* vGPU guest definition */ 139 typedef struct KERNEL_VGPU_GUEST 140 { 141 KERNEL_GUEST_VM_INFO guestVmInfo; // guest VM's information 142 NvU32 numVgpuDevices; 143 } KERNEL_VGPU_GUEST; 144 145 MAKE_LIST(KERNEL_VGPU_GUEST_LIST, KERNEL_VGPU_GUEST); 146 147 /* pGPU information */ 148 typedef struct 149 { 150 NvU32 gpuPciId; 151 NvU32 supportedTypeIds[MAX_VGPU_TYPES_PER_PGPU]; 152 NvU32 numActiveVgpu; 153 NvU32 numVgpuTypes; 154 NvU32 vgpuConfigState; 155 KERNEL_HOST_VGPU_DEVICE_LIST listHostVgpuDeviceHead; 156 VGPU_TYPE *vgpuTypes[MAX_VGPU_TYPES_PER_PGPU]; 157 NvBool isAttached; 158 // Per VF per engine ChidOffset. Used for reserving guest channels per engine 159 NvU32 chidOffset[VGPU_MAX_GFID][RM_ENGINE_TYPE_LAST]; 160 VGPU_CONFIG_EVENT_INFO_NODE_LIST listVgpuConfigEventsHead; 161 NvBool sriovEnabled; 162 NvU32 numCreatedVgpu; // Used only on KVM 163 vgpu_vf_pci_info vfPciInfo[MAX_VF_COUNT_PER_GPU]; // Used only on KVM 164 NvU64 createdVfMask; // Used only on KVM 165 166 /*! 167 * SwizzId Map. HW currently uses only 14 swizzIds. Every bit position 168 * in this mask represents swizzID and a "1" in bitMask states SwzzId 169 * in already assigned to a vGPU device. 170 */ 171 NvU64 assignedSwizzIdMask; 172 NvU32 fractionalMultiVgpu; 173 } KERNEL_PHYS_GPU_INFO; 174 175 /* vGPU info received from mdev kernel module for KVM */ 176 typedef struct REQUEST_VGPU_INFO_NODE 177 { 178 char configParams[VGPU_CONFIG_PARAMS_MAX_LENGTH]; 179 NvU8 mdevUuid[VGPU_UUID_SIZE]; 180 void *waitQueue; 181 NvU8 *vmName; 182 NvS32 *returnStatus; 183 NvU32 gpuPciId; 184 NvU32 qemuPid; 185 NvU16 vgpuId; 186 VGPU_DEVICE_STATE deviceState; 187 NvU32 gpuPciBdf; 188 NvU32 swizzId; 189 KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; 190 } REQUEST_VGPU_INFO_NODE; 191 192 MAKE_LIST(REQUEST_VGPU_INFO_NODE_LIST, REQUEST_VGPU_INFO_NODE); 193 194 #ifdef NVOC_KERNEL_VGPU_MGR_H_PRIVATE_ACCESS_ALLOWED 195 #define PRIVATE_FIELD(x) x 196 #else 197 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) 198 #endif 199 struct KernelVgpuMgr { 200 const struct NVOC_RTTI *__nvoc_rtti; 201 struct Object __nvoc_base_Object; 202 struct Object *__nvoc_pbase_Object; 203 struct KernelVgpuMgr *__nvoc_pbase_KernelVgpuMgr; 204 KERNEL_PHYS_GPU_INFO pgpuInfo[32]; 205 NvU32 pgpuCount; 206 VGPU_TYPE_LIST listVgpuTypeHead; 207 KERNEL_VGPU_GUEST_LIST listVgpuGuestHead; 208 NvU32 user_min_supported_version; 209 NvU32 user_max_supported_version; 210 struct OBJEHEAP *pHeap; 211 REQUEST_VGPU_INFO_NODE_LIST listRequestVgpuHead; 212 }; 213 214 #ifndef __NVOC_CLASS_KernelVgpuMgr_TYPEDEF__ 215 #define __NVOC_CLASS_KernelVgpuMgr_TYPEDEF__ 216 typedef struct KernelVgpuMgr KernelVgpuMgr; 217 #endif /* __NVOC_CLASS_KernelVgpuMgr_TYPEDEF__ */ 218 219 #ifndef __nvoc_class_id_KernelVgpuMgr 220 #define __nvoc_class_id_KernelVgpuMgr 0xa793dd 221 #endif /* __nvoc_class_id_KernelVgpuMgr */ 222 223 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelVgpuMgr; 224 225 #define __staticCast_KernelVgpuMgr(pThis) \ 226 ((pThis)->__nvoc_pbase_KernelVgpuMgr) 227 228 #ifdef __nvoc_kernel_vgpu_mgr_h_disabled 229 #define __dynamicCast_KernelVgpuMgr(pThis) ((KernelVgpuMgr*)NULL) 230 #else //__nvoc_kernel_vgpu_mgr_h_disabled 231 #define __dynamicCast_KernelVgpuMgr(pThis) \ 232 ((KernelVgpuMgr*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelVgpuMgr))) 233 #endif //__nvoc_kernel_vgpu_mgr_h_disabled 234 235 236 NV_STATUS __nvoc_objCreateDynamic_KernelVgpuMgr(KernelVgpuMgr**, Dynamic*, NvU32, va_list); 237 238 NV_STATUS __nvoc_objCreate_KernelVgpuMgr(KernelVgpuMgr**, Dynamic*, NvU32); 239 #define __objCreate_KernelVgpuMgr(ppNewObj, pParent, createFlags) \ 240 __nvoc_objCreate_KernelVgpuMgr((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) 241 242 NV_STATUS kvgpumgrConstruct_IMPL(struct KernelVgpuMgr *arg_pKernelVgpuMgr); 243 244 #define __nvoc_kvgpumgrConstruct(arg_pKernelVgpuMgr) kvgpumgrConstruct_IMPL(arg_pKernelVgpuMgr) 245 void kvgpumgrDestruct_IMPL(struct KernelVgpuMgr *pKernelVgpuMgr); 246 247 #define __nvoc_kvgpumgrDestruct(pKernelVgpuMgr) kvgpumgrDestruct_IMPL(pKernelVgpuMgr) 248 #undef PRIVATE_FIELD 249 250 251 NV_STATUS 252 kvgpumgrGetPgpuIndex(struct KernelVgpuMgr *pKernelVgpuMgr, NvU32 gpuPciId, NvU32* index); 253 254 NV_STATUS 255 kvgpumgrGetVgpuTypeInfo(NvU32 vgpuTypeId, VGPU_TYPE **vgpuType); 256 257 NV_STATUS 258 kvgpumgrPgpuAddVgpuType(struct OBJGPU *pGpu, NvBool discardVgpuTypes, NVA081_CTRL_VGPU_INFO *pVgpuInfo); 259 260 NV_STATUS 261 kvgpumgrGetConfigEventInfoFromDb(NvHandle hClient, NvHandle hVgpuConfig, 262 VGPU_CONFIG_EVENT_INFO_NODE **ppVgpuConfigEventInfoNode, 263 NvU32 pgpuIndex); 264 265 NV_STATUS 266 kvgpumgrAttachGpu(NvU32 gpuPciId); 267 268 NV_STATUS 269 kvgpumgrDetachGpu(NvU32 gpuPciId); 270 271 NV_STATUS 272 kvgpumgrGuestRegister(struct OBJGPU *pGpu, 273 NvU32 gfid, 274 NvU32 vgpuType, 275 NvU32 vmPid, 276 VM_ID_TYPE vmIdType, 277 VM_ID guestVmId, 278 NvHandle hPluginFBAllocationClient, 279 NvU32 numChannels, 280 NvU32 numPluginChannels, 281 NvU32 swizzId, 282 NvU32 vgpuDeviceInstanceId, 283 NvBool bDisableDefaultSmcExecPartRestore, 284 KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice); 285 286 NV_STATUS 287 kvgpumgrGuestUnregister(struct OBJGPU *pGpu, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice); 288 289 NV_STATUS 290 kvgpumgrGetMaxInstanceOfVgpu(NvU32 vgpuTypeId, NvU32 *maxInstanceVgpu); 291 292 NV_STATUS 293 kvgpumgrCheckVgpuTypeCreatable(KERNEL_PHYS_GPU_INFO *pPhysGpuInfo, VGPU_TYPE *vgpuTypeInfo); 294 295 NV_STATUS 296 kvgpumgrEnumerateVgpuPerPgpu(struct OBJGPU *pGpu, NV2080_CTRL_VGPU_MGR_INTERNAL_ENUMERATE_VGPU_PER_PGPU_PARAMS *pParams); 297 298 NV_STATUS 299 kvgpumgrClearGuestVmInfo(struct OBJGPU *pGpu, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice); 300 301 NV_STATUS 302 kvgpumgrGetSwizzId(struct OBJGPU *pGpu, 303 KERNEL_PHYS_GPU_INFO *pPhysGpuInfo, 304 NvU32 partitionFlag, 305 NvU32 *swizzId); 306 307 NV_STATUS 308 kvgpumgrGetVgpuFbUsage(struct OBJGPU *pGpu, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_USAGE_PARAMS *pParams); 309 310 NV_STATUS 311 kvgpumgrSetVgpuEncoderCapacity(struct OBJGPU *pGpu, NvU8 *vgpuUuid, NvU32 encoderCapacity); 312 313 NV_STATUS 314 kvgpumgrStart(const NvU8 *pMdevUuid, void *waitQueue, NvS32 *returnStatus, 315 NvU8 *vmName, NvU32 qemuPid); 316 317 NV_STATUS 318 kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, 319 NvU32 vgpuTypeId, NvU16 *vgpuId, NvU32 gpuPciBdf); 320 321 NV_STATUS 322 kvgpumgrDeleteRequestVgpu(const NvU8 *pMdevUuid, NvU16 vgpuId); 323 324 NV_STATUS 325 kvgpumgrGetHostVgpuDeviceFromMdevUuid(NvU32 gpuPciId, const NvU8 *pMdevUuid, 326 KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice); 327 328 NV_STATUS 329 kvgpumgrGetHostVgpuDeviceFromVmId(NvU32 gpuPciId, VM_ID guestVmId, 330 KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice, 331 VM_ID_TYPE vmIdType); 332 333 NV_STATUS 334 kvgpumgrGetCreatableVgpuTypes(struct OBJGPU *pGpu, struct KernelVgpuMgr *pKernelVgpuMgr, NvU32 pgpuIndex, NvU32* numVgpuTypes, NvU32* vgpuTypes); 335 336 NvU32 337 kvgpumgrGetPgpuDevIdEncoding(struct OBJGPU *pGpu, NvU8 *pgpuString, NvU32 strSize); 338 339 NvU32 340 kvgpumgrGetPgpuSubdevIdEncoding(struct OBJGPU *pGpu, NvU8 *pgpuString, NvU32 strSize); 341 342 NvU32 343 kvgpumgrGetPgpuFSEncoding(struct OBJGPU *pGpu, NvU8 *pgpuString, NvU32 strSize); 344 345 NvU32 346 kvgpumgrGetPgpuCapEncoding(struct OBJGPU *pGpu, NvU8 *pgpuString, NvU32 strSize); 347 348 NvBool 349 kvgpumgrCheckPgpuMigrationSupport(struct OBJGPU *pGpu); 350 351 NV_STATUS 352 kvgpumgrGetHostVgpuVersion(NvU32 *user_min_supported_version, 353 NvU32 *user_max_supported_version); 354 355 NV_STATUS 356 kvgpumgrSetHostVgpuVersion(NvU32 user_min_supported_version, 357 NvU32 user_max_supported_version); 358 359 NV_STATUS 360 kvgpumgrGetPartitionFlag(NvU32 vgpuTypeId, 361 NvU32 *partitionFlag); 362 363 NV_STATUS 364 kvgpumgrProcessVfInfo(NvU32 gpuPciId, NvU8 cmd, NvU32 domain, NvU32 bus, NvU32 slot, NvU32 function, NvBool isMdevAttached, vgpu_vf_pci_info *vf_info); 365 366 NV_STATUS 367 kvgpumgrSendAllVgpuTypesToGsp(struct OBJGPU *pGpu); 368 369 NvBool 370 kvgpumgrIsHeterogeneousVgpuSupported(void); 371 372 NV_STATUS 373 kvgpumgrGetHostVgpuDeviceFromGfid(NvU32 gpuPciId, NvU32 gfid, 374 KERNEL_HOST_VGPU_DEVICE** ppHostVgpuDevice); 375 NV_STATUS 376 kvgpuMgrRestoreSmcExecPart(struct OBJGPU *pGpu,KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, 377 KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance); 378 379 #endif // __kernel_vgpu_mgr_h__ 380 381 #ifdef __cplusplus 382 } // extern "C" 383 #endif 384 #endif // _G_KERNEL_VGPU_MGR_NVOC_H_ 385