1 #ifndef _G_PLATFORM_REQUEST_HANDLER_NVOC_H_
2 #define _G_PLATFORM_REQUEST_HANDLER_NVOC_H_
3 #include "nvoc/runtime.h"
4 
5 #ifdef __cplusplus
6 extern "C" {
7 #endif
8 
9 /*
10  * SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
11  * SPDX-License-Identifier: MIT
12  *
13  * Permission is hereby granted, free of charge, to any person obtaining a
14  * copy of this software and associated documentation files (the "Software"),
15  * to deal in the Software without restriction, including without limitation
16  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
17  * and/or sell copies of the Software, and to permit persons to whom the
18  * Software is furnished to do so, subject to the following conditions:
19  *
20  * The above copyright notice and this permission notice shall be included in
21  * all copies or substantial portions of the Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
27  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
28  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
29  * DEALINGS IN THE SOFTWARE.
30  */
31 
32 #include "g_platform_request_handler_nvoc.h"
33 
34 #ifndef PLATFORM_REQUEST_HANDLER_H
35 #define PLATFORM_REQUEST_HANDLER_H
36 
37 /*!
38  * @file
39  * @brief Provides definitions for PlatformRequestHandler data structures and interfaces.
40  *
41  * Defines and structures used for the PlatformRequestHandler Object.
42  * PlatformRequestHandler handles ACPI events from SBIOS within the Resource Manager.
43  * PlatformRequestHandler is a child of OBJSYS object.
44  */
45 
46 /* ------------------------ Includes --------------------------------------- */
47 #include "core/core.h"
48 #include "os/os.h"
49 #include "platform/platform_request_handler_utils.h"
50 #include "ctrl/ctrl0000/ctrl0000system.h"
51 #include "ctrl/ctrl2080/ctrl2080internal.h"
52 
53 /* ------------------------ Macros ----------------------------------------- */
54 //
55 // Macro to check if SW ACPI version 2X or not
56 //
57 #define PFM_REQ_HNDLR_IS_ACPI_VERSION_SW_2X(pPlatformRequestHandler)                                       \
58     (pPlatformRequestHandler->sensorData.PFMREQHNDLRACPIData.acpiVersionSw ==                            \
59      NV0000_CTRL_PFM_REQ_HNDLR_ACPI_REVISION_SW_2X)
60 
61 #define PFM_REQ_HNDLR_MAX_SENSORS_IN_BLOCK    (32U)
62 
63 #define PFM_REQ_HNDLR_MAX_GPU_SUPPORTED        (4U)
64 
65 // The following macros are used to attach flags to the sensor IDs in the
66 // Sensor block map and to isolate the IDs from the Sensor block map.
67 #define PFM_REQ_HNDLR_PSR_PUB_TAG             (0x00001000UL)
68 #define PFM_REQ_HNDLR_PSR_ID_MASK             (0x00000FFFUL)
69 #define PFM_REQ_HNDLR_PSR_PUB_ENTRY(x)        ((x) | PFM_REQ_HNDLR_PSR_PUB_TAG)
70 #define PFM_REQ_HNDLR_PSR_ID(x)               ((x) & PFM_REQ_HNDLR_PSR_ID_MASK)
71 #define PFM_REQ_HNDLR_CURR_VALUE_PUB_ENTRY(s) PFM_REQ_HNDLR_PSR_PUB_ENTRY(PFM_REQ_HNDLR_CURR_VALUE(s))
72 
73 // PlatformRequestHandler Counter IDs (block independent)
74 #define PFM_REQ_HNDLR_TGPU_SENSOR             NV0000_CTRL_SYSTEM_PARAM_TGPU
75 #define PFM_REQ_HNDLR_CTGP_SENSOR             NV0000_CTRL_SYSTEM_PARAM_CTGP
76 #define PFM_REQ_HNDLR_PPMD_SENSOR             NV0000_CTRL_SYSTEM_PARAM_PPMD
77 #define PFM_REQ_HNDLR_PSHAREPARAMS_COUNT      (9U)
78 #define PFM_REQ_HNDLR_CURR_BASE               (2U)
79 #define PFM_REQ_HNDLR_CURR_VALUE(s)           (PFM_REQ_HNDLR_CURR_BASE + ((s)%PFM_REQ_HNDLR_PSHAREPARAMS_COUNT))
80 #define PFM_REQ_HNDLR_LIMIT_BASE              (PFM_REQ_HNDLR_CURR_BASE + PFM_REQ_HNDLR_PSHAREPARAMS_COUNT)
81 #define PFM_REQ_HNDLR_LIMIT(s)                (PFM_REQ_HNDLR_LIMIT_BASE + ((s)%PFM_REQ_HNDLR_PSHAREPARAMS_COUNT))
82 #define PFM_REQ_HNDLR_PERIOD_BASE             (PFM_REQ_HNDLR_LIMIT_BASE + PFM_REQ_HNDLR_PSHAREPARAMS_COUNT)
83 #define PFM_REQ_HNDLR_PERIOD(s)               (PFM_REQ_HNDLR_PERIOD_BASE + ((s)%PFM_REQ_HNDLR_PSHAREPARAMS_COUNT))
84 #define PFM_REQ_HNDLR_VALID_SENSOR_ID(b,v)    (((b) <= (v)) && ((v) < (b+PFM_REQ_HNDLR_PSHAREPARAMS_COUNT)))
85 #define PFM_REQ_HNDLR_VALID_VALUE_ID(v)       PFM_REQ_HNDLR_VALID_SENSOR_ID(PFM_REQ_HNDLR_CURR_BASE,v)
86 #define PFM_REQ_HNDLR_VALID_LIMIT_ID(v)       PFM_REQ_HNDLR_VALID_SENSOR_ID(PFM_REQ_HNDLR_LIMIT_BASE,v)
87 #define PFM_REQ_HNDLR_AVAIL_SENSOR_MSK        (23U)
88 #define PFM_REQ_HNDLR_TC_ENABLE               (71U)
89 #define PFM_REQ_HNDLR_PM1_STATE_AVAIL         (74U)
90 #define PFM_REQ_HNDLR_TDP_IDX                 (96U)
91 #define PFM_REQ_HNDLR_VPS_PS20_SUPPORT        (97U)
92 #define PFM_REQ_HNDLR_RESERVED_COUNTER       (100U) // This should be the last counter, update as needed.
93 
94 #define PFM_REQ_HNDLR_NUM_COUNTERS            (PFM_REQ_HNDLR_RESERVED_COUNTER + 1)
95 
96 #define PFM_REQ_HNDLR_DEFAULT_COUNTER_HOLD_PERIOD_MS   (20U)
97 
98 // Header to sensor structure
99 typedef struct
100 {
101     NvU32   status;
102     NvU32   ulVersion;
103 
104     NvU32   tGpu;
105 
106     // Reserved legacy fields, do not use!.
107     NvU32   rsvd[6];
108     NvU32   ctgp;
109     NvU32   ppmd;
110 } PFM_REQ_HNDLR_PSHAREDATA, *PPFM_REQ_HNDLR_PSHAREDATA;
111 
112 // Single sensor block
113 typedef struct
114 {
115     NvBool  bSupported;                 // indicates if counter is supported on the current system.
116     NvBool  bVolatile;                  // indicates if counter is volatile or non-volatile.
117     NvBool  bInvalid;                   // indicates if the counter is valid.
118     NvBool  bOverridden;                // indicates if counter has been overridden by the user.
119     NvU32   value;                      // value of the counter.
120     NvU32   lastSampled;                // the last time each sample was collected.
121     NvU32   minInterval;                // minimum time between samples
122 } PFM_REQ_HNDLR_SENSOR_COUNTER;
123 
124 typedef struct
125 {
126     // driver set values
127     NvBool      bPfmReqHndlrSupported;          // reflects if all the required ACPI commands for PlatformRequestHandler are supported.
128 
129     // ACPI set values.
130     NvBool      bSystemParamLimitUpdate;        // reflects SBIOS current value for new update limits being available.
131     NvBool      bEDPpeakLimitUpdateRequest;     // reflects SBIOS current request for EDPpeak limit update event.
132     NvBool      bUserConfigTGPmodeRequest;      // reflects SBIOS current request for User Configurable TGP mode aka Turbo mode update event.
133     NvBool      bPlatformUserConfigTGPSupport;  // reflects SBIOS static requests to override power delta for User Configurable TGP mode
134     NvU32       platformLimitDeltamW;           // Cached limit from platform custimization
135     NvU32       prevSbiosVPStateLimit;          // reflects previous VPState requested to be set by SBIOS.
136 
137     NvU32       acpiVersionSw;                  // mapping between spec and supported sw state
138 } PFM_REQ_HNDLR_ACPI_CACHE;
139 
140 /*!
141  * Data cache for VPstate Info
142  */
143 typedef struct
144 {
145     NvBool bVpsPs20Supported;   // reflects VPStates PS 20 Support
146     NvU32  vPstateIdxHighest;   // reflects the highest VPstate Idx from VBIOS
147 } PFM_REQ_HNDLR_VPSTATE_CACHE;
148 
149 /*!
150  * Data cache for PlatformRequestHandler sensor provider interface
151  */
152 typedef struct
153 {
154     NvU32                         version;                    // SBIOS reported version of PlatformRequestHandler support
155     NvU32                         counterHoldPeriod;          // The period of time a volatile counter will be considered valid
156     PFM_REQ_HNDLR_SENSOR_COUNTER  PFMREQHNDLRSensorCache[PFM_REQ_HNDLR_NUM_COUNTERS];
157     PFM_REQ_HNDLR_ACPI_CACHE      PFMREQHNDLRACPIData;
158     NvU32                         PFMREQHNDLRShareParamsAvailMask;    // mask of the SBIOS reported PShareParams counters.
159 } PFM_REQ_HNDLR_SENSOR_DATA, *PPFM_REQ_HNDLR_SENSOR_DATA;
160 
161 /*!
162  * Platform Power Mode related data
163  */
164 typedef struct
165 {
166 
167     /*!
168      * Set while OS work item is pending execution.
169      */
170     NvBool bWorkItemPending;
171 
172     /*!
173      * Mask of all the platform power modes supported on the system.
174      */
175     NvU8   ppmMaskCurrent;
176 
177     /*!
178      * Current Platform Power Mode.
179      */
180     NvU8   ppmIdxCurrent;
181 
182     /*!
183      * Requested new Platform Power mode index to be set.
184      */
185     NvU8   ppmIdxRequested;
186 } PFM_REQ_HNDLR_PPM_DATA;
187 
188 /*!
189  * Control tracking and cache limits from SBIOS
190  */
191 typedef struct
192 {
193     NvBool  bStateInitialized;
194     NvBool  bPM1ForcedOff;
195     NvBool  bTGPUOverrideRequired;
196 
197     // Current status of system applied EDPpeak update event
198     NvBool  bEDPpeakUpdateEnabled;
199 
200     // Current status of system applied user configurable TGP enable event
201     NvBool  bUserConfigTGPmodeEnabled;
202 
203     // Current status of platform customized and applied user configurable TGP delta
204     NvBool  bPlatformUserConfigTGPmodeEnabled;
205 } PFM_REQ_HNDLR_CONTROL_DATA;
206 
207 /*!
208  * When updating GPU System control parameters, we may evaluate the _DSM method
209  * to query the latest limit inside SBIOS. But we are not allowed to evaluate
210  * ACPI method in level > PASSIVE, thus if we want to update the system limit at
211  * DPC level, we need to queue a workitem to defer the ACPI evaluation to
212  * passive level. This struct is used to record whether a workitem is queued for
213  * this purpose and what counter has been touched before the workitem is
214  * executed. (Refer to _pfmreqhndlrUpdateSystemParamLimitWorkItem for more details)
215  */
216 typedef struct
217 {
218     /*!
219      * Set while OS work item is pending execution.
220      */
221     NvBool    bWorkItemPending;
222 
223     /*!
224      * Bit mask for the counter IDs of the sensor data which has been updated
225      * before the pending work item was executed.
226      */
227     NvU32     queuedCounterMask;
228 } PFM_REQ_HNDLR_SYS_CONTROL_DATA;
229 
230 #ifdef NVOC_PLATFORM_REQUEST_HANDLER_H_PRIVATE_ACCESS_ALLOWED
231 #define PRIVATE_FIELD(x) x
232 #else
233 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
234 #endif
235 struct PlatformRequestHandler {
236     const struct NVOC_RTTI *__nvoc_rtti;
237     struct Object __nvoc_base_Object;
238     struct Object *__nvoc_pbase_Object;
239     struct PlatformRequestHandler *__nvoc_pbase_PlatformRequestHandler;
240     NvBool PDB_PROP_PFMREQHNDLR_SUPPORTED;
241     NvBool PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED;
242     NvBool PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY;
243     NvU32 pfmreqhndlrSupportedGpuIdx;
244     PFM_REQ_HNDLR_SENSOR_DATA sensorData;
245     PFM_REQ_HNDLR_PPM_DATA ppmData;
246     PFM_REQ_HNDLR_CONTROL_DATA controlData;
247     PFM_REQ_HNDLR_SYS_CONTROL_DATA sysControlData;
248     NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_FRM_DATA_PARAMS frmData;
249     PFM_REQ_HNDLR_VPSTATE_CACHE vPstateCache;
250     NvU32 dsmVersion;
251 };
252 
253 #ifndef __NVOC_CLASS_PlatformRequestHandler_TYPEDEF__
254 #define __NVOC_CLASS_PlatformRequestHandler_TYPEDEF__
255 typedef struct PlatformRequestHandler PlatformRequestHandler;
256 #endif /* __NVOC_CLASS_PlatformRequestHandler_TYPEDEF__ */
257 
258 #ifndef __nvoc_class_id_PlatformRequestHandler
259 #define __nvoc_class_id_PlatformRequestHandler 0x641a7f
260 #endif /* __nvoc_class_id_PlatformRequestHandler */
261 
262 extern const struct NVOC_CLASS_DEF __nvoc_class_def_PlatformRequestHandler;
263 
264 #define __staticCast_PlatformRequestHandler(pThis) \
265     ((pThis)->__nvoc_pbase_PlatformRequestHandler)
266 
267 #ifdef __nvoc_platform_request_handler_h_disabled
268 #define __dynamicCast_PlatformRequestHandler(pThis) ((PlatformRequestHandler*)NULL)
269 #else //__nvoc_platform_request_handler_h_disabled
270 #define __dynamicCast_PlatformRequestHandler(pThis) \
271     ((PlatformRequestHandler*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(PlatformRequestHandler)))
272 #endif //__nvoc_platform_request_handler_h_disabled
273 
274 #define PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED_BASE_CAST
275 #define PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED_BASE_NAME PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED
276 #define PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY_BASE_CAST
277 #define PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY_BASE_NAME PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY
278 #define PDB_PROP_PFMREQHNDLR_SUPPORTED_BASE_CAST
279 #define PDB_PROP_PFMREQHNDLR_SUPPORTED_BASE_NAME PDB_PROP_PFMREQHNDLR_SUPPORTED
280 
281 NV_STATUS __nvoc_objCreateDynamic_PlatformRequestHandler(PlatformRequestHandler**, Dynamic*, NvU32, va_list);
282 
283 NV_STATUS __nvoc_objCreate_PlatformRequestHandler(PlatformRequestHandler**, Dynamic*, NvU32);
284 #define __objCreate_PlatformRequestHandler(ppNewObj, pParent, createFlags) \
285     __nvoc_objCreate_PlatformRequestHandler((ppNewObj), staticCast((pParent), Dynamic), (createFlags))
286 
287 NV_STATUS pfmreqhndlrConstruct_IMPL(struct PlatformRequestHandler *arg_pPlatformRequestHandler);
288 
289 #define __nvoc_pfmreqhndlrConstruct(arg_pPlatformRequestHandler) pfmreqhndlrConstruct_IMPL(arg_pPlatformRequestHandler)
290 NV_STATUS pfmreqhndlrStateInit_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler);
291 
292 #ifdef __nvoc_platform_request_handler_h_disabled
293 static inline NV_STATUS pfmreqhndlrStateInit(struct PlatformRequestHandler *pPlatformRequestHandler) {
294     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
295     return NV_ERR_NOT_SUPPORTED;
296 }
297 #else //__nvoc_platform_request_handler_h_disabled
298 #define pfmreqhndlrStateInit(pPlatformRequestHandler) pfmreqhndlrStateInit_IMPL(pPlatformRequestHandler)
299 #endif //__nvoc_platform_request_handler_h_disabled
300 
301 void pfmreqhndlrStateDestroy_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler);
302 
303 #ifdef __nvoc_platform_request_handler_h_disabled
304 static inline void pfmreqhndlrStateDestroy(struct PlatformRequestHandler *pPlatformRequestHandler) {
305     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
306 }
307 #else //__nvoc_platform_request_handler_h_disabled
308 #define pfmreqhndlrStateDestroy(pPlatformRequestHandler) pfmreqhndlrStateDestroy_IMPL(pPlatformRequestHandler)
309 #endif //__nvoc_platform_request_handler_h_disabled
310 
311 NV_STATUS pfmreqhndlrStateLoad_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler);
312 
313 #ifdef __nvoc_platform_request_handler_h_disabled
314 static inline NV_STATUS pfmreqhndlrStateLoad(struct PlatformRequestHandler *pPlatformRequestHandler) {
315     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
316     return NV_ERR_NOT_SUPPORTED;
317 }
318 #else //__nvoc_platform_request_handler_h_disabled
319 #define pfmreqhndlrStateLoad(pPlatformRequestHandler) pfmreqhndlrStateLoad_IMPL(pPlatformRequestHandler)
320 #endif //__nvoc_platform_request_handler_h_disabled
321 
322 NV_STATUS pfmreqhndlrStateUnload_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler);
323 
324 #ifdef __nvoc_platform_request_handler_h_disabled
325 static inline NV_STATUS pfmreqhndlrStateUnload(struct PlatformRequestHandler *pPlatformRequestHandler) {
326     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
327     return NV_ERR_NOT_SUPPORTED;
328 }
329 #else //__nvoc_platform_request_handler_h_disabled
330 #define pfmreqhndlrStateUnload(pPlatformRequestHandler) pfmreqhndlrStateUnload_IMPL(pPlatformRequestHandler)
331 #endif //__nvoc_platform_request_handler_h_disabled
332 
333 NvBool pfmreqhndlrIsInitialized_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler);
334 
335 #ifdef __nvoc_platform_request_handler_h_disabled
336 static inline NvBool pfmreqhndlrIsInitialized(struct PlatformRequestHandler *pPlatformRequestHandler) {
337     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
338     return NV_FALSE;
339 }
340 #else //__nvoc_platform_request_handler_h_disabled
341 #define pfmreqhndlrIsInitialized(pPlatformRequestHandler) pfmreqhndlrIsInitialized_IMPL(pPlatformRequestHandler)
342 #endif //__nvoc_platform_request_handler_h_disabled
343 
344 NV_STATUS pfmreqhndlrControl_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 arg0, NvU16 arg1, NvU32 *arg2);
345 
346 #ifdef __nvoc_platform_request_handler_h_disabled
347 static inline NV_STATUS pfmreqhndlrControl(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 arg0, NvU16 arg1, NvU32 *arg2) {
348     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
349     return NV_ERR_NOT_SUPPORTED;
350 }
351 #else //__nvoc_platform_request_handler_h_disabled
352 #define pfmreqhndlrControl(pPlatformRequestHandler, arg0, arg1, arg2) pfmreqhndlrControl_IMPL(pPlatformRequestHandler, arg0, arg1, arg2)
353 #endif //__nvoc_platform_request_handler_h_disabled
354 
355 NV_STATUS pfmreqhndlrPcontrol_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 input, NvBool bSbiosCall);
356 
357 #ifdef __nvoc_platform_request_handler_h_disabled
358 static inline NV_STATUS pfmreqhndlrPcontrol(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 input, NvBool bSbiosCall) {
359     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
360     return NV_ERR_NOT_SUPPORTED;
361 }
362 #else //__nvoc_platform_request_handler_h_disabled
363 #define pfmreqhndlrPcontrol(pPlatformRequestHandler, input, bSbiosCall) pfmreqhndlrPcontrol_IMPL(pPlatformRequestHandler, input, bSbiosCall)
364 #endif //__nvoc_platform_request_handler_h_disabled
365 
366 NV_STATUS pfmreqhndlrOperatingLimitUpdate_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 id, NvU32 limit, NvBool bSet);
367 
368 #ifdef __nvoc_platform_request_handler_h_disabled
369 static inline NV_STATUS pfmreqhndlrOperatingLimitUpdate(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 id, NvU32 limit, NvBool bSet) {
370     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
371     return NV_ERR_NOT_SUPPORTED;
372 }
373 #else //__nvoc_platform_request_handler_h_disabled
374 #define pfmreqhndlrOperatingLimitUpdate(pPlatformRequestHandler, id, limit, bSet) pfmreqhndlrOperatingLimitUpdate_IMPL(pPlatformRequestHandler, id, limit, bSet)
375 #endif //__nvoc_platform_request_handler_h_disabled
376 
377 NV_STATUS pfmreqhndlrHandleCheckPM1Available_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool *pbPM1Available);
378 
379 #ifdef __nvoc_platform_request_handler_h_disabled
380 static inline NV_STATUS pfmreqhndlrHandleCheckPM1Available(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool *pbPM1Available) {
381     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
382     return NV_ERR_NOT_SUPPORTED;
383 }
384 #else //__nvoc_platform_request_handler_h_disabled
385 #define pfmreqhndlrHandleCheckPM1Available(pPlatformRequestHandler, pGpu, pbPM1Available) pfmreqhndlrHandleCheckPM1Available_IMPL(pPlatformRequestHandler, pGpu, pbPM1Available)
386 #endif //__nvoc_platform_request_handler_h_disabled
387 
388 NV_STATUS pfmreqhndlrGetPerfSensorCounterById_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 counterId, NvU32 *pCounterVal);
389 
390 #ifdef __nvoc_platform_request_handler_h_disabled
391 static inline NV_STATUS pfmreqhndlrGetPerfSensorCounterById(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 counterId, NvU32 *pCounterVal) {
392     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
393     return NV_ERR_NOT_SUPPORTED;
394 }
395 #else //__nvoc_platform_request_handler_h_disabled
396 #define pfmreqhndlrGetPerfSensorCounterById(pPlatformRequestHandler, counterId, pCounterVal) pfmreqhndlrGetPerfSensorCounterById_IMPL(pPlatformRequestHandler, counterId, pCounterVal)
397 #endif //__nvoc_platform_request_handler_h_disabled
398 
399 NV_STATUS pfmreqhndlrHandleEdppeakLimitUpdate_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool bEnable);
400 
401 #ifdef __nvoc_platform_request_handler_h_disabled
402 static inline NV_STATUS pfmreqhndlrHandleEdppeakLimitUpdate(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool bEnable) {
403     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
404     return NV_ERR_NOT_SUPPORTED;
405 }
406 #else //__nvoc_platform_request_handler_h_disabled
407 #define pfmreqhndlrHandleEdppeakLimitUpdate(pPlatformRequestHandler, pGpu, bEnable) pfmreqhndlrHandleEdppeakLimitUpdate_IMPL(pPlatformRequestHandler, pGpu, bEnable)
408 #endif //__nvoc_platform_request_handler_h_disabled
409 
410 NV_STATUS pfmreqhndlrHandleUserConfigurableTgpMode_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool bEnable);
411 
412 #ifdef __nvoc_platform_request_handler_h_disabled
413 static inline NV_STATUS pfmreqhndlrHandleUserConfigurableTgpMode(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool bEnable) {
414     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
415     return NV_ERR_NOT_SUPPORTED;
416 }
417 #else //__nvoc_platform_request_handler_h_disabled
418 #define pfmreqhndlrHandleUserConfigurableTgpMode(pPlatformRequestHandler, pGpu, bEnable) pfmreqhndlrHandleUserConfigurableTgpMode_IMPL(pPlatformRequestHandler, pGpu, bEnable)
419 #endif //__nvoc_platform_request_handler_h_disabled
420 
421 NV_STATUS pfmreqhndlrStateSync_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams);
422 
423 #ifdef __nvoc_platform_request_handler_h_disabled
424 static inline NV_STATUS pfmreqhndlrStateSync(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams) {
425     NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!");
426     return NV_ERR_NOT_SUPPORTED;
427 }
428 #else //__nvoc_platform_request_handler_h_disabled
429 #define pfmreqhndlrStateSync(pPlatformRequestHandler, pGpu, pParams) pfmreqhndlrStateSync_IMPL(pPlatformRequestHandler, pGpu, pParams)
430 #endif //__nvoc_platform_request_handler_h_disabled
431 
432 #undef PRIVATE_FIELD
433 
434 
435 /* ------------------------ Function Prototypes ---------------------------- */
436 
437 OBJGPU   *pfmreqhndlrGetGpu                             (struct PlatformRequestHandler *pPlatformRequestHandler);
438 NV_STATUS pfmreqhndlrInitGpu                            (struct PlatformRequestHandler *pPlatformRequestHandler);
439 NV_STATUS pfmreqhndlrInitSensors                        (struct PlatformRequestHandler *pPlatformRequestHandler);
440 NV_STATUS pfmreqhndlrUpdatePerfCounter                  (struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 id, NvU32 value);
441 NV_STATUS pfmreqhndlrHandleStatusChangeEvent            (struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu);
442 NV_STATUS pfmreqhndlrCallACPI                           (OBJGPU *pGpu, NV0000_CTRL_PFM_REQ_HNDLR_CALL_ACPI_PARAMS *pParams);
443 NV_STATUS pfmreqhndlrCallACPI_EX                        (OBJGPU *pGpu, NV0000_CTRL_PFM_REQ_HNDLR_CALL_ACPI_PARAMS_EX *pParams);
444 NV_STATUS pfmreqhndlrPassiveModeTransition              (NvBool bEnter, NvU32 apiLockFlag, NvU32 gpuLockFlag);
445 NV_STATUS pfmreqhndlrQueryPlatformPowerModeDataFromBIOS (struct PlatformRequestHandler *pPlatformRequestHandler);
446 NV_STATUS pfmreqhndlrGetPerfSensorCounters              (NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams, NvU16 mapFlags);
447 
448 #endif // PLATFORM_REQUEST_HANDLER_H
449 
450 
451 #ifdef __cplusplus
452 } // extern "C"
453 #endif
454 #endif // _G_PLATFORM_REQUEST_HANDLER_NVOC_H_
455