1 #ifndef _G_PLATFORM_REQUEST_HANDLER_NVOC_H_ 2 #define _G_PLATFORM_REQUEST_HANDLER_NVOC_H_ 3 #include "nvoc/runtime.h" 4 5 #ifdef __cplusplus 6 extern "C" { 7 #endif 8 9 /* 10 * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 11 * SPDX-License-Identifier: MIT 12 * 13 * Permission is hereby granted, free of charge, to any person obtaining a 14 * copy of this software and associated documentation files (the "Software"), 15 * to deal in the Software without restriction, including without limitation 16 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 17 * and/or sell copies of the Software, and to permit persons to whom the 18 * Software is furnished to do so, subject to the following conditions: 19 * 20 * The above copyright notice and this permission notice shall be included in 21 * all copies or substantial portions of the Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 29 * DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include "g_platform_request_handler_nvoc.h" 33 34 #ifndef PLATFORM_REQUEST_HANDLER_H 35 #define PLATFORM_REQUEST_HANDLER_H 36 37 /*! 38 * @file 39 * @brief Provides definitions for PlatformRequestHandler data structures and interfaces. 40 * 41 * Defines and structures used for the PlatformRequestHandler Object. 42 * PlatformRequestHandler handles ACPI events from SBIOS within the Resource Manager. 43 * PlatformRequestHandler is a child of OBJSYS object. 44 */ 45 46 /* ------------------------ Includes --------------------------------------- */ 47 #include "core/core.h" 48 #include "os/os.h" 49 #include "platform/platform_request_handler_utils.h" 50 #include "ctrl/ctrl0000/ctrl0000system.h" 51 #include "ctrl/ctrl2080/ctrl2080internal.h" 52 #include "nvfixedtypes.h" 53 54 /* ------------------------ Macros ----------------------------------------- */ 55 // 56 // Macro to check if SW ACPI version 2X or not 57 // 58 #define PFM_REQ_HNDLR_IS_ACPI_VERSION_SW_2X(pPlatformRequestHandler) \ 59 (pPlatformRequestHandler->sensorData.PFMREQHNDLRACPIData.acpiVersionSw == \ 60 NV0000_CTRL_PFM_REQ_HNDLR_ACPI_REVISION_SW_2X) 61 62 #define PFM_REQ_HNDLR_MAX_SENSORS_IN_BLOCK (32U) 63 64 #define PFM_REQ_HNDLR_MAX_GPU_SUPPORTED (4U) 65 66 // The following macros are used to attach flags to the sensor IDs in the 67 // Sensor block map and to isolate the IDs from the Sensor block map. 68 #define PFM_REQ_HNDLR_PSR_PUB_TAG (0x00001000UL) 69 #define PFM_REQ_HNDLR_PSR_ID_MASK (0x00000FFFUL) 70 #define PFM_REQ_HNDLR_PSR_PUB_ENTRY(x) ((x) | PFM_REQ_HNDLR_PSR_PUB_TAG) 71 #define PFM_REQ_HNDLR_PSR_ID(x) ((x) & PFM_REQ_HNDLR_PSR_ID_MASK) 72 #define PFM_REQ_HNDLR_CURR_VALUE_PUB_ENTRY(s) PFM_REQ_HNDLR_PSR_PUB_ENTRY(PFM_REQ_HNDLR_CURR_VALUE(s)) 73 74 // PlatformRequestHandler Counter IDs (block independent) 75 #define PFM_REQ_HNDLR_TGPU_SENSOR NV0000_CTRL_SYSTEM_PARAM_TGPU 76 #define PFM_REQ_HNDLR_CTGP_SENSOR NV0000_CTRL_SYSTEM_PARAM_CTGP 77 #define PFM_REQ_HNDLR_PPMD_SENSOR NV0000_CTRL_SYSTEM_PARAM_PPMD 78 #define PFM_REQ_HNDLR_PSHAREPARAMS_COUNT (9U) 79 #define PFM_REQ_HNDLR_CURR_BASE (2U) 80 #define PFM_REQ_HNDLR_CURR_VALUE(s) (PFM_REQ_HNDLR_CURR_BASE + ((s)%PFM_REQ_HNDLR_PSHAREPARAMS_COUNT)) 81 #define PFM_REQ_HNDLR_LIMIT_BASE (PFM_REQ_HNDLR_CURR_BASE + PFM_REQ_HNDLR_PSHAREPARAMS_COUNT) 82 #define PFM_REQ_HNDLR_LIMIT(s) (PFM_REQ_HNDLR_LIMIT_BASE + ((s)%PFM_REQ_HNDLR_PSHAREPARAMS_COUNT)) 83 #define PFM_REQ_HNDLR_PERIOD_BASE (PFM_REQ_HNDLR_LIMIT_BASE + PFM_REQ_HNDLR_PSHAREPARAMS_COUNT) 84 #define PFM_REQ_HNDLR_PERIOD(s) (PFM_REQ_HNDLR_PERIOD_BASE + ((s)%PFM_REQ_HNDLR_PSHAREPARAMS_COUNT)) 85 #define PFM_REQ_HNDLR_VALID_SENSOR_ID(b,v) (((b) <= (v)) && ((v) < (b+PFM_REQ_HNDLR_PSHAREPARAMS_COUNT))) 86 #define PFM_REQ_HNDLR_VALID_VALUE_ID(v) PFM_REQ_HNDLR_VALID_SENSOR_ID(PFM_REQ_HNDLR_CURR_BASE,v) 87 #define PFM_REQ_HNDLR_VALID_LIMIT_ID(v) PFM_REQ_HNDLR_VALID_SENSOR_ID(PFM_REQ_HNDLR_LIMIT_BASE,v) 88 #define PFM_REQ_HNDLR_AVAIL_SENSOR_MSK (23U) 89 #define PFM_REQ_HNDLR_TC_ENABLE (71U) 90 #define PFM_REQ_HNDLR_PM1_STATE_AVAIL (74U) 91 #define PFM_REQ_HNDLR_TDP_IDX (96U) 92 #define PFM_REQ_HNDLR_VPS_PS20_SUPPORT (97U) 93 #define PFM_REQ_HNDLR_RESERVED_COUNTER (100U) // This should be the last counter, update as needed. 94 95 #define PFM_REQ_HNDLR_NUM_COUNTERS (PFM_REQ_HNDLR_RESERVED_COUNTER + 1) 96 97 #define PFM_REQ_HNDLR_DEFAULT_COUNTER_HOLD_PERIOD_MS (20U) 98 99 // 100 // PRH internal handling of a temp 0C from a platform request. 101 // 102 #define PFM_REQ_HNDLR_TEMP_0_C NV_TYPES_CELSIUS_TO_NV_TEMP(0) 103 104 // 105 // PRH handling for an invalid VP state index. 106 // 107 #define PFM_REQ_HNDLR_VPSTATE_INDEX_INVALID NV_U8_MAX 108 109 // Header to sensor structure 110 typedef struct 111 { 112 NvU32 status; 113 NvU32 ulVersion; 114 115 NvU32 tGpu; 116 117 // Reserved legacy fields, do not use!. 118 NvU32 rsvd[6]; 119 NvU32 ctgp; 120 NvU32 ppmd; 121 } PFM_REQ_HNDLR_PSHAREDATA, *PPFM_REQ_HNDLR_PSHAREDATA; 122 123 // Single sensor block 124 typedef struct 125 { 126 NvBool bSupported; // indicates if counter is supported on the current system. 127 NvBool bVolatile; // indicates if counter is volatile or non-volatile. 128 NvBool bInvalid; // indicates if the counter is valid. 129 NvBool bOverridden; // indicates if counter has been overridden by the user. 130 NvU32 value; // value of the counter. 131 NvU32 lastSampled; // the last time each sample was collected. 132 NvU32 minInterval; // minimum time between samples 133 } PFM_REQ_HNDLR_SENSOR_COUNTER; 134 135 typedef struct 136 { 137 // driver set values 138 NvBool bPfmReqHndlrSupported; // reflects if all the required ACPI commands for PlatformRequestHandler are supported. 139 140 // ACPI set values. 141 NvBool bSystemParamLimitUpdate; // reflects SBIOS current value for new update limits being available. 142 NvBool bEDPpeakLimitUpdateRequest; // reflects SBIOS current request for EDPpeak limit update event. 143 NvBool bUserConfigTGPmodeRequest; // reflects SBIOS current request for User Configurable TGP mode aka Turbo mode update event. 144 NvBool bPlatformUserConfigTGPSupport; // reflects SBIOS static requests to override power delta for User Configurable TGP mode 145 NvU32 platformLimitDeltamW; // Cached limit from platform custimization 146 NvU32 prevSbiosVPStateLimit; // reflects previous VPState requested to be set by SBIOS. 147 NvU32 platformEdppLimit; // Cached last EDPp limit request from platform 148 149 NvU32 acpiVersionSw; // mapping between spec and supported sw state 150 } PFM_REQ_HNDLR_ACPI_CACHE; 151 152 /*! 153 * Data cache for VPstate Info 154 */ 155 typedef struct 156 { 157 NvBool bVpsPs20Supported; // reflects VPStates PS 20 Support 158 NvU32 vPstateIdxHighest; // reflects the highest VPstate Idx from VBIOS 159 } PFM_REQ_HNDLR_VPSTATE_CACHE; 160 161 /*! 162 * Data cache for PlatformRequestHandler sensor provider interface 163 */ 164 typedef struct 165 { 166 NvU32 version; // SBIOS reported version of PlatformRequestHandler support 167 NvU32 counterHoldPeriod; // The period of time a volatile counter will be considered valid 168 PFM_REQ_HNDLR_SENSOR_COUNTER PFMREQHNDLRSensorCache[PFM_REQ_HNDLR_NUM_COUNTERS]; 169 PFM_REQ_HNDLR_ACPI_CACHE PFMREQHNDLRACPIData; 170 NvU32 PFMREQHNDLRShareParamsAvailMask; // mask of the SBIOS reported PShareParams counters. 171 } PFM_REQ_HNDLR_SENSOR_DATA, *PPFM_REQ_HNDLR_SENSOR_DATA; 172 173 /*! 174 * Platform Power Mode related data 175 */ 176 typedef struct 177 { 178 179 /*! 180 * Set while OS work item is pending execution. 181 */ 182 NvBool bWorkItemPending; 183 184 /*! 185 * Mask of all the platform power modes supported on the system. 186 */ 187 NvU8 ppmMaskCurrent; 188 189 /*! 190 * Current Platform Power Mode. 191 */ 192 NvU8 ppmIdxCurrent; 193 194 /*! 195 * Requested new Platform Power mode index to be set. 196 */ 197 NvU8 ppmIdxRequested; 198 } PFM_REQ_HNDLR_PPM_DATA; 199 200 /*! 201 * EDPPeak control data 202 */ 203 typedef struct 204 { 205 /*! 206 * Set while OS workitem is pending execution. 207 */ 208 NvBool bWorkItemPending; 209 210 /*! 211 * EDPpeak limit info data status. 212 */ 213 NvBool bDifferPlatformEdppLimit; 214 215 /*! 216 * EDPpeak limit info data status. 217 */ 218 NV_STATUS status; 219 220 /*! 221 * EDPpeak info data. 222 */ 223 NV0000_CTRL_PFM_REQ_HNDLR_EDPP_LIMIT_INFO_V1 edppLimitInfo; 224 } PFM_REQ_HNDLR_EDPP_DATA; 225 226 /*! 227 * Control tracking and cache limits from SBIOS 228 */ 229 typedef struct 230 { 231 NvBool bStateInitialized; 232 NvBool bPM1ForcedOff; 233 NvBool bTGPUOverrideRequired; 234 235 // Current status of system applied EDPpeak update event 236 NvBool bEDPpeakUpdateEnabled; 237 238 // Current status of system applied user configurable TGP enable event 239 NvBool bUserConfigTGPmodeEnabled; 240 241 // Current status of platform customized and applied user configurable TGP delta 242 NvBool bPlatformUserConfigTGPmodeEnabled; 243 244 // Current EDPPeak limit control 245 PFM_REQ_HNDLR_EDPP_DATA edppLimit; 246 } PFM_REQ_HNDLR_CONTROL_DATA; 247 248 /*! 249 * When updating GPU System control parameters, we may evaluate the _DSM method 250 * to query the latest limit inside SBIOS. But we are not allowed to evaluate 251 * ACPI method in level > PASSIVE, thus if we want to update the system limit at 252 * DPC level, we need to queue a workitem to defer the ACPI evaluation to 253 * passive level. This struct is used to record whether a workitem is queued for 254 * this purpose and what counter has been touched before the workitem is 255 * executed. (Refer to _pfmreqhndlrUpdateSystemParamLimitWorkItem for more details) 256 */ 257 typedef struct 258 { 259 /*! 260 * Set while OS work item is pending execution. 261 */ 262 NvBool bWorkItemPending; 263 264 /*! 265 * Bit mask for the counter IDs of the sensor data which has been updated 266 * before the pending work item was executed. 267 */ 268 NvU32 queuedCounterMask; 269 } PFM_REQ_HNDLR_SYS_CONTROL_DATA; 270 271 #ifdef NVOC_PLATFORM_REQUEST_HANDLER_H_PRIVATE_ACCESS_ALLOWED 272 #define PRIVATE_FIELD(x) x 273 #else 274 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) 275 #endif 276 struct PlatformRequestHandler { 277 const struct NVOC_RTTI *__nvoc_rtti; 278 struct Object __nvoc_base_Object; 279 struct Object *__nvoc_pbase_Object; 280 struct PlatformRequestHandler *__nvoc_pbase_PlatformRequestHandler; 281 NvBool PDB_PROP_PFMREQHNDLR_SUPPORTED; 282 NvBool PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED; 283 NvBool PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY; 284 NvU32 pfmreqhndlrSupportedGpuIdx; 285 PFM_REQ_HNDLR_SENSOR_DATA sensorData; 286 PFM_REQ_HNDLR_PPM_DATA ppmData; 287 PFM_REQ_HNDLR_CONTROL_DATA controlData; 288 PFM_REQ_HNDLR_SYS_CONTROL_DATA sysControlData; 289 NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_FRM_DATA_PARAMS frmData; 290 PFM_REQ_HNDLR_VPSTATE_CACHE vPstateCache; 291 NvU32 dsmVersion; 292 }; 293 294 #ifndef __NVOC_CLASS_PlatformRequestHandler_TYPEDEF__ 295 #define __NVOC_CLASS_PlatformRequestHandler_TYPEDEF__ 296 typedef struct PlatformRequestHandler PlatformRequestHandler; 297 #endif /* __NVOC_CLASS_PlatformRequestHandler_TYPEDEF__ */ 298 299 #ifndef __nvoc_class_id_PlatformRequestHandler 300 #define __nvoc_class_id_PlatformRequestHandler 0x641a7f 301 #endif /* __nvoc_class_id_PlatformRequestHandler */ 302 303 extern const struct NVOC_CLASS_DEF __nvoc_class_def_PlatformRequestHandler; 304 305 #define __staticCast_PlatformRequestHandler(pThis) \ 306 ((pThis)->__nvoc_pbase_PlatformRequestHandler) 307 308 #ifdef __nvoc_platform_request_handler_h_disabled 309 #define __dynamicCast_PlatformRequestHandler(pThis) ((PlatformRequestHandler*)NULL) 310 #else //__nvoc_platform_request_handler_h_disabled 311 #define __dynamicCast_PlatformRequestHandler(pThis) \ 312 ((PlatformRequestHandler*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(PlatformRequestHandler))) 313 #endif //__nvoc_platform_request_handler_h_disabled 314 315 #define PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED_BASE_CAST 316 #define PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED_BASE_NAME PDB_PROP_PFMREQHNDLR_SYS_CONTROL_SUPPORTED 317 #define PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY_BASE_CAST 318 #define PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY_BASE_NAME PDB_PROP_PFMREQHNDLR_IS_PLATFORM_LEGACY 319 #define PDB_PROP_PFMREQHNDLR_SUPPORTED_BASE_CAST 320 #define PDB_PROP_PFMREQHNDLR_SUPPORTED_BASE_NAME PDB_PROP_PFMREQHNDLR_SUPPORTED 321 322 NV_STATUS __nvoc_objCreateDynamic_PlatformRequestHandler(PlatformRequestHandler**, Dynamic*, NvU32, va_list); 323 324 NV_STATUS __nvoc_objCreate_PlatformRequestHandler(PlatformRequestHandler**, Dynamic*, NvU32); 325 #define __objCreate_PlatformRequestHandler(ppNewObj, pParent, createFlags) \ 326 __nvoc_objCreate_PlatformRequestHandler((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) 327 328 NV_STATUS pfmreqhndlrConstruct_IMPL(struct PlatformRequestHandler *arg_pPlatformRequestHandler); 329 330 #define __nvoc_pfmreqhndlrConstruct(arg_pPlatformRequestHandler) pfmreqhndlrConstruct_IMPL(arg_pPlatformRequestHandler) 331 NV_STATUS pfmreqhndlrStateInit_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler); 332 333 #ifdef __nvoc_platform_request_handler_h_disabled 334 static inline NV_STATUS pfmreqhndlrStateInit(struct PlatformRequestHandler *pPlatformRequestHandler) { 335 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 336 return NV_ERR_NOT_SUPPORTED; 337 } 338 #else //__nvoc_platform_request_handler_h_disabled 339 #define pfmreqhndlrStateInit(pPlatformRequestHandler) pfmreqhndlrStateInit_IMPL(pPlatformRequestHandler) 340 #endif //__nvoc_platform_request_handler_h_disabled 341 342 void pfmreqhndlrStateDestroy_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler); 343 344 #ifdef __nvoc_platform_request_handler_h_disabled 345 static inline void pfmreqhndlrStateDestroy(struct PlatformRequestHandler *pPlatformRequestHandler) { 346 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 347 } 348 #else //__nvoc_platform_request_handler_h_disabled 349 #define pfmreqhndlrStateDestroy(pPlatformRequestHandler) pfmreqhndlrStateDestroy_IMPL(pPlatformRequestHandler) 350 #endif //__nvoc_platform_request_handler_h_disabled 351 352 NV_STATUS pfmreqhndlrStateLoad_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler); 353 354 #ifdef __nvoc_platform_request_handler_h_disabled 355 static inline NV_STATUS pfmreqhndlrStateLoad(struct PlatformRequestHandler *pPlatformRequestHandler) { 356 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 357 return NV_ERR_NOT_SUPPORTED; 358 } 359 #else //__nvoc_platform_request_handler_h_disabled 360 #define pfmreqhndlrStateLoad(pPlatformRequestHandler) pfmreqhndlrStateLoad_IMPL(pPlatformRequestHandler) 361 #endif //__nvoc_platform_request_handler_h_disabled 362 363 NV_STATUS pfmreqhndlrStateUnload_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler); 364 365 #ifdef __nvoc_platform_request_handler_h_disabled 366 static inline NV_STATUS pfmreqhndlrStateUnload(struct PlatformRequestHandler *pPlatformRequestHandler) { 367 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 368 return NV_ERR_NOT_SUPPORTED; 369 } 370 #else //__nvoc_platform_request_handler_h_disabled 371 #define pfmreqhndlrStateUnload(pPlatformRequestHandler) pfmreqhndlrStateUnload_IMPL(pPlatformRequestHandler) 372 #endif //__nvoc_platform_request_handler_h_disabled 373 374 NvBool pfmreqhndlrIsInitialized_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler); 375 376 #ifdef __nvoc_platform_request_handler_h_disabled 377 static inline NvBool pfmreqhndlrIsInitialized(struct PlatformRequestHandler *pPlatformRequestHandler) { 378 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 379 return NV_FALSE; 380 } 381 #else //__nvoc_platform_request_handler_h_disabled 382 #define pfmreqhndlrIsInitialized(pPlatformRequestHandler) pfmreqhndlrIsInitialized_IMPL(pPlatformRequestHandler) 383 #endif //__nvoc_platform_request_handler_h_disabled 384 385 NV_STATUS pfmreqhndlrControl_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 arg0, NvU16 arg1, NvU32 *arg2); 386 387 #ifdef __nvoc_platform_request_handler_h_disabled 388 static inline NV_STATUS pfmreqhndlrControl(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 arg0, NvU16 arg1, NvU32 *arg2) { 389 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 390 return NV_ERR_NOT_SUPPORTED; 391 } 392 #else //__nvoc_platform_request_handler_h_disabled 393 #define pfmreqhndlrControl(pPlatformRequestHandler, arg0, arg1, arg2) pfmreqhndlrControl_IMPL(pPlatformRequestHandler, arg0, arg1, arg2) 394 #endif //__nvoc_platform_request_handler_h_disabled 395 396 NV_STATUS pfmreqhndlrPcontrol_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 input, NvBool bSbiosCall); 397 398 #ifdef __nvoc_platform_request_handler_h_disabled 399 static inline NV_STATUS pfmreqhndlrPcontrol(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 input, NvBool bSbiosCall) { 400 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 401 return NV_ERR_NOT_SUPPORTED; 402 } 403 #else //__nvoc_platform_request_handler_h_disabled 404 #define pfmreqhndlrPcontrol(pPlatformRequestHandler, input, bSbiosCall) pfmreqhndlrPcontrol_IMPL(pPlatformRequestHandler, input, bSbiosCall) 405 #endif //__nvoc_platform_request_handler_h_disabled 406 407 NV_STATUS pfmreqhndlrOperatingLimitUpdate_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 id, NvU32 limit, NvBool bSet); 408 409 #ifdef __nvoc_platform_request_handler_h_disabled 410 static inline NV_STATUS pfmreqhndlrOperatingLimitUpdate(struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 id, NvU32 limit, NvBool bSet) { 411 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 412 return NV_ERR_NOT_SUPPORTED; 413 } 414 #else //__nvoc_platform_request_handler_h_disabled 415 #define pfmreqhndlrOperatingLimitUpdate(pPlatformRequestHandler, id, limit, bSet) pfmreqhndlrOperatingLimitUpdate_IMPL(pPlatformRequestHandler, id, limit, bSet) 416 #endif //__nvoc_platform_request_handler_h_disabled 417 418 NV_STATUS pfmreqhndlrHandleCheckPM1Available_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool *pbPM1Available); 419 420 #ifdef __nvoc_platform_request_handler_h_disabled 421 static inline NV_STATUS pfmreqhndlrHandleCheckPM1Available(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool *pbPM1Available) { 422 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 423 return NV_ERR_NOT_SUPPORTED; 424 } 425 #else //__nvoc_platform_request_handler_h_disabled 426 #define pfmreqhndlrHandleCheckPM1Available(pPlatformRequestHandler, pGpu, pbPM1Available) pfmreqhndlrHandleCheckPM1Available_IMPL(pPlatformRequestHandler, pGpu, pbPM1Available) 427 #endif //__nvoc_platform_request_handler_h_disabled 428 429 NV_STATUS pfmreqhndlrGetPerfSensorCounterById_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 counterId, NvU32 *pCounterVal); 430 431 #ifdef __nvoc_platform_request_handler_h_disabled 432 static inline NV_STATUS pfmreqhndlrGetPerfSensorCounterById(struct PlatformRequestHandler *pPlatformRequestHandler, NvU16 counterId, NvU32 *pCounterVal) { 433 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 434 return NV_ERR_NOT_SUPPORTED; 435 } 436 #else //__nvoc_platform_request_handler_h_disabled 437 #define pfmreqhndlrGetPerfSensorCounterById(pPlatformRequestHandler, counterId, pCounterVal) pfmreqhndlrGetPerfSensorCounterById_IMPL(pPlatformRequestHandler, counterId, pCounterVal) 438 #endif //__nvoc_platform_request_handler_h_disabled 439 440 NV_STATUS pfmreqhndlrHandleEdppeakLimitUpdate_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool bEnable); 441 442 #ifdef __nvoc_platform_request_handler_h_disabled 443 static inline NV_STATUS pfmreqhndlrHandleEdppeakLimitUpdate(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool bEnable) { 444 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 445 return NV_ERR_NOT_SUPPORTED; 446 } 447 #else //__nvoc_platform_request_handler_h_disabled 448 #define pfmreqhndlrHandleEdppeakLimitUpdate(pPlatformRequestHandler, pGpu, bEnable) pfmreqhndlrHandleEdppeakLimitUpdate_IMPL(pPlatformRequestHandler, pGpu, bEnable) 449 #endif //__nvoc_platform_request_handler_h_disabled 450 451 NV_STATUS pfmreqhndlrHandlePlatformEdppLimitUpdate_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvU32 platformEdppLimit); 452 453 #ifdef __nvoc_platform_request_handler_h_disabled 454 static inline NV_STATUS pfmreqhndlrHandlePlatformEdppLimitUpdate(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvU32 platformEdppLimit) { 455 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 456 return NV_ERR_NOT_SUPPORTED; 457 } 458 #else //__nvoc_platform_request_handler_h_disabled 459 #define pfmreqhndlrHandlePlatformEdppLimitUpdate(pPlatformRequestHandler, pGpu, platformEdppLimit) pfmreqhndlrHandlePlatformEdppLimitUpdate_IMPL(pPlatformRequestHandler, pGpu, platformEdppLimit) 460 #endif //__nvoc_platform_request_handler_h_disabled 461 462 NV_STATUS pfmreqhndlrHandlePlatformGetEdppLimit_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvU32 *pPlatformEdppLimit); 463 464 #ifdef __nvoc_platform_request_handler_h_disabled 465 static inline NV_STATUS pfmreqhndlrHandlePlatformGetEdppLimit(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvU32 *pPlatformEdppLimit) { 466 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 467 return NV_ERR_NOT_SUPPORTED; 468 } 469 #else //__nvoc_platform_request_handler_h_disabled 470 #define pfmreqhndlrHandlePlatformGetEdppLimit(pPlatformRequestHandler, pGpu, pPlatformEdppLimit) pfmreqhndlrHandlePlatformGetEdppLimit_IMPL(pPlatformRequestHandler, pGpu, pPlatformEdppLimit) 471 #endif //__nvoc_platform_request_handler_h_disabled 472 473 NV_STATUS pfmreqhndlrHandlePlatformSetEdppLimitInfo_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu); 474 475 #ifdef __nvoc_platform_request_handler_h_disabled 476 static inline NV_STATUS pfmreqhndlrHandlePlatformSetEdppLimitInfo(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu) { 477 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 478 return NV_ERR_NOT_SUPPORTED; 479 } 480 #else //__nvoc_platform_request_handler_h_disabled 481 #define pfmreqhndlrHandlePlatformSetEdppLimitInfo(pPlatformRequestHandler, pGpu) pfmreqhndlrHandlePlatformSetEdppLimitInfo_IMPL(pPlatformRequestHandler, pGpu) 482 #endif //__nvoc_platform_request_handler_h_disabled 483 484 NV_STATUS pfmreqhndlrHandleUserConfigurableTgpMode_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool bEnable); 485 486 #ifdef __nvoc_platform_request_handler_h_disabled 487 static inline NV_STATUS pfmreqhndlrHandleUserConfigurableTgpMode(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NvBool bEnable) { 488 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 489 return NV_ERR_NOT_SUPPORTED; 490 } 491 #else //__nvoc_platform_request_handler_h_disabled 492 #define pfmreqhndlrHandleUserConfigurableTgpMode(pPlatformRequestHandler, pGpu, bEnable) pfmreqhndlrHandleUserConfigurableTgpMode_IMPL(pPlatformRequestHandler, pGpu, bEnable) 493 #endif //__nvoc_platform_request_handler_h_disabled 494 495 NV_STATUS pfmreqhndlrStateSync_IMPL(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams); 496 497 #ifdef __nvoc_platform_request_handler_h_disabled 498 static inline NV_STATUS pfmreqhndlrStateSync(struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu, NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_PARAMS *pParams) { 499 NV_ASSERT_FAILED_PRECOMP("PlatformRequestHandler was disabled!"); 500 return NV_ERR_NOT_SUPPORTED; 501 } 502 #else //__nvoc_platform_request_handler_h_disabled 503 #define pfmreqhndlrStateSync(pPlatformRequestHandler, pGpu, pParams) pfmreqhndlrStateSync_IMPL(pPlatformRequestHandler, pGpu, pParams) 504 #endif //__nvoc_platform_request_handler_h_disabled 505 506 #undef PRIVATE_FIELD 507 508 509 /* ------------------------ Function Prototypes ---------------------------- */ 510 511 OBJGPU *pfmreqhndlrGetGpu (struct PlatformRequestHandler *pPlatformRequestHandler); 512 NV_STATUS pfmreqhndlrInitGpu (struct PlatformRequestHandler *pPlatformRequestHandler); 513 NV_STATUS pfmreqhndlrInitSensors (struct PlatformRequestHandler *pPlatformRequestHandler); 514 NV_STATUS pfmreqhndlrUpdatePerfCounter (struct PlatformRequestHandler *pPlatformRequestHandler, NvU32 id, NvU32 value); 515 NV_STATUS pfmreqhndlrHandleStatusChangeEvent (struct PlatformRequestHandler *pPlatformRequestHandler, OBJGPU *pGpu); 516 NV_STATUS pfmreqhndlrCallACPI (OBJGPU *pGpu, NV0000_CTRL_PFM_REQ_HNDLR_CALL_ACPI_PARAMS *pParams); 517 NV_STATUS pfmreqhndlrCallACPI_EX (OBJGPU *pGpu, NV0000_CTRL_PFM_REQ_HNDLR_CALL_ACPI_PARAMS_EX *pParams); 518 NV_STATUS pfmreqhndlrPassiveModeTransition (NvBool bEnter, NvU32 apiLockFlag, NvU32 gpuLockFlag); 519 NV_STATUS pfmreqhndlrQueryPlatformPowerModeDataFromBIOS (struct PlatformRequestHandler *pPlatformRequestHandler); 520 NV_STATUS pfmreqhndlrGetPerfSensorCounters (NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *pParams, NvU16 mapFlags); 521 522 #endif // PLATFORM_REQUEST_HANDLER_H 523 524 525 #ifdef __cplusplus 526 } // extern "C" 527 #endif 528 529 #endif // _G_PLATFORM_REQUEST_HANDLER_NVOC_H_ 530