1 // This file is automatically generated by rmconfig - DO NOT EDIT! 2 // 3 // Private HAL support for RPC. 4 // 5 // Profile: shipping-gpus-openrm 6 // Haldef: rpc.def 7 // Template: templates/gt_eng_private.h 8 // 9 10 #ifndef _G_RPC_PRIVATE_H_ 11 #define _G_RPC_PRIVATE_H_ 12 13 #include "g_rpc_hal.h" 14 15 16 // RPC:VGPU_PF_REG_READ32 17 RpcVgpuPfRegRead32 rpcVgpuPfRegRead32_v15_00; 18 RpcVgpuPfRegRead32 rpcVgpuPfRegRead32_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 19 20 // RPC:DUMP_PROTOBUF_COMPONENT 21 RpcDumpProtobufComponent rpcDumpProtobufComponent_v18_12; 22 RpcDumpProtobufComponent rpcDumpProtobufComponent_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 23 24 // RPC:ECC_NOTIFIER_WRITE_ACK 25 RpcEccNotifierWriteAck rpcEccNotifierWriteAck_v23_05; 26 RpcEccNotifierWriteAck rpcEccNotifierWriteAck_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 27 28 // RPC:ALLOC_MEMORY 29 RpcAllocMemory rpcAllocMemory_v13_01; 30 RpcAllocMemory rpcAllocMemory_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 31 32 // RPC:GPU_EXEC_REG_OPS 33 RpcGpuExecRegOps rpcGpuExecRegOps_v12_01; 34 RpcGpuExecRegOps rpcGpuExecRegOps_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 35 36 // RPC:RMFS_INIT 37 RpcRmfsInit rpcRmfsInit_v15_00; 38 RpcRmfsInit rpcRmfsInit_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 39 40 // RPC:UNSET_PAGE_DIRECTORY 41 RpcUnsetPageDirectory rpcUnsetPageDirectory_v03_00; 42 RpcUnsetPageDirectory rpcUnsetPageDirectory_v1E_05; 43 RpcUnsetPageDirectory rpcUnsetPageDirectory_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 44 45 // RPC:GET_GSP_STATIC_INFO 46 RpcGetGspStaticInfo rpcGetGspStaticInfo_v14_00; 47 RpcGetGspStaticInfo rpcGetGspStaticInfo_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 48 49 // RPC:GSP_SET_SYSTEM_INFO 50 RpcGspSetSystemInfo rpcGspSetSystemInfo_v17_00; 51 RpcGspSetSystemInfo rpcGspSetSystemInfo_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 52 53 // RPC:RMFS_CLEANUP 54 RpcRmfsCleanup rpcRmfsCleanup_v15_00; 55 RpcRmfsCleanup rpcRmfsCleanup_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 56 57 // RPC:SET_PAGE_DIRECTORY 58 RpcSetPageDirectory rpcSetPageDirectory_v03_00; 59 RpcSetPageDirectory rpcSetPageDirectory_v1E_05; 60 RpcSetPageDirectory rpcSetPageDirectory_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 61 62 // RPC:UNLOADING_GUEST_DRIVER 63 RpcUnloadingGuestDriver rpcUnloadingGuestDriver_v03_00; 64 RpcUnloadingGuestDriver rpcUnloadingGuestDriver_v1F_07; 65 RpcUnloadingGuestDriver rpcUnloadingGuestDriver_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 66 67 // RPC:SET_REGISTRY 68 RpcSetRegistry rpcSetRegistry_v17_00; 69 RpcSetRegistry rpcSetRegistry_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 70 71 // RPC:RMFS_CLOSE_QUEUE 72 RpcRmfsCloseQueue rpcRmfsCloseQueue_v15_00; 73 RpcRmfsCloseQueue rpcRmfsCloseQueue_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 74 75 // RPC:GET_STATIC_INFO 76 RpcGetStaticInfo rpcGetStaticInfo_v17_05; 77 RpcGetStaticInfo rpcGetStaticInfo_v18_03; 78 RpcGetStaticInfo rpcGetStaticInfo_v18_04; 79 RpcGetStaticInfo rpcGetStaticInfo_v18_0E; 80 RpcGetStaticInfo rpcGetStaticInfo_v18_10; 81 RpcGetStaticInfo rpcGetStaticInfo_v18_11; 82 RpcGetStaticInfo rpcGetStaticInfo_v18_13; 83 RpcGetStaticInfo rpcGetStaticInfo_v18_16; 84 RpcGetStaticInfo rpcGetStaticInfo_v19_00; 85 RpcGetStaticInfo rpcGetStaticInfo_v1A_00; 86 RpcGetStaticInfo rpcGetStaticInfo_v1A_05; 87 RpcGetStaticInfo rpcGetStaticInfo_v20_01; 88 RpcGetStaticInfo rpcGetStaticInfo_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 89 90 // RPC:IDLE_CHANNELS 91 RpcIdleChannels rpcIdleChannels_v03_00; 92 RpcIdleChannels rpcIdleChannels_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 93 94 // RPC:UPDATE_BAR_PDE 95 RpcUpdateBarPde rpcUpdateBarPde_v15_00; 96 RpcUpdateBarPde rpcUpdateBarPde_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 97 98 // RPC:MAP_MEMORY_DMA 99 RpcMapMemoryDma rpcMapMemoryDma_v03_00; 100 RpcMapMemoryDma rpcMapMemoryDma_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 101 102 // RPC:UNMAP_MEMORY_DMA 103 RpcUnmapMemoryDma rpcUnmapMemoryDma_v03_00; 104 RpcUnmapMemoryDma rpcUnmapMemoryDma_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 105 106 // RPC:RMFS_TEST 107 RpcRmfsTest rpcRmfsTest_v15_00; 108 RpcRmfsTest rpcRmfsTest_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X 109 110 111 112 113 114 115 // 116 // RPC's object-level *non-static* interface functions (static ones are below) 117 // 118 RpcConstruct rpcConstruct_IMPL; 119 RpcDestroy rpcDestroy_IMPL; 120 RpcSendMessage rpcSendMessage_IMPL; 121 RpcRecvPoll rpcRecvPoll_IMPL; 122 123 124 125 #if defined(RMCFG_ENGINE_SETUP) // for use by hal init only 126 127 128 129 130 131 // No enabled chips use this variant provider 132 static void rpc_iGrp_ipVersions_Install_v03_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 133 { 134 #if 0 135 136 POBJGPU pGpu = pInfo->pGpu; 137 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 138 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 139 140 // avoid possible unused warnings 141 pGpu += 0; 142 pRpcHal += 0; 143 144 145 #endif // 146 } 147 148 // No enabled chips use this variant provider 149 static void rpc_iGrp_ipVersions_Install_v04_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 150 { 151 #if 0 152 153 POBJGPU pGpu = pInfo->pGpu; 154 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 155 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 156 157 // avoid possible unused warnings 158 pGpu += 0; 159 pRpcHal += 0; 160 161 162 #endif // 163 } 164 165 // No enabled chips use this variant provider 166 static void rpc_iGrp_ipVersions_Install_v05_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 167 { 168 #if 0 169 170 POBJGPU pGpu = pInfo->pGpu; 171 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 172 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 173 174 // avoid possible unused warnings 175 pGpu += 0; 176 pRpcHal += 0; 177 178 179 #endif // 180 } 181 182 // No enabled chips use this variant provider 183 static void rpc_iGrp_ipVersions_Install_v06_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 184 { 185 #if 0 186 187 POBJGPU pGpu = pInfo->pGpu; 188 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 189 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 190 191 // avoid possible unused warnings 192 pGpu += 0; 193 pRpcHal += 0; 194 195 196 #endif // 197 } 198 199 // No enabled chips use this variant provider 200 static void rpc_iGrp_ipVersions_Install_v07_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 201 { 202 #if 0 203 204 POBJGPU pGpu = pInfo->pGpu; 205 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 206 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 207 208 // avoid possible unused warnings 209 pGpu += 0; 210 pRpcHal += 0; 211 212 213 #endif // 214 } 215 216 // No enabled chips use this variant provider 217 static void rpc_iGrp_ipVersions_Install_v07_07(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 218 { 219 #if 0 220 221 POBJGPU pGpu = pInfo->pGpu; 222 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 223 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 224 225 // avoid possible unused warnings 226 pGpu += 0; 227 pRpcHal += 0; 228 229 230 #endif // 231 } 232 233 // No enabled chips use this variant provider 234 static void rpc_iGrp_ipVersions_Install_v08_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 235 { 236 #if 0 237 238 POBJGPU pGpu = pInfo->pGpu; 239 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 240 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 241 242 // avoid possible unused warnings 243 pGpu += 0; 244 pRpcHal += 0; 245 246 247 #endif // 248 } 249 250 // No enabled chips use this variant provider 251 static void rpc_iGrp_ipVersions_Install_v09_08(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 252 { 253 #if 0 254 255 POBJGPU pGpu = pInfo->pGpu; 256 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 257 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 258 259 // avoid possible unused warnings 260 pGpu += 0; 261 pRpcHal += 0; 262 263 264 #endif // 265 } 266 267 // No enabled chips use this variant provider 268 static void rpc_iGrp_ipVersions_Install_v09_0B(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 269 { 270 #if 0 271 272 POBJGPU pGpu = pInfo->pGpu; 273 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 274 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 275 276 // avoid possible unused warnings 277 pGpu += 0; 278 pRpcHal += 0; 279 280 281 #endif // 282 } 283 284 // No enabled chips use this variant provider 285 static void rpc_iGrp_ipVersions_Install_v09_0C(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 286 { 287 #if 0 288 289 POBJGPU pGpu = pInfo->pGpu; 290 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 291 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 292 293 // avoid possible unused warnings 294 pGpu += 0; 295 pRpcHal += 0; 296 297 298 #endif // 299 } 300 301 // No enabled chips use this variant provider 302 static void rpc_iGrp_ipVersions_Install_v12_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 303 { 304 #if 0 305 306 POBJGPU pGpu = pInfo->pGpu; 307 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 308 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 309 310 // avoid possible unused warnings 311 pGpu += 0; 312 pRpcHal += 0; 313 314 315 #endif // 316 } 317 318 // No enabled chips use this variant provider 319 static void rpc_iGrp_ipVersions_Install_v13_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 320 { 321 #if 0 322 323 POBJGPU pGpu = pInfo->pGpu; 324 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 325 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 326 327 // avoid possible unused warnings 328 pGpu += 0; 329 pRpcHal += 0; 330 331 332 #endif // 333 } 334 335 // No enabled chips use this variant provider 336 static void rpc_iGrp_ipVersions_Install_v14_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 337 { 338 #if 0 339 340 POBJGPU pGpu = pInfo->pGpu; 341 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 342 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 343 344 // avoid possible unused warnings 345 pGpu += 0; 346 pRpcHal += 0; 347 348 349 #endif // 350 } 351 352 // No enabled chips use this variant provider 353 static void rpc_iGrp_ipVersions_Install_v14_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 354 { 355 #if 0 356 357 POBJGPU pGpu = pInfo->pGpu; 358 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 359 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 360 361 // avoid possible unused warnings 362 pGpu += 0; 363 pRpcHal += 0; 364 365 366 #endif // 367 } 368 369 // No enabled chips use this variant provider 370 static void rpc_iGrp_ipVersions_Install_v14_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 371 { 372 #if 0 373 374 POBJGPU pGpu = pInfo->pGpu; 375 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 376 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 377 378 // avoid possible unused warnings 379 pGpu += 0; 380 pRpcHal += 0; 381 382 383 #endif // 384 } 385 386 // No enabled chips use this variant provider 387 static void rpc_iGrp_ipVersions_Install_v15_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 388 { 389 #if 0 390 391 POBJGPU pGpu = pInfo->pGpu; 392 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 393 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 394 395 // avoid possible unused warnings 396 pGpu += 0; 397 pRpcHal += 0; 398 399 400 #endif // 401 } 402 403 // No enabled chips use this variant provider 404 static void rpc_iGrp_ipVersions_Install_v15_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 405 { 406 #if 0 407 408 POBJGPU pGpu = pInfo->pGpu; 409 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 410 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 411 412 // avoid possible unused warnings 413 pGpu += 0; 414 pRpcHal += 0; 415 416 417 #endif // 418 } 419 420 // No enabled chips use this variant provider 421 static void rpc_iGrp_ipVersions_Install_v17_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 422 { 423 #if 0 424 425 POBJGPU pGpu = pInfo->pGpu; 426 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 427 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 428 429 // avoid possible unused warnings 430 pGpu += 0; 431 pRpcHal += 0; 432 433 434 #endif // 435 } 436 437 // No enabled chips use this variant provider 438 static void rpc_iGrp_ipVersions_Install_v17_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 439 { 440 #if 0 441 442 POBJGPU pGpu = pInfo->pGpu; 443 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 444 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 445 446 // avoid possible unused warnings 447 pGpu += 0; 448 pRpcHal += 0; 449 450 451 #endif // 452 } 453 454 // No enabled chips use this variant provider 455 static void rpc_iGrp_ipVersions_Install_v17_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 456 { 457 #if 0 458 459 POBJGPU pGpu = pInfo->pGpu; 460 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 461 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 462 463 // avoid possible unused warnings 464 pGpu += 0; 465 pRpcHal += 0; 466 467 468 #endif // 469 } 470 471 // No enabled chips use this variant provider 472 static void rpc_iGrp_ipVersions_Install_v18_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 473 { 474 #if 0 475 476 POBJGPU pGpu = pInfo->pGpu; 477 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 478 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 479 480 // avoid possible unused warnings 481 pGpu += 0; 482 pRpcHal += 0; 483 484 485 #endif // 486 } 487 488 // No enabled chips use this variant provider 489 static void rpc_iGrp_ipVersions_Install_v18_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 490 { 491 #if 0 492 493 POBJGPU pGpu = pInfo->pGpu; 494 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 495 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 496 497 // avoid possible unused warnings 498 pGpu += 0; 499 pRpcHal += 0; 500 501 502 #endif // 503 } 504 505 // No enabled chips use this variant provider 506 static void rpc_iGrp_ipVersions_Install_v18_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 507 { 508 #if 0 509 510 POBJGPU pGpu = pInfo->pGpu; 511 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 512 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 513 514 // avoid possible unused warnings 515 pGpu += 0; 516 pRpcHal += 0; 517 518 519 #endif // 520 } 521 522 // No enabled chips use this variant provider 523 static void rpc_iGrp_ipVersions_Install_v18_03(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 524 { 525 #if 0 526 527 POBJGPU pGpu = pInfo->pGpu; 528 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 529 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 530 531 // avoid possible unused warnings 532 pGpu += 0; 533 pRpcHal += 0; 534 535 536 #endif // 537 } 538 539 // No enabled chips use this variant provider 540 static void rpc_iGrp_ipVersions_Install_v18_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 541 { 542 #if 0 543 544 POBJGPU pGpu = pInfo->pGpu; 545 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 546 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 547 548 // avoid possible unused warnings 549 pGpu += 0; 550 pRpcHal += 0; 551 552 553 #endif // 554 } 555 556 // No enabled chips use this variant provider 557 static void rpc_iGrp_ipVersions_Install_v18_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 558 { 559 #if 0 560 561 POBJGPU pGpu = pInfo->pGpu; 562 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 563 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 564 565 // avoid possible unused warnings 566 pGpu += 0; 567 pRpcHal += 0; 568 569 570 #endif // 571 } 572 573 // No enabled chips use this variant provider 574 static void rpc_iGrp_ipVersions_Install_v18_06(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 575 { 576 #if 0 577 578 POBJGPU pGpu = pInfo->pGpu; 579 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 580 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 581 582 // avoid possible unused warnings 583 pGpu += 0; 584 pRpcHal += 0; 585 586 587 #endif // 588 } 589 590 // No enabled chips use this variant provider 591 static void rpc_iGrp_ipVersions_Install_v18_07(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 592 { 593 #if 0 594 595 POBJGPU pGpu = pInfo->pGpu; 596 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 597 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 598 599 // avoid possible unused warnings 600 pGpu += 0; 601 pRpcHal += 0; 602 603 604 #endif // 605 } 606 607 // No enabled chips use this variant provider 608 static void rpc_iGrp_ipVersions_Install_v18_08(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 609 { 610 #if 0 611 612 POBJGPU pGpu = pInfo->pGpu; 613 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 614 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 615 616 // avoid possible unused warnings 617 pGpu += 0; 618 pRpcHal += 0; 619 620 621 #endif // 622 } 623 624 // No enabled chips use this variant provider 625 static void rpc_iGrp_ipVersions_Install_v18_09(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 626 { 627 #if 0 628 629 POBJGPU pGpu = pInfo->pGpu; 630 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 631 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 632 633 // avoid possible unused warnings 634 pGpu += 0; 635 pRpcHal += 0; 636 637 638 #endif // 639 } 640 641 // No enabled chips use this variant provider 642 static void rpc_iGrp_ipVersions_Install_v18_0A(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 643 { 644 #if 0 645 646 POBJGPU pGpu = pInfo->pGpu; 647 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 648 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 649 650 // avoid possible unused warnings 651 pGpu += 0; 652 pRpcHal += 0; 653 654 655 #endif // 656 } 657 658 // No enabled chips use this variant provider 659 static void rpc_iGrp_ipVersions_Install_v18_0B(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 660 { 661 #if 0 662 663 POBJGPU pGpu = pInfo->pGpu; 664 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 665 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 666 667 // avoid possible unused warnings 668 pGpu += 0; 669 pRpcHal += 0; 670 671 672 #endif // 673 } 674 675 // No enabled chips use this variant provider 676 static void rpc_iGrp_ipVersions_Install_v18_0C(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 677 { 678 #if 0 679 680 POBJGPU pGpu = pInfo->pGpu; 681 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 682 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 683 684 // avoid possible unused warnings 685 pGpu += 0; 686 pRpcHal += 0; 687 688 689 #endif // 690 } 691 692 // No enabled chips use this variant provider 693 static void rpc_iGrp_ipVersions_Install_v18_0D(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 694 { 695 #if 0 696 697 POBJGPU pGpu = pInfo->pGpu; 698 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 699 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 700 701 // avoid possible unused warnings 702 pGpu += 0; 703 pRpcHal += 0; 704 705 706 #endif // 707 } 708 709 // No enabled chips use this variant provider 710 static void rpc_iGrp_ipVersions_Install_v18_0E(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 711 { 712 #if 0 713 714 POBJGPU pGpu = pInfo->pGpu; 715 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 716 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 717 718 // avoid possible unused warnings 719 pGpu += 0; 720 pRpcHal += 0; 721 722 723 #endif // 724 } 725 726 // No enabled chips use this variant provider 727 static void rpc_iGrp_ipVersions_Install_v18_0F(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 728 { 729 #if 0 730 731 POBJGPU pGpu = pInfo->pGpu; 732 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 733 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 734 735 // avoid possible unused warnings 736 pGpu += 0; 737 pRpcHal += 0; 738 739 740 #endif // 741 } 742 743 // No enabled chips use this variant provider 744 static void rpc_iGrp_ipVersions_Install_v18_10(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 745 { 746 #if 0 747 748 POBJGPU pGpu = pInfo->pGpu; 749 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 750 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 751 752 // avoid possible unused warnings 753 pGpu += 0; 754 pRpcHal += 0; 755 756 757 #endif // 758 } 759 760 // No enabled chips use this variant provider 761 static void rpc_iGrp_ipVersions_Install_v18_11(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 762 { 763 #if 0 764 765 POBJGPU pGpu = pInfo->pGpu; 766 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 767 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 768 769 // avoid possible unused warnings 770 pGpu += 0; 771 pRpcHal += 0; 772 773 774 #endif // 775 } 776 777 // No enabled chips use this variant provider 778 static void rpc_iGrp_ipVersions_Install_v18_12(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 779 { 780 #if 0 781 782 POBJGPU pGpu = pInfo->pGpu; 783 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 784 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 785 786 // avoid possible unused warnings 787 pGpu += 0; 788 pRpcHal += 0; 789 790 791 #endif // 792 } 793 794 // No enabled chips use this variant provider 795 static void rpc_iGrp_ipVersions_Install_v18_13(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 796 { 797 #if 0 798 799 POBJGPU pGpu = pInfo->pGpu; 800 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 801 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 802 803 // avoid possible unused warnings 804 pGpu += 0; 805 pRpcHal += 0; 806 807 808 #endif // 809 } 810 811 // No enabled chips use this variant provider 812 static void rpc_iGrp_ipVersions_Install_v18_14(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 813 { 814 #if 0 815 816 POBJGPU pGpu = pInfo->pGpu; 817 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 818 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 819 820 // avoid possible unused warnings 821 pGpu += 0; 822 pRpcHal += 0; 823 824 825 #endif // 826 } 827 828 // No enabled chips use this variant provider 829 static void rpc_iGrp_ipVersions_Install_v18_15(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 830 { 831 #if 0 832 833 POBJGPU pGpu = pInfo->pGpu; 834 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 835 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 836 837 // avoid possible unused warnings 838 pGpu += 0; 839 pRpcHal += 0; 840 841 842 #endif // 843 } 844 845 // No enabled chips use this variant provider 846 static void rpc_iGrp_ipVersions_Install_v18_16(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 847 { 848 #if 0 849 850 POBJGPU pGpu = pInfo->pGpu; 851 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 852 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 853 854 // avoid possible unused warnings 855 pGpu += 0; 856 pRpcHal += 0; 857 858 859 #endif // 860 } 861 862 // No enabled chips use this variant provider 863 static void rpc_iGrp_ipVersions_Install_v19_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 864 { 865 #if 0 866 867 POBJGPU pGpu = pInfo->pGpu; 868 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 869 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 870 871 // avoid possible unused warnings 872 pGpu += 0; 873 pRpcHal += 0; 874 875 876 #endif // 877 } 878 879 // No enabled chips use this variant provider 880 static void rpc_iGrp_ipVersions_Install_v19_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 881 { 882 #if 0 883 884 POBJGPU pGpu = pInfo->pGpu; 885 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 886 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 887 888 // avoid possible unused warnings 889 pGpu += 0; 890 pRpcHal += 0; 891 892 893 #endif // 894 } 895 896 // No enabled chips use this variant provider 897 static void rpc_iGrp_ipVersions_Install_v1A_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 898 { 899 #if 0 900 901 POBJGPU pGpu = pInfo->pGpu; 902 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 903 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 904 905 // avoid possible unused warnings 906 pGpu += 0; 907 pRpcHal += 0; 908 909 910 #endif // 911 } 912 913 // No enabled chips use this variant provider 914 static void rpc_iGrp_ipVersions_Install_v1A_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 915 { 916 #if 0 917 918 POBJGPU pGpu = pInfo->pGpu; 919 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 920 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 921 922 // avoid possible unused warnings 923 pGpu += 0; 924 pRpcHal += 0; 925 926 927 #endif // 928 } 929 930 // No enabled chips use this variant provider 931 static void rpc_iGrp_ipVersions_Install_v1A_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 932 { 933 #if 0 934 935 POBJGPU pGpu = pInfo->pGpu; 936 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 937 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 938 939 // avoid possible unused warnings 940 pGpu += 0; 941 pRpcHal += 0; 942 943 944 #endif // 945 } 946 947 // No enabled chips use this variant provider 948 static void rpc_iGrp_ipVersions_Install_v1A_03(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 949 { 950 #if 0 951 952 POBJGPU pGpu = pInfo->pGpu; 953 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 954 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 955 956 // avoid possible unused warnings 957 pGpu += 0; 958 pRpcHal += 0; 959 960 961 #endif // 962 } 963 964 // No enabled chips use this variant provider 965 static void rpc_iGrp_ipVersions_Install_v1A_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 966 { 967 #if 0 968 969 POBJGPU pGpu = pInfo->pGpu; 970 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 971 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 972 973 // avoid possible unused warnings 974 pGpu += 0; 975 pRpcHal += 0; 976 977 978 #endif // 979 } 980 981 // No enabled chips use this variant provider 982 static void rpc_iGrp_ipVersions_Install_v1A_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 983 { 984 #if 0 985 986 POBJGPU pGpu = pInfo->pGpu; 987 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 988 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 989 990 // avoid possible unused warnings 991 pGpu += 0; 992 pRpcHal += 0; 993 994 995 #endif // 996 } 997 998 // No enabled chips use this variant provider 999 static void rpc_iGrp_ipVersions_Install_v1A_06(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1000 { 1001 #if 0 1002 1003 POBJGPU pGpu = pInfo->pGpu; 1004 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1005 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1006 1007 // avoid possible unused warnings 1008 pGpu += 0; 1009 pRpcHal += 0; 1010 1011 1012 #endif // 1013 } 1014 1015 // No enabled chips use this variant provider 1016 static void rpc_iGrp_ipVersions_Install_v1A_07(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1017 { 1018 #if 0 1019 1020 POBJGPU pGpu = pInfo->pGpu; 1021 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1022 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1023 1024 // avoid possible unused warnings 1025 pGpu += 0; 1026 pRpcHal += 0; 1027 1028 1029 #endif // 1030 } 1031 1032 // No enabled chips use this variant provider 1033 static void rpc_iGrp_ipVersions_Install_v1A_08(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1034 { 1035 #if 0 1036 1037 POBJGPU pGpu = pInfo->pGpu; 1038 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1039 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1040 1041 // avoid possible unused warnings 1042 pGpu += 0; 1043 pRpcHal += 0; 1044 1045 1046 #endif // 1047 } 1048 1049 // No enabled chips use this variant provider 1050 static void rpc_iGrp_ipVersions_Install_v1A_09(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1051 { 1052 #if 0 1053 1054 POBJGPU pGpu = pInfo->pGpu; 1055 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1056 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1057 1058 // avoid possible unused warnings 1059 pGpu += 0; 1060 pRpcHal += 0; 1061 1062 1063 #endif // 1064 } 1065 1066 // No enabled chips use this variant provider 1067 static void rpc_iGrp_ipVersions_Install_v1A_0A(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1068 { 1069 #if 0 1070 1071 POBJGPU pGpu = pInfo->pGpu; 1072 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1073 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1074 1075 // avoid possible unused warnings 1076 pGpu += 0; 1077 pRpcHal += 0; 1078 1079 1080 #endif // 1081 } 1082 1083 // No enabled chips use this variant provider 1084 static void rpc_iGrp_ipVersions_Install_v1A_0B(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1085 { 1086 #if 0 1087 1088 POBJGPU pGpu = pInfo->pGpu; 1089 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1090 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1091 1092 // avoid possible unused warnings 1093 pGpu += 0; 1094 pRpcHal += 0; 1095 1096 1097 #endif // 1098 } 1099 1100 // No enabled chips use this variant provider 1101 static void rpc_iGrp_ipVersions_Install_v1A_0C(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1102 { 1103 #if 0 1104 1105 POBJGPU pGpu = pInfo->pGpu; 1106 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1107 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1108 1109 // avoid possible unused warnings 1110 pGpu += 0; 1111 pRpcHal += 0; 1112 1113 1114 #endif // 1115 } 1116 1117 // No enabled chips use this variant provider 1118 static void rpc_iGrp_ipVersions_Install_v1A_0D(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1119 { 1120 #if 0 1121 1122 POBJGPU pGpu = pInfo->pGpu; 1123 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1124 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1125 1126 // avoid possible unused warnings 1127 pGpu += 0; 1128 pRpcHal += 0; 1129 1130 1131 #endif // 1132 } 1133 1134 // No enabled chips use this variant provider 1135 static void rpc_iGrp_ipVersions_Install_v1A_0E(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1136 { 1137 #if 0 1138 1139 POBJGPU pGpu = pInfo->pGpu; 1140 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1141 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1142 1143 // avoid possible unused warnings 1144 pGpu += 0; 1145 pRpcHal += 0; 1146 1147 1148 #endif // 1149 } 1150 1151 // No enabled chips use this variant provider 1152 static void rpc_iGrp_ipVersions_Install_v1A_0F(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1153 { 1154 #if 0 1155 1156 POBJGPU pGpu = pInfo->pGpu; 1157 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1158 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1159 1160 // avoid possible unused warnings 1161 pGpu += 0; 1162 pRpcHal += 0; 1163 1164 1165 #endif // 1166 } 1167 1168 // No enabled chips use this variant provider 1169 static void rpc_iGrp_ipVersions_Install_v1A_10(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1170 { 1171 #if 0 1172 1173 POBJGPU pGpu = pInfo->pGpu; 1174 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1175 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1176 1177 // avoid possible unused warnings 1178 pGpu += 0; 1179 pRpcHal += 0; 1180 1181 1182 #endif // 1183 } 1184 1185 // No enabled chips use this variant provider 1186 static void rpc_iGrp_ipVersions_Install_v1A_12(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1187 { 1188 #if 0 1189 1190 POBJGPU pGpu = pInfo->pGpu; 1191 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1192 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1193 1194 // avoid possible unused warnings 1195 pGpu += 0; 1196 pRpcHal += 0; 1197 1198 1199 #endif // 1200 } 1201 1202 // No enabled chips use this variant provider 1203 static void rpc_iGrp_ipVersions_Install_v1A_13(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1204 { 1205 #if 0 1206 1207 POBJGPU pGpu = pInfo->pGpu; 1208 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1209 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1210 1211 // avoid possible unused warnings 1212 pGpu += 0; 1213 pRpcHal += 0; 1214 1215 1216 #endif // 1217 } 1218 1219 // No enabled chips use this variant provider 1220 static void rpc_iGrp_ipVersions_Install_v1A_14(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1221 { 1222 #if 0 1223 1224 POBJGPU pGpu = pInfo->pGpu; 1225 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1226 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1227 1228 // avoid possible unused warnings 1229 pGpu += 0; 1230 pRpcHal += 0; 1231 1232 1233 #endif // 1234 } 1235 1236 // No enabled chips use this variant provider 1237 static void rpc_iGrp_ipVersions_Install_v1A_15(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1238 { 1239 #if 0 1240 1241 POBJGPU pGpu = pInfo->pGpu; 1242 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1243 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1244 1245 // avoid possible unused warnings 1246 pGpu += 0; 1247 pRpcHal += 0; 1248 1249 1250 #endif // 1251 } 1252 1253 // No enabled chips use this variant provider 1254 static void rpc_iGrp_ipVersions_Install_v1A_16(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1255 { 1256 #if 0 1257 1258 POBJGPU pGpu = pInfo->pGpu; 1259 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1260 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1261 1262 // avoid possible unused warnings 1263 pGpu += 0; 1264 pRpcHal += 0; 1265 1266 1267 #endif // 1268 } 1269 1270 // No enabled chips use this variant provider 1271 static void rpc_iGrp_ipVersions_Install_v1A_17(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1272 { 1273 #if 0 1274 1275 POBJGPU pGpu = pInfo->pGpu; 1276 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1277 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1278 1279 // avoid possible unused warnings 1280 pGpu += 0; 1281 pRpcHal += 0; 1282 1283 1284 #endif // 1285 } 1286 1287 // No enabled chips use this variant provider 1288 static void rpc_iGrp_ipVersions_Install_v1A_18(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1289 { 1290 #if 0 1291 1292 POBJGPU pGpu = pInfo->pGpu; 1293 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1294 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1295 1296 // avoid possible unused warnings 1297 pGpu += 0; 1298 pRpcHal += 0; 1299 1300 1301 #endif // 1302 } 1303 1304 // No enabled chips use this variant provider 1305 static void rpc_iGrp_ipVersions_Install_v1A_1A(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1306 { 1307 #if 0 1308 1309 POBJGPU pGpu = pInfo->pGpu; 1310 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1311 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1312 1313 // avoid possible unused warnings 1314 pGpu += 0; 1315 pRpcHal += 0; 1316 1317 1318 #endif // 1319 } 1320 1321 // No enabled chips use this variant provider 1322 static void rpc_iGrp_ipVersions_Install_v1A_1B(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1323 { 1324 #if 0 1325 1326 POBJGPU pGpu = pInfo->pGpu; 1327 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1328 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1329 1330 // avoid possible unused warnings 1331 pGpu += 0; 1332 pRpcHal += 0; 1333 1334 1335 #endif // 1336 } 1337 1338 // No enabled chips use this variant provider 1339 static void rpc_iGrp_ipVersions_Install_v1A_1C(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1340 { 1341 #if 0 1342 1343 POBJGPU pGpu = pInfo->pGpu; 1344 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1345 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1346 1347 // avoid possible unused warnings 1348 pGpu += 0; 1349 pRpcHal += 0; 1350 1351 1352 #endif // 1353 } 1354 1355 // No enabled chips use this variant provider 1356 static void rpc_iGrp_ipVersions_Install_v1A_1D(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1357 { 1358 #if 0 1359 1360 POBJGPU pGpu = pInfo->pGpu; 1361 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1362 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1363 1364 // avoid possible unused warnings 1365 pGpu += 0; 1366 pRpcHal += 0; 1367 1368 1369 #endif // 1370 } 1371 1372 // No enabled chips use this variant provider 1373 static void rpc_iGrp_ipVersions_Install_v1A_1E(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1374 { 1375 #if 0 1376 1377 POBJGPU pGpu = pInfo->pGpu; 1378 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1379 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1380 1381 // avoid possible unused warnings 1382 pGpu += 0; 1383 pRpcHal += 0; 1384 1385 1386 #endif // 1387 } 1388 1389 // No enabled chips use this variant provider 1390 static void rpc_iGrp_ipVersions_Install_v1A_1F(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1391 { 1392 #if 0 1393 1394 POBJGPU pGpu = pInfo->pGpu; 1395 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1396 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1397 1398 // avoid possible unused warnings 1399 pGpu += 0; 1400 pRpcHal += 0; 1401 1402 1403 #endif // 1404 } 1405 1406 // No enabled chips use this variant provider 1407 static void rpc_iGrp_ipVersions_Install_v1A_20(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1408 { 1409 #if 0 1410 1411 POBJGPU pGpu = pInfo->pGpu; 1412 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1413 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1414 1415 // avoid possible unused warnings 1416 pGpu += 0; 1417 pRpcHal += 0; 1418 1419 1420 #endif // 1421 } 1422 1423 // No enabled chips use this variant provider 1424 static void rpc_iGrp_ipVersions_Install_v1A_21(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1425 { 1426 #if 0 1427 1428 POBJGPU pGpu = pInfo->pGpu; 1429 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1430 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1431 1432 // avoid possible unused warnings 1433 pGpu += 0; 1434 pRpcHal += 0; 1435 1436 1437 #endif // 1438 } 1439 1440 // No enabled chips use this variant provider 1441 static void rpc_iGrp_ipVersions_Install_v1A_22(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1442 { 1443 #if 0 1444 1445 POBJGPU pGpu = pInfo->pGpu; 1446 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1447 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1448 1449 // avoid possible unused warnings 1450 pGpu += 0; 1451 pRpcHal += 0; 1452 1453 1454 #endif // 1455 } 1456 1457 // No enabled chips use this variant provider 1458 static void rpc_iGrp_ipVersions_Install_v1A_23(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1459 { 1460 #if 0 1461 1462 POBJGPU pGpu = pInfo->pGpu; 1463 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1464 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1465 1466 // avoid possible unused warnings 1467 pGpu += 0; 1468 pRpcHal += 0; 1469 1470 1471 #endif // 1472 } 1473 1474 // No enabled chips use this variant provider 1475 static void rpc_iGrp_ipVersions_Install_v1A_24(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1476 { 1477 #if 0 1478 1479 POBJGPU pGpu = pInfo->pGpu; 1480 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1481 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1482 1483 // avoid possible unused warnings 1484 pGpu += 0; 1485 pRpcHal += 0; 1486 1487 1488 #endif // 1489 } 1490 1491 // No enabled chips use this variant provider 1492 static void rpc_iGrp_ipVersions_Install_v1B_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1493 { 1494 #if 0 1495 1496 POBJGPU pGpu = pInfo->pGpu; 1497 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1498 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1499 1500 // avoid possible unused warnings 1501 pGpu += 0; 1502 pRpcHal += 0; 1503 1504 1505 #endif // 1506 } 1507 1508 // No enabled chips use this variant provider 1509 static void rpc_iGrp_ipVersions_Install_v1B_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1510 { 1511 #if 0 1512 1513 POBJGPU pGpu = pInfo->pGpu; 1514 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1515 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1516 1517 // avoid possible unused warnings 1518 pGpu += 0; 1519 pRpcHal += 0; 1520 1521 1522 #endif // 1523 } 1524 1525 // No enabled chips use this variant provider 1526 static void rpc_iGrp_ipVersions_Install_v1C_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1527 { 1528 #if 0 1529 1530 POBJGPU pGpu = pInfo->pGpu; 1531 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1532 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1533 1534 // avoid possible unused warnings 1535 pGpu += 0; 1536 pRpcHal += 0; 1537 1538 1539 #endif // 1540 } 1541 1542 // No enabled chips use this variant provider 1543 static void rpc_iGrp_ipVersions_Install_v1C_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1544 { 1545 #if 0 1546 1547 POBJGPU pGpu = pInfo->pGpu; 1548 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1549 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1550 1551 // avoid possible unused warnings 1552 pGpu += 0; 1553 pRpcHal += 0; 1554 1555 1556 #endif // 1557 } 1558 1559 // No enabled chips use this variant provider 1560 static void rpc_iGrp_ipVersions_Install_v1C_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1561 { 1562 #if 0 1563 1564 POBJGPU pGpu = pInfo->pGpu; 1565 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1566 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1567 1568 // avoid possible unused warnings 1569 pGpu += 0; 1570 pRpcHal += 0; 1571 1572 1573 #endif // 1574 } 1575 1576 // No enabled chips use this variant provider 1577 static void rpc_iGrp_ipVersions_Install_v1C_07(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1578 { 1579 #if 0 1580 1581 POBJGPU pGpu = pInfo->pGpu; 1582 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1583 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1584 1585 // avoid possible unused warnings 1586 pGpu += 0; 1587 pRpcHal += 0; 1588 1589 1590 #endif // 1591 } 1592 1593 // No enabled chips use this variant provider 1594 static void rpc_iGrp_ipVersions_Install_v1C_08(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1595 { 1596 #if 0 1597 1598 POBJGPU pGpu = pInfo->pGpu; 1599 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1600 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1601 1602 // avoid possible unused warnings 1603 pGpu += 0; 1604 pRpcHal += 0; 1605 1606 1607 #endif // 1608 } 1609 1610 // No enabled chips use this variant provider 1611 static void rpc_iGrp_ipVersions_Install_v1C_09(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1612 { 1613 #if 0 1614 1615 POBJGPU pGpu = pInfo->pGpu; 1616 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1617 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1618 1619 // avoid possible unused warnings 1620 pGpu += 0; 1621 pRpcHal += 0; 1622 1623 1624 #endif // 1625 } 1626 1627 // No enabled chips use this variant provider 1628 static void rpc_iGrp_ipVersions_Install_v1C_0A(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1629 { 1630 #if 0 1631 1632 POBJGPU pGpu = pInfo->pGpu; 1633 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1634 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1635 1636 // avoid possible unused warnings 1637 pGpu += 0; 1638 pRpcHal += 0; 1639 1640 1641 #endif // 1642 } 1643 1644 // No enabled chips use this variant provider 1645 static void rpc_iGrp_ipVersions_Install_v1C_0B(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1646 { 1647 #if 0 1648 1649 POBJGPU pGpu = pInfo->pGpu; 1650 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1651 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1652 1653 // avoid possible unused warnings 1654 pGpu += 0; 1655 pRpcHal += 0; 1656 1657 1658 #endif // 1659 } 1660 1661 // No enabled chips use this variant provider 1662 static void rpc_iGrp_ipVersions_Install_v1C_0C(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1663 { 1664 #if 0 1665 1666 POBJGPU pGpu = pInfo->pGpu; 1667 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1668 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1669 1670 // avoid possible unused warnings 1671 pGpu += 0; 1672 pRpcHal += 0; 1673 1674 1675 #endif // 1676 } 1677 1678 // No enabled chips use this variant provider 1679 static void rpc_iGrp_ipVersions_Install_v1D_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1680 { 1681 #if 0 1682 1683 POBJGPU pGpu = pInfo->pGpu; 1684 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1685 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1686 1687 // avoid possible unused warnings 1688 pGpu += 0; 1689 pRpcHal += 0; 1690 1691 1692 #endif // 1693 } 1694 1695 // No enabled chips use this variant provider 1696 static void rpc_iGrp_ipVersions_Install_v1D_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1697 { 1698 #if 0 1699 1700 POBJGPU pGpu = pInfo->pGpu; 1701 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1702 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1703 1704 // avoid possible unused warnings 1705 pGpu += 0; 1706 pRpcHal += 0; 1707 1708 1709 #endif // 1710 } 1711 1712 // No enabled chips use this variant provider 1713 static void rpc_iGrp_ipVersions_Install_v1D_06(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1714 { 1715 #if 0 1716 1717 POBJGPU pGpu = pInfo->pGpu; 1718 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1719 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1720 1721 // avoid possible unused warnings 1722 pGpu += 0; 1723 pRpcHal += 0; 1724 1725 1726 #endif // 1727 } 1728 1729 // No enabled chips use this variant provider 1730 static void rpc_iGrp_ipVersions_Install_v1E_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1731 { 1732 #if 0 1733 1734 POBJGPU pGpu = pInfo->pGpu; 1735 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1736 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1737 1738 // avoid possible unused warnings 1739 pGpu += 0; 1740 pRpcHal += 0; 1741 1742 1743 #endif // 1744 } 1745 1746 // No enabled chips use this variant provider 1747 static void rpc_iGrp_ipVersions_Install_v1E_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1748 { 1749 #if 0 1750 1751 POBJGPU pGpu = pInfo->pGpu; 1752 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1753 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1754 1755 // avoid possible unused warnings 1756 pGpu += 0; 1757 pRpcHal += 0; 1758 1759 1760 #endif // 1761 } 1762 1763 // No enabled chips use this variant provider 1764 static void rpc_iGrp_ipVersions_Install_v1E_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1765 { 1766 #if 0 1767 1768 POBJGPU pGpu = pInfo->pGpu; 1769 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1770 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1771 1772 // avoid possible unused warnings 1773 pGpu += 0; 1774 pRpcHal += 0; 1775 1776 1777 #endif // 1778 } 1779 1780 // No enabled chips use this variant provider 1781 static void rpc_iGrp_ipVersions_Install_v1E_06(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1782 { 1783 #if 0 1784 1785 POBJGPU pGpu = pInfo->pGpu; 1786 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1787 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1788 1789 // avoid possible unused warnings 1790 pGpu += 0; 1791 pRpcHal += 0; 1792 1793 1794 #endif // 1795 } 1796 1797 // No enabled chips use this variant provider 1798 static void rpc_iGrp_ipVersions_Install_v1E_07(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1799 { 1800 #if 0 1801 1802 POBJGPU pGpu = pInfo->pGpu; 1803 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1804 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1805 1806 // avoid possible unused warnings 1807 pGpu += 0; 1808 pRpcHal += 0; 1809 1810 1811 #endif // 1812 } 1813 1814 // No enabled chips use this variant provider 1815 static void rpc_iGrp_ipVersions_Install_v1E_08(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1816 { 1817 #if 0 1818 1819 POBJGPU pGpu = pInfo->pGpu; 1820 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1821 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1822 1823 // avoid possible unused warnings 1824 pGpu += 0; 1825 pRpcHal += 0; 1826 1827 1828 #endif // 1829 } 1830 1831 // No enabled chips use this variant provider 1832 static void rpc_iGrp_ipVersions_Install_v1E_0A(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1833 { 1834 #if 0 1835 1836 POBJGPU pGpu = pInfo->pGpu; 1837 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1838 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1839 1840 // avoid possible unused warnings 1841 pGpu += 0; 1842 pRpcHal += 0; 1843 1844 1845 #endif // 1846 } 1847 1848 // No enabled chips use this variant provider 1849 static void rpc_iGrp_ipVersions_Install_v1E_0B(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1850 { 1851 #if 0 1852 1853 POBJGPU pGpu = pInfo->pGpu; 1854 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1855 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1856 1857 // avoid possible unused warnings 1858 pGpu += 0; 1859 pRpcHal += 0; 1860 1861 1862 #endif // 1863 } 1864 1865 // No enabled chips use this variant provider 1866 static void rpc_iGrp_ipVersions_Install_v1E_0C(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1867 { 1868 #if 0 1869 1870 POBJGPU pGpu = pInfo->pGpu; 1871 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1872 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1873 1874 // avoid possible unused warnings 1875 pGpu += 0; 1876 pRpcHal += 0; 1877 1878 1879 #endif // 1880 } 1881 1882 // No enabled chips use this variant provider 1883 static void rpc_iGrp_ipVersions_Install_v1E_0D(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1884 { 1885 #if 0 1886 1887 POBJGPU pGpu = pInfo->pGpu; 1888 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1889 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1890 1891 // avoid possible unused warnings 1892 pGpu += 0; 1893 pRpcHal += 0; 1894 1895 1896 #endif // 1897 } 1898 1899 // No enabled chips use this variant provider 1900 static void rpc_iGrp_ipVersions_Install_v1E_0E(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1901 { 1902 #if 0 1903 1904 POBJGPU pGpu = pInfo->pGpu; 1905 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1906 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1907 1908 // avoid possible unused warnings 1909 pGpu += 0; 1910 pRpcHal += 0; 1911 1912 1913 #endif // 1914 } 1915 1916 // No enabled chips use this variant provider 1917 static void rpc_iGrp_ipVersions_Install_v1F_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1918 { 1919 #if 0 1920 1921 POBJGPU pGpu = pInfo->pGpu; 1922 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1923 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1924 1925 // avoid possible unused warnings 1926 pGpu += 0; 1927 pRpcHal += 0; 1928 1929 1930 #endif // 1931 } 1932 1933 // No enabled chips use this variant provider 1934 static void rpc_iGrp_ipVersions_Install_v1F_03(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1935 { 1936 #if 0 1937 1938 POBJGPU pGpu = pInfo->pGpu; 1939 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1940 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1941 1942 // avoid possible unused warnings 1943 pGpu += 0; 1944 pRpcHal += 0; 1945 1946 1947 #endif // 1948 } 1949 1950 // No enabled chips use this variant provider 1951 static void rpc_iGrp_ipVersions_Install_v1F_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1952 { 1953 #if 0 1954 1955 POBJGPU pGpu = pInfo->pGpu; 1956 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1957 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1958 1959 // avoid possible unused warnings 1960 pGpu += 0; 1961 pRpcHal += 0; 1962 1963 1964 #endif // 1965 } 1966 1967 // No enabled chips use this variant provider 1968 static void rpc_iGrp_ipVersions_Install_v1F_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1969 { 1970 #if 0 1971 1972 POBJGPU pGpu = pInfo->pGpu; 1973 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1974 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1975 1976 // avoid possible unused warnings 1977 pGpu += 0; 1978 pRpcHal += 0; 1979 1980 1981 #endif // 1982 } 1983 1984 // No enabled chips use this variant provider 1985 static void rpc_iGrp_ipVersions_Install_v1F_07(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 1986 { 1987 #if 0 1988 1989 POBJGPU pGpu = pInfo->pGpu; 1990 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 1991 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 1992 1993 // avoid possible unused warnings 1994 pGpu += 0; 1995 pRpcHal += 0; 1996 1997 1998 #endif // 1999 } 2000 2001 // No enabled chips use this variant provider 2002 static void rpc_iGrp_ipVersions_Install_v1F_08(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2003 { 2004 #if 0 2005 2006 POBJGPU pGpu = pInfo->pGpu; 2007 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2008 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2009 2010 // avoid possible unused warnings 2011 pGpu += 0; 2012 pRpcHal += 0; 2013 2014 2015 #endif // 2016 } 2017 2018 // No enabled chips use this variant provider 2019 static void rpc_iGrp_ipVersions_Install_v1F_0A(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2020 { 2021 #if 0 2022 2023 POBJGPU pGpu = pInfo->pGpu; 2024 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2025 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2026 2027 // avoid possible unused warnings 2028 pGpu += 0; 2029 pRpcHal += 0; 2030 2031 2032 #endif // 2033 } 2034 2035 // No enabled chips use this variant provider 2036 static void rpc_iGrp_ipVersions_Install_v1F_0B(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2037 { 2038 #if 0 2039 2040 POBJGPU pGpu = pInfo->pGpu; 2041 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2042 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2043 2044 // avoid possible unused warnings 2045 pGpu += 0; 2046 pRpcHal += 0; 2047 2048 2049 #endif // 2050 } 2051 2052 // No enabled chips use this variant provider 2053 static void rpc_iGrp_ipVersions_Install_v1F_0C(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2054 { 2055 #if 0 2056 2057 POBJGPU pGpu = pInfo->pGpu; 2058 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2059 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2060 2061 // avoid possible unused warnings 2062 pGpu += 0; 2063 pRpcHal += 0; 2064 2065 2066 #endif // 2067 } 2068 2069 // No enabled chips use this variant provider 2070 static void rpc_iGrp_ipVersions_Install_v1F_0D(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2071 { 2072 #if 0 2073 2074 POBJGPU pGpu = pInfo->pGpu; 2075 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2076 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2077 2078 // avoid possible unused warnings 2079 pGpu += 0; 2080 pRpcHal += 0; 2081 2082 2083 #endif // 2084 } 2085 2086 // No enabled chips use this variant provider 2087 static void rpc_iGrp_ipVersions_Install_v1F_0E(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2088 { 2089 #if 0 2090 2091 POBJGPU pGpu = pInfo->pGpu; 2092 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2093 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2094 2095 // avoid possible unused warnings 2096 pGpu += 0; 2097 pRpcHal += 0; 2098 2099 2100 #endif // 2101 } 2102 2103 // No enabled chips use this variant provider 2104 static void rpc_iGrp_ipVersions_Install_v1F_0F(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2105 { 2106 #if 0 2107 2108 POBJGPU pGpu = pInfo->pGpu; 2109 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2110 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2111 2112 // avoid possible unused warnings 2113 pGpu += 0; 2114 pRpcHal += 0; 2115 2116 2117 #endif // 2118 } 2119 2120 // No enabled chips use this variant provider 2121 static void rpc_iGrp_ipVersions_Install_v20_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2122 { 2123 #if 0 2124 2125 POBJGPU pGpu = pInfo->pGpu; 2126 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2127 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2128 2129 // avoid possible unused warnings 2130 pGpu += 0; 2131 pRpcHal += 0; 2132 2133 2134 #endif // 2135 } 2136 2137 // No enabled chips use this variant provider 2138 static void rpc_iGrp_ipVersions_Install_v20_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2139 { 2140 #if 0 2141 2142 POBJGPU pGpu = pInfo->pGpu; 2143 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2144 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2145 2146 // avoid possible unused warnings 2147 pGpu += 0; 2148 pRpcHal += 0; 2149 2150 2151 #endif // 2152 } 2153 2154 // No enabled chips use this variant provider 2155 static void rpc_iGrp_ipVersions_Install_v20_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2156 { 2157 #if 0 2158 2159 POBJGPU pGpu = pInfo->pGpu; 2160 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2161 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2162 2163 // avoid possible unused warnings 2164 pGpu += 0; 2165 pRpcHal += 0; 2166 2167 2168 #endif // 2169 } 2170 2171 // No enabled chips use this variant provider 2172 static void rpc_iGrp_ipVersions_Install_v20_03(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2173 { 2174 #if 0 2175 2176 POBJGPU pGpu = pInfo->pGpu; 2177 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2178 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2179 2180 // avoid possible unused warnings 2181 pGpu += 0; 2182 pRpcHal += 0; 2183 2184 2185 #endif // 2186 } 2187 2188 // No enabled chips use this variant provider 2189 static void rpc_iGrp_ipVersions_Install_v21_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2190 { 2191 #if 0 2192 2193 POBJGPU pGpu = pInfo->pGpu; 2194 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2195 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2196 2197 // avoid possible unused warnings 2198 pGpu += 0; 2199 pRpcHal += 0; 2200 2201 2202 #endif // 2203 } 2204 2205 // No enabled chips use this variant provider 2206 static void rpc_iGrp_ipVersions_Install_v21_03(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2207 { 2208 #if 0 2209 2210 POBJGPU pGpu = pInfo->pGpu; 2211 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2212 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2213 2214 // avoid possible unused warnings 2215 pGpu += 0; 2216 pRpcHal += 0; 2217 2218 2219 #endif // 2220 } 2221 2222 // No enabled chips use this variant provider 2223 static void rpc_iGrp_ipVersions_Install_v21_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2224 { 2225 #if 0 2226 2227 POBJGPU pGpu = pInfo->pGpu; 2228 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2229 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2230 2231 // avoid possible unused warnings 2232 pGpu += 0; 2233 pRpcHal += 0; 2234 2235 2236 #endif // 2237 } 2238 2239 // No enabled chips use this variant provider 2240 static void rpc_iGrp_ipVersions_Install_v21_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2241 { 2242 #if 0 2243 2244 POBJGPU pGpu = pInfo->pGpu; 2245 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2246 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2247 2248 // avoid possible unused warnings 2249 pGpu += 0; 2250 pRpcHal += 0; 2251 2252 2253 #endif // 2254 } 2255 2256 // No enabled chips use this variant provider 2257 static void rpc_iGrp_ipVersions_Install_v21_06(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2258 { 2259 #if 0 2260 2261 POBJGPU pGpu = pInfo->pGpu; 2262 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2263 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2264 2265 // avoid possible unused warnings 2266 pGpu += 0; 2267 pRpcHal += 0; 2268 2269 2270 #endif // 2271 } 2272 2273 // No enabled chips use this variant provider 2274 static void rpc_iGrp_ipVersions_Install_v21_07(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2275 { 2276 #if 0 2277 2278 POBJGPU pGpu = pInfo->pGpu; 2279 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2280 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2281 2282 // avoid possible unused warnings 2283 pGpu += 0; 2284 pRpcHal += 0; 2285 2286 2287 #endif // 2288 } 2289 2290 // No enabled chips use this variant provider 2291 static void rpc_iGrp_ipVersions_Install_v21_08(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2292 { 2293 #if 0 2294 2295 POBJGPU pGpu = pInfo->pGpu; 2296 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2297 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2298 2299 // avoid possible unused warnings 2300 pGpu += 0; 2301 pRpcHal += 0; 2302 2303 2304 #endif // 2305 } 2306 2307 // No enabled chips use this variant provider 2308 static void rpc_iGrp_ipVersions_Install_v21_09(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2309 { 2310 #if 0 2311 2312 POBJGPU pGpu = pInfo->pGpu; 2313 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2314 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2315 2316 // avoid possible unused warnings 2317 pGpu += 0; 2318 pRpcHal += 0; 2319 2320 2321 #endif // 2322 } 2323 2324 // No enabled chips use this variant provider 2325 static void rpc_iGrp_ipVersions_Install_v21_0A(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2326 { 2327 #if 0 2328 2329 POBJGPU pGpu = pInfo->pGpu; 2330 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2331 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2332 2333 // avoid possible unused warnings 2334 pGpu += 0; 2335 pRpcHal += 0; 2336 2337 2338 #endif // 2339 } 2340 2341 // No enabled chips use this variant provider 2342 static void rpc_iGrp_ipVersions_Install_v21_0B(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2343 { 2344 #if 0 2345 2346 POBJGPU pGpu = pInfo->pGpu; 2347 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2348 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2349 2350 // avoid possible unused warnings 2351 pGpu += 0; 2352 pRpcHal += 0; 2353 2354 2355 #endif // 2356 } 2357 2358 // No enabled chips use this variant provider 2359 static void rpc_iGrp_ipVersions_Install_v22_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2360 { 2361 #if 0 2362 2363 POBJGPU pGpu = pInfo->pGpu; 2364 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2365 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2366 2367 // avoid possible unused warnings 2368 pGpu += 0; 2369 pRpcHal += 0; 2370 2371 2372 #endif // 2373 } 2374 2375 // No enabled chips use this variant provider 2376 static void rpc_iGrp_ipVersions_Install_v23_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2377 { 2378 #if 0 2379 2380 POBJGPU pGpu = pInfo->pGpu; 2381 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2382 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2383 2384 // avoid possible unused warnings 2385 pGpu += 0; 2386 pRpcHal += 0; 2387 2388 2389 #endif // 2390 } 2391 2392 // No enabled chips use this variant provider 2393 static void rpc_iGrp_ipVersions_Install_v23_03(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2394 { 2395 #if 0 2396 2397 POBJGPU pGpu = pInfo->pGpu; 2398 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2399 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2400 2401 // avoid possible unused warnings 2402 pGpu += 0; 2403 pRpcHal += 0; 2404 2405 2406 #endif // 2407 } 2408 2409 // No enabled chips use this variant provider 2410 static void rpc_iGrp_ipVersions_Install_v23_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2411 { 2412 #if 0 2413 2414 POBJGPU pGpu = pInfo->pGpu; 2415 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2416 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2417 2418 // avoid possible unused warnings 2419 pGpu += 0; 2420 pRpcHal += 0; 2421 2422 2423 #endif // 2424 } 2425 2426 // No enabled chips use this variant provider 2427 static void rpc_iGrp_ipVersions_Install_v23_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2428 { 2429 #if 0 2430 2431 POBJGPU pGpu = pInfo->pGpu; 2432 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2433 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2434 2435 // avoid possible unused warnings 2436 pGpu += 0; 2437 pRpcHal += 0; 2438 2439 2440 #endif // 2441 } 2442 2443 // No enabled chips use this variant provider 2444 static void rpc_iGrp_ipVersions_Install_v24_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2445 { 2446 #if 0 2447 2448 POBJGPU pGpu = pInfo->pGpu; 2449 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2450 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2451 2452 // avoid possible unused warnings 2453 pGpu += 0; 2454 pRpcHal += 0; 2455 2456 2457 #endif // 2458 } 2459 2460 // No enabled chips use this variant provider 2461 static void rpc_iGrp_ipVersions_Install_v24_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2462 { 2463 #if 0 2464 2465 POBJGPU pGpu = pInfo->pGpu; 2466 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2467 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2468 2469 // avoid possible unused warnings 2470 pGpu += 0; 2471 pRpcHal += 0; 2472 2473 2474 #endif // 2475 } 2476 2477 // No enabled chips use this variant provider 2478 static void rpc_iGrp_ipVersions_Install_v24_05(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2479 { 2480 #if 0 2481 2482 POBJGPU pGpu = pInfo->pGpu; 2483 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2484 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2485 2486 // avoid possible unused warnings 2487 pGpu += 0; 2488 pRpcHal += 0; 2489 2490 2491 #endif // 2492 } 2493 2494 // No enabled chips use this variant provider 2495 static void rpc_iGrp_ipVersions_Install_v24_06(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2496 { 2497 #if 0 2498 2499 POBJGPU pGpu = pInfo->pGpu; 2500 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2501 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2502 2503 // avoid possible unused warnings 2504 pGpu += 0; 2505 pRpcHal += 0; 2506 2507 2508 #endif // 2509 } 2510 2511 // No enabled chips use this variant provider 2512 static void rpc_iGrp_ipVersions_Install_v24_0A(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2513 { 2514 #if 0 2515 2516 POBJGPU pGpu = pInfo->pGpu; 2517 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2518 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2519 2520 // avoid possible unused warnings 2521 pGpu += 0; 2522 pRpcHal += 0; 2523 2524 2525 #endif // 2526 } 2527 2528 2529 2530 2531 // the "_UNASSIGNED" function for all IP_VERSIONS dynamic interfaces 2532 NV_STATUS iGrp_ipVersions_UNASSIGNED(void); 2533 2534 2535 static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2536 { 2537 OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; 2538 RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; 2539 2540 // avoid possible unused warnings 2541 pRpcHal += 0; 2542 2543 // fixup per-interface overrides? 2544 if (IsIPVersionInRange(pRpc, 0x15000000, 0xFFFFFFFF)) 2545 pRpcHal->rpcVgpuPfRegRead32 = rpcVgpuPfRegRead32_v15_00; 2546 if (IsIPVersionInRange(pRpc, 0x18120000, 0xFFFFFFFF)) 2547 pRpcHal->rpcDumpProtobufComponent = rpcDumpProtobufComponent_v18_12; 2548 if (IsIPVersionInRange(pRpc, 0x23050000, 0xFFFFFFFF)) 2549 pRpcHal->rpcEccNotifierWriteAck = rpcEccNotifierWriteAck_v23_05; 2550 if (IsIPVersionInRange(pRpc, 0x13010000, 0xFFFFFFFF)) 2551 pRpcHal->rpcAllocMemory = rpcAllocMemory_v13_01; 2552 if (IsIPVersionInRange(pRpc, 0x12010000, 0xFFFFFFFF)) 2553 pRpcHal->rpcGpuExecRegOps = rpcGpuExecRegOps_v12_01; 2554 if (IsIPVersionInRange(pRpc, 0x15000000, 0xFFFFFFFF)) 2555 pRpcHal->rpcRmfsInit = rpcRmfsInit_v15_00; 2556 if (IsIPVersionInRange(pRpc, 0x03000000, 0x1E04FFFF)) 2557 pRpcHal->rpcUnsetPageDirectory = rpcUnsetPageDirectory_v03_00; 2558 if (IsIPVersionInRange(pRpc, 0x1E050000, 0xFFFFFFFF)) 2559 pRpcHal->rpcUnsetPageDirectory = rpcUnsetPageDirectory_v1E_05; 2560 if (IsIPVersionInRange(pRpc, 0x14000000, 0xFFFFFFFF)) 2561 pRpcHal->rpcGetGspStaticInfo = rpcGetGspStaticInfo_v14_00; 2562 if (IsIPVersionInRange(pRpc, 0x17000000, 0xFFFFFFFF)) 2563 pRpcHal->rpcGspSetSystemInfo = rpcGspSetSystemInfo_v17_00; 2564 if (IsIPVersionInRange(pRpc, 0x15000000, 0xFFFFFFFF)) 2565 pRpcHal->rpcRmfsCleanup = rpcRmfsCleanup_v15_00; 2566 if (IsIPVersionInRange(pRpc, 0x03000000, 0x1E04FFFF)) 2567 pRpcHal->rpcSetPageDirectory = rpcSetPageDirectory_v03_00; 2568 if (IsIPVersionInRange(pRpc, 0x1E050000, 0xFFFFFFFF)) 2569 pRpcHal->rpcSetPageDirectory = rpcSetPageDirectory_v1E_05; 2570 if (IsIPVersionInRange(pRpc, 0x03000000, 0x1F06FFFF)) 2571 pRpcHal->rpcUnloadingGuestDriver = rpcUnloadingGuestDriver_v03_00; 2572 if (IsIPVersionInRange(pRpc, 0x1F070000, 0xFFFFFFFF)) 2573 pRpcHal->rpcUnloadingGuestDriver = rpcUnloadingGuestDriver_v1F_07; 2574 if (IsIPVersionInRange(pRpc, 0x17000000, 0xFFFFFFFF)) 2575 pRpcHal->rpcSetRegistry = rpcSetRegistry_v17_00; 2576 if (IsIPVersionInRange(pRpc, 0x15000000, 0xFFFFFFFF)) 2577 pRpcHal->rpcRmfsCloseQueue = rpcRmfsCloseQueue_v15_00; 2578 if (IsIPVersionInRange(pRpc, 0x17050000, 0x1802FFFF)) 2579 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v17_05; 2580 if (IsIPVersionInRange(pRpc, 0x18030000, 0x1803FFFF)) 2581 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v18_03; 2582 if (IsIPVersionInRange(pRpc, 0x18040000, 0x180DFFFF)) 2583 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v18_04; 2584 if (IsIPVersionInRange(pRpc, 0x180E0000, 0x180FFFFF)) 2585 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v18_0E; 2586 if (IsIPVersionInRange(pRpc, 0x18100000, 0x1810FFFF)) 2587 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v18_10; 2588 if (IsIPVersionInRange(pRpc, 0x18110000, 0x1812FFFF)) 2589 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v18_11; 2590 if (IsIPVersionInRange(pRpc, 0x18130000, 0x1815FFFF)) 2591 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v18_13; 2592 if (IsIPVersionInRange(pRpc, 0x18160000, 0x18FFFFFF)) 2593 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v18_16; 2594 if (IsIPVersionInRange(pRpc, 0x19000000, 0x19FFFFFF)) 2595 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v19_00; 2596 if (IsIPVersionInRange(pRpc, 0x1A000000, 0x1A04FFFF)) 2597 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v1A_00; 2598 if (IsIPVersionInRange(pRpc, 0x1A050000, 0x2000FFFF)) 2599 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v1A_05; 2600 if (IsIPVersionInRange(pRpc, 0x20010000, 0xFFFFFFFF)) 2601 pRpcHal->rpcGetStaticInfo = rpcGetStaticInfo_v20_01; 2602 if (IsIPVersionInRange(pRpc, 0x03000000, 0xFFFFFFFF)) 2603 pRpcHal->rpcIdleChannels = rpcIdleChannels_v03_00; 2604 if (IsIPVersionInRange(pRpc, 0x15000000, 0xFFFFFFFF)) 2605 pRpcHal->rpcUpdateBarPde = rpcUpdateBarPde_v15_00; 2606 if (IsIPVersionInRange(pRpc, 0x03000000, 0xFFFFFFFF)) 2607 pRpcHal->rpcMapMemoryDma = rpcMapMemoryDma_v03_00; 2608 if (IsIPVersionInRange(pRpc, 0x03000000, 0xFFFFFFFF)) 2609 pRpcHal->rpcUnmapMemoryDma = rpcUnmapMemoryDma_v03_00; 2610 if (IsIPVersionInRange(pRpc, 0x15000000, 0xFFFFFFFF)) 2611 pRpcHal->rpcRmfsTest = rpcRmfsTest_v15_00; 2612 2613 // Verify each 'dynamically set' interface was actually set 2614 2615 #define _RPC_HAL_VERIFY_INTERFACE(_pHalFn) \ 2616 NV_ASSERT_OR_RETURN_PRECOMP(_pHalFn != (void *) iGrp_ipVersions_UNASSIGNED, NV_ERR_NOT_SUPPORTED) 2617 2618 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcVgpuPfRegRead32); 2619 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcDumpProtobufComponent); 2620 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcEccNotifierWriteAck); 2621 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcAllocMemory); 2622 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcGpuExecRegOps); 2623 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcRmfsInit); 2624 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcUnsetPageDirectory); 2625 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcGetGspStaticInfo); 2626 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcGspSetSystemInfo); 2627 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcRmfsCleanup); 2628 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcSetPageDirectory); 2629 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcUnloadingGuestDriver); 2630 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcSetRegistry); 2631 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcRmfsCloseQueue); 2632 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcGetStaticInfo); 2633 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcIdleChannels); 2634 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcUpdateBarPde); 2635 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcMapMemoryDma); 2636 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcUnmapMemoryDma); 2637 _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcRmfsTest); 2638 2639 #undef _RPC_HAL_VERIFY_INTERFACE 2640 2641 return NV_OK; 2642 } 2643 2644 2645 static NV_STATUS rpc_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) 2646 { 2647 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v03_00[] = { 2648 { 0x03000000, 0xFFFFFFFF, }, // 2649 }; 2650 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v04_00[] = { 2651 { 0x04000000, 0xFFFFFFFF, }, // 2652 }; 2653 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v05_00[] = { 2654 { 0x05000000, 0xFFFFFFFF, }, // 2655 }; 2656 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v06_00[] = { 2657 { 0x06000000, 0xFFFFFFFF, }, // 2658 }; 2659 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v07_00[] = { 2660 { 0x07000000, 0xFFFFFFFF, }, // 2661 }; 2662 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v07_07[] = { 2663 { 0x07070000, 0xFFFFFFFF, }, // 2664 }; 2665 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v08_01[] = { 2666 { 0x08010000, 0xFFFFFFFF, }, // 2667 }; 2668 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v09_08[] = { 2669 { 0x09080000, 0xFFFFFFFF, }, // 2670 }; 2671 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v09_0B[] = { 2672 { 0x090B0000, 0xFFFFFFFF, }, // 2673 }; 2674 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v09_0C[] = { 2675 { 0x090C0000, 0xFFFFFFFF, }, // 2676 }; 2677 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v12_01[] = { 2678 { 0x12010000, 0xFFFFFFFF, }, // 2679 }; 2680 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v13_01[] = { 2681 { 0x13010000, 0xFFFFFFFF, }, // 2682 }; 2683 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v14_00[] = { 2684 { 0x14000000, 0xFFFFFFFF, }, // 2685 }; 2686 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v14_01[] = { 2687 { 0x14010000, 0xFFFFFFFF, }, // 2688 }; 2689 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v14_02[] = { 2690 { 0x14020000, 0xFFFFFFFF, }, // 2691 }; 2692 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v15_00[] = { 2693 { 0x15000000, 0xFFFFFFFF, }, // 2694 }; 2695 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v15_02[] = { 2696 { 0x15020000, 0xFFFFFFFF, }, // 2697 }; 2698 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v17_00[] = { 2699 { 0x17000000, 0xFFFFFFFF, }, // 2700 }; 2701 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v17_04[] = { 2702 { 0x17040000, 0xFFFFFFFF, }, // 2703 }; 2704 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v17_05[] = { 2705 { 0x17050000, 0xFFFFFFFF, }, // 2706 }; 2707 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_00[] = { 2708 { 0x18000000, 0xFFFFFFFF, }, // 2709 }; 2710 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_01[] = { 2711 { 0x18010000, 0xFFFFFFFF, }, // 2712 }; 2713 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_02[] = { 2714 { 0x18020000, 0xFFFFFFFF, }, // 2715 }; 2716 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_03[] = { 2717 { 0x18030000, 0xFFFFFFFF, }, // 2718 }; 2719 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_04[] = { 2720 { 0x18040000, 0xFFFFFFFF, }, // 2721 }; 2722 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_05[] = { 2723 { 0x18050000, 0xFFFFFFFF, }, // 2724 }; 2725 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_06[] = { 2726 { 0x18060000, 0xFFFFFFFF, }, // 2727 }; 2728 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_07[] = { 2729 { 0x18070000, 0xFFFFFFFF, }, // 2730 }; 2731 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_08[] = { 2732 { 0x18080000, 0xFFFFFFFF, }, // 2733 }; 2734 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_09[] = { 2735 { 0x18090000, 0xFFFFFFFF, }, // 2736 }; 2737 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_0A[] = { 2738 { 0x180A0000, 0xFFFFFFFF, }, // 2739 }; 2740 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_0B[] = { 2741 { 0x180B0000, 0xFFFFFFFF, }, // 2742 }; 2743 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_0C[] = { 2744 { 0x180C0000, 0xFFFFFFFF, }, // 2745 }; 2746 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_0D[] = { 2747 { 0x180D0000, 0xFFFFFFFF, }, // 2748 }; 2749 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_0E[] = { 2750 { 0x180E0000, 0xFFFFFFFF, }, // 2751 }; 2752 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_0F[] = { 2753 { 0x180F0000, 0xFFFFFFFF, }, // 2754 }; 2755 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_10[] = { 2756 { 0x18100000, 0xFFFFFFFF, }, // 2757 }; 2758 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_11[] = { 2759 { 0x18110000, 0xFFFFFFFF, }, // 2760 }; 2761 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_12[] = { 2762 { 0x18120000, 0xFFFFFFFF, }, // 2763 }; 2764 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_13[] = { 2765 { 0x18130000, 0xFFFFFFFF, }, // 2766 }; 2767 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_14[] = { 2768 { 0x18140000, 0xFFFFFFFF, }, // 2769 }; 2770 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_15[] = { 2771 { 0x18150000, 0xFFFFFFFF, }, // 2772 }; 2773 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v18_16[] = { 2774 { 0x18160000, 0xFFFFFFFF, }, // 2775 }; 2776 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v19_00[] = { 2777 { 0x19000000, 0xFFFFFFFF, }, // 2778 }; 2779 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v19_01[] = { 2780 { 0x19010000, 0xFFFFFFFF, }, // 2781 }; 2782 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_00[] = { 2783 { 0x1A000000, 0xFFFFFFFF, }, // 2784 }; 2785 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_01[] = { 2786 { 0x1A010000, 0xFFFFFFFF, }, // 2787 }; 2788 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_02[] = { 2789 { 0x1A020000, 0xFFFFFFFF, }, // 2790 }; 2791 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_03[] = { 2792 { 0x1A030000, 0xFFFFFFFF, }, // 2793 }; 2794 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_04[] = { 2795 { 0x1A040000, 0xFFFFFFFF, }, // 2796 }; 2797 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_05[] = { 2798 { 0x1A050000, 0xFFFFFFFF, }, // 2799 }; 2800 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_06[] = { 2801 { 0x1A060000, 0xFFFFFFFF, }, // 2802 }; 2803 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_07[] = { 2804 { 0x1A070000, 0xFFFFFFFF, }, // 2805 }; 2806 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_08[] = { 2807 { 0x1A080000, 0xFFFFFFFF, }, // 2808 }; 2809 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_09[] = { 2810 { 0x1A090000, 0xFFFFFFFF, }, // 2811 }; 2812 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_0A[] = { 2813 { 0x1A0A0000, 0xFFFFFFFF, }, // 2814 }; 2815 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_0B[] = { 2816 { 0x1A0B0000, 0xFFFFFFFF, }, // 2817 }; 2818 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_0C[] = { 2819 { 0x1A0C0000, 0xFFFFFFFF, }, // 2820 }; 2821 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_0D[] = { 2822 { 0x1A0D0000, 0xFFFFFFFF, }, // 2823 }; 2824 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_0E[] = { 2825 { 0x1A0E0000, 0xFFFFFFFF, }, // 2826 }; 2827 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_0F[] = { 2828 { 0x1A0F0000, 0xFFFFFFFF, }, // 2829 }; 2830 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_10[] = { 2831 { 0x1A100000, 0xFFFFFFFF, }, // 2832 }; 2833 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_12[] = { 2834 { 0x1A120000, 0xFFFFFFFF, }, // 2835 }; 2836 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_13[] = { 2837 { 0x1A130000, 0xFFFFFFFF, }, // 2838 }; 2839 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_14[] = { 2840 { 0x1A140000, 0xFFFFFFFF, }, // 2841 }; 2842 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_15[] = { 2843 { 0x1A150000, 0xFFFFFFFF, }, // 2844 }; 2845 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_16[] = { 2846 { 0x1A160000, 0xFFFFFFFF, }, // 2847 }; 2848 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_17[] = { 2849 { 0x1A170000, 0xFFFFFFFF, }, // 2850 }; 2851 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_18[] = { 2852 { 0x1A180000, 0xFFFFFFFF, }, // 2853 }; 2854 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_1A[] = { 2855 { 0x1A1A0000, 0xFFFFFFFF, }, // 2856 }; 2857 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_1B[] = { 2858 { 0x1A1B0000, 0xFFFFFFFF, }, // 2859 }; 2860 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_1C[] = { 2861 { 0x1A1C0000, 0xFFFFFFFF, }, // 2862 }; 2863 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_1D[] = { 2864 { 0x1A1D0000, 0xFFFFFFFF, }, // 2865 }; 2866 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_1E[] = { 2867 { 0x1A1E0000, 0xFFFFFFFF, }, // 2868 }; 2869 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_1F[] = { 2870 { 0x1A1F0000, 0xFFFFFFFF, }, // 2871 }; 2872 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_20[] = { 2873 { 0x1A200000, 0xFFFFFFFF, }, // 2874 }; 2875 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_21[] = { 2876 { 0x1A210000, 0xFFFFFFFF, }, // 2877 }; 2878 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_22[] = { 2879 { 0x1A220000, 0xFFFFFFFF, }, // 2880 }; 2881 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_23[] = { 2882 { 0x1A230000, 0xFFFFFFFF, }, // 2883 }; 2884 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1A_24[] = { 2885 { 0x1A240000, 0xFFFFFFFF, }, // 2886 }; 2887 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1B_02[] = { 2888 { 0x1B020000, 0xFFFFFFFF, }, // 2889 }; 2890 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1B_04[] = { 2891 { 0x1B040000, 0xFFFFFFFF, }, // 2892 }; 2893 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_02[] = { 2894 { 0x1C020000, 0xFFFFFFFF, }, // 2895 }; 2896 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_04[] = { 2897 { 0x1C040000, 0xFFFFFFFF, }, // 2898 }; 2899 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_05[] = { 2900 { 0x1C050000, 0xFFFFFFFF, }, // 2901 }; 2902 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_07[] = { 2903 { 0x1C070000, 0xFFFFFFFF, }, // 2904 }; 2905 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_08[] = { 2906 { 0x1C080000, 0xFFFFFFFF, }, // 2907 }; 2908 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_09[] = { 2909 { 0x1C090000, 0xFFFFFFFF, }, // 2910 }; 2911 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_0A[] = { 2912 { 0x1C0A0000, 0xFFFFFFFF, }, // 2913 }; 2914 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_0B[] = { 2915 { 0x1C0B0000, 0xFFFFFFFF, }, // 2916 }; 2917 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1C_0C[] = { 2918 { 0x1C0C0000, 0xFFFFFFFF, }, // 2919 }; 2920 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1D_02[] = { 2921 { 0x1D020000, 0xFFFFFFFF, }, // 2922 }; 2923 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1D_05[] = { 2924 { 0x1D050000, 0xFFFFFFFF, }, // 2925 }; 2926 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1D_06[] = { 2927 { 0x1D060000, 0xFFFFFFFF, }, // 2928 }; 2929 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_01[] = { 2930 { 0x1E010000, 0xFFFFFFFF, }, // 2931 }; 2932 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_04[] = { 2933 { 0x1E040000, 0xFFFFFFFF, }, // 2934 }; 2935 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_05[] = { 2936 { 0x1E050000, 0xFFFFFFFF, }, // 2937 }; 2938 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_06[] = { 2939 { 0x1E060000, 0xFFFFFFFF, }, // 2940 }; 2941 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_07[] = { 2942 { 0x1E070000, 0xFFFFFFFF, }, // 2943 }; 2944 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_08[] = { 2945 { 0x1E080000, 0xFFFFFFFF, }, // 2946 }; 2947 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_0A[] = { 2948 { 0x1E0A0000, 0xFFFFFFFF, }, // 2949 }; 2950 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_0B[] = { 2951 { 0x1E0B0000, 0xFFFFFFFF, }, // 2952 }; 2953 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_0C[] = { 2954 { 0x1E0C0000, 0xFFFFFFFF, }, // 2955 }; 2956 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_0D[] = { 2957 { 0x1E0D0000, 0xFFFFFFFF, }, // 2958 }; 2959 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1E_0E[] = { 2960 { 0x1E0E0000, 0xFFFFFFFF, }, // 2961 }; 2962 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_00[] = { 2963 { 0x1F000000, 0xFFFFFFFF, }, // 2964 }; 2965 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_03[] = { 2966 { 0x1F030000, 0xFFFFFFFF, }, // 2967 }; 2968 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_04[] = { 2969 { 0x1F040000, 0xFFFFFFFF, }, // 2970 }; 2971 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_05[] = { 2972 { 0x1F050000, 0xFFFFFFFF, }, // 2973 }; 2974 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_07[] = { 2975 { 0x1F070000, 0xFFFFFFFF, }, // 2976 }; 2977 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_08[] = { 2978 { 0x1F080000, 0xFFFFFFFF, }, // 2979 }; 2980 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_0A[] = { 2981 { 0x1F0A0000, 0xFFFFFFFF, }, // 2982 }; 2983 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_0B[] = { 2984 { 0x1F0B0000, 0xFFFFFFFF, }, // 2985 }; 2986 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_0C[] = { 2987 { 0x1F0C0000, 0xFFFFFFFF, }, // 2988 }; 2989 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_0D[] = { 2990 { 0x1F0D0000, 0xFFFFFFFF, }, // 2991 }; 2992 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_0E[] = { 2993 { 0x1F0E0000, 0xFFFFFFFF, }, // 2994 }; 2995 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v1F_0F[] = { 2996 { 0x1F0F0000, 0xFFFFFFFF, }, // 2997 }; 2998 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v20_00[] = { 2999 { 0x20000000, 0xFFFFFFFF, }, // 3000 }; 3001 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v20_01[] = { 3002 { 0x20010000, 0xFFFFFFFF, }, // 3003 }; 3004 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v20_02[] = { 3005 { 0x20020000, 0xFFFFFFFF, }, // 3006 }; 3007 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v20_03[] = { 3008 { 0x20030000, 0xFFFFFFFF, }, // 3009 }; 3010 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_02[] = { 3011 { 0x21020000, 0xFFFFFFFF, }, // 3012 }; 3013 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_03[] = { 3014 { 0x21030000, 0xFFFFFFFF, }, // 3015 }; 3016 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_04[] = { 3017 { 0x21040000, 0xFFFFFFFF, }, // 3018 }; 3019 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_05[] = { 3020 { 0x21050000, 0xFFFFFFFF, }, // 3021 }; 3022 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_06[] = { 3023 { 0x21060000, 0xFFFFFFFF, }, // 3024 }; 3025 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_07[] = { 3026 { 0x21070000, 0xFFFFFFFF, }, // 3027 }; 3028 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_08[] = { 3029 { 0x21080000, 0xFFFFFFFF, }, // 3030 }; 3031 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_09[] = { 3032 { 0x21090000, 0xFFFFFFFF, }, // 3033 }; 3034 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_0A[] = { 3035 { 0x210A0000, 0xFFFFFFFF, }, // 3036 }; 3037 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v21_0B[] = { 3038 { 0x210B0000, 0xFFFFFFFF, }, // 3039 }; 3040 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v22_01[] = { 3041 { 0x22010000, 0xFFFFFFFF, }, // 3042 }; 3043 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v23_02[] = { 3044 { 0x23020000, 0xFFFFFFFF, }, // 3045 }; 3046 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v23_03[] = { 3047 { 0x23030000, 0xFFFFFFFF, }, // 3048 }; 3049 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v23_04[] = { 3050 { 0x23040000, 0xFFFFFFFF, }, // 3051 }; 3052 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v23_05[] = { 3053 { 0x23050000, 0xFFFFFFFF, }, // 3054 }; 3055 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v24_00[] = { 3056 { 0x24000000, 0xFFFFFFFF, }, // 3057 }; 3058 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v24_01[] = { 3059 { 0x24010000, 0xFFFFFFFF, }, // 3060 }; 3061 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v24_05[] = { 3062 { 0x24050000, 0xFFFFFFFF, }, // 3063 }; 3064 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v24_06[] = { 3065 { 0x24060000, 0xFFFFFFFF, }, // 3066 }; 3067 static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v24_0A[] = { 3068 { 0x240A0000, 0xFFFFFFFF, }, // 3069 }; 3070 3071 #define _RPC_HAL_IGRP_ENTRY_INIT(v) \ 3072 { RPC_IGRP_IP_VERSIONS_RANGES_##v, NV_ARRAY_ELEMENTS(RPC_IGRP_IP_VERSIONS_RANGES_##v), rpc_iGrp_ipVersions_Install_##v, } 3073 3074 static const IGRP_IP_VERSIONS_ENTRY rpc_iGrp_ipVersions_table[] = { 3075 _RPC_HAL_IGRP_ENTRY_INIT(v03_00), // 3076 _RPC_HAL_IGRP_ENTRY_INIT(v04_00), // 3077 _RPC_HAL_IGRP_ENTRY_INIT(v05_00), // 3078 _RPC_HAL_IGRP_ENTRY_INIT(v06_00), // 3079 _RPC_HAL_IGRP_ENTRY_INIT(v07_00), // 3080 _RPC_HAL_IGRP_ENTRY_INIT(v07_07), // 3081 _RPC_HAL_IGRP_ENTRY_INIT(v08_01), // 3082 _RPC_HAL_IGRP_ENTRY_INIT(v09_08), // 3083 _RPC_HAL_IGRP_ENTRY_INIT(v09_0B), // 3084 _RPC_HAL_IGRP_ENTRY_INIT(v09_0C), // 3085 _RPC_HAL_IGRP_ENTRY_INIT(v12_01), // 3086 _RPC_HAL_IGRP_ENTRY_INIT(v13_01), // 3087 _RPC_HAL_IGRP_ENTRY_INIT(v14_00), // 3088 _RPC_HAL_IGRP_ENTRY_INIT(v14_01), // 3089 _RPC_HAL_IGRP_ENTRY_INIT(v14_02), // 3090 _RPC_HAL_IGRP_ENTRY_INIT(v15_00), // 3091 _RPC_HAL_IGRP_ENTRY_INIT(v15_02), // 3092 _RPC_HAL_IGRP_ENTRY_INIT(v17_00), // 3093 _RPC_HAL_IGRP_ENTRY_INIT(v17_04), // 3094 _RPC_HAL_IGRP_ENTRY_INIT(v17_05), // 3095 _RPC_HAL_IGRP_ENTRY_INIT(v18_00), // 3096 _RPC_HAL_IGRP_ENTRY_INIT(v18_01), // 3097 _RPC_HAL_IGRP_ENTRY_INIT(v18_02), // 3098 _RPC_HAL_IGRP_ENTRY_INIT(v18_03), // 3099 _RPC_HAL_IGRP_ENTRY_INIT(v18_04), // 3100 _RPC_HAL_IGRP_ENTRY_INIT(v18_05), // 3101 _RPC_HAL_IGRP_ENTRY_INIT(v18_06), // 3102 _RPC_HAL_IGRP_ENTRY_INIT(v18_07), // 3103 _RPC_HAL_IGRP_ENTRY_INIT(v18_08), // 3104 _RPC_HAL_IGRP_ENTRY_INIT(v18_09), // 3105 _RPC_HAL_IGRP_ENTRY_INIT(v18_0A), // 3106 _RPC_HAL_IGRP_ENTRY_INIT(v18_0B), // 3107 _RPC_HAL_IGRP_ENTRY_INIT(v18_0C), // 3108 _RPC_HAL_IGRP_ENTRY_INIT(v18_0D), // 3109 _RPC_HAL_IGRP_ENTRY_INIT(v18_0E), // 3110 _RPC_HAL_IGRP_ENTRY_INIT(v18_0F), // 3111 _RPC_HAL_IGRP_ENTRY_INIT(v18_10), // 3112 _RPC_HAL_IGRP_ENTRY_INIT(v18_11), // 3113 _RPC_HAL_IGRP_ENTRY_INIT(v18_12), // 3114 _RPC_HAL_IGRP_ENTRY_INIT(v18_13), // 3115 _RPC_HAL_IGRP_ENTRY_INIT(v18_14), // 3116 _RPC_HAL_IGRP_ENTRY_INIT(v18_15), // 3117 _RPC_HAL_IGRP_ENTRY_INIT(v18_16), // 3118 _RPC_HAL_IGRP_ENTRY_INIT(v19_00), // 3119 _RPC_HAL_IGRP_ENTRY_INIT(v19_01), // 3120 _RPC_HAL_IGRP_ENTRY_INIT(v1A_00), // 3121 _RPC_HAL_IGRP_ENTRY_INIT(v1A_01), // 3122 _RPC_HAL_IGRP_ENTRY_INIT(v1A_02), // 3123 _RPC_HAL_IGRP_ENTRY_INIT(v1A_03), // 3124 _RPC_HAL_IGRP_ENTRY_INIT(v1A_04), // 3125 _RPC_HAL_IGRP_ENTRY_INIT(v1A_05), // 3126 _RPC_HAL_IGRP_ENTRY_INIT(v1A_06), // 3127 _RPC_HAL_IGRP_ENTRY_INIT(v1A_07), // 3128 _RPC_HAL_IGRP_ENTRY_INIT(v1A_08), // 3129 _RPC_HAL_IGRP_ENTRY_INIT(v1A_09), // 3130 _RPC_HAL_IGRP_ENTRY_INIT(v1A_0A), // 3131 _RPC_HAL_IGRP_ENTRY_INIT(v1A_0B), // 3132 _RPC_HAL_IGRP_ENTRY_INIT(v1A_0C), // 3133 _RPC_HAL_IGRP_ENTRY_INIT(v1A_0D), // 3134 _RPC_HAL_IGRP_ENTRY_INIT(v1A_0E), // 3135 _RPC_HAL_IGRP_ENTRY_INIT(v1A_0F), // 3136 _RPC_HAL_IGRP_ENTRY_INIT(v1A_10), // 3137 _RPC_HAL_IGRP_ENTRY_INIT(v1A_12), // 3138 _RPC_HAL_IGRP_ENTRY_INIT(v1A_13), // 3139 _RPC_HAL_IGRP_ENTRY_INIT(v1A_14), // 3140 _RPC_HAL_IGRP_ENTRY_INIT(v1A_15), // 3141 _RPC_HAL_IGRP_ENTRY_INIT(v1A_16), // 3142 _RPC_HAL_IGRP_ENTRY_INIT(v1A_17), // 3143 _RPC_HAL_IGRP_ENTRY_INIT(v1A_18), // 3144 _RPC_HAL_IGRP_ENTRY_INIT(v1A_1A), // 3145 _RPC_HAL_IGRP_ENTRY_INIT(v1A_1B), // 3146 _RPC_HAL_IGRP_ENTRY_INIT(v1A_1C), // 3147 _RPC_HAL_IGRP_ENTRY_INIT(v1A_1D), // 3148 _RPC_HAL_IGRP_ENTRY_INIT(v1A_1E), // 3149 _RPC_HAL_IGRP_ENTRY_INIT(v1A_1F), // 3150 _RPC_HAL_IGRP_ENTRY_INIT(v1A_20), // 3151 _RPC_HAL_IGRP_ENTRY_INIT(v1A_21), // 3152 _RPC_HAL_IGRP_ENTRY_INIT(v1A_22), // 3153 _RPC_HAL_IGRP_ENTRY_INIT(v1A_23), // 3154 _RPC_HAL_IGRP_ENTRY_INIT(v1A_24), // 3155 _RPC_HAL_IGRP_ENTRY_INIT(v1B_02), // 3156 _RPC_HAL_IGRP_ENTRY_INIT(v1B_04), // 3157 _RPC_HAL_IGRP_ENTRY_INIT(v1C_02), // 3158 _RPC_HAL_IGRP_ENTRY_INIT(v1C_04), // 3159 _RPC_HAL_IGRP_ENTRY_INIT(v1C_05), // 3160 _RPC_HAL_IGRP_ENTRY_INIT(v1C_07), // 3161 _RPC_HAL_IGRP_ENTRY_INIT(v1C_08), // 3162 _RPC_HAL_IGRP_ENTRY_INIT(v1C_09), // 3163 _RPC_HAL_IGRP_ENTRY_INIT(v1C_0A), // 3164 _RPC_HAL_IGRP_ENTRY_INIT(v1C_0B), // 3165 _RPC_HAL_IGRP_ENTRY_INIT(v1C_0C), // 3166 _RPC_HAL_IGRP_ENTRY_INIT(v1D_02), // 3167 _RPC_HAL_IGRP_ENTRY_INIT(v1D_05), // 3168 _RPC_HAL_IGRP_ENTRY_INIT(v1D_06), // 3169 _RPC_HAL_IGRP_ENTRY_INIT(v1E_01), // 3170 _RPC_HAL_IGRP_ENTRY_INIT(v1E_04), // 3171 _RPC_HAL_IGRP_ENTRY_INIT(v1E_05), // 3172 _RPC_HAL_IGRP_ENTRY_INIT(v1E_06), // 3173 _RPC_HAL_IGRP_ENTRY_INIT(v1E_07), // 3174 _RPC_HAL_IGRP_ENTRY_INIT(v1E_08), // 3175 _RPC_HAL_IGRP_ENTRY_INIT(v1E_0A), // 3176 _RPC_HAL_IGRP_ENTRY_INIT(v1E_0B), // 3177 _RPC_HAL_IGRP_ENTRY_INIT(v1E_0C), // 3178 _RPC_HAL_IGRP_ENTRY_INIT(v1E_0D), // 3179 _RPC_HAL_IGRP_ENTRY_INIT(v1E_0E), // 3180 _RPC_HAL_IGRP_ENTRY_INIT(v1F_00), // 3181 _RPC_HAL_IGRP_ENTRY_INIT(v1F_03), // 3182 _RPC_HAL_IGRP_ENTRY_INIT(v1F_04), // 3183 _RPC_HAL_IGRP_ENTRY_INIT(v1F_05), // 3184 _RPC_HAL_IGRP_ENTRY_INIT(v1F_07), // 3185 _RPC_HAL_IGRP_ENTRY_INIT(v1F_08), // 3186 _RPC_HAL_IGRP_ENTRY_INIT(v1F_0A), // 3187 _RPC_HAL_IGRP_ENTRY_INIT(v1F_0B), // 3188 _RPC_HAL_IGRP_ENTRY_INIT(v1F_0C), // 3189 _RPC_HAL_IGRP_ENTRY_INIT(v1F_0D), // 3190 _RPC_HAL_IGRP_ENTRY_INIT(v1F_0E), // 3191 _RPC_HAL_IGRP_ENTRY_INIT(v1F_0F), // 3192 _RPC_HAL_IGRP_ENTRY_INIT(v20_00), // 3193 _RPC_HAL_IGRP_ENTRY_INIT(v20_01), // 3194 _RPC_HAL_IGRP_ENTRY_INIT(v20_02), // 3195 _RPC_HAL_IGRP_ENTRY_INIT(v20_03), // 3196 _RPC_HAL_IGRP_ENTRY_INIT(v21_02), // 3197 _RPC_HAL_IGRP_ENTRY_INIT(v21_03), // 3198 _RPC_HAL_IGRP_ENTRY_INIT(v21_04), // 3199 _RPC_HAL_IGRP_ENTRY_INIT(v21_05), // 3200 _RPC_HAL_IGRP_ENTRY_INIT(v21_06), // 3201 _RPC_HAL_IGRP_ENTRY_INIT(v21_07), // 3202 _RPC_HAL_IGRP_ENTRY_INIT(v21_08), // 3203 _RPC_HAL_IGRP_ENTRY_INIT(v21_09), // 3204 _RPC_HAL_IGRP_ENTRY_INIT(v21_0A), // 3205 _RPC_HAL_IGRP_ENTRY_INIT(v21_0B), // 3206 _RPC_HAL_IGRP_ENTRY_INIT(v22_01), // 3207 _RPC_HAL_IGRP_ENTRY_INIT(v23_02), // 3208 _RPC_HAL_IGRP_ENTRY_INIT(v23_03), // 3209 _RPC_HAL_IGRP_ENTRY_INIT(v23_04), // 3210 _RPC_HAL_IGRP_ENTRY_INIT(v23_05), // 3211 _RPC_HAL_IGRP_ENTRY_INIT(v24_00), // 3212 _RPC_HAL_IGRP_ENTRY_INIT(v24_01), // 3213 _RPC_HAL_IGRP_ENTRY_INIT(v24_05), // 3214 _RPC_HAL_IGRP_ENTRY_INIT(v24_06), // 3215 _RPC_HAL_IGRP_ENTRY_INIT(v24_0A), // 3216 }; 3217 3218 #undef _RPC_HAL_IGRP_ENTRY_INIT 3219 3220 pInfo->pTable = rpc_iGrp_ipVersions_table; 3221 pInfo->numEntries = NV_ARRAY_ELEMENTS(rpc_iGrp_ipVersions_table); 3222 pInfo->ifacesWrapupFn = rpc_iGrp_ipVersions_Wrapup; 3223 3224 return NV_OK; 3225 } 3226 3227 3228 // 3229 // Setup RPC's hal interface function pointers 3230 // 3231 3232 #if defined(RMCFG_HAL_SETUP_TU102) 3233 3234 static void rpcHalIfacesSetup_TU102(RPC_HAL_IFACES *pRpcHal) 3235 { 3236 3237 // TU102's RPC hal interface function pointer block 3238 static const RPC_HAL_IFACES rpcHalIfacesInitStruct_TU102 = 3239 { 3240 rpcVgpuPfRegRead32_STUB, // rpcVgpuPfRegRead32 3241 rpcDumpProtobufComponent_STUB, // rpcDumpProtobufComponent 3242 rpcEccNotifierWriteAck_STUB, // rpcEccNotifierWriteAck 3243 rpcAllocMemory_STUB, // rpcAllocMemory 3244 rpcGpuExecRegOps_STUB, // rpcGpuExecRegOps 3245 rpcRmfsInit_STUB, // rpcRmfsInit 3246 rpcUnsetPageDirectory_STUB, // rpcUnsetPageDirectory 3247 rpcGetGspStaticInfo_STUB, // rpcGetGspStaticInfo 3248 rpcGspSetSystemInfo_STUB, // rpcGspSetSystemInfo 3249 rpcRmfsCleanup_STUB, // rpcRmfsCleanup 3250 rpcSetPageDirectory_STUB, // rpcSetPageDirectory 3251 rpcUnloadingGuestDriver_STUB, // rpcUnloadingGuestDriver 3252 rpcSetRegistry_STUB, // rpcSetRegistry 3253 rpcRmfsCloseQueue_STUB, // rpcRmfsCloseQueue 3254 rpcGetStaticInfo_STUB, // rpcGetStaticInfo 3255 rpcIdleChannels_STUB, // rpcIdleChannels 3256 rpcUpdateBarPde_STUB, // rpcUpdateBarPde 3257 rpcMapMemoryDma_STUB, // rpcMapMemoryDma 3258 rpcUnmapMemoryDma_STUB, // rpcUnmapMemoryDma 3259 rpcRmfsTest_STUB, // rpcRmfsTest 3260 rpc_iGrp_ipVersions_getInfo, // rpc_iGrp_ipVersions_getInfo 3261 3262 }; // rpcHalIfacesInitStruct_TU102 3263 3264 // init TU102's RPC function ptrs using the init struct above 3265 *pRpcHal = rpcHalIfacesInitStruct_TU102; 3266 } 3267 3268 #endif // TU10X or TU102 3269 3270 #if defined(RMCFG_HAL_SETUP_TU104) 3271 3272 static void rpcHalIfacesSetup_TU104(RPC_HAL_IFACES *pRpcHal) 3273 { 3274 rpcHalIfacesSetup_TU102(pRpcHal); // TU104 interfaces identical to TU102 3275 } 3276 3277 #endif // TU10X or TU104 3278 3279 #if defined(RMCFG_HAL_SETUP_TU106) 3280 3281 static void rpcHalIfacesSetup_TU106(RPC_HAL_IFACES *pRpcHal) 3282 { 3283 rpcHalIfacesSetup_TU102(pRpcHal); // TU106 interfaces identical to TU102 3284 } 3285 3286 #endif // TU10X or TU106 3287 3288 #if defined(RMCFG_HAL_SETUP_TU116) 3289 3290 static void rpcHalIfacesSetup_TU116(RPC_HAL_IFACES *pRpcHal) 3291 { 3292 rpcHalIfacesSetup_TU102(pRpcHal); // TU116 interfaces identical to TU102 3293 } 3294 3295 #endif // TU10X or TU116 3296 3297 #if defined(RMCFG_HAL_SETUP_TU117) 3298 3299 static void rpcHalIfacesSetup_TU117(RPC_HAL_IFACES *pRpcHal) 3300 { 3301 rpcHalIfacesSetup_TU102(pRpcHal); // TU117 interfaces identical to TU102 3302 } 3303 3304 #endif // TU10X or TU117 3305 3306 #if defined(RMCFG_HAL_SETUP_GA100) 3307 3308 static void rpcHalIfacesSetup_GA100(RPC_HAL_IFACES *pRpcHal) 3309 { 3310 3311 // GA100's RPC hal interface function pointer block 3312 static const RPC_HAL_IFACES rpcHalIfacesInitStruct_GA100 = 3313 { 3314 rpcVgpuPfRegRead32_STUB, // rpcVgpuPfRegRead32 3315 rpcDumpProtobufComponent_STUB, // rpcDumpProtobufComponent 3316 rpcEccNotifierWriteAck_STUB, // rpcEccNotifierWriteAck 3317 rpcAllocMemory_STUB, // rpcAllocMemory 3318 rpcGpuExecRegOps_STUB, // rpcGpuExecRegOps 3319 rpcRmfsInit_STUB, // rpcRmfsInit 3320 rpcUnsetPageDirectory_STUB, // rpcUnsetPageDirectory 3321 rpcGetGspStaticInfo_STUB, // rpcGetGspStaticInfo 3322 rpcGspSetSystemInfo_STUB, // rpcGspSetSystemInfo 3323 rpcRmfsCleanup_STUB, // rpcRmfsCleanup 3324 rpcSetPageDirectory_STUB, // rpcSetPageDirectory 3325 rpcUnloadingGuestDriver_STUB, // rpcUnloadingGuestDriver 3326 rpcSetRegistry_STUB, // rpcSetRegistry 3327 rpcRmfsCloseQueue_STUB, // rpcRmfsCloseQueue 3328 rpcGetStaticInfo_STUB, // rpcGetStaticInfo 3329 rpcIdleChannels_STUB, // rpcIdleChannels 3330 rpcUpdateBarPde_STUB, // rpcUpdateBarPde 3331 rpcMapMemoryDma_STUB, // rpcMapMemoryDma 3332 rpcUnmapMemoryDma_STUB, // rpcUnmapMemoryDma 3333 rpcRmfsTest_STUB, // rpcRmfsTest 3334 rpc_iGrp_ipVersions_getInfo, // rpc_iGrp_ipVersions_getInfo 3335 3336 }; // rpcHalIfacesInitStruct_GA100 3337 3338 // init GA100's RPC function ptrs using the init struct above 3339 *pRpcHal = rpcHalIfacesInitStruct_GA100; 3340 } 3341 3342 #endif // GA10X or GA100 3343 3344 #if defined(RMCFG_HAL_SETUP_GA102) 3345 3346 static void rpcHalIfacesSetup_GA102(RPC_HAL_IFACES *pRpcHal) 3347 { 3348 rpcHalIfacesSetup_GA100(pRpcHal); // GA102 interfaces almost identical to GA100 3349 3350 } 3351 3352 #endif // GA10X or GA102 3353 3354 #if defined(RMCFG_HAL_SETUP_GA103) 3355 3356 static void rpcHalIfacesSetup_GA103(RPC_HAL_IFACES *pRpcHal) 3357 { 3358 rpcHalIfacesSetup_GA102(pRpcHal); // GA103 interfaces identical to GA102 3359 } 3360 3361 #endif // GA10X or GA103 3362 3363 #if defined(RMCFG_HAL_SETUP_GA104) 3364 3365 static void rpcHalIfacesSetup_GA104(RPC_HAL_IFACES *pRpcHal) 3366 { 3367 rpcHalIfacesSetup_GA102(pRpcHal); // GA104 interfaces identical to GA102 3368 } 3369 3370 #endif // GA10X or GA104 3371 3372 #if defined(RMCFG_HAL_SETUP_GA106) 3373 3374 static void rpcHalIfacesSetup_GA106(RPC_HAL_IFACES *pRpcHal) 3375 { 3376 rpcHalIfacesSetup_GA102(pRpcHal); // GA106 interfaces identical to GA102 3377 } 3378 3379 #endif // GA10X or GA106 3380 3381 #if defined(RMCFG_HAL_SETUP_GA107) 3382 3383 static void rpcHalIfacesSetup_GA107(RPC_HAL_IFACES *pRpcHal) 3384 { 3385 rpcHalIfacesSetup_GA102(pRpcHal); // GA107 interfaces identical to GA102 3386 } 3387 3388 #endif // GA10X or GA107 3389 3390 #if defined(RMCFG_HAL_SETUP_AD102) 3391 3392 static void rpcHalIfacesSetup_AD102(RPC_HAL_IFACES *pRpcHal) 3393 { 3394 3395 // AD102's RPC hal interface function pointer block 3396 static const RPC_HAL_IFACES rpcHalIfacesInitStruct_AD102 = 3397 { 3398 rpcVgpuPfRegRead32_STUB, // rpcVgpuPfRegRead32 3399 rpcDumpProtobufComponent_STUB, // rpcDumpProtobufComponent 3400 rpcEccNotifierWriteAck_STUB, // rpcEccNotifierWriteAck 3401 rpcAllocMemory_STUB, // rpcAllocMemory 3402 rpcGpuExecRegOps_STUB, // rpcGpuExecRegOps 3403 rpcRmfsInit_STUB, // rpcRmfsInit 3404 rpcUnsetPageDirectory_STUB, // rpcUnsetPageDirectory 3405 rpcGetGspStaticInfo_STUB, // rpcGetGspStaticInfo 3406 rpcGspSetSystemInfo_STUB, // rpcGspSetSystemInfo 3407 rpcRmfsCleanup_STUB, // rpcRmfsCleanup 3408 rpcSetPageDirectory_STUB, // rpcSetPageDirectory 3409 rpcUnloadingGuestDriver_STUB, // rpcUnloadingGuestDriver 3410 rpcSetRegistry_STUB, // rpcSetRegistry 3411 rpcRmfsCloseQueue_STUB, // rpcRmfsCloseQueue 3412 rpcGetStaticInfo_STUB, // rpcGetStaticInfo 3413 rpcIdleChannels_STUB, // rpcIdleChannels 3414 rpcUpdateBarPde_STUB, // rpcUpdateBarPde 3415 rpcMapMemoryDma_STUB, // rpcMapMemoryDma 3416 rpcUnmapMemoryDma_STUB, // rpcUnmapMemoryDma 3417 rpcRmfsTest_STUB, // rpcRmfsTest 3418 rpc_iGrp_ipVersions_getInfo, // rpc_iGrp_ipVersions_getInfo 3419 3420 }; // rpcHalIfacesInitStruct_AD102 3421 3422 // init AD102's RPC function ptrs using the init struct above 3423 *pRpcHal = rpcHalIfacesInitStruct_AD102; 3424 } 3425 3426 #endif // AD10X or AD102 3427 3428 #if defined(RMCFG_HAL_SETUP_AD103) 3429 3430 static void rpcHalIfacesSetup_AD103(RPC_HAL_IFACES *pRpcHal) 3431 { 3432 rpcHalIfacesSetup_AD102(pRpcHal); // AD103 interfaces identical to AD102 3433 } 3434 3435 #endif // AD10X or AD103 3436 3437 #if defined(RMCFG_HAL_SETUP_AD104) 3438 3439 static void rpcHalIfacesSetup_AD104(RPC_HAL_IFACES *pRpcHal) 3440 { 3441 rpcHalIfacesSetup_AD102(pRpcHal); // AD104 interfaces identical to AD102 3442 } 3443 3444 #endif // AD10X or AD104 3445 3446 #if defined(RMCFG_HAL_SETUP_AD106) 3447 3448 static void rpcHalIfacesSetup_AD106(RPC_HAL_IFACES *pRpcHal) 3449 { 3450 rpcHalIfacesSetup_AD102(pRpcHal); // AD106 interfaces identical to AD102 3451 } 3452 3453 #endif // AD10X or AD106 3454 3455 #if defined(RMCFG_HAL_SETUP_AD107) 3456 3457 static void rpcHalIfacesSetup_AD107(RPC_HAL_IFACES *pRpcHal) 3458 { 3459 rpcHalIfacesSetup_AD102(pRpcHal); // AD107 interfaces identical to AD102 3460 } 3461 3462 #endif // AD10X or AD107 3463 3464 #if defined(RMCFG_HAL_SETUP_GH100) 3465 3466 static void rpcHalIfacesSetup_GH100(RPC_HAL_IFACES *pRpcHal) 3467 { 3468 3469 // GH100's RPC hal interface function pointer block 3470 static const RPC_HAL_IFACES rpcHalIfacesInitStruct_GH100 = 3471 { 3472 rpcVgpuPfRegRead32_STUB, // rpcVgpuPfRegRead32 3473 rpcDumpProtobufComponent_STUB, // rpcDumpProtobufComponent 3474 rpcEccNotifierWriteAck_STUB, // rpcEccNotifierWriteAck 3475 rpcAllocMemory_STUB, // rpcAllocMemory 3476 rpcGpuExecRegOps_STUB, // rpcGpuExecRegOps 3477 rpcRmfsInit_STUB, // rpcRmfsInit 3478 rpcUnsetPageDirectory_STUB, // rpcUnsetPageDirectory 3479 rpcGetGspStaticInfo_STUB, // rpcGetGspStaticInfo 3480 rpcGspSetSystemInfo_STUB, // rpcGspSetSystemInfo 3481 rpcRmfsCleanup_STUB, // rpcRmfsCleanup 3482 rpcSetPageDirectory_STUB, // rpcSetPageDirectory 3483 rpcUnloadingGuestDriver_STUB, // rpcUnloadingGuestDriver 3484 rpcSetRegistry_STUB, // rpcSetRegistry 3485 rpcRmfsCloseQueue_STUB, // rpcRmfsCloseQueue 3486 rpcGetStaticInfo_STUB, // rpcGetStaticInfo 3487 rpcIdleChannels_STUB, // rpcIdleChannels 3488 rpcUpdateBarPde_STUB, // rpcUpdateBarPde 3489 rpcMapMemoryDma_STUB, // rpcMapMemoryDma 3490 rpcUnmapMemoryDma_STUB, // rpcUnmapMemoryDma 3491 rpcRmfsTest_STUB, // rpcRmfsTest 3492 rpc_iGrp_ipVersions_getInfo, // rpc_iGrp_ipVersions_getInfo 3493 3494 }; // rpcHalIfacesInitStruct_GH100 3495 3496 // init GH100's RPC function ptrs using the init struct above 3497 *pRpcHal = rpcHalIfacesInitStruct_GH100; 3498 } 3499 3500 #endif // GH10X or GH100 3501 3502 3503 3504 3505 3506 #endif // RMCFG_ENGINE_SETUP 3507 3508 3509 3510 // Were any _MOCK interfaces generated into g_rpc_private.h ? 3511 #define RPC_MOCK_FUNCTIONS_GENERATED 0 3512 3513 3514 #endif // _G_RPC_PRIVATE_H_ 3515