1 #ifndef _G_UVM_NVOC_H_
2 #define _G_UVM_NVOC_H_
3 #include "nvoc/runtime.h"
4 
5 #ifdef __cplusplus
6 extern "C" {
7 #endif
8 
9 /*
10  * SPDX-FileCopyrightText: Copyright (c) 2012-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
11  * SPDX-License-Identifier: MIT
12  *
13  * Permission is hereby granted, free of charge, to any person obtaining a
14  * copy of this software and associated documentation files (the "Software"),
15  * to deal in the Software without restriction, including without limitation
16  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
17  * and/or sell copies of the Software, and to permit persons to whom the
18  * Software is furnished to do so, subject to the following conditions:
19  *
20  * The above copyright notice and this permission notice shall be included in
21  * all copies or substantial portions of the Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
27  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
28  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
29  * DEALINGS IN THE SOFTWARE.
30  */
31 
32 #include "g_uvm_nvoc.h"
33 
34 #ifndef UVM_H
35 #define UVM_H
36 
37 /*!
38  * @file
39  * @brief  Provides definitions for all OBJUVM data structures and interfaces.
40  */
41 
42 #include "core/core.h"
43 #include "rmapi/control.h"
44 #include "rmapi/rmapi_utils.h"
45 #include "gpu/mem_mgr/mem_desc.h"
46 #include "gpu/gpu.h"
47 #include "nvoc/utility.h"
48 #include "kernel/gpu/intr/intr_service.h"
49 
50 #include "gpu/eng_state.h"
51 
52 typedef enum
53 {
54     MIMC,
55     MOMC
56 } ACCESS_CNTR_TYPE;
57 
58 /*!
59  * Defines the structure used to contain all generic information related to
60  * the OBJUVM.
61  *  Contains the Unified Virtual Memory (UVM) feature related data.
62  */
63 
64 
65 /*
66  * This structure is used to store all the necessary information concerning the access counter buffer.
67  * It is contained within the UVM object.
68 */
69 struct ACCESS_CNTR_BUFFER
70 {
71     NvU64               bar2UvmAccessCntrBufferAddr; //This is the bar2 VA that is used by the gpu in
72                                                      // order to access the buffer
73     NvP64               hAccessCntrBufferCpuMapping; //This is a handle to the CPU mapping
74     MEMORY_DESCRIPTOR   *pUvmAccessCntrAllocMemDesc; // Memory descriptor of the access counter buffer allocation
75     MEMORY_DESCRIPTOR   *pUvmAccessCntrMemDesc;      // Memory descriptor of the reconstructed access counter buffer
76     NvHandle            hAccessCntrBufferObject;    // This is a unique object handle
77     NvHandle            hAccessCntrBufferClient;    // This is a unique client handle
78     NvU32               accessCntrBufferSize;       //This represents the size of the buffer (the maximum size that
79                                                     // can be used before the buffer gets full)
80 };
81 
82 typedef enum
83 {
84     intr_notify,
85     intr_error,
86     intr_all
87 } ACCESS_CNTR_INTR_TYPE;
88 
89 typedef struct OBJUVM *POBJUVM;
90 
91 #ifdef NVOC_UVM_H_PRIVATE_ACCESS_ALLOWED
92 #define PRIVATE_FIELD(x) x
93 #else
94 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
95 #endif
96 struct OBJUVM {
97     const struct NVOC_RTTI *__nvoc_rtti;
98     struct OBJENGSTATE __nvoc_base_OBJENGSTATE;
99     struct IntrService __nvoc_base_IntrService;
100     struct Object *__nvoc_pbase_Object;
101     struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE;
102     struct IntrService *__nvoc_pbase_IntrService;
103     struct OBJUVM *__nvoc_pbase_OBJUVM;
104     void (*__uvmStateDestroy__)(OBJGPU *, struct OBJUVM *);
105     NV_STATUS (*__uvmStateInitUnlocked__)(OBJGPU *, struct OBJUVM *);
106     void (*__uvmRegisterIntrService__)(OBJGPU *, struct OBJUVM *, IntrServiceRecord *);
107     NvU32 (*__uvmServiceInterrupt__)(OBJGPU *, struct OBJUVM *, IntrServiceServiceInterruptArguments *);
108     NV_STATUS (*__uvmStateLoad__)(POBJGPU, struct OBJUVM *, NvU32);
109     NV_STATUS (*__uvmStateUnload__)(POBJGPU, struct OBJUVM *, NvU32);
110     NV_STATUS (*__uvmServiceNotificationInterrupt__)(OBJGPU *, struct OBJUVM *, IntrServiceServiceNotificationInterruptArguments *);
111     NV_STATUS (*__uvmStateInitLocked__)(POBJGPU, struct OBJUVM *);
112     NV_STATUS (*__uvmStatePreLoad__)(POBJGPU, struct OBJUVM *, NvU32);
113     NV_STATUS (*__uvmStatePostUnload__)(POBJGPU, struct OBJUVM *, NvU32);
114     NV_STATUS (*__uvmStatePreUnload__)(POBJGPU, struct OBJUVM *, NvU32);
115     void (*__uvmInitMissing__)(POBJGPU, struct OBJUVM *);
116     NV_STATUS (*__uvmStatePreInitLocked__)(POBJGPU, struct OBJUVM *);
117     NV_STATUS (*__uvmStatePreInitUnlocked__)(POBJGPU, struct OBJUVM *);
118     NvBool (*__uvmClearInterrupt__)(OBJGPU *, struct OBJUVM *, IntrServiceClearInterruptArguments *);
119     NV_STATUS (*__uvmStatePostLoad__)(POBJGPU, struct OBJUVM *, NvU32);
120     NV_STATUS (*__uvmConstructEngine__)(POBJGPU, struct OBJUVM *, ENGDESCRIPTOR);
121     NvBool (*__uvmIsPresent__)(POBJGPU, struct OBJUVM *);
122     struct ACCESS_CNTR_BUFFER accessCntrBuffer;
123     NvHandle hClient;
124     NvHandle hSubdevice;
125     RM_API *pRmApi;
126 };
127 
128 #ifndef __NVOC_CLASS_OBJUVM_TYPEDEF__
129 #define __NVOC_CLASS_OBJUVM_TYPEDEF__
130 typedef struct OBJUVM OBJUVM;
131 #endif /* __NVOC_CLASS_OBJUVM_TYPEDEF__ */
132 
133 #ifndef __nvoc_class_id_OBJUVM
134 #define __nvoc_class_id_OBJUVM 0xf9a17d
135 #endif /* __nvoc_class_id_OBJUVM */
136 
137 extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJUVM;
138 
139 #define __staticCast_OBJUVM(pThis) \
140     ((pThis)->__nvoc_pbase_OBJUVM)
141 
142 #ifdef __nvoc_uvm_h_disabled
143 #define __dynamicCast_OBJUVM(pThis) ((OBJUVM*)NULL)
144 #else //__nvoc_uvm_h_disabled
145 #define __dynamicCast_OBJUVM(pThis) \
146     ((OBJUVM*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJUVM)))
147 #endif //__nvoc_uvm_h_disabled
148 
149 #define PDB_PROP_UVM_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE.
150 #define PDB_PROP_UVM_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING
151 
152 NV_STATUS __nvoc_objCreateDynamic_OBJUVM(OBJUVM**, Dynamic*, NvU32, va_list);
153 
154 NV_STATUS __nvoc_objCreate_OBJUVM(OBJUVM**, Dynamic*, NvU32);
155 #define __objCreate_OBJUVM(ppNewObj, pParent, createFlags) \
156     __nvoc_objCreate_OBJUVM((ppNewObj), staticCast((pParent), Dynamic), (createFlags))
157 
158 #define uvmStateDestroy(pGpu, pUvm) uvmStateDestroy_DISPATCH(pGpu, pUvm)
159 #define uvmStateInitUnlocked(pGpu, pUvm) uvmStateInitUnlocked_DISPATCH(pGpu, pUvm)
160 #define uvmRegisterIntrService(arg0, pUvm, arg1) uvmRegisterIntrService_DISPATCH(arg0, pUvm, arg1)
161 #define uvmServiceInterrupt(arg0, pUvm, arg1) uvmServiceInterrupt_DISPATCH(arg0, pUvm, arg1)
162 #define uvmStateLoad(pGpu, pEngstate, arg0) uvmStateLoad_DISPATCH(pGpu, pEngstate, arg0)
163 #define uvmStateUnload(pGpu, pEngstate, arg0) uvmStateUnload_DISPATCH(pGpu, pEngstate, arg0)
164 #define uvmServiceNotificationInterrupt(pGpu, pIntrService, pParams) uvmServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams)
165 #define uvmStateInitLocked(pGpu, pEngstate) uvmStateInitLocked_DISPATCH(pGpu, pEngstate)
166 #define uvmStatePreLoad(pGpu, pEngstate, arg0) uvmStatePreLoad_DISPATCH(pGpu, pEngstate, arg0)
167 #define uvmStatePostUnload(pGpu, pEngstate, arg0) uvmStatePostUnload_DISPATCH(pGpu, pEngstate, arg0)
168 #define uvmStatePreUnload(pGpu, pEngstate, arg0) uvmStatePreUnload_DISPATCH(pGpu, pEngstate, arg0)
169 #define uvmInitMissing(pGpu, pEngstate) uvmInitMissing_DISPATCH(pGpu, pEngstate)
170 #define uvmStatePreInitLocked(pGpu, pEngstate) uvmStatePreInitLocked_DISPATCH(pGpu, pEngstate)
171 #define uvmStatePreInitUnlocked(pGpu, pEngstate) uvmStatePreInitUnlocked_DISPATCH(pGpu, pEngstate)
172 #define uvmClearInterrupt(pGpu, pIntrService, pParams) uvmClearInterrupt_DISPATCH(pGpu, pIntrService, pParams)
173 #define uvmStatePostLoad(pGpu, pEngstate, arg0) uvmStatePostLoad_DISPATCH(pGpu, pEngstate, arg0)
174 #define uvmConstructEngine(pGpu, pEngstate, arg0) uvmConstructEngine_DISPATCH(pGpu, pEngstate, arg0)
175 #define uvmIsPresent(pGpu, pEngstate) uvmIsPresent_DISPATCH(pGpu, pEngstate)
176 NV_STATUS uvmInitializeAccessCntrBuffer_IMPL(OBJGPU *pGpu, struct OBJUVM *pUvm);
177 
178 
179 #ifdef __nvoc_uvm_h_disabled
180 static inline NV_STATUS uvmInitializeAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm) {
181     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
182     return NV_ERR_NOT_SUPPORTED;
183 }
184 #else //__nvoc_uvm_h_disabled
185 #define uvmInitializeAccessCntrBuffer(pGpu, pUvm) uvmInitializeAccessCntrBuffer_IMPL(pGpu, pUvm)
186 #endif //__nvoc_uvm_h_disabled
187 
188 #define uvmInitializeAccessCntrBuffer_HAL(pGpu, pUvm) uvmInitializeAccessCntrBuffer(pGpu, pUvm)
189 
190 NV_STATUS uvmTerminateAccessCntrBuffer_IMPL(OBJGPU *pGpu, struct OBJUVM *pUvm);
191 
192 
193 #ifdef __nvoc_uvm_h_disabled
194 static inline NV_STATUS uvmTerminateAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm) {
195     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
196     return NV_ERR_NOT_SUPPORTED;
197 }
198 #else //__nvoc_uvm_h_disabled
199 #define uvmTerminateAccessCntrBuffer(pGpu, pUvm) uvmTerminateAccessCntrBuffer_IMPL(pGpu, pUvm)
200 #endif //__nvoc_uvm_h_disabled
201 
202 #define uvmTerminateAccessCntrBuffer_HAL(pGpu, pUvm) uvmTerminateAccessCntrBuffer(pGpu, pUvm)
203 
204 NV_STATUS uvmInitAccessCntrBuffer_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm);
205 
206 
207 #ifdef __nvoc_uvm_h_disabled
208 static inline NV_STATUS uvmInitAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm) {
209     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
210     return NV_ERR_NOT_SUPPORTED;
211 }
212 #else //__nvoc_uvm_h_disabled
213 #define uvmInitAccessCntrBuffer(pGpu, pUvm) uvmInitAccessCntrBuffer_GV100(pGpu, pUvm)
214 #endif //__nvoc_uvm_h_disabled
215 
216 #define uvmInitAccessCntrBuffer_HAL(pGpu, pUvm) uvmInitAccessCntrBuffer(pGpu, pUvm)
217 
218 NV_STATUS uvmDestroyAccessCntrBuffer_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm);
219 
220 
221 #ifdef __nvoc_uvm_h_disabled
222 static inline NV_STATUS uvmDestroyAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm) {
223     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
224     return NV_ERR_NOT_SUPPORTED;
225 }
226 #else //__nvoc_uvm_h_disabled
227 #define uvmDestroyAccessCntrBuffer(pGpu, pUvm) uvmDestroyAccessCntrBuffer_GV100(pGpu, pUvm)
228 #endif //__nvoc_uvm_h_disabled
229 
230 #define uvmDestroyAccessCntrBuffer_HAL(pGpu, pUvm) uvmDestroyAccessCntrBuffer(pGpu, pUvm)
231 
232 static inline NV_STATUS uvmAccessCntrBufferUnregister_ac1694(OBJGPU *arg0, struct OBJUVM *arg1) {
233     return NV_OK;
234 }
235 
236 
237 #ifdef __nvoc_uvm_h_disabled
238 static inline NV_STATUS uvmAccessCntrBufferUnregister(OBJGPU *arg0, struct OBJUVM *arg1) {
239     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
240     return NV_ERR_NOT_SUPPORTED;
241 }
242 #else //__nvoc_uvm_h_disabled
243 #define uvmAccessCntrBufferUnregister(arg0, arg1) uvmAccessCntrBufferUnregister_ac1694(arg0, arg1)
244 #endif //__nvoc_uvm_h_disabled
245 
246 #define uvmAccessCntrBufferUnregister_HAL(arg0, arg1) uvmAccessCntrBufferUnregister(arg0, arg1)
247 
248 static inline NV_STATUS uvmAccessCntrBufferRegister_ac1694(OBJGPU *arg0, struct OBJUVM *arg1, NvU32 arg2, RmPhysAddr *arg3) {
249     return NV_OK;
250 }
251 
252 
253 #ifdef __nvoc_uvm_h_disabled
254 static inline NV_STATUS uvmAccessCntrBufferRegister(OBJGPU *arg0, struct OBJUVM *arg1, NvU32 arg2, RmPhysAddr *arg3) {
255     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
256     return NV_ERR_NOT_SUPPORTED;
257 }
258 #else //__nvoc_uvm_h_disabled
259 #define uvmAccessCntrBufferRegister(arg0, arg1, arg2, arg3) uvmAccessCntrBufferRegister_ac1694(arg0, arg1, arg2, arg3)
260 #endif //__nvoc_uvm_h_disabled
261 
262 #define uvmAccessCntrBufferRegister_HAL(arg0, arg1, arg2, arg3) uvmAccessCntrBufferRegister(arg0, arg1, arg2, arg3)
263 
264 NV_STATUS uvmUnloadAccessCntrBuffer_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm);
265 
266 
267 #ifdef __nvoc_uvm_h_disabled
268 static inline NV_STATUS uvmUnloadAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm) {
269     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
270     return NV_ERR_NOT_SUPPORTED;
271 }
272 #else //__nvoc_uvm_h_disabled
273 #define uvmUnloadAccessCntrBuffer(pGpu, pUvm) uvmUnloadAccessCntrBuffer_GV100(pGpu, pUvm)
274 #endif //__nvoc_uvm_h_disabled
275 
276 #define uvmUnloadAccessCntrBuffer_HAL(pGpu, pUvm) uvmUnloadAccessCntrBuffer(pGpu, pUvm)
277 
278 NV_STATUS uvmSetupAccessCntrBuffer_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm);
279 
280 
281 #ifdef __nvoc_uvm_h_disabled
282 static inline NV_STATUS uvmSetupAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm) {
283     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
284     return NV_ERR_NOT_SUPPORTED;
285 }
286 #else //__nvoc_uvm_h_disabled
287 #define uvmSetupAccessCntrBuffer(pGpu, pUvm) uvmSetupAccessCntrBuffer_GV100(pGpu, pUvm)
288 #endif //__nvoc_uvm_h_disabled
289 
290 #define uvmSetupAccessCntrBuffer_HAL(pGpu, pUvm) uvmSetupAccessCntrBuffer(pGpu, pUvm)
291 
292 NV_STATUS uvmReadAccessCntrBufferPutPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 *arg0);
293 
294 
295 #ifdef __nvoc_uvm_h_disabled
296 static inline NV_STATUS uvmReadAccessCntrBufferPutPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 *arg0) {
297     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
298     return NV_ERR_NOT_SUPPORTED;
299 }
300 #else //__nvoc_uvm_h_disabled
301 #define uvmReadAccessCntrBufferPutPtr(pGpu, pUvm, arg0) uvmReadAccessCntrBufferPutPtr_TU102(pGpu, pUvm, arg0)
302 #endif //__nvoc_uvm_h_disabled
303 
304 #define uvmReadAccessCntrBufferPutPtr_HAL(pGpu, pUvm, arg0) uvmReadAccessCntrBufferPutPtr(pGpu, pUvm, arg0)
305 
306 NV_STATUS uvmReadAccessCntrBufferGetPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 *arg0);
307 
308 
309 #ifdef __nvoc_uvm_h_disabled
310 static inline NV_STATUS uvmReadAccessCntrBufferGetPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 *arg0) {
311     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
312     return NV_ERR_NOT_SUPPORTED;
313 }
314 #else //__nvoc_uvm_h_disabled
315 #define uvmReadAccessCntrBufferGetPtr(pGpu, pUvm, arg0) uvmReadAccessCntrBufferGetPtr_TU102(pGpu, pUvm, arg0)
316 #endif //__nvoc_uvm_h_disabled
317 
318 #define uvmReadAccessCntrBufferGetPtr_HAL(pGpu, pUvm, arg0) uvmReadAccessCntrBufferGetPtr(pGpu, pUvm, arg0)
319 
320 NV_STATUS uvmReadAccessCntrBufferFullPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvBool *arg0);
321 
322 
323 #ifdef __nvoc_uvm_h_disabled
324 static inline NV_STATUS uvmReadAccessCntrBufferFullPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvBool *arg0) {
325     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
326     return NV_ERR_NOT_SUPPORTED;
327 }
328 #else //__nvoc_uvm_h_disabled
329 #define uvmReadAccessCntrBufferFullPtr(pGpu, pUvm, arg0) uvmReadAccessCntrBufferFullPtr_TU102(pGpu, pUvm, arg0)
330 #endif //__nvoc_uvm_h_disabled
331 
332 #define uvmReadAccessCntrBufferFullPtr_HAL(pGpu, pUvm, arg0) uvmReadAccessCntrBufferFullPtr(pGpu, pUvm, arg0)
333 
334 NV_STATUS uvmResetAccessCntrBuffer_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0);
335 
336 
337 #ifdef __nvoc_uvm_h_disabled
338 static inline NV_STATUS uvmResetAccessCntrBuffer(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0) {
339     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
340     return NV_ERR_NOT_SUPPORTED;
341 }
342 #else //__nvoc_uvm_h_disabled
343 #define uvmResetAccessCntrBuffer(pGpu, pUvm, arg0) uvmResetAccessCntrBuffer_GV100(pGpu, pUvm, arg0)
344 #endif //__nvoc_uvm_h_disabled
345 
346 #define uvmResetAccessCntrBuffer_HAL(pGpu, pUvm, arg0) uvmResetAccessCntrBuffer(pGpu, pUvm, arg0)
347 
348 NV_STATUS uvmAccessCntrSetGranularity_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, ACCESS_CNTR_TYPE arg0, NvU32 arg1);
349 
350 
351 #ifdef __nvoc_uvm_h_disabled
352 static inline NV_STATUS uvmAccessCntrSetGranularity(OBJGPU *pGpu, struct OBJUVM *pUvm, ACCESS_CNTR_TYPE arg0, NvU32 arg1) {
353     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
354     return NV_ERR_NOT_SUPPORTED;
355 }
356 #else //__nvoc_uvm_h_disabled
357 #define uvmAccessCntrSetGranularity(pGpu, pUvm, arg0, arg1) uvmAccessCntrSetGranularity_TU102(pGpu, pUvm, arg0, arg1)
358 #endif //__nvoc_uvm_h_disabled
359 
360 #define uvmAccessCntrSetGranularity_HAL(pGpu, pUvm, arg0, arg1) uvmAccessCntrSetGranularity(pGpu, pUvm, arg0, arg1)
361 
362 NV_STATUS uvmAccessCntrSetThreshold_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0);
363 
364 
365 #ifdef __nvoc_uvm_h_disabled
366 static inline NV_STATUS uvmAccessCntrSetThreshold(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0) {
367     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
368     return NV_ERR_NOT_SUPPORTED;
369 }
370 #else //__nvoc_uvm_h_disabled
371 #define uvmAccessCntrSetThreshold(pGpu, pUvm, arg0) uvmAccessCntrSetThreshold_TU102(pGpu, pUvm, arg0)
372 #endif //__nvoc_uvm_h_disabled
373 
374 #define uvmAccessCntrSetThreshold_HAL(pGpu, pUvm, arg0) uvmAccessCntrSetThreshold(pGpu, pUvm, arg0)
375 
376 NV_STATUS uvmAccessCntrSetCounterLimit_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0, NvU32 arg1);
377 
378 
379 #ifdef __nvoc_uvm_h_disabled
380 static inline NV_STATUS uvmAccessCntrSetCounterLimit(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0, NvU32 arg1) {
381     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
382     return NV_ERR_NOT_SUPPORTED;
383 }
384 #else //__nvoc_uvm_h_disabled
385 #define uvmAccessCntrSetCounterLimit(pGpu, pUvm, arg0, arg1) uvmAccessCntrSetCounterLimit_GV100(pGpu, pUvm, arg0, arg1)
386 #endif //__nvoc_uvm_h_disabled
387 
388 #define uvmAccessCntrSetCounterLimit_HAL(pGpu, pUvm, arg0, arg1) uvmAccessCntrSetCounterLimit(pGpu, pUvm, arg0, arg1)
389 
390 NV_STATUS uvmWriteAccessCntrBufferGetPtr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0);
391 
392 
393 #ifdef __nvoc_uvm_h_disabled
394 static inline NV_STATUS uvmWriteAccessCntrBufferGetPtr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0) {
395     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
396     return NV_ERR_NOT_SUPPORTED;
397 }
398 #else //__nvoc_uvm_h_disabled
399 #define uvmWriteAccessCntrBufferGetPtr(pGpu, pUvm, arg0) uvmWriteAccessCntrBufferGetPtr_TU102(pGpu, pUvm, arg0)
400 #endif //__nvoc_uvm_h_disabled
401 
402 #define uvmWriteAccessCntrBufferGetPtr_HAL(pGpu, pUvm, arg0) uvmWriteAccessCntrBufferGetPtr(pGpu, pUvm, arg0)
403 
404 NV_STATUS uvmEnableAccessCntr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvBool arg0);
405 
406 
407 #ifdef __nvoc_uvm_h_disabled
408 static inline NV_STATUS uvmEnableAccessCntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvBool arg0) {
409     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
410     return NV_ERR_NOT_SUPPORTED;
411 }
412 #else //__nvoc_uvm_h_disabled
413 #define uvmEnableAccessCntr(pGpu, pUvm, arg0) uvmEnableAccessCntr_TU102(pGpu, pUvm, arg0)
414 #endif //__nvoc_uvm_h_disabled
415 
416 #define uvmEnableAccessCntr_HAL(pGpu, pUvm, arg0) uvmEnableAccessCntr(pGpu, pUvm, arg0)
417 
418 NV_STATUS uvmDisableAccessCntr_GV100(OBJGPU *pGpu, struct OBJUVM *pUvm, NvBool arg0);
419 
420 
421 #ifdef __nvoc_uvm_h_disabled
422 static inline NV_STATUS uvmDisableAccessCntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvBool arg0) {
423     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
424     return NV_ERR_NOT_SUPPORTED;
425 }
426 #else //__nvoc_uvm_h_disabled
427 #define uvmDisableAccessCntr(pGpu, pUvm, arg0) uvmDisableAccessCntr_GV100(pGpu, pUvm, arg0)
428 #endif //__nvoc_uvm_h_disabled
429 
430 #define uvmDisableAccessCntr_HAL(pGpu, pUvm, arg0) uvmDisableAccessCntr(pGpu, pUvm, arg0)
431 
432 NV_STATUS uvmEnableAccessCntrIntr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0);
433 
434 
435 #ifdef __nvoc_uvm_h_disabled
436 static inline NV_STATUS uvmEnableAccessCntrIntr(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU32 arg0) {
437     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
438     return NV_ERR_NOT_SUPPORTED;
439 }
440 #else //__nvoc_uvm_h_disabled
441 #define uvmEnableAccessCntrIntr(pGpu, pUvm, arg0) uvmEnableAccessCntrIntr_TU102(pGpu, pUvm, arg0)
442 #endif //__nvoc_uvm_h_disabled
443 
444 #define uvmEnableAccessCntrIntr_HAL(pGpu, pUvm, arg0) uvmEnableAccessCntrIntr(pGpu, pUvm, arg0)
445 
446 NV_STATUS uvmDisableAccessCntrIntr_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm);
447 
448 
449 #ifdef __nvoc_uvm_h_disabled
450 static inline NV_STATUS uvmDisableAccessCntrIntr(OBJGPU *pGpu, struct OBJUVM *pUvm) {
451     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
452     return NV_ERR_NOT_SUPPORTED;
453 }
454 #else //__nvoc_uvm_h_disabled
455 #define uvmDisableAccessCntrIntr(pGpu, pUvm) uvmDisableAccessCntrIntr_TU102(pGpu, pUvm)
456 #endif //__nvoc_uvm_h_disabled
457 
458 #define uvmDisableAccessCntrIntr_HAL(pGpu, pUvm) uvmDisableAccessCntrIntr(pGpu, pUvm)
459 
460 NV_STATUS uvmGetAccessCntrRegisterMappings_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvP64 *arg0, NvP64 *arg1, NvP64 *arg2, NvP64 *arg3, NvP64 *arg4, NvP64 *arg5, NvU32 *arg6);
461 
462 
463 #ifdef __nvoc_uvm_h_disabled
464 static inline NV_STATUS uvmGetAccessCntrRegisterMappings(OBJGPU *pGpu, struct OBJUVM *pUvm, NvP64 *arg0, NvP64 *arg1, NvP64 *arg2, NvP64 *arg3, NvP64 *arg4, NvP64 *arg5, NvU32 *arg6) {
465     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
466     return NV_ERR_NOT_SUPPORTED;
467 }
468 #else //__nvoc_uvm_h_disabled
469 #define uvmGetAccessCntrRegisterMappings(pGpu, pUvm, arg0, arg1, arg2, arg3, arg4, arg5, arg6) uvmGetAccessCntrRegisterMappings_TU102(pGpu, pUvm, arg0, arg1, arg2, arg3, arg4, arg5, arg6)
470 #endif //__nvoc_uvm_h_disabled
471 
472 #define uvmGetAccessCntrRegisterMappings_HAL(pGpu, pUvm, arg0, arg1, arg2, arg3, arg4, arg5, arg6) uvmGetAccessCntrRegisterMappings(pGpu, pUvm, arg0, arg1, arg2, arg3, arg4, arg5, arg6)
473 
474 NV_STATUS uvmAccessCntrService_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm);
475 
476 
477 #ifdef __nvoc_uvm_h_disabled
478 static inline NV_STATUS uvmAccessCntrService(OBJGPU *pGpu, struct OBJUVM *pUvm) {
479     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
480     return NV_ERR_NOT_SUPPORTED;
481 }
482 #else //__nvoc_uvm_h_disabled
483 #define uvmAccessCntrService(pGpu, pUvm) uvmAccessCntrService_TU102(pGpu, pUvm)
484 #endif //__nvoc_uvm_h_disabled
485 
486 #define uvmAccessCntrService_HAL(pGpu, pUvm) uvmAccessCntrService(pGpu, pUvm)
487 
488 NvU32 uvmGetAccessCounterBufferSize_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm);
489 
490 
491 #ifdef __nvoc_uvm_h_disabled
492 static inline NvU32 uvmGetAccessCounterBufferSize(OBJGPU *pGpu, struct OBJUVM *pUvm) {
493     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
494     return 0;
495 }
496 #else //__nvoc_uvm_h_disabled
497 #define uvmGetAccessCounterBufferSize(pGpu, pUvm) uvmGetAccessCounterBufferSize_TU102(pGpu, pUvm)
498 #endif //__nvoc_uvm_h_disabled
499 
500 #define uvmGetAccessCounterBufferSize_HAL(pGpu, pUvm) uvmGetAccessCounterBufferSize(pGpu, pUvm)
501 
502 void uvmProgramWriteAccessCntrBufferAddress_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU64 addr);
503 
504 
505 #ifdef __nvoc_uvm_h_disabled
506 static inline void uvmProgramWriteAccessCntrBufferAddress(OBJGPU *pGpu, struct OBJUVM *pUvm, NvU64 addr) {
507     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
508 }
509 #else //__nvoc_uvm_h_disabled
510 #define uvmProgramWriteAccessCntrBufferAddress(pGpu, pUvm, addr) uvmProgramWriteAccessCntrBufferAddress_TU102(pGpu, pUvm, addr)
511 #endif //__nvoc_uvm_h_disabled
512 
513 #define uvmProgramWriteAccessCntrBufferAddress_HAL(pGpu, pUvm, addr) uvmProgramWriteAccessCntrBufferAddress(pGpu, pUvm, addr)
514 
515 void uvmProgramAccessCntrBufferEnabled_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm, NvBool bEn);
516 
517 
518 #ifdef __nvoc_uvm_h_disabled
519 static inline void uvmProgramAccessCntrBufferEnabled(OBJGPU *pGpu, struct OBJUVM *pUvm, NvBool bEn) {
520     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
521 }
522 #else //__nvoc_uvm_h_disabled
523 #define uvmProgramAccessCntrBufferEnabled(pGpu, pUvm, bEn) uvmProgramAccessCntrBufferEnabled_TU102(pGpu, pUvm, bEn)
524 #endif //__nvoc_uvm_h_disabled
525 
526 #define uvmProgramAccessCntrBufferEnabled_HAL(pGpu, pUvm, bEn) uvmProgramAccessCntrBufferEnabled(pGpu, pUvm, bEn)
527 
528 NvBool uvmIsAccessCntrBufferEnabled_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm);
529 
530 
531 #ifdef __nvoc_uvm_h_disabled
532 static inline NvBool uvmIsAccessCntrBufferEnabled(OBJGPU *pGpu, struct OBJUVM *pUvm) {
533     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
534     return NV_FALSE;
535 }
536 #else //__nvoc_uvm_h_disabled
537 #define uvmIsAccessCntrBufferEnabled(pGpu, pUvm) uvmIsAccessCntrBufferEnabled_TU102(pGpu, pUvm)
538 #endif //__nvoc_uvm_h_disabled
539 
540 #define uvmIsAccessCntrBufferEnabled_HAL(pGpu, pUvm) uvmIsAccessCntrBufferEnabled(pGpu, pUvm)
541 
542 NvBool uvmIsAccessCntrBufferPushed_TU102(OBJGPU *pGpu, struct OBJUVM *pUvm);
543 
544 
545 #ifdef __nvoc_uvm_h_disabled
546 static inline NvBool uvmIsAccessCntrBufferPushed(OBJGPU *pGpu, struct OBJUVM *pUvm) {
547     NV_ASSERT_FAILED_PRECOMP("OBJUVM was disabled!");
548     return NV_FALSE;
549 }
550 #else //__nvoc_uvm_h_disabled
551 #define uvmIsAccessCntrBufferPushed(pGpu, pUvm) uvmIsAccessCntrBufferPushed_TU102(pGpu, pUvm)
552 #endif //__nvoc_uvm_h_disabled
553 
554 #define uvmIsAccessCntrBufferPushed_HAL(pGpu, pUvm) uvmIsAccessCntrBufferPushed(pGpu, pUvm)
555 
556 void uvmStateDestroy_IMPL(OBJGPU *pGpu, struct OBJUVM *pUvm);
557 
558 static inline void uvmStateDestroy_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pUvm) {
559     pUvm->__uvmStateDestroy__(pGpu, pUvm);
560 }
561 
562 NV_STATUS uvmStateInitUnlocked_IMPL(OBJGPU *pGpu, struct OBJUVM *pUvm);
563 
564 static inline NV_STATUS uvmStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pUvm) {
565     return pUvm->__uvmStateInitUnlocked__(pGpu, pUvm);
566 }
567 
568 void uvmRegisterIntrService_IMPL(OBJGPU *arg0, struct OBJUVM *pUvm, IntrServiceRecord arg1[166]);
569 
570 static inline void uvmRegisterIntrService_DISPATCH(OBJGPU *arg0, struct OBJUVM *pUvm, IntrServiceRecord arg1[166]) {
571     pUvm->__uvmRegisterIntrService__(arg0, pUvm, arg1);
572 }
573 
574 NvU32 uvmServiceInterrupt_IMPL(OBJGPU *arg0, struct OBJUVM *pUvm, IntrServiceServiceInterruptArguments *arg1);
575 
576 static inline NvU32 uvmServiceInterrupt_DISPATCH(OBJGPU *arg0, struct OBJUVM *pUvm, IntrServiceServiceInterruptArguments *arg1) {
577     return pUvm->__uvmServiceInterrupt__(arg0, pUvm, arg1);
578 }
579 
580 static inline NV_STATUS uvmStateLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) {
581     return pEngstate->__uvmStateLoad__(pGpu, pEngstate, arg0);
582 }
583 
584 static inline NV_STATUS uvmStateUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) {
585     return pEngstate->__uvmStateUnload__(pGpu, pEngstate, arg0);
586 }
587 
588 static inline NV_STATUS uvmServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) {
589     return pIntrService->__uvmServiceNotificationInterrupt__(pGpu, pIntrService, pParams);
590 }
591 
592 static inline NV_STATUS uvmStateInitLocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) {
593     return pEngstate->__uvmStateInitLocked__(pGpu, pEngstate);
594 }
595 
596 static inline NV_STATUS uvmStatePreLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) {
597     return pEngstate->__uvmStatePreLoad__(pGpu, pEngstate, arg0);
598 }
599 
600 static inline NV_STATUS uvmStatePostUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) {
601     return pEngstate->__uvmStatePostUnload__(pGpu, pEngstate, arg0);
602 }
603 
604 static inline NV_STATUS uvmStatePreUnload_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) {
605     return pEngstate->__uvmStatePreUnload__(pGpu, pEngstate, arg0);
606 }
607 
608 static inline void uvmInitMissing_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) {
609     pEngstate->__uvmInitMissing__(pGpu, pEngstate);
610 }
611 
612 static inline NV_STATUS uvmStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) {
613     return pEngstate->__uvmStatePreInitLocked__(pGpu, pEngstate);
614 }
615 
616 static inline NV_STATUS uvmStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) {
617     return pEngstate->__uvmStatePreInitUnlocked__(pGpu, pEngstate);
618 }
619 
620 static inline NvBool uvmClearInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams) {
621     return pIntrService->__uvmClearInterrupt__(pGpu, pIntrService, pParams);
622 }
623 
624 static inline NV_STATUS uvmStatePostLoad_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, NvU32 arg0) {
625     return pEngstate->__uvmStatePostLoad__(pGpu, pEngstate, arg0);
626 }
627 
628 static inline NV_STATUS uvmConstructEngine_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg0) {
629     return pEngstate->__uvmConstructEngine__(pGpu, pEngstate, arg0);
630 }
631 
632 static inline NvBool uvmIsPresent_DISPATCH(POBJGPU pGpu, struct OBJUVM *pEngstate) {
633     return pEngstate->__uvmIsPresent__(pGpu, pEngstate);
634 }
635 
636 #undef PRIVATE_FIELD
637 
638 
639 #endif // UVM_H
640 
641 #ifdef __cplusplus
642 } // extern "C"
643 #endif
644 #endif // _G_UVM_NVOC_H_
645