1 /*
2  * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
3  * SPDX-License-Identifier: MIT
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  */
23 
24 #include "core/system.h"
25 #include "core/locks.h"
26 #include "os/os.h"
27 #include "gpu/device/device.h"
28 #include "rmapi/control.h"
29 #include "vgpu/rpc.h"
30 #include "gpu/mem_mgr/mem_mgr.h"
31 #include "vgpu/vgpu_events.h"
32 
33 #include "vgpuapi.h"
34 
35 NV_STATUS
vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL(VgpuApi * pVgpuApi,NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES * pParams)36 vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL
37 (
38     VgpuApi *pVgpuApi,
39     NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *pParams
40 )
41 {
42     OBJGPU   *pGpu = GPU_RES_GET_GPU(pVgpuApi);
43     NV_STATUS rmStatus = NV_OK;
44 
45     //
46     // For RM-managed heaps, look up the memory object from the passed-in
47     // hMemory and overwrite the offset and surfaceKind fields.  For
48     // externally-managed heaps, we just pass through these parameters from the
49     // client directly.
50     //
51     if (!pGpu->getProperty(pGpu, PDB_PROP_GPU_EXTERNAL_HEAP_CONTROL))
52     {
53         MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu);
54         Memory *pMemory = NULL;
55 
56         NvU64   physOffset = 0;
57         NvU32   pageKind = 0;
58         // unused
59         NvU32   _memAperture, _comprOffset, _comprFormat;
60         NvU32   _lineMin, _lineMax, _zcullId, _gpuCacheAttr, _gpuP2PCacheAttr;
61         NvU64   _contigSegmentSize;
62 
63         // Find the allocation from the hMemory
64         rmStatus = memGetByHandle(RES_GET_CLIENT(pVgpuApi), pParams->hMemory, &pMemory);
65         if (rmStatus != NV_OK)
66             return rmStatus;
67 
68         // Verify the allocation is on the same GPU as this VGPU object
69         if (GPU_RES_GET_GPU(pMemory->pDevice) != pGpu)
70             return NV_ERR_INVALID_OBJECT_PARENT;
71 
72         // Verify the allocation is in video memory.
73         if (memdescGetAddressSpace(pMemory->pMemDesc) != ADDR_FBMEM)
74         {
75             return NV_ERR_INVALID_OBJECT;
76         }
77 
78         // Look up the page kind.
79         rmStatus = memmgrGetSurfacePhysAttr_HAL(pGpu, pMemoryManager, pMemory,
80                                                 &physOffset, &_memAperture, &pageKind,
81                                                 &_comprOffset, &_comprFormat, &_lineMin, &_lineMax,
82                                                 &_zcullId, &_gpuCacheAttr, &_gpuP2PCacheAttr,
83                                                 &_contigSegmentSize);
84         if (rmStatus != NV_OK)
85             return rmStatus;
86 
87         physOffset += pParams->offset;
88         if (physOffset > 0xffffffffull)
89             return NV_ERR_INVALID_OFFSET;
90 
91         pParams->offset = NvU64_LO32(physOffset);
92         pParams->surfaceKind = pageKind;
93     }
94 
95     NV_RM_RPC_SET_SURFACE_PROPERTIES(pGpu, RES_GET_CLIENT_HANDLE(pVgpuApi),
96                                      pParams, NV_FALSE, rmStatus);
97 
98     return rmStatus;
99 }
100 
101 NV_STATUS
vgpuapiCtrlCmdVgpuDisplayCleanupSurface_IMPL(VgpuApi * pVgpuApi,NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS * pParams)102 vgpuapiCtrlCmdVgpuDisplayCleanupSurface_IMPL
103 (
104     VgpuApi *pVgpuApi,
105     NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS *pParams
106 )
107 {
108     OBJGPU *pGpu = GPU_RES_GET_GPU(pVgpuApi);
109     NV_STATUS rmStatus = NV_OK;
110 
111     NV_RM_RPC_CLEANUP_SURFACE(pGpu, pParams, rmStatus);
112 
113     return rmStatus;
114 }
115 
116 NV_STATUS
vgpuapiCtrlCmdVGpuGetConfig_IMPL(VgpuApi * pVgpuApi,NVA080_CTRL_VGPU_GET_CONFIG_PARAMS * pParams)117 vgpuapiCtrlCmdVGpuGetConfig_IMPL
118 (
119     VgpuApi *pVgpuApi,
120     NVA080_CTRL_VGPU_GET_CONFIG_PARAMS *pParams
121 )
122 {
123     OBJGPU *pGpu = GPU_RES_GET_GPU(pVgpuApi);
124     VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu);
125     NV_STATUS rmStatus = NV_OK;
126 
127     if (pVSI != NULL)
128         portMemCopy(pParams, sizeof(pVSI->vgpuConfig), &pVSI->vgpuConfig, sizeof(pVSI->vgpuConfig));
129 
130     return rmStatus;
131 }
132 
133