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23 
24 /***************************** HW State Routines ***************************\
25 *                                                                           *
26 *         ADA specific Descriptor List management functions              *
27 *                                                                           *
28 \***************************************************************************/
29 
30 #include "core/core.h"
31 #include "gpu/gpu.h"
32 #include "gpu/eng_desc.h"
33 
34 //
35 // List of GPU children that present for the chip. List entries contain$
36 // {CLASS-ID, # of instances} pairs, e.g.: {CE, 2} is 2 instance of OBJCE. This$
37 // list controls only engine presence. Order is defined by$
38 // gpuGetChildrenOrder_HAL.$
39 //
40 // IMPORTANT: This function is to be deleted. Engine removal should instead be$
41 // handled by <eng>ConstructEngine returning NV_ERR_NOT_SUPPORTED. PLEASE DO NOT$
42 // FORK THIS LIST!$
43 //
44 // List entries contain {CLASS-ID, # of instances} pairs.
45 //
46 
47 static const GPUCHILDPRESENT gpuChildrenPresent_AD102[] =
48 {
49     { classId(OBJFUSE), 1, },
50     { classId(OBJSEQ), 1, },
51     { classId(GpuMutexMgr), 1, },
52     { classId(OBJTMR), 1, },
53     { classId(GraphicsManager), 1, },
54     { classId(MIGManager), 1, },
55     { classId(KernelMIGManager), 1, },
56     { classId(KernelGraphicsManager), 1, },
57     { classId(OBJVBIOS), 1, },
58     { classId(OBJDCB), 1, },
59     { classId(OBJGPIO), 1, },
60     { classId(I2c), 1, },
61     { classId(Spi), 1, },
62     { classId(KernelRc), 1, },
63     { classId(OBJRC), 1, },
64     { classId(OBJSTEREO), 1, },
65     { classId(Intr), 1, },
66     { classId(OBJINFOROM), 1, },
67     { classId(NvDebugDump), 1, },
68     { classId(SMDebugger), 1, },
69     { classId(OBJGPULOG), 1, },
70     { classId(OBJGPUMON), 1, },
71     {classId(OBJSWENG), 1},
72     {classId(OBJUVM), 1},
73     {classId(OBJACR), 1},
74     {classId(OBJBIF), 1},
75     {classId(KernelBif), 1},
76     {classId(Nne), 1},
77     {classId(OBJBSP), 4},
78     {classId(OBJBUS), 1},
79     {classId(KernelBus), 1},
80     {classId(OBJCE), 5},
81     {classId(KernelCE), 5},
82     {classId(OBJCIPHER), 1},
83     {classId(ClockManager), 1},
84     {classId(OBJDISP), 1},
85     {classId(KernelDisplay), 1},
86     {classId(VirtMemAllocator), 1},
87     {classId(OBJDPAUX), 1},
88     {classId(Fan), 1},
89     {classId(OBJHSHUBMANAGER), 1},
90     {classId(Hshub), 2 },
91     {classId(MemorySystem), 1},
92     {classId(KernelMemorySystem), 1},
93     {classId(MemoryManager), 1},
94     {classId(OBJFBFLCN), 1},
95     {classId(KernelFifo), 1 },
96     {classId(OBJFIFO), 1},
97     {classId(OBJGMMU), 1},
98     {classId(KernelGmmu), 1},
99     {classId(Graphics), 1},
100     {classId(KernelGraphics), 1},
101     {classId(OBJHDACODEC), 1},
102     {classId(OBJHWPM), 1},
103     {classId(Lpwr   ), 1},
104     {classId(OBJLSFM), 1},
105     {classId(OBJMC), 1},
106     {classId(KernelMc), 1},
107     {classId(PrivRing), 1},
108     {classId(SwIntr), 1},
109     {classId(OBJNVJPG), 4},
110     {classId(OBJMSENC), 3},
111     {classId(KernelNvlink), 1},
112     {classId(Nvlink), 1},
113     {classId(Perf), 1},
114     {classId(KernelPerf), 1},
115     {classId(Pmgr), 1},
116     {classId(Pmu), 1},
117     {classId(KernelPmu), 1},
118     {classId(OBJSEC2), 1},
119     {classId(Gsp), 1},
120     {classId(Therm), 1},
121     {classId(OBJVOLT), 1},
122     {classId(OBJGRIDDISPLAYLESS), 1},
123     {classId(OBJVMMU), 1},
124     {classId(OBJOFA), 1 },
125     {classId(KernelSec2), 1},
126     {classId(KernelGsp), 1},
127 };
128 
129 const GPUCHILDPRESENT *
130 gpuGetChildrenPresent_AD102(OBJGPU *pGpu, NvU32 *pNumEntries)
131 {
132     *pNumEntries = NV_ARRAY_ELEMENTS32(gpuChildrenPresent_AD102);
133     return gpuChildrenPresent_AD102;
134 }
135 
136