1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 /***************************************************************************\ 25 * * 26 * Confidential Compute HALs * 27 * * 28 \**************************************************************************/ 29 30 #define NVOC_CONF_COMPUTE_H_PRIVATE_ACCESS_ALLOWED 31 32 #include "gpu/conf_compute/conf_compute.h" 33 #include "published/hopper/gh100/dev_fuse.h" 34 #include "rmapi/rmapi.h" 35 #include "conf_compute/cc_keystore.h" 36 37 /*! 38 * check if debug mode is enabled. 39 * 40 * @param[in] pGpu GPU object pointer 41 * @param[in] pConfCompute ConfidentialCompute pointer 42 */ 43 NvBool 44 confComputeIsDebugModeEnabled_GH100 45 ( 46 OBJGPU *pGpu, 47 ConfidentialCompute *pConfCompute 48 ) 49 { 50 NvU32 fuseStat = GPU_REG_RD32(pGpu, NV_FUSE_OPT_SECURE_GSP_DEBUG_DIS); 51 52 return !FLD_TEST_DRF(_FUSE_OPT, _SECURE_GSP_DEBUG_DIS, _DATA, _YES, fuseStat); 53 } 54 55 /*! 56 * @brief confComputeIsGpuCcCapable 57 * Checks if Gpu can handle ConfCompute workloads. 58 * 59 * @param[in] pGpu : OBJGPU Pointer 60 * @param[in] pConfCompute : ConfidentialCompute pointer 61 */ 62 NvBool 63 confComputeIsGpuCcCapable_GH100 64 ( 65 OBJGPU *pGpu, 66 ConfidentialCompute *pConfCompute 67 ) 68 { 69 NvU32 reg; 70 71 if (confComputeIsDebugModeEnabled_HAL(pGpu, pConfCompute)) 72 { 73 NV_PRINTF(LEVEL_ERROR, "Not checking if GPU is capable of accepting conf compute workloads\n"); 74 return NV_TRUE; 75 } 76 77 reg = GPU_REG_RD32(pGpu, NV_FUSE_SPARE_BIT_0); 78 if (FLD_TEST_DRF(_FUSE, _SPARE_BIT_0, _DATA, _ENABLE, reg)) 79 { 80 if (FLD_TEST_DRF(_FUSE, _SPARE_BIT_1, _DATA, _ENABLE, GPU_REG_RD32(pGpu, NV_FUSE_SPARE_BIT_1)) 81 && FLD_TEST_DRF(_FUSE, _SPARE_BIT_2, _DATA, _DISABLE, GPU_REG_RD32(pGpu, NV_FUSE_SPARE_BIT_2))) 82 { 83 return NV_TRUE; 84 } 85 } 86 return NV_FALSE; 87 } 88 89 NV_STATUS 90 confComputeDeriveSecrets_GH100(ConfidentialCompute *pConfCompute, 91 NvU32 engine) 92 { 93 OBJGPU *pGpu = ENG_GET_GPU(pConfCompute); 94 RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); 95 96 if (!IS_GSP_CLIENT(pGpu)) 97 { 98 return NV_OK; 99 } 100 101 switch (engine) 102 { 103 case MC_ENGINE_IDX_GSP: 104 // GSP automatically derives these keys so no need for CPU-RM to trigger it. 105 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 106 CC_GKEYID_GEN(CC_KEYSPACE_GSP, CC_LKEYID_GSP_CPU_LOCKED_RPC))); 107 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 108 CC_GKEYID_GEN(CC_KEYSPACE_GSP, CC_LKEYID_CPU_GSP_LOCKED_RPC))); 109 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 110 CC_GKEYID_GEN(CC_KEYSPACE_GSP, CC_LKEYID_GSP_CPU_DMA))); 111 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 112 CC_GKEYID_GEN(CC_KEYSPACE_GSP, CC_LKEYID_CPU_GSP_DMA))); 113 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 114 CC_GKEYID_GEN(CC_KEYSPACE_GSP, CC_LKEYID_GSP_CPU_REPLAYABLE_FAULT))); 115 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 116 CC_GKEYID_GEN(CC_KEYSPACE_GSP, CC_LKEYID_GSP_CPU_NON_REPLAYABLE_FAULT))); 117 break; 118 case MC_ENGINE_IDX_SEC2: 119 { 120 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_SWL_KEYS_PARAMS params = {0}; 121 122 params.engineId = NV2080_ENGINE_TYPE_SEC2; 123 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 124 pGpu->hInternalClient, 125 pGpu->hInternalSubdevice, 126 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_SWL_KEYS, 127 ¶ms, 128 sizeof(params))); 129 130 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 131 CC_GKEYID_GEN(CC_KEYSPACE_SEC2, CC_LKEYID_CPU_SEC2_DATA_USER), 132 (void*)¶ms.ivMaskSet[NV2080_CTRL_INTERNAL_CONF_COMPUTE_IVMASK_SWL_USER].ivMask[0]); 133 134 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 135 CC_GKEYID_GEN(CC_KEYSPACE_SEC2, CC_LKEYID_CPU_SEC2_DATA_KERN), 136 (void*)¶ms.ivMaskSet[NV2080_CTRL_INTERNAL_CONF_COMPUTE_IVMASK_SWL_KERNEL].ivMask[0]); 137 138 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 139 CC_GKEYID_GEN(CC_KEYSPACE_SEC2, CC_LKEYID_CPU_SEC2_DATA_USER))); 140 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 141 CC_GKEYID_GEN(CC_KEYSPACE_SEC2, CC_LKEYID_CPU_SEC2_HMAC_USER))); 142 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 143 CC_GKEYID_GEN(CC_KEYSPACE_SEC2, CC_LKEYID_CPU_SEC2_DATA_KERN))); 144 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 145 CC_GKEYID_GEN(CC_KEYSPACE_SEC2, CC_LKEYID_CPU_SEC2_HMAC_KERN))); 146 } 147 break; 148 case MC_ENGINE_IDX_CE2: 149 { 150 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; 151 152 params.engineId = NV2080_ENGINE_TYPE_COPY0; 153 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 154 pGpu->hInternalClient, 155 pGpu->hInternalSubdevice, 156 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, 157 ¶ms, 158 sizeof(params))); 159 160 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 161 CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_H2D_USER))); 162 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 163 CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_D2H_USER))); 164 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 165 CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_H2D_KERN))); 166 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 167 CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_D2H_KERN))); 168 169 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 170 CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_H2D_USER), 171 (void*)¶ms.ivMaskSet[0].ivMask); 172 173 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 174 CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_D2H_USER), 175 (void*)¶ms.ivMaskSet[1].ivMask); 176 177 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 178 CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_H2D_KERN), 179 (void*)¶ms.ivMaskSet[2].ivMask); 180 181 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 182 CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_D2H_KERN), 183 (void*)¶ms.ivMaskSet[3].ivMask); 184 break; 185 } 186 case MC_ENGINE_IDX_CE3: 187 { 188 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; 189 190 params.engineId = NV2080_ENGINE_TYPE_COPY1; 191 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 192 pGpu->hInternalClient, 193 pGpu->hInternalSubdevice, 194 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, 195 ¶ms, 196 sizeof(params))); 197 198 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 199 CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_H2D_USER))); 200 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 201 CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_D2H_USER))); 202 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 203 CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_H2D_KERN))); 204 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 205 CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_D2H_KERN))); 206 207 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 208 CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_H2D_USER), 209 (void*)¶ms.ivMaskSet[0].ivMask); 210 211 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 212 CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_D2H_USER), 213 (void*)¶ms.ivMaskSet[1].ivMask); 214 215 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 216 CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_H2D_KERN), 217 (void*)¶ms.ivMaskSet[2].ivMask); 218 219 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 220 CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_D2H_KERN), 221 (void*)¶ms.ivMaskSet[3].ivMask); 222 break; 223 } 224 case MC_ENGINE_IDX_CE4: 225 { 226 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; 227 228 params.engineId = NV2080_ENGINE_TYPE_COPY2; 229 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 230 pGpu->hInternalClient, 231 pGpu->hInternalSubdevice, 232 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, 233 ¶ms, 234 sizeof(params))); 235 236 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 237 CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_H2D_USER))); 238 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 239 CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_D2H_USER))); 240 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 241 CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_H2D_KERN))); 242 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 243 CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_D2H_KERN))); 244 245 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 246 CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_H2D_USER), 247 (void*)¶ms.ivMaskSet[0].ivMask); 248 249 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 250 CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_D2H_USER), 251 (void*)¶ms.ivMaskSet[1].ivMask); 252 253 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 254 CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_H2D_KERN), 255 (void*)¶ms.ivMaskSet[2].ivMask); 256 257 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 258 CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_D2H_KERN), 259 (void*)¶ms.ivMaskSet[3].ivMask); 260 break; 261 } 262 case MC_ENGINE_IDX_CE5: 263 { 264 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; 265 266 params.engineId = NV2080_ENGINE_TYPE_COPY3; 267 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 268 pGpu->hInternalClient, 269 pGpu->hInternalSubdevice, 270 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, 271 ¶ms, 272 sizeof(params))); 273 274 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 275 CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_H2D_USER))); 276 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 277 CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_D2H_USER))); 278 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 279 CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_H2D_KERN))); 280 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 281 CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_D2H_KERN))); 282 283 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 284 CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_H2D_USER), 285 (void*)¶ms.ivMaskSet[0].ivMask); 286 287 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 288 CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_D2H_USER), 289 (void*)¶ms.ivMaskSet[1].ivMask); 290 291 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 292 CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_H2D_KERN), 293 (void*)¶ms.ivMaskSet[2].ivMask); 294 295 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 296 CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_D2H_KERN), 297 (void*)¶ms.ivMaskSet[3].ivMask); 298 break; 299 } 300 case MC_ENGINE_IDX_CE6: 301 { 302 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; 303 304 params.engineId = NV2080_ENGINE_TYPE_COPY4; 305 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 306 pGpu->hInternalClient, 307 pGpu->hInternalSubdevice, 308 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, 309 ¶ms, 310 sizeof(params))); 311 312 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 313 CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_H2D_USER))); 314 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 315 CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_D2H_USER))); 316 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 317 CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_H2D_KERN))); 318 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 319 CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_D2H_KERN))); 320 321 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 322 CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_H2D_USER), 323 (void*)¶ms.ivMaskSet[0].ivMask); 324 325 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 326 CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_D2H_USER), 327 (void*)¶ms.ivMaskSet[1].ivMask); 328 329 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 330 CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_H2D_KERN), 331 (void*)¶ms.ivMaskSet[2].ivMask); 332 333 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 334 CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_D2H_KERN), 335 (void*)¶ms.ivMaskSet[3].ivMask); 336 break; 337 } 338 case MC_ENGINE_IDX_CE7: 339 { 340 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; 341 342 params.engineId = NV2080_ENGINE_TYPE_COPY5; 343 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 344 pGpu->hInternalClient, 345 pGpu->hInternalSubdevice, 346 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, 347 ¶ms, 348 sizeof(params))); 349 350 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 351 CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_H2D_USER))); 352 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 353 CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_D2H_USER))); 354 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 355 CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_H2D_KERN))); 356 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 357 CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_D2H_KERN))); 358 359 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 360 CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_H2D_USER), 361 (void*)¶ms.ivMaskSet[0].ivMask); 362 363 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 364 CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_D2H_USER), 365 (void*)¶ms.ivMaskSet[1].ivMask); 366 367 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 368 CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_H2D_KERN), 369 (void*)¶ms.ivMaskSet[2].ivMask); 370 371 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 372 CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_D2H_KERN), 373 (void*)¶ms.ivMaskSet[3].ivMask); 374 break; 375 } 376 case MC_ENGINE_IDX_CE8: 377 { 378 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; 379 380 params.engineId = NV2080_ENGINE_TYPE_COPY6; 381 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 382 pGpu->hInternalClient, 383 pGpu->hInternalSubdevice, 384 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, 385 ¶ms, 386 sizeof(params))); 387 388 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 389 CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_H2D_USER))); 390 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 391 CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_D2H_USER))); 392 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 393 CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_H2D_KERN))); 394 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 395 CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_D2H_KERN))); 396 397 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 398 CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_H2D_USER), 399 (void*)¶ms.ivMaskSet[0].ivMask); 400 401 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 402 CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_D2H_USER), 403 (void*)¶ms.ivMaskSet[1].ivMask); 404 405 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 406 CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_H2D_KERN), 407 (void*)¶ms.ivMaskSet[2].ivMask); 408 409 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 410 CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_D2H_KERN), 411 (void*)¶ms.ivMaskSet[3].ivMask); 412 break; 413 } 414 case MC_ENGINE_IDX_CE9: 415 { 416 NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; 417 418 params.engineId = NV2080_ENGINE_TYPE_COPY7; 419 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, 420 pGpu->hInternalClient, 421 pGpu->hInternalSubdevice, 422 NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, 423 ¶ms, 424 sizeof(params))); 425 426 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 427 CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_USER))); 428 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 429 CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_D2H_USER))); 430 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 431 CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_KERN))); 432 NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, 433 CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_D2H_KERN))); 434 435 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 436 CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_USER), 437 (void*)¶ms.ivMaskSet[0].ivMask); 438 439 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 440 CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_D2H_USER), 441 (void*)¶ms.ivMaskSet[1].ivMask); 442 443 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 444 CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_KERN), 445 (void*)¶ms.ivMaskSet[2].ivMask); 446 447 confComputeKeyStoreDepositIvMask_HAL(pConfCompute, 448 CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_D2H_KERN), 449 (void*)¶ms.ivMaskSet[3].ivMask); 450 break; 451 } 452 default: 453 return NV_ERR_INVALID_ARGUMENT; 454 } 455 456 return NV_OK; 457 } 458