1 /*
2 * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
3 * SPDX-License-Identifier: MIT
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #define RM_STRICT_CONFIG_EMIT_DISP_ENGINE_DEFINITIONS 0
25
26 #include "gpu_mgr/gpu_mgr.h"
27 #include "gpu/gpu.h"
28 #include "gpu/disp/kern_disp.h"
29 #include "gpu/disp/head/kernel_head.h"
30 #include "disp/v02_04/dev_disp.h"
31
32 /*!
33 * @brief - Compute the value LSR_MIN_TIME to be set for swap barrier
34 *
35 * @param[in] pGpu GPU object pointer
36 * @param[in] pKernelDisplay KernelDisplay pointer
37 * @param[in] head head number
38 * @param[in] swapRdyHiLsrMinTime effective time in micro seconds for which
39 * SWAPRDY will be asserted.
40 * @param[out] computedLsrMinTime computed LsrMinTime to be set.
41 */
42 NV_STATUS
kdispComputeLsrMinTimeValue_v02_07(OBJGPU * pGpu,KernelDisplay * pKernelDisplay,NvU32 head,NvU32 swapRdyHiLsrMinTime,NvU32 * computedLsrMinTime)43 kdispComputeLsrMinTimeValue_v02_07
44 (
45 OBJGPU *pGpu,
46 KernelDisplay *pKernelDisplay,
47 NvU32 head,
48 NvU32 swapRdyHiLsrMinTime,
49 NvU32 *computedLsrMinTime
50 )
51 {
52 //
53 // For Pascal and onwards LSR_MIN_TIME has been moved to static clock
54 //in ns from dispclock. Thus just send the swapRdyHiTime in ns.
55 //
56 *computedLsrMinTime = swapRdyHiLsrMinTime * 1000;
57 return NV_OK;
58 }
59
60 NV_STATUS
kdispGetRgScanLock_v02_01(OBJGPU * pGpu,KernelDisplay * pKernelDisplay,NvU32 head0,OBJGPU * pPeerGpu,NvU32 head1,NvBool * pMasterScanLock,NvU32 * pMasterScanLockPin,NvBool * pSlaveScanLock,NvU32 * pSlaveScanLockPin)61 kdispGetRgScanLock_v02_01
62 (
63 OBJGPU *pGpu,
64 KernelDisplay *pKernelDisplay,
65 NvU32 head0,
66 OBJGPU *pPeerGpu,
67 NvU32 head1,
68 NvBool *pMasterScanLock,
69 NvU32 *pMasterScanLockPin,
70 NvBool *pSlaveScanLock,
71 NvU32 *pSlaveScanLockPin
72 )
73 {
74 NvU32 pinSetOut, pinSetIn;
75 NV_STATUS rmStatus = NV_OK;
76
77 if (!pMasterScanLock || !pMasterScanLockPin ||
78 !pSlaveScanLock || !pSlaveScanLockPin || head0 >= pKernelDisplay->numHeads ||
79 ((pPeerGpu != NULL) && (head1 >= pKernelDisplay->numHeads)))
80 {
81 return NV_ERR_INVALID_ARGUMENT;
82 }
83
84 //
85 // The head parameters are not currently needed for G8X, but for more
86 // complicated setups or GT200 SLI, we may need to take them into
87 // consideration in the future.
88 //
89 rmStatus = gpumgrGetGpuLockAndDrPorts(pGpu, pPeerGpu, &pinSetOut, &pinSetIn);
90 if (rmStatus != NV_OK)
91 {
92 return rmStatus;
93 }
94
95 NV2080_CTRL_INTERNAL_DISP_PINSETS_TO_LOCKPINS_PARAMS params = {0};
96 params.pinSetIn = pinSetIn;
97 params.pinSetOut = pinSetOut;
98
99 RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu);
100 NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi,
101 pGpu->hInternalClient,
102 pGpu->hInternalSubdevice,
103 NV2080_CTRL_CMD_INTERNAL_DISP_PINSETS_TO_LOCKPINS,
104 ¶ms,
105 sizeof(params)));
106
107 *pMasterScanLock = params.bMasterScanLock;
108 *pMasterScanLockPin = params.masterScanLockPin;
109
110 *pSlaveScanLock = params.bSlaveScanLock;
111 *pSlaveScanLockPin = params.slaveScanLockPin;
112
113 return rmStatus;
114 }
115
116 /*!
117 * @brief Get the LOADV counter
118 *
119 * @param[in] pGpu OBJGPU pointer
120 * @param[in] pKernelHead KernelHead object pointer
121 *
122 * @return the current LOADV counter
123 */
124 NvU32
kheadGetLoadVCounter_v02_04(OBJGPU * pGpu,KernelHead * pKernelHead)125 kheadGetLoadVCounter_v02_04
126 (
127 OBJGPU *pGpu,
128 KernelHead *pKernelHead
129 )
130 {
131 return GPU_REG_RD32(pGpu, NV_PDISP_PIPE_IN_LOADV_COUNTER(pKernelHead->PublicId));
132 }
133