1 /*
2 * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
3 * SPDX-License-Identifier: MIT
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23 /********************* Chip Specific HAL TMR Routines **********************\
24 * *
25 * The GA100 specific HAL TMR routines reside in this file. *
26 * *
27 \***************************************************************************/
28 /* ------------------------- Includes --------------------------------------- */
29 #include "gpu/gpu.h"
30 #include "objtmr.h"
31 #include "published/ampere/ga100/dev_vm.h"
32 /* ------------------------- Datatypes -------------------------------------- */
33 /* ------------------------- Macros ----------------------------------------- */
34 /* ------------------------- Static Function Prototypes --------------------- */
35 /* ------------------------- Public Functions ------------------------------ */
36
37 /*!
38 * @brief Gets GPU PTIMER offsets
39 *
40 */
41 NV_STATUS
tmrGetGpuPtimerOffset_GA100(OBJGPU * pGpu,OBJTMR * pTmr,NvU32 * pGpuTimestampOffsetLo,NvU32 * pGpuTimestampOffsetHi)42 tmrGetGpuPtimerOffset_GA100
43 (
44 OBJGPU *pGpu,
45 OBJTMR *pTmr,
46 NvU32 *pGpuTimestampOffsetLo,
47 NvU32 *pGpuTimestampOffsetHi
48 )
49 {
50 if (IS_VIRTUAL_WITH_SRIOV(pGpu))
51 {
52 *pGpuTimestampOffsetLo = NV_VIRTUAL_FUNCTION_TIME_0;
53 *pGpuTimestampOffsetHi = NV_VIRTUAL_FUNCTION_TIME_1;
54 }
55 else
56 {
57 *pGpuTimestampOffsetLo = GPU_GET_VREG_OFFSET(pGpu, NV_VIRTUAL_FUNCTION_TIME_0);
58 *pGpuTimestampOffsetHi = GPU_GET_VREG_OFFSET(pGpu, NV_VIRTUAL_FUNCTION_TIME_1);
59 }
60
61 return NV_OK;
62 }
63
64 /**
65 * @brief Services the stall interrupt.
66 *
67 * @param[in] pGpu
68 * @param[in] pTmr
69 * @param[in] pParams
70 *
71 * @returns Zero, or any implementation-chosen nonzero value. If the same nonzero value is returned enough
72 * times the interrupt is considered stuck.
73 */
74 NvU32
tmrServiceInterrupt_GA100(OBJGPU * pGpu,OBJTMR * pTmr,IntrServiceServiceInterruptArguments * pParams)75 tmrServiceInterrupt_GA100
76 (
77 OBJGPU *pGpu,
78 OBJTMR *pTmr,
79 IntrServiceServiceInterruptArguments *pParams
80 )
81 {
82 NV_ASSERT_OR_RETURN(pParams != NULL, 0);
83
84 switch (pParams->engineIdx)
85 {
86 case MC_ENGINE_IDX_TMR:
87 {
88 MODS_ARCH_REPORT(NV_ARCH_EVENT_PTIMER, "%s", "processing ptimer interrupt\n");
89
90 // Service countdown timer interrupts
91 (void)tmrCallExpiredCallbacks(pGpu, pTmr);
92
93 break;
94 }
95 case MC_ENGINE_IDX_TMR_SWRL:
96 {
97 tmrServiceSwrlCallbacks(pGpu, pTmr, NULL);
98 break;
99 }
100 default:
101 {
102 NV_ASSERT_FAILED("Invalid engineIdx");
103 break;
104 }
105 }
106
107 return 0;
108 }
109