1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2012-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include "virtualization/common_vgpu_mgr.h" 25 #include "ctrl/ctrl2080/ctrl2080gpu.h" 26 27 void 28 vgpuMgrFillVgpuType(NVA081_CTRL_VGPU_INFO *pVgpuInfo, VGPU_TYPE *pVgpuTypeNode) 29 { 30 } 31 32 NV_STATUS 33 vgpuMgrReserveSystemChannelIDs 34 ( 35 OBJGPU *pGpu, 36 VGPU_TYPE *vgpuTypeInfo, 37 NvU32 gfid, 38 NvU32 *pChidOffset, 39 NvU32 *pChannelCount, 40 NvHandle hClient, 41 NvU32 numChannels, 42 NvU32 engineFifoListNumEntries, 43 FIFO_ENGINE_LIST *engineFifoList 44 ) 45 { 46 return NV_ERR_NOT_SUPPORTED; 47 } 48 49 void 50 vgpuMgrFreeSystemChannelIDs 51 ( 52 OBJGPU *pGpu, 53 NvU32 gfid, 54 NvU32 *pChidOffset, 55 NvU32 *pChannelCount, 56 NvHandle hClient, 57 NvU32 engineFifoListNumEntries, 58 FIFO_ENGINE_LIST *engineFifoList 59 ) 60 { 61 } 62