1*404b540aSrobert /* Target macros for the FRV port of GCC. 2*404b540aSrobert Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005 3*404b540aSrobert Free Software Foundation, Inc. 4*404b540aSrobert Contributed by Red Hat Inc. 5*404b540aSrobert 6*404b540aSrobert This file is part of GCC. 7*404b540aSrobert 8*404b540aSrobert GCC is free software; you can redistribute it and/or modify it 9*404b540aSrobert under the terms of the GNU General Public License as published 10*404b540aSrobert by the Free Software Foundation; either version 2, or (at your 11*404b540aSrobert option) any later version. 12*404b540aSrobert 13*404b540aSrobert GCC is distributed in the hope that it will be useful, but WITHOUT 14*404b540aSrobert ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15*404b540aSrobert or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16*404b540aSrobert License for more details. 17*404b540aSrobert 18*404b540aSrobert You should have received a copy of the GNU General Public License 19*404b540aSrobert along with GCC; see the file COPYING. If not, write to the Free 20*404b540aSrobert Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 21*404b540aSrobert 02110-1301, USA. */ 22*404b540aSrobert 23*404b540aSrobert #ifndef __FRV_H__ 24*404b540aSrobert #define __FRV_H__ 25*404b540aSrobert 26*404b540aSrobert /* Frv general purpose macros. */ 27*404b540aSrobert /* Align an address. */ 28*404b540aSrobert #define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1)) 29*404b540aSrobert 30*404b540aSrobert /* Return true if a value is inside a range. */ 31*404b540aSrobert #define IN_RANGE_P(VALUE, LOW, HIGH) \ 32*404b540aSrobert ( (((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW)) \ 33*404b540aSrobert && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH)))) 34*404b540aSrobert 35*404b540aSrobert 36*404b540aSrobert /* Driver configuration. */ 37*404b540aSrobert 38*404b540aSrobert /* A C expression which determines whether the option `-CHAR' takes arguments. 39*404b540aSrobert The value should be the number of arguments that option takes-zero, for many 40*404b540aSrobert options. 41*404b540aSrobert 42*404b540aSrobert By default, this macro is defined to handle the standard options properly. 43*404b540aSrobert You need not define it unless you wish to add additional options which take 44*404b540aSrobert arguments. 45*404b540aSrobert 46*404b540aSrobert Defined in svr4.h. */ 47*404b540aSrobert #undef SWITCH_TAKES_ARG 48*404b540aSrobert #define SWITCH_TAKES_ARG(CHAR) \ 49*404b540aSrobert (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G') 50*404b540aSrobert 51*404b540aSrobert /* A C expression which determines whether the option `-NAME' takes arguments. 52*404b540aSrobert The value should be the number of arguments that option takes-zero, for many 53*404b540aSrobert options. This macro rather than `SWITCH_TAKES_ARG' is used for 54*404b540aSrobert multi-character option names. 55*404b540aSrobert 56*404b540aSrobert By default, this macro is defined as `DEFAULT_WORD_SWITCH_TAKES_ARG', which 57*404b540aSrobert handles the standard options properly. You need not define 58*404b540aSrobert `WORD_SWITCH_TAKES_ARG' unless you wish to add additional options which take 59*404b540aSrobert arguments. Any redefinition should call `DEFAULT_WORD_SWITCH_TAKES_ARG' and 60*404b540aSrobert then check for additional options. 61*404b540aSrobert 62*404b540aSrobert Defined in svr4.h. */ 63*404b540aSrobert #undef WORD_SWITCH_TAKES_ARG 64*404b540aSrobert 65*404b540aSrobert /* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with 66*404b540aSrobert FDPIC which multilib to use depends on whether FDPIC is in use or 67*404b540aSrobert not. The trick we use is to introduce -multilib-library-pic as a 68*404b540aSrobert pseudo-flag that selects the library-pic multilib, and map fpic 69*404b540aSrobert and fPIC to it only if fdpic is not selected. Also, if fdpic is 70*404b540aSrobert selected and no PIC/PIE options are present, we imply -fPIE. 71*404b540aSrobert Otherwise, if -fpic or -fPIC are enabled and we're optimizing for 72*404b540aSrobert speed, or if we have -On with n>=3, enable inlining of PLTs. As 73*404b540aSrobert for -mgprel-ro, we want to enable it by default, but not for -fpic or 74*404b540aSrobert -fpie. */ 75*404b540aSrobert 76*404b540aSrobert #define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS \ 77*404b540aSrobert "%{mno-pack:\ 78*404b540aSrobert %{!mhard-float:-msoft-float}\ 79*404b540aSrobert %{!mmedia:-mno-media}}\ 80*404b540aSrobert %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\ 81*404b540aSrobert %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\ 82*404b540aSrobert %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \ 83*404b540aSrobert %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \ 84*404b540aSrobert %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \ 85*404b540aSrobert %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \ 86*404b540aSrobert " 87*404b540aSrobert #ifndef SUBTARGET_DRIVER_SELF_SPECS 88*404b540aSrobert # define SUBTARGET_DRIVER_SELF_SPECS 89*404b540aSrobert #endif 90*404b540aSrobert 91*404b540aSrobert /* A C string constant that tells the GCC driver program options to pass to 92*404b540aSrobert the assembler. It can also specify how to translate options you give to GNU 93*404b540aSrobert CC into options for GCC to pass to the assembler. See the file `sun3.h' 94*404b540aSrobert for an example of this. 95*404b540aSrobert 96*404b540aSrobert Do not define this macro if it does not need to do anything. 97*404b540aSrobert 98*404b540aSrobert Defined in svr4.h. */ 99*404b540aSrobert #undef ASM_SPEC 100*404b540aSrobert #define ASM_SPEC "\ 101*404b540aSrobert %{G*} %{v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \ 102*404b540aSrobert %{mtomcat-stats} \ 103*404b540aSrobert %{!mno-eflags: \ 104*404b540aSrobert %{mcpu=*} \ 105*404b540aSrobert %{mgpr-*} %{mfpr-*} \ 106*404b540aSrobert %{msoft-float} %{mhard-float} \ 107*404b540aSrobert %{mdword} %{mno-dword} \ 108*404b540aSrobert %{mdouble} %{mno-double} \ 109*404b540aSrobert %{mmedia} %{mno-media} \ 110*404b540aSrobert %{mmuladd} %{mno-muladd} \ 111*404b540aSrobert %{mpack} %{mno-pack} \ 112*404b540aSrobert %{mno-fdpic:-mnopic} %{mfdpic} \ 113*404b540aSrobert %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}" 114*404b540aSrobert 115*404b540aSrobert /* Another C string constant used much like `LINK_SPEC'. The difference 116*404b540aSrobert between the two is that `STARTFILE_SPEC' is used at the very beginning of 117*404b540aSrobert the command given to the linker. 118*404b540aSrobert 119*404b540aSrobert If this macro is not defined, a default is provided that loads the standard 120*404b540aSrobert C startup file from the usual place. See `gcc.c'. 121*404b540aSrobert 122*404b540aSrobert Defined in svr4.h. */ 123*404b540aSrobert #undef STARTFILE_SPEC 124*404b540aSrobert #define STARTFILE_SPEC "crt0%O%s frvbegin%O%s" 125*404b540aSrobert 126*404b540aSrobert /* Another C string constant used much like `LINK_SPEC'. The difference 127*404b540aSrobert between the two is that `ENDFILE_SPEC' is used at the very end of the 128*404b540aSrobert command given to the linker. 129*404b540aSrobert 130*404b540aSrobert Do not define this macro if it does not need to do anything. 131*404b540aSrobert 132*404b540aSrobert Defined in svr4.h. */ 133*404b540aSrobert #undef ENDFILE_SPEC 134*404b540aSrobert #define ENDFILE_SPEC "frvend%O%s" 135*404b540aSrobert 136*404b540aSrobert 137*404b540aSrobert #define MASK_DEFAULT_FRV \ 138*404b540aSrobert (MASK_MEDIA \ 139*404b540aSrobert | MASK_DOUBLE \ 140*404b540aSrobert | MASK_MULADD \ 141*404b540aSrobert | MASK_DWORD \ 142*404b540aSrobert | MASK_PACK) 143*404b540aSrobert 144*404b540aSrobert #define MASK_DEFAULT_FR500 \ 145*404b540aSrobert (MASK_MEDIA | MASK_DWORD | MASK_PACK) 146*404b540aSrobert 147*404b540aSrobert #define MASK_DEFAULT_FR550 \ 148*404b540aSrobert (MASK_MEDIA | MASK_DWORD | MASK_PACK) 149*404b540aSrobert 150*404b540aSrobert #define MASK_DEFAULT_FR450 \ 151*404b540aSrobert (MASK_GPR_32 \ 152*404b540aSrobert | MASK_FPR_32 \ 153*404b540aSrobert | MASK_MEDIA \ 154*404b540aSrobert | MASK_SOFT_FLOAT \ 155*404b540aSrobert | MASK_DWORD \ 156*404b540aSrobert | MASK_PACK) 157*404b540aSrobert 158*404b540aSrobert #define MASK_DEFAULT_FR400 \ 159*404b540aSrobert (MASK_GPR_32 \ 160*404b540aSrobert | MASK_FPR_32 \ 161*404b540aSrobert | MASK_MEDIA \ 162*404b540aSrobert | MASK_ACC_4 \ 163*404b540aSrobert | MASK_SOFT_FLOAT \ 164*404b540aSrobert | MASK_DWORD \ 165*404b540aSrobert | MASK_PACK) 166*404b540aSrobert 167*404b540aSrobert #define MASK_DEFAULT_SIMPLE \ 168*404b540aSrobert (MASK_GPR_32 | MASK_SOFT_FLOAT) 169*404b540aSrobert 170*404b540aSrobert /* A C string constant that tells the GCC driver program options to pass to 171*404b540aSrobert `cc1'. It can also specify how to translate options you give to GCC into 172*404b540aSrobert options for GCC to pass to the `cc1'. 173*404b540aSrobert 174*404b540aSrobert Do not define this macro if it does not need to do anything. */ 175*404b540aSrobert /* For ABI compliance, we need to put bss data into the normal data section. */ 176*404b540aSrobert #define CC1_SPEC "%{G*}" 177*404b540aSrobert 178*404b540aSrobert /* A C string constant that tells the GCC driver program options to pass to 179*404b540aSrobert the linker. It can also specify how to translate options you give to GCC 180*404b540aSrobert into options for GCC to pass to the linker. 181*404b540aSrobert 182*404b540aSrobert Do not define this macro if it does not need to do anything. 183*404b540aSrobert 184*404b540aSrobert Defined in svr4.h. */ 185*404b540aSrobert /* Override the svr4.h version with one that dispenses without the svr4 186*404b540aSrobert shared library options, notably -G. */ 187*404b540aSrobert #undef LINK_SPEC 188*404b540aSrobert #define LINK_SPEC "\ 189*404b540aSrobert %{h*} %{v:-V} \ 190*404b540aSrobert %{b} \ 191*404b540aSrobert %{mfdpic:-melf32frvfd -z text} \ 192*404b540aSrobert %{static:-dn -Bstatic} \ 193*404b540aSrobert %{shared:-Bdynamic} \ 194*404b540aSrobert %{symbolic:-Bsymbolic} \ 195*404b540aSrobert %{G*} \ 196*404b540aSrobert %{YP,*} \ 197*404b540aSrobert %{Qy:} %{!Qn:-Qy}" 198*404b540aSrobert 199*404b540aSrobert /* Another C string constant used much like `LINK_SPEC'. The difference 200*404b540aSrobert between the two is that `LIB_SPEC' is used at the end of the command given 201*404b540aSrobert to the linker. 202*404b540aSrobert 203*404b540aSrobert If this macro is not defined, a default is provided that loads the standard 204*404b540aSrobert C library from the usual place. See `gcc.c'. 205*404b540aSrobert 206*404b540aSrobert Defined in svr4.h. */ 207*404b540aSrobert 208*404b540aSrobert #undef LIB_SPEC 209*404b540aSrobert #define LIB_SPEC "--start-group -lc -lsim --end-group" 210*404b540aSrobert 211*404b540aSrobert #ifndef CPU_TYPE 212*404b540aSrobert #define CPU_TYPE FRV_CPU_FR500 213*404b540aSrobert #endif 214*404b540aSrobert 215*404b540aSrobert /* Run-time target specifications */ 216*404b540aSrobert 217*404b540aSrobert #define TARGET_CPU_CPP_BUILTINS() \ 218*404b540aSrobert do \ 219*404b540aSrobert { \ 220*404b540aSrobert int issue_rate; \ 221*404b540aSrobert \ 222*404b540aSrobert builtin_define ("__frv__"); \ 223*404b540aSrobert builtin_assert ("machine=frv"); \ 224*404b540aSrobert \ 225*404b540aSrobert issue_rate = frv_issue_rate (); \ 226*404b540aSrobert if (issue_rate > 1) \ 227*404b540aSrobert builtin_define_with_int_value ("__FRV_VLIW__", issue_rate); \ 228*404b540aSrobert builtin_define_with_int_value ("__FRV_GPR__", NUM_GPRS); \ 229*404b540aSrobert builtin_define_with_int_value ("__FRV_FPR__", NUM_FPRS); \ 230*404b540aSrobert builtin_define_with_int_value ("__FRV_ACC__", NUM_ACCS); \ 231*404b540aSrobert \ 232*404b540aSrobert switch (frv_cpu_type) \ 233*404b540aSrobert { \ 234*404b540aSrobert case FRV_CPU_GENERIC: \ 235*404b540aSrobert builtin_define ("__CPU_GENERIC__"); \ 236*404b540aSrobert break; \ 237*404b540aSrobert case FRV_CPU_FR550: \ 238*404b540aSrobert builtin_define ("__CPU_FR550__"); \ 239*404b540aSrobert break; \ 240*404b540aSrobert case FRV_CPU_FR500: \ 241*404b540aSrobert case FRV_CPU_TOMCAT: \ 242*404b540aSrobert builtin_define ("__CPU_FR500__"); \ 243*404b540aSrobert break; \ 244*404b540aSrobert case FRV_CPU_FR450: \ 245*404b540aSrobert builtin_define ("__CPU_FR450__"); \ 246*404b540aSrobert break; \ 247*404b540aSrobert case FRV_CPU_FR405: \ 248*404b540aSrobert builtin_define ("__CPU_FR405__"); \ 249*404b540aSrobert break; \ 250*404b540aSrobert case FRV_CPU_FR400: \ 251*404b540aSrobert builtin_define ("__CPU_FR400__"); \ 252*404b540aSrobert break; \ 253*404b540aSrobert case FRV_CPU_FR300: \ 254*404b540aSrobert case FRV_CPU_SIMPLE: \ 255*404b540aSrobert builtin_define ("__CPU_FR300__"); \ 256*404b540aSrobert break; \ 257*404b540aSrobert } \ 258*404b540aSrobert \ 259*404b540aSrobert if (TARGET_HARD_FLOAT) \ 260*404b540aSrobert builtin_define ("__FRV_HARD_FLOAT__"); \ 261*404b540aSrobert if (TARGET_DWORD) \ 262*404b540aSrobert builtin_define ("__FRV_DWORD__"); \ 263*404b540aSrobert if (TARGET_FDPIC) \ 264*404b540aSrobert builtin_define ("__FRV_FDPIC__"); \ 265*404b540aSrobert if (flag_leading_underscore > 0) \ 266*404b540aSrobert builtin_define ("__FRV_UNDERSCORE__"); \ 267*404b540aSrobert } \ 268*404b540aSrobert while (0) 269*404b540aSrobert 270*404b540aSrobert 271*404b540aSrobert #define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA) 272*404b540aSrobert 273*404b540aSrobert #define NUM_GPRS (TARGET_GPR_32? 32 : 64) 274*404b540aSrobert #define NUM_FPRS (!TARGET_HAS_FPRS? 0 : TARGET_FPR_32? 32 : 64) 275*404b540aSrobert #define NUM_ACCS (!TARGET_MEDIA? 0 : TARGET_ACC_4? 4 : 8) 276*404b540aSrobert 277*404b540aSrobert /* X is a valid accumulator number if (X & ACC_MASK) == X. */ 278*404b540aSrobert #define ACC_MASK \ 279*404b540aSrobert (!TARGET_MEDIA ? 0 \ 280*404b540aSrobert : TARGET_ACC_4 ? 3 \ 281*404b540aSrobert : frv_cpu_type == FRV_CPU_FR450 ? 11 \ 282*404b540aSrobert : 7) 283*404b540aSrobert 284*404b540aSrobert /* Macros to identify the blend of media instructions available. Revision 1 285*404b540aSrobert is the one found on the FR500. Revision 2 includes the changes made for 286*404b540aSrobert the FR400. 287*404b540aSrobert 288*404b540aSrobert Treat the generic processor as a revision 1 machine for now, for 289*404b540aSrobert compatibility with earlier releases. */ 290*404b540aSrobert 291*404b540aSrobert #define TARGET_MEDIA_REV1 \ 292*404b540aSrobert (TARGET_MEDIA \ 293*404b540aSrobert && (frv_cpu_type == FRV_CPU_GENERIC \ 294*404b540aSrobert || frv_cpu_type == FRV_CPU_FR500)) 295*404b540aSrobert 296*404b540aSrobert #define TARGET_MEDIA_REV2 \ 297*404b540aSrobert (TARGET_MEDIA \ 298*404b540aSrobert && (frv_cpu_type == FRV_CPU_FR400 \ 299*404b540aSrobert || frv_cpu_type == FRV_CPU_FR405 \ 300*404b540aSrobert || frv_cpu_type == FRV_CPU_FR450 \ 301*404b540aSrobert || frv_cpu_type == FRV_CPU_FR550)) 302*404b540aSrobert 303*404b540aSrobert #define TARGET_MEDIA_FR450 \ 304*404b540aSrobert (frv_cpu_type == FRV_CPU_FR450) 305*404b540aSrobert 306*404b540aSrobert #define TARGET_FR500_FR550_BUILTINS \ 307*404b540aSrobert (frv_cpu_type == FRV_CPU_FR500 \ 308*404b540aSrobert || frv_cpu_type == FRV_CPU_FR550) 309*404b540aSrobert 310*404b540aSrobert #define TARGET_FR405_BUILTINS \ 311*404b540aSrobert (frv_cpu_type == FRV_CPU_FR405 \ 312*404b540aSrobert || frv_cpu_type == FRV_CPU_FR450) 313*404b540aSrobert 314*404b540aSrobert #ifndef HAVE_AS_TLS 315*404b540aSrobert #define HAVE_AS_TLS 0 316*404b540aSrobert #endif 317*404b540aSrobert 318*404b540aSrobert /* This macro is a C statement to print on `stderr' a string describing the 319*404b540aSrobert particular machine description choice. Every machine description should 320*404b540aSrobert define `TARGET_VERSION'. For example: 321*404b540aSrobert 322*404b540aSrobert #ifdef MOTOROLA 323*404b540aSrobert #define TARGET_VERSION \ 324*404b540aSrobert fprintf (stderr, " (68k, Motorola syntax)"); 325*404b540aSrobert #else 326*404b540aSrobert #define TARGET_VERSION \ 327*404b540aSrobert fprintf (stderr, " (68k, MIT syntax)"); 328*404b540aSrobert #endif */ 329*404b540aSrobert #define TARGET_VERSION fprintf (stderr, _(" (frv)")) 330*404b540aSrobert 331*404b540aSrobert /* Sometimes certain combinations of command options do not make sense on a 332*404b540aSrobert particular target machine. You can define a macro `OVERRIDE_OPTIONS' to 333*404b540aSrobert take account of this. This macro, if defined, is executed once just after 334*404b540aSrobert all the command options have been parsed. 335*404b540aSrobert 336*404b540aSrobert Don't use this macro to turn on various extra optimizations for `-O'. That 337*404b540aSrobert is what `OPTIMIZATION_OPTIONS' is for. */ 338*404b540aSrobert 339*404b540aSrobert #define OVERRIDE_OPTIONS frv_override_options () 340*404b540aSrobert 341*404b540aSrobert /* Some machines may desire to change what optimizations are performed for 342*404b540aSrobert various optimization levels. This macro, if defined, is executed once just 343*404b540aSrobert after the optimization level is determined and before the remainder of the 344*404b540aSrobert command options have been parsed. Values set in this macro are used as the 345*404b540aSrobert default values for the other command line options. 346*404b540aSrobert 347*404b540aSrobert LEVEL is the optimization level specified; 2 if `-O2' is specified, 1 if 348*404b540aSrobert `-O' is specified, and 0 if neither is specified. 349*404b540aSrobert 350*404b540aSrobert SIZE is nonzero if `-Os' is specified, 0 otherwise. 351*404b540aSrobert 352*404b540aSrobert You should not use this macro to change options that are not 353*404b540aSrobert machine-specific. These should uniformly selected by the same optimization 354*404b540aSrobert level on all supported machines. Use this macro to enable machine-specific 355*404b540aSrobert optimizations. 356*404b540aSrobert 357*404b540aSrobert *Do not examine `write_symbols' in this macro!* The debugging options are 358*404b540aSrobert *not supposed to alter the generated code. */ 359*404b540aSrobert #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) frv_optimization_options (LEVEL, SIZE) 360*404b540aSrobert 361*404b540aSrobert 362*404b540aSrobert /* Define this macro if debugging can be performed even without a frame 363*404b540aSrobert pointer. If this macro is defined, GCC will turn on the 364*404b540aSrobert `-fomit-frame-pointer' option whenever `-O' is specified. */ 365*404b540aSrobert /* Frv needs a specific frame layout that includes the frame pointer. */ 366*404b540aSrobert 367*404b540aSrobert #define CAN_DEBUG_WITHOUT_FP 368*404b540aSrobert 369*404b540aSrobert #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0) 370*404b540aSrobert 371*404b540aSrobert /* Small Data Area Support. */ 372*404b540aSrobert /* Maximum size of variables that go in .sdata/.sbss. 373*404b540aSrobert The -msdata=foo switch also controls how small variables are handled. */ 374*404b540aSrobert #ifndef SDATA_DEFAULT_SIZE 375*404b540aSrobert #define SDATA_DEFAULT_SIZE 8 376*404b540aSrobert #endif 377*404b540aSrobert 378*404b540aSrobert 379*404b540aSrobert /* Storage Layout */ 380*404b540aSrobert 381*404b540aSrobert /* Define this macro to have the value 1 if the most significant bit in a byte 382*404b540aSrobert has the lowest number; otherwise define it to have the value zero. This 383*404b540aSrobert means that bit-field instructions count from the most significant bit. If 384*404b540aSrobert the machine has no bit-field instructions, then this must still be defined, 385*404b540aSrobert but it doesn't matter which value it is defined to. This macro need not be 386*404b540aSrobert a constant. 387*404b540aSrobert 388*404b540aSrobert This macro does not affect the way structure fields are packed into bytes or 389*404b540aSrobert words; that is controlled by `BYTES_BIG_ENDIAN'. */ 390*404b540aSrobert #define BITS_BIG_ENDIAN 1 391*404b540aSrobert 392*404b540aSrobert /* Define this macro to have the value 1 if the most significant byte in a word 393*404b540aSrobert has the lowest number. This macro need not be a constant. */ 394*404b540aSrobert #define BYTES_BIG_ENDIAN 1 395*404b540aSrobert 396*404b540aSrobert /* Define this macro to have the value 1 if, in a multiword object, the most 397*404b540aSrobert significant word has the lowest number. This applies to both memory 398*404b540aSrobert locations and registers; GCC fundamentally assumes that the order of 399*404b540aSrobert words in memory is the same as the order in registers. This macro need not 400*404b540aSrobert be a constant. */ 401*404b540aSrobert #define WORDS_BIG_ENDIAN 1 402*404b540aSrobert 403*404b540aSrobert /* Number of storage units in a word; normally 4. */ 404*404b540aSrobert #define UNITS_PER_WORD 4 405*404b540aSrobert 406*404b540aSrobert /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and 407*404b540aSrobert which has the specified mode and signedness is to be stored in a register. 408*404b540aSrobert This macro is only called when TYPE is a scalar type. 409*404b540aSrobert 410*404b540aSrobert On most RISC machines, which only have operations that operate on a full 411*404b540aSrobert register, define this macro to set M to `word_mode' if M is an integer mode 412*404b540aSrobert narrower than `BITS_PER_WORD'. In most cases, only integer modes should be 413*404b540aSrobert widened because wider-precision floating-point operations are usually more 414*404b540aSrobert expensive than their narrower counterparts. 415*404b540aSrobert 416*404b540aSrobert For most machines, the macro definition does not change UNSIGNEDP. However, 417*404b540aSrobert some machines, have instructions that preferentially handle either signed or 418*404b540aSrobert unsigned quantities of certain modes. For example, on the DEC Alpha, 32-bit 419*404b540aSrobert loads from memory and 32-bit add instructions sign-extend the result to 64 420*404b540aSrobert bits. On such machines, set UNSIGNEDP according to which kind of extension 421*404b540aSrobert is more efficient. 422*404b540aSrobert 423*404b540aSrobert Do not define this macro if it would never modify MODE. */ 424*404b540aSrobert #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 425*404b540aSrobert do \ 426*404b540aSrobert { \ 427*404b540aSrobert if (GET_MODE_CLASS (MODE) == MODE_INT \ 428*404b540aSrobert && GET_MODE_SIZE (MODE) < 4) \ 429*404b540aSrobert (MODE) = SImode; \ 430*404b540aSrobert } \ 431*404b540aSrobert while (0) 432*404b540aSrobert 433*404b540aSrobert /* Normal alignment required for function parameters on the stack, in bits. 434*404b540aSrobert All stack parameters receive at least this much alignment regardless of data 435*404b540aSrobert type. On most machines, this is the same as the size of an integer. */ 436*404b540aSrobert #define PARM_BOUNDARY 32 437*404b540aSrobert 438*404b540aSrobert /* Define this macro if you wish to preserve a certain alignment for the stack 439*404b540aSrobert pointer. The definition is a C expression for the desired alignment 440*404b540aSrobert (measured in bits). 441*404b540aSrobert 442*404b540aSrobert If `PUSH_ROUNDING' is not defined, the stack will always be aligned to the 443*404b540aSrobert specified boundary. If `PUSH_ROUNDING' is defined and specifies a less 444*404b540aSrobert strict alignment than `STACK_BOUNDARY', the stack may be momentarily 445*404b540aSrobert unaligned while pushing arguments. */ 446*404b540aSrobert #define STACK_BOUNDARY 64 447*404b540aSrobert 448*404b540aSrobert /* Alignment required for a function entry point, in bits. */ 449*404b540aSrobert #define FUNCTION_BOUNDARY 128 450*404b540aSrobert 451*404b540aSrobert /* Biggest alignment that any data type can require on this machine, 452*404b540aSrobert in bits. */ 453*404b540aSrobert #define BIGGEST_ALIGNMENT 64 454*404b540aSrobert 455*404b540aSrobert /* @@@ A hack, needed because libobjc wants to use ADJUST_FIELD_ALIGN for 456*404b540aSrobert some reason. */ 457*404b540aSrobert #ifdef IN_TARGET_LIBS 458*404b540aSrobert #define BIGGEST_FIELD_ALIGNMENT 64 459*404b540aSrobert #else 460*404b540aSrobert /* An expression for the alignment of a structure field FIELD if the 461*404b540aSrobert alignment computed in the usual way is COMPUTED. GCC uses this 462*404b540aSrobert value instead of the value in `BIGGEST_ALIGNMENT' or 463*404b540aSrobert `BIGGEST_FIELD_ALIGNMENT', if defined, for structure fields only. */ 464*404b540aSrobert #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ 465*404b540aSrobert frv_adjust_field_align (FIELD, COMPUTED) 466*404b540aSrobert #endif 467*404b540aSrobert 468*404b540aSrobert /* If defined, a C expression to compute the alignment for a static variable. 469*404b540aSrobert TYPE is the data type, and ALIGN is the alignment that the object 470*404b540aSrobert would ordinarily have. The value of this macro is used instead of that 471*404b540aSrobert alignment to align the object. 472*404b540aSrobert 473*404b540aSrobert If this macro is not defined, then ALIGN is used. 474*404b540aSrobert 475*404b540aSrobert One use of this macro is to increase alignment of medium-size data to make 476*404b540aSrobert it all fit in fewer cache lines. Another is to cause character arrays to be 477*404b540aSrobert word-aligned so that `strcpy' calls that copy constants to character arrays 478*404b540aSrobert can be done inline. */ 479*404b540aSrobert #define DATA_ALIGNMENT(TYPE, ALIGN) \ 480*404b540aSrobert (TREE_CODE (TYPE) == ARRAY_TYPE \ 481*404b540aSrobert && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 482*404b540aSrobert && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 483*404b540aSrobert 484*404b540aSrobert /* If defined, a C expression to compute the alignment given to a constant that 485*404b540aSrobert is being placed in memory. CONSTANT is the constant and ALIGN is the 486*404b540aSrobert alignment that the object would ordinarily have. The value of this macro is 487*404b540aSrobert used instead of that alignment to align the object. 488*404b540aSrobert 489*404b540aSrobert If this macro is not defined, then ALIGN is used. 490*404b540aSrobert 491*404b540aSrobert The typical use of this macro is to increase alignment for string constants 492*404b540aSrobert to be word aligned so that `strcpy' calls that copy constants can be done 493*404b540aSrobert inline. */ 494*404b540aSrobert #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 495*404b540aSrobert (TREE_CODE (EXP) == STRING_CST \ 496*404b540aSrobert && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 497*404b540aSrobert 498*404b540aSrobert /* Define this macro to be the value 1 if instructions will fail to work if 499*404b540aSrobert given data not on the nominal alignment. If instructions will merely go 500*404b540aSrobert slower in that case, define this macro as 0. */ 501*404b540aSrobert #define STRICT_ALIGNMENT 1 502*404b540aSrobert 503*404b540aSrobert /* Define this if you wish to imitate the way many other C compilers handle 504*404b540aSrobert alignment of bitfields and the structures that contain them. 505*404b540aSrobert 506*404b540aSrobert The behavior is that the type written for a bit-field (`int', `short', or 507*404b540aSrobert other integer type) imposes an alignment for the entire structure, as if the 508*404b540aSrobert structure really did contain an ordinary field of that type. In addition, 509*404b540aSrobert the bit-field is placed within the structure so that it would fit within such 510*404b540aSrobert a field, not crossing a boundary for it. 511*404b540aSrobert 512*404b540aSrobert Thus, on most machines, a bit-field whose type is written as `int' would not 513*404b540aSrobert cross a four-byte boundary, and would force four-byte alignment for the 514*404b540aSrobert whole structure. (The alignment used may not be four bytes; it is 515*404b540aSrobert controlled by the other alignment parameters.) 516*404b540aSrobert 517*404b540aSrobert If the macro is defined, its definition should be a C expression; a nonzero 518*404b540aSrobert value for the expression enables this behavior. 519*404b540aSrobert 520*404b540aSrobert Note that if this macro is not defined, or its value is zero, some bitfields 521*404b540aSrobert may cross more than one alignment boundary. The compiler can support such 522*404b540aSrobert references if there are `insv', `extv', and `extzv' insns that can directly 523*404b540aSrobert reference memory. 524*404b540aSrobert 525*404b540aSrobert The other known way of making bitfields work is to define 526*404b540aSrobert `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'. Then every 527*404b540aSrobert structure can be accessed with fullwords. 528*404b540aSrobert 529*404b540aSrobert Unless the machine has bit-field instructions or you define 530*404b540aSrobert `STRUCTURE_SIZE_BOUNDARY' that way, you must define 531*404b540aSrobert `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value. 532*404b540aSrobert 533*404b540aSrobert If your aim is to make GCC use the same conventions for laying out 534*404b540aSrobert bitfields as are used by another compiler, here is how to investigate what 535*404b540aSrobert the other compiler does. Compile and run this program: 536*404b540aSrobert 537*404b540aSrobert struct foo1 538*404b540aSrobert { 539*404b540aSrobert char x; 540*404b540aSrobert char :0; 541*404b540aSrobert char y; 542*404b540aSrobert }; 543*404b540aSrobert 544*404b540aSrobert struct foo2 545*404b540aSrobert { 546*404b540aSrobert char x; 547*404b540aSrobert int :0; 548*404b540aSrobert char y; 549*404b540aSrobert }; 550*404b540aSrobert 551*404b540aSrobert main () 552*404b540aSrobert { 553*404b540aSrobert printf ("Size of foo1 is %d\n", 554*404b540aSrobert sizeof (struct foo1)); 555*404b540aSrobert printf ("Size of foo2 is %d\n", 556*404b540aSrobert sizeof (struct foo2)); 557*404b540aSrobert exit (0); 558*404b540aSrobert } 559*404b540aSrobert 560*404b540aSrobert If this prints 2 and 5, then the compiler's behavior is what you would get 561*404b540aSrobert from `PCC_BITFIELD_TYPE_MATTERS'. 562*404b540aSrobert 563*404b540aSrobert Defined in svr4.h. */ 564*404b540aSrobert #define PCC_BITFIELD_TYPE_MATTERS 1 565*404b540aSrobert 566*404b540aSrobert 567*404b540aSrobert /* Layout of Source Language Data Types. */ 568*404b540aSrobert 569*404b540aSrobert #define CHAR_TYPE_SIZE 8 570*404b540aSrobert #define SHORT_TYPE_SIZE 16 571*404b540aSrobert #define INT_TYPE_SIZE 32 572*404b540aSrobert #define LONG_TYPE_SIZE 32 573*404b540aSrobert #define LONG_LONG_TYPE_SIZE 64 574*404b540aSrobert #define FLOAT_TYPE_SIZE 32 575*404b540aSrobert #define DOUBLE_TYPE_SIZE 64 576*404b540aSrobert #define LONG_DOUBLE_TYPE_SIZE 64 577*404b540aSrobert 578*404b540aSrobert /* An expression whose value is 1 or 0, according to whether the type `char' 579*404b540aSrobert should be signed or unsigned by default. The user can always override this 580*404b540aSrobert default with the options `-fsigned-char' and `-funsigned-char'. */ 581*404b540aSrobert #define DEFAULT_SIGNED_CHAR 1 582*404b540aSrobert 583*404b540aSrobert 584*404b540aSrobert /* General purpose registers. */ 585*404b540aSrobert #define GPR_FIRST 0 /* First gpr */ 586*404b540aSrobert #define GPR_LAST (GPR_FIRST + 63) /* Last gpr */ 587*404b540aSrobert #define GPR_R0 GPR_FIRST /* R0, constant 0 */ 588*404b540aSrobert #define GPR_FP (GPR_FIRST + 2) /* Frame pointer */ 589*404b540aSrobert #define GPR_SP (GPR_FIRST + 1) /* Stack pointer */ 590*404b540aSrobert /* small data register */ 591*404b540aSrobert #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) 592*404b540aSrobert #define PIC_REGNO (GPR_FIRST + (TARGET_FDPIC?15:17)) /* PIC register. */ 593*404b540aSrobert #define FDPIC_FPTR_REGNO (GPR_FIRST + 14) /* uClinux PIC function pointer register. */ 594*404b540aSrobert #define FDPIC_REGNO (GPR_FIRST + 15) /* uClinux PIC register. */ 595*404b540aSrobert 596*404b540aSrobert #define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO) 597*404b540aSrobert 598*404b540aSrobert #define FPR_FIRST 64 /* First FP reg */ 599*404b540aSrobert #define FPR_LAST 127 /* Last FP reg */ 600*404b540aSrobert 601*404b540aSrobert #define GPR_TEMP_NUM frv_condexec_temps /* # gprs to reserve for temps */ 602*404b540aSrobert 603*404b540aSrobert /* We reserve the last CR and CCR in each category to be used as a reload 604*404b540aSrobert register to reload the CR/CCR registers. This is a kludge. */ 605*404b540aSrobert #define CC_FIRST 128 /* First ICC/FCC reg */ 606*404b540aSrobert #define CC_LAST 135 /* Last ICC/FCC reg */ 607*404b540aSrobert #define ICC_FIRST (CC_FIRST + 4) /* First ICC reg */ 608*404b540aSrobert #define ICC_LAST (CC_FIRST + 7) /* Last ICC reg */ 609*404b540aSrobert #define ICC_TEMP (CC_FIRST + 7) /* Temporary ICC reg */ 610*404b540aSrobert #define FCC_FIRST (CC_FIRST) /* First FCC reg */ 611*404b540aSrobert #define FCC_LAST (CC_FIRST + 3) /* Last FCC reg */ 612*404b540aSrobert 613*404b540aSrobert /* Amount to shift a value to locate a ICC or FCC register in the CCR 614*404b540aSrobert register and shift it to the bottom 4 bits. */ 615*404b540aSrobert #define CC_SHIFT_RIGHT(REGNO) (((REGNO) - CC_FIRST) << 2) 616*404b540aSrobert 617*404b540aSrobert /* Mask to isolate a single ICC/FCC value. */ 618*404b540aSrobert #define CC_MASK 0xf 619*404b540aSrobert 620*404b540aSrobert /* Masks to isolate the various bits in an ICC field. */ 621*404b540aSrobert #define ICC_MASK_N 0x8 /* negative */ 622*404b540aSrobert #define ICC_MASK_Z 0x4 /* zero */ 623*404b540aSrobert #define ICC_MASK_V 0x2 /* overflow */ 624*404b540aSrobert #define ICC_MASK_C 0x1 /* carry */ 625*404b540aSrobert 626*404b540aSrobert /* Mask to isolate the N/Z flags in an ICC. */ 627*404b540aSrobert #define ICC_MASK_NZ (ICC_MASK_N | ICC_MASK_Z) 628*404b540aSrobert 629*404b540aSrobert /* Mask to isolate the Z/C flags in an ICC. */ 630*404b540aSrobert #define ICC_MASK_ZC (ICC_MASK_Z | ICC_MASK_C) 631*404b540aSrobert 632*404b540aSrobert /* Masks to isolate the various bits in a FCC field. */ 633*404b540aSrobert #define FCC_MASK_E 0x8 /* equal */ 634*404b540aSrobert #define FCC_MASK_L 0x4 /* less than */ 635*404b540aSrobert #define FCC_MASK_G 0x2 /* greater than */ 636*404b540aSrobert #define FCC_MASK_U 0x1 /* unordered */ 637*404b540aSrobert 638*404b540aSrobert /* For CCR registers, the machine wants CR4..CR7 to be used for integer 639*404b540aSrobert code and CR0..CR3 to be used for floating point. */ 640*404b540aSrobert #define CR_FIRST 136 /* First CCR */ 641*404b540aSrobert #define CR_LAST 143 /* Last CCR */ 642*404b540aSrobert #define CR_NUM (CR_LAST-CR_FIRST+1) /* # of CCRs (8) */ 643*404b540aSrobert #define ICR_FIRST (CR_FIRST + 4) /* First integer CCR */ 644*404b540aSrobert #define ICR_LAST (CR_FIRST + 7) /* Last integer CCR */ 645*404b540aSrobert #define ICR_TEMP ICR_LAST /* Temp integer CCR */ 646*404b540aSrobert #define FCR_FIRST (CR_FIRST + 0) /* First float CCR */ 647*404b540aSrobert #define FCR_LAST (CR_FIRST + 3) /* Last float CCR */ 648*404b540aSrobert 649*404b540aSrobert /* Amount to shift a value to locate a CR register in the CCCR special purpose 650*404b540aSrobert register and shift it to the bottom 2 bits. */ 651*404b540aSrobert #define CR_SHIFT_RIGHT(REGNO) (((REGNO) - CR_FIRST) << 1) 652*404b540aSrobert 653*404b540aSrobert /* Mask to isolate a single CR value. */ 654*404b540aSrobert #define CR_MASK 0x3 655*404b540aSrobert 656*404b540aSrobert #define ACC_FIRST 144 /* First acc register */ 657*404b540aSrobert #define ACC_LAST 155 /* Last acc register */ 658*404b540aSrobert 659*404b540aSrobert #define ACCG_FIRST 156 /* First accg register */ 660*404b540aSrobert #define ACCG_LAST 167 /* Last accg register */ 661*404b540aSrobert 662*404b540aSrobert #define AP_FIRST 168 /* fake argument pointer */ 663*404b540aSrobert 664*404b540aSrobert #define SPR_FIRST 169 665*404b540aSrobert #define SPR_LAST 172 666*404b540aSrobert #define LR_REGNO (SPR_FIRST) 667*404b540aSrobert #define LCR_REGNO (SPR_FIRST + 1) 668*404b540aSrobert #define IACC_FIRST (SPR_FIRST + 2) 669*404b540aSrobert #define IACC_LAST (SPR_FIRST + 3) 670*404b540aSrobert 671*404b540aSrobert #define GPR_P(R) IN_RANGE_P (R, GPR_FIRST, GPR_LAST) 672*404b540aSrobert #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM) 673*404b540aSrobert #define FPR_P(R) IN_RANGE_P (R, FPR_FIRST, FPR_LAST) 674*404b540aSrobert #define CC_P(R) IN_RANGE_P (R, CC_FIRST, CC_LAST) 675*404b540aSrobert #define ICC_P(R) IN_RANGE_P (R, ICC_FIRST, ICC_LAST) 676*404b540aSrobert #define FCC_P(R) IN_RANGE_P (R, FCC_FIRST, FCC_LAST) 677*404b540aSrobert #define CR_P(R) IN_RANGE_P (R, CR_FIRST, CR_LAST) 678*404b540aSrobert #define ICR_P(R) IN_RANGE_P (R, ICR_FIRST, ICR_LAST) 679*404b540aSrobert #define FCR_P(R) IN_RANGE_P (R, FCR_FIRST, FCR_LAST) 680*404b540aSrobert #define ACC_P(R) IN_RANGE_P (R, ACC_FIRST, ACC_LAST) 681*404b540aSrobert #define ACCG_P(R) IN_RANGE_P (R, ACCG_FIRST, ACCG_LAST) 682*404b540aSrobert #define SPR_P(R) IN_RANGE_P (R, SPR_FIRST, SPR_LAST) 683*404b540aSrobert 684*404b540aSrobert #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 685*404b540aSrobert #define FPR_OR_PSEUDO_P(R) (FPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 686*404b540aSrobert #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 687*404b540aSrobert #define CC_OR_PSEUDO_P(R) (CC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 688*404b540aSrobert #define ICC_OR_PSEUDO_P(R) (ICC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 689*404b540aSrobert #define FCC_OR_PSEUDO_P(R) (FCC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 690*404b540aSrobert #define CR_OR_PSEUDO_P(R) (CR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 691*404b540aSrobert #define ICR_OR_PSEUDO_P(R) (ICR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 692*404b540aSrobert #define FCR_OR_PSEUDO_P(R) (FCR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 693*404b540aSrobert #define ACC_OR_PSEUDO_P(R) (ACC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 694*404b540aSrobert #define ACCG_OR_PSEUDO_P(R) (ACCG_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 695*404b540aSrobert 696*404b540aSrobert #define MAX_STACK_IMMEDIATE_OFFSET 2047 697*404b540aSrobert 698*404b540aSrobert 699*404b540aSrobert /* Register Basics. */ 700*404b540aSrobert 701*404b540aSrobert /* Number of hardware registers known to the compiler. They receive numbers 0 702*404b540aSrobert through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number 703*404b540aSrobert really is assigned the number `FIRST_PSEUDO_REGISTER'. */ 704*404b540aSrobert #define FIRST_PSEUDO_REGISTER (SPR_LAST + 1) 705*404b540aSrobert 706*404b540aSrobert /* The first/last register that can contain the arguments to a function. */ 707*404b540aSrobert #define FIRST_ARG_REGNUM (GPR_FIRST + 8) 708*404b540aSrobert #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1) 709*404b540aSrobert 710*404b540aSrobert /* Registers used by the exception handling functions. These should be 711*404b540aSrobert registers that are not otherwise used by the calling sequence. */ 712*404b540aSrobert #define FIRST_EH_REGNUM 14 713*404b540aSrobert #define LAST_EH_REGNUM 15 714*404b540aSrobert 715*404b540aSrobert /* Scratch registers used in the prologue, epilogue and thunks. 716*404b540aSrobert OFFSET_REGNO is for loading constant addends that are too big for a 717*404b540aSrobert single instruction. TEMP_REGNO is used for transferring SPRs to and from 718*404b540aSrobert the stack, and various other activities. */ 719*404b540aSrobert #define OFFSET_REGNO 4 720*404b540aSrobert #define TEMP_REGNO 5 721*404b540aSrobert 722*404b540aSrobert /* Registers used in the prologue. OLD_SP_REGNO is the old stack pointer, 723*404b540aSrobert which is sometimes used to set up the frame pointer. */ 724*404b540aSrobert #define OLD_SP_REGNO 6 725*404b540aSrobert 726*404b540aSrobert /* Registers used in the epilogue. STACKADJ_REGNO stores the exception 727*404b540aSrobert handler's stack adjustment. */ 728*404b540aSrobert #define STACKADJ_REGNO 6 729*404b540aSrobert 730*404b540aSrobert /* Registers used in thunks. JMP_REGNO is used for loading the target 731*404b540aSrobert address. */ 732*404b540aSrobert #define JUMP_REGNO 6 733*404b540aSrobert 734*404b540aSrobert #define EH_RETURN_DATA_REGNO(N) ((N) <= (LAST_EH_REGNUM - FIRST_EH_REGNUM)? \ 735*404b540aSrobert (N) + FIRST_EH_REGNUM : INVALID_REGNUM) 736*404b540aSrobert #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, STACKADJ_REGNO) 737*404b540aSrobert #define EH_RETURN_HANDLER_RTX RETURN_ADDR_RTX (0, frame_pointer_rtx) 738*404b540aSrobert 739*404b540aSrobert #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNO) 740*404b540aSrobert 741*404b540aSrobert /* An initializer that says which registers are used for fixed purposes all 742*404b540aSrobert throughout the compiled code and are therefore not available for general 743*404b540aSrobert allocation. These would include the stack pointer, the frame pointer 744*404b540aSrobert (except on machines where that can be used as a general register when no 745*404b540aSrobert frame pointer is needed), the program counter on machines where that is 746*404b540aSrobert considered one of the addressable registers, and any other numbered register 747*404b540aSrobert with a standard use. 748*404b540aSrobert 749*404b540aSrobert This information is expressed as a sequence of numbers, separated by commas 750*404b540aSrobert and surrounded by braces. The Nth number is 1 if register N is fixed, 0 751*404b540aSrobert otherwise. 752*404b540aSrobert 753*404b540aSrobert The table initialized from this macro, and the table initialized by the 754*404b540aSrobert following one, may be overridden at run time either automatically, by the 755*404b540aSrobert actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the 756*404b540aSrobert command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */ 757*404b540aSrobert 758*404b540aSrobert /* gr0 -- Hard Zero 759*404b540aSrobert gr1 -- Stack Pointer 760*404b540aSrobert gr2 -- Frame Pointer 761*404b540aSrobert gr3 -- Hidden Parameter 762*404b540aSrobert gr16 -- Small Data reserved 763*404b540aSrobert gr17 -- Pic reserved 764*404b540aSrobert gr28 -- OS reserved 765*404b540aSrobert gr29 -- OS reserved 766*404b540aSrobert gr30 -- OS reserved 767*404b540aSrobert gr31 -- OS reserved 768*404b540aSrobert cr3 -- reserved to reload FCC registers. 769*404b540aSrobert cr7 -- reserved to reload ICC registers. */ 770*404b540aSrobert #define FIXED_REGISTERS \ 771*404b540aSrobert { /* Integer Registers */ \ 772*404b540aSrobert 1, 1, 1, 1, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \ 773*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 008-015, gr8 - gr15 */ \ 774*404b540aSrobert 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \ 775*404b540aSrobert 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \ 776*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr39 */ \ 777*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 040-040, gr48 - gr47 */ \ 778*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \ 779*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \ 780*404b540aSrobert /* Float Registers */ \ 781*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 064-071, fr0 - fr7 */ \ 782*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 072-079, fr8 - fr15 */ \ 783*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \ 784*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \ 785*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 096-103, fr32 - fr39 */ \ 786*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 104-111, fr48 - fr47 */ \ 787*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \ 788*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \ 789*404b540aSrobert /* Condition Code Registers */ \ 790*404b540aSrobert 0, 0, 0, 0, /* 128-131, fcc0 - fcc3 */ \ 791*404b540aSrobert 0, 0, 0, 1, /* 132-135, icc0 - icc3 */ \ 792*404b540aSrobert /* Conditional execution Registers (CCR) */ \ 793*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 1, /* 136-143, cr0 - cr7 */ \ 794*404b540aSrobert /* Accumulators */ \ 795*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \ 796*404b540aSrobert 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \ 797*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \ 798*404b540aSrobert 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \ 799*404b540aSrobert /* Other registers */ \ 800*404b540aSrobert 1, /* 168, AP - fake arg ptr */ \ 801*404b540aSrobert 0, /* 169, LR - Link register*/ \ 802*404b540aSrobert 0, /* 170, LCR - Loop count reg*/ \ 803*404b540aSrobert 1, 1 /* 171-172, iacc0 */ \ 804*404b540aSrobert } 805*404b540aSrobert 806*404b540aSrobert /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in 807*404b540aSrobert general) by function calls as well as for fixed registers. This macro 808*404b540aSrobert therefore identifies the registers that are not available for general 809*404b540aSrobert allocation of values that must live across function calls. 810*404b540aSrobert 811*404b540aSrobert If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically 812*404b540aSrobert saves it on function entry and restores it on function exit, if the register 813*404b540aSrobert is used within the function. */ 814*404b540aSrobert #define CALL_USED_REGISTERS \ 815*404b540aSrobert { /* Integer Registers */ \ 816*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 000-007, gr0 - gr7 */ \ 817*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 008-015, gr8 - gr15 */ \ 818*404b540aSrobert 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \ 819*404b540aSrobert 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \ 820*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 032-039, gr32 - gr39 */ \ 821*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 040-040, gr48 - gr47 */ \ 822*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \ 823*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \ 824*404b540aSrobert /* Float Registers */ \ 825*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 064-071, fr0 - fr7 */ \ 826*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 072-079, fr8 - fr15 */ \ 827*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \ 828*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \ 829*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 096-103, fr32 - fr39 */ \ 830*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 104-111, fr48 - fr47 */ \ 831*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \ 832*404b540aSrobert 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \ 833*404b540aSrobert /* Condition Code Registers */ \ 834*404b540aSrobert 1, 1, 1, 1, /* 128-131, fcc0 - fcc3 */ \ 835*404b540aSrobert 1, 1, 1, 1, /* 132-135, icc0 - icc3 */ \ 836*404b540aSrobert /* Conditional execution Registers (CCR) */ \ 837*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 136-143, cr0 - cr7 */ \ 838*404b540aSrobert /* Accumulators */ \ 839*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \ 840*404b540aSrobert 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \ 841*404b540aSrobert 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \ 842*404b540aSrobert 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \ 843*404b540aSrobert /* Other registers */ \ 844*404b540aSrobert 1, /* 168, AP - fake arg ptr */ \ 845*404b540aSrobert 1, /* 169, LR - Link register*/ \ 846*404b540aSrobert 1, /* 170, LCR - Loop count reg */ \ 847*404b540aSrobert 1, 1 /* 171-172, iacc0 */ \ 848*404b540aSrobert } 849*404b540aSrobert 850*404b540aSrobert /* Zero or more C statements that may conditionally modify two variables 851*404b540aSrobert `fixed_regs' and `call_used_regs' (both of type `char []') after they have 852*404b540aSrobert been initialized from the two preceding macros. 853*404b540aSrobert 854*404b540aSrobert This is necessary in case the fixed or call-clobbered registers depend on 855*404b540aSrobert target flags. 856*404b540aSrobert 857*404b540aSrobert You need not define this macro if it has no work to do. 858*404b540aSrobert 859*404b540aSrobert If the usage of an entire class of registers depends on the target flags, 860*404b540aSrobert you may indicate this to GCC by using this macro to modify `fixed_regs' and 861*404b540aSrobert `call_used_regs' to 1 for each of the registers in the classes which should 862*404b540aSrobert not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return 863*404b540aSrobert `NO_REGS' if it is called with a letter for a class that shouldn't be used. 864*404b540aSrobert 865*404b540aSrobert (However, if this class is not included in `GENERAL_REGS' and all of the 866*404b540aSrobert insn patterns whose constraints permit this class are controlled by target 867*404b540aSrobert switches, then GCC will automatically avoid using these registers when the 868*404b540aSrobert target switches are opposed to them.) */ 869*404b540aSrobert 870*404b540aSrobert #define CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage () 871*404b540aSrobert 872*404b540aSrobert 873*404b540aSrobert /* Order of allocation of registers. */ 874*404b540aSrobert 875*404b540aSrobert /* If defined, an initializer for a vector of integers, containing the numbers 876*404b540aSrobert of hard registers in the order in which GCC should prefer to use them 877*404b540aSrobert (from most preferred to least). 878*404b540aSrobert 879*404b540aSrobert If this macro is not defined, registers are used lowest numbered first (all 880*404b540aSrobert else being equal). 881*404b540aSrobert 882*404b540aSrobert One use of this macro is on machines where the highest numbered registers 883*404b540aSrobert must always be saved and the save-multiple-registers instruction supports 884*404b540aSrobert only sequences of consecutive registers. On such machines, define 885*404b540aSrobert `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered 886*404b540aSrobert allocatable register first. */ 887*404b540aSrobert 888*404b540aSrobert /* On the FRV, allocate GR16 and GR17 after other saved registers so that we 889*404b540aSrobert have a better chance of allocating 2 registers at a time and can use the 890*404b540aSrobert double word load/store instructions in the prologue. */ 891*404b540aSrobert #define REG_ALLOC_ORDER \ 892*404b540aSrobert { \ 893*404b540aSrobert /* volatile registers */ \ 894*404b540aSrobert GPR_FIRST + 4, GPR_FIRST + 5, GPR_FIRST + 6, GPR_FIRST + 7, \ 895*404b540aSrobert GPR_FIRST + 8, GPR_FIRST + 9, GPR_FIRST + 10, GPR_FIRST + 11, \ 896*404b540aSrobert GPR_FIRST + 12, GPR_FIRST + 13, GPR_FIRST + 14, GPR_FIRST + 15, \ 897*404b540aSrobert GPR_FIRST + 32, GPR_FIRST + 33, GPR_FIRST + 34, GPR_FIRST + 35, \ 898*404b540aSrobert GPR_FIRST + 36, GPR_FIRST + 37, GPR_FIRST + 38, GPR_FIRST + 39, \ 899*404b540aSrobert GPR_FIRST + 40, GPR_FIRST + 41, GPR_FIRST + 42, GPR_FIRST + 43, \ 900*404b540aSrobert GPR_FIRST + 44, GPR_FIRST + 45, GPR_FIRST + 46, GPR_FIRST + 47, \ 901*404b540aSrobert \ 902*404b540aSrobert FPR_FIRST + 0, FPR_FIRST + 1, FPR_FIRST + 2, FPR_FIRST + 3, \ 903*404b540aSrobert FPR_FIRST + 4, FPR_FIRST + 5, FPR_FIRST + 6, FPR_FIRST + 7, \ 904*404b540aSrobert FPR_FIRST + 8, FPR_FIRST + 9, FPR_FIRST + 10, FPR_FIRST + 11, \ 905*404b540aSrobert FPR_FIRST + 12, FPR_FIRST + 13, FPR_FIRST + 14, FPR_FIRST + 15, \ 906*404b540aSrobert FPR_FIRST + 32, FPR_FIRST + 33, FPR_FIRST + 34, FPR_FIRST + 35, \ 907*404b540aSrobert FPR_FIRST + 36, FPR_FIRST + 37, FPR_FIRST + 38, FPR_FIRST + 39, \ 908*404b540aSrobert FPR_FIRST + 40, FPR_FIRST + 41, FPR_FIRST + 42, FPR_FIRST + 43, \ 909*404b540aSrobert FPR_FIRST + 44, FPR_FIRST + 45, FPR_FIRST + 46, FPR_FIRST + 47, \ 910*404b540aSrobert \ 911*404b540aSrobert ICC_FIRST + 0, ICC_FIRST + 1, ICC_FIRST + 2, ICC_FIRST + 3, \ 912*404b540aSrobert FCC_FIRST + 0, FCC_FIRST + 1, FCC_FIRST + 2, FCC_FIRST + 3, \ 913*404b540aSrobert CR_FIRST + 0, CR_FIRST + 1, CR_FIRST + 2, CR_FIRST + 3, \ 914*404b540aSrobert CR_FIRST + 4, CR_FIRST + 5, CR_FIRST + 6, CR_FIRST + 7, \ 915*404b540aSrobert \ 916*404b540aSrobert /* saved registers */ \ 917*404b540aSrobert GPR_FIRST + 18, GPR_FIRST + 19, \ 918*404b540aSrobert GPR_FIRST + 20, GPR_FIRST + 21, GPR_FIRST + 22, GPR_FIRST + 23, \ 919*404b540aSrobert GPR_FIRST + 24, GPR_FIRST + 25, GPR_FIRST + 26, GPR_FIRST + 27, \ 920*404b540aSrobert GPR_FIRST + 48, GPR_FIRST + 49, GPR_FIRST + 50, GPR_FIRST + 51, \ 921*404b540aSrobert GPR_FIRST + 52, GPR_FIRST + 53, GPR_FIRST + 54, GPR_FIRST + 55, \ 922*404b540aSrobert GPR_FIRST + 56, GPR_FIRST + 57, GPR_FIRST + 58, GPR_FIRST + 59, \ 923*404b540aSrobert GPR_FIRST + 60, GPR_FIRST + 61, GPR_FIRST + 62, GPR_FIRST + 63, \ 924*404b540aSrobert GPR_FIRST + 16, GPR_FIRST + 17, \ 925*404b540aSrobert \ 926*404b540aSrobert FPR_FIRST + 16, FPR_FIRST + 17, FPR_FIRST + 18, FPR_FIRST + 19, \ 927*404b540aSrobert FPR_FIRST + 20, FPR_FIRST + 21, FPR_FIRST + 22, FPR_FIRST + 23, \ 928*404b540aSrobert FPR_FIRST + 24, FPR_FIRST + 25, FPR_FIRST + 26, FPR_FIRST + 27, \ 929*404b540aSrobert FPR_FIRST + 28, FPR_FIRST + 29, FPR_FIRST + 30, FPR_FIRST + 31, \ 930*404b540aSrobert FPR_FIRST + 48, FPR_FIRST + 49, FPR_FIRST + 50, FPR_FIRST + 51, \ 931*404b540aSrobert FPR_FIRST + 52, FPR_FIRST + 53, FPR_FIRST + 54, FPR_FIRST + 55, \ 932*404b540aSrobert FPR_FIRST + 56, FPR_FIRST + 57, FPR_FIRST + 58, FPR_FIRST + 59, \ 933*404b540aSrobert FPR_FIRST + 60, FPR_FIRST + 61, FPR_FIRST + 62, FPR_FIRST + 63, \ 934*404b540aSrobert \ 935*404b540aSrobert /* special or fixed registers */ \ 936*404b540aSrobert GPR_FIRST + 0, GPR_FIRST + 1, GPR_FIRST + 2, GPR_FIRST + 3, \ 937*404b540aSrobert GPR_FIRST + 28, GPR_FIRST + 29, GPR_FIRST + 30, GPR_FIRST + 31, \ 938*404b540aSrobert ACC_FIRST + 0, ACC_FIRST + 1, ACC_FIRST + 2, ACC_FIRST + 3, \ 939*404b540aSrobert ACC_FIRST + 4, ACC_FIRST + 5, ACC_FIRST + 6, ACC_FIRST + 7, \ 940*404b540aSrobert ACC_FIRST + 8, ACC_FIRST + 9, ACC_FIRST + 10, ACC_FIRST + 11, \ 941*404b540aSrobert ACCG_FIRST + 0, ACCG_FIRST + 1, ACCG_FIRST + 2, ACCG_FIRST + 3, \ 942*404b540aSrobert ACCG_FIRST + 4, ACCG_FIRST + 5, ACCG_FIRST + 6, ACCG_FIRST + 7, \ 943*404b540aSrobert ACCG_FIRST + 8, ACCG_FIRST + 9, ACCG_FIRST + 10, ACCG_FIRST + 11, \ 944*404b540aSrobert AP_FIRST, LR_REGNO, LCR_REGNO, \ 945*404b540aSrobert IACC_FIRST + 0, IACC_FIRST + 1 \ 946*404b540aSrobert } 947*404b540aSrobert 948*404b540aSrobert 949*404b540aSrobert /* How Values Fit in Registers. */ 950*404b540aSrobert 951*404b540aSrobert /* A C expression for the number of consecutive hard registers, starting at 952*404b540aSrobert register number REGNO, required to hold a value of mode MODE. 953*404b540aSrobert 954*404b540aSrobert On a machine where all registers are exactly one word, a suitable definition 955*404b540aSrobert of this macro is 956*404b540aSrobert 957*404b540aSrobert #define HARD_REGNO_NREGS(REGNO, MODE) \ 958*404b540aSrobert ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \ 959*404b540aSrobert / UNITS_PER_WORD)) */ 960*404b540aSrobert 961*404b540aSrobert /* On the FRV, make the CC modes take 3 words in the integer registers, so that 962*404b540aSrobert we can build the appropriate instructions to properly reload the values. */ 963*404b540aSrobert #define HARD_REGNO_NREGS(REGNO, MODE) frv_hard_regno_nregs (REGNO, MODE) 964*404b540aSrobert 965*404b540aSrobert /* A C expression that is nonzero if it is permissible to store a value of mode 966*404b540aSrobert MODE in hard register number REGNO (or in several registers starting with 967*404b540aSrobert that one). For a machine where all registers are equivalent, a suitable 968*404b540aSrobert definition is 969*404b540aSrobert 970*404b540aSrobert #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 971*404b540aSrobert 972*404b540aSrobert It is not necessary for this macro to check for the numbers of fixed 973*404b540aSrobert registers, because the allocation mechanism considers them to be always 974*404b540aSrobert occupied. 975*404b540aSrobert 976*404b540aSrobert On some machines, double-precision values must be kept in even/odd register 977*404b540aSrobert pairs. The way to implement that is to define this macro to reject odd 978*404b540aSrobert register numbers for such modes. 979*404b540aSrobert 980*404b540aSrobert The minimum requirement for a mode to be OK in a register is that the 981*404b540aSrobert `movMODE' instruction pattern support moves between the register and any 982*404b540aSrobert other hard register for which the mode is OK; and that moving a value into 983*404b540aSrobert the register and back out not alter it. 984*404b540aSrobert 985*404b540aSrobert Since the same instruction used to move `SImode' will work for all narrower 986*404b540aSrobert integer modes, it is not necessary on any machine for `HARD_REGNO_MODE_OK' 987*404b540aSrobert to distinguish between these modes, provided you define patterns `movhi', 988*404b540aSrobert etc., to take advantage of this. This is useful because of the interaction 989*404b540aSrobert between `HARD_REGNO_MODE_OK' and `MODES_TIEABLE_P'; it is very desirable for 990*404b540aSrobert all integer modes to be tieable. 991*404b540aSrobert 992*404b540aSrobert Many machines have special registers for floating point arithmetic. Often 993*404b540aSrobert people assume that floating point machine modes are allowed only in floating 994*404b540aSrobert point registers. This is not true. Any registers that can hold integers 995*404b540aSrobert can safely *hold* a floating point machine mode, whether or not floating 996*404b540aSrobert arithmetic can be done on it in those registers. Integer move instructions 997*404b540aSrobert can be used to move the values. 998*404b540aSrobert 999*404b540aSrobert On some machines, though, the converse is true: fixed-point machine modes 1000*404b540aSrobert may not go in floating registers. This is true if the floating registers 1001*404b540aSrobert normalize any value stored in them, because storing a non-floating value 1002*404b540aSrobert there would garble it. In this case, `HARD_REGNO_MODE_OK' should reject 1003*404b540aSrobert fixed-point machine modes in floating registers. But if the floating 1004*404b540aSrobert registers do not automatically normalize, if you can store any bit pattern 1005*404b540aSrobert in one and retrieve it unchanged without a trap, then any machine mode may 1006*404b540aSrobert go in a floating register, so you can define this macro to say so. 1007*404b540aSrobert 1008*404b540aSrobert The primary significance of special floating registers is rather that they 1009*404b540aSrobert are the registers acceptable in floating point arithmetic instructions. 1010*404b540aSrobert However, this is of no concern to `HARD_REGNO_MODE_OK'. You handle it by 1011*404b540aSrobert writing the proper constraints for those instructions. 1012*404b540aSrobert 1013*404b540aSrobert On some machines, the floating registers are especially slow to access, so 1014*404b540aSrobert that it is better to store a value in a stack frame than in such a register 1015*404b540aSrobert if floating point arithmetic is not being done. As long as the floating 1016*404b540aSrobert registers are not in class `GENERAL_REGS', they will not be used unless some 1017*404b540aSrobert pattern's constraint asks for one. */ 1018*404b540aSrobert #define HARD_REGNO_MODE_OK(REGNO, MODE) frv_hard_regno_mode_ok (REGNO, MODE) 1019*404b540aSrobert 1020*404b540aSrobert /* A C expression that is nonzero if it is desirable to choose register 1021*404b540aSrobert allocation so as to avoid move instructions between a value of mode MODE1 1022*404b540aSrobert and a value of mode MODE2. 1023*404b540aSrobert 1024*404b540aSrobert If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are 1025*404b540aSrobert ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be 1026*404b540aSrobert zero. */ 1027*404b540aSrobert #define MODES_TIEABLE_P(MODE1, MODE2) (MODE1 == MODE2) 1028*404b540aSrobert 1029*404b540aSrobert /* Define this macro if the compiler should avoid copies to/from CCmode 1030*404b540aSrobert registers. You should only define this macro if support fo copying to/from 1031*404b540aSrobert CCmode is incomplete. */ 1032*404b540aSrobert #define AVOID_CCMODE_COPIES 1033*404b540aSrobert 1034*404b540aSrobert 1035*404b540aSrobert /* Register Classes. */ 1036*404b540aSrobert 1037*404b540aSrobert /* An enumeral type that must be defined with all the register class names as 1038*404b540aSrobert enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last 1039*404b540aSrobert register class, followed by one more enumeral value, `LIM_REG_CLASSES', 1040*404b540aSrobert which is not a register class but rather tells how many classes there are. 1041*404b540aSrobert 1042*404b540aSrobert Each register class has a number, which is the value of casting the class 1043*404b540aSrobert name to type `int'. The number serves as an index in many of the tables 1044*404b540aSrobert described below. */ 1045*404b540aSrobert enum reg_class 1046*404b540aSrobert { 1047*404b540aSrobert NO_REGS, 1048*404b540aSrobert ICC_REGS, 1049*404b540aSrobert FCC_REGS, 1050*404b540aSrobert CC_REGS, 1051*404b540aSrobert ICR_REGS, 1052*404b540aSrobert FCR_REGS, 1053*404b540aSrobert CR_REGS, 1054*404b540aSrobert LCR_REG, 1055*404b540aSrobert LR_REG, 1056*404b540aSrobert GR8_REGS, 1057*404b540aSrobert GR9_REGS, 1058*404b540aSrobert GR89_REGS, 1059*404b540aSrobert FDPIC_REGS, 1060*404b540aSrobert FDPIC_FPTR_REGS, 1061*404b540aSrobert FDPIC_CALL_REGS, 1062*404b540aSrobert SPR_REGS, 1063*404b540aSrobert QUAD_ACC_REGS, 1064*404b540aSrobert EVEN_ACC_REGS, 1065*404b540aSrobert ACC_REGS, 1066*404b540aSrobert ACCG_REGS, 1067*404b540aSrobert QUAD_FPR_REGS, 1068*404b540aSrobert FEVEN_REGS, 1069*404b540aSrobert FPR_REGS, 1070*404b540aSrobert QUAD_REGS, 1071*404b540aSrobert EVEN_REGS, 1072*404b540aSrobert GPR_REGS, 1073*404b540aSrobert ALL_REGS, 1074*404b540aSrobert LIM_REG_CLASSES 1075*404b540aSrobert }; 1076*404b540aSrobert 1077*404b540aSrobert #define GENERAL_REGS GPR_REGS 1078*404b540aSrobert 1079*404b540aSrobert /* The number of distinct register classes, defined as follows: 1080*404b540aSrobert 1081*404b540aSrobert #define N_REG_CLASSES (int) LIM_REG_CLASSES */ 1082*404b540aSrobert #define N_REG_CLASSES ((int) LIM_REG_CLASSES) 1083*404b540aSrobert 1084*404b540aSrobert /* An initializer containing the names of the register classes as C string 1085*404b540aSrobert constants. These names are used in writing some of the debugging dumps. */ 1086*404b540aSrobert #define REG_CLASS_NAMES { \ 1087*404b540aSrobert "NO_REGS", \ 1088*404b540aSrobert "ICC_REGS", \ 1089*404b540aSrobert "FCC_REGS", \ 1090*404b540aSrobert "CC_REGS", \ 1091*404b540aSrobert "ICR_REGS", \ 1092*404b540aSrobert "FCR_REGS", \ 1093*404b540aSrobert "CR_REGS", \ 1094*404b540aSrobert "LCR_REG", \ 1095*404b540aSrobert "LR_REG", \ 1096*404b540aSrobert "GR8_REGS", \ 1097*404b540aSrobert "GR9_REGS", \ 1098*404b540aSrobert "GR89_REGS", \ 1099*404b540aSrobert "FDPIC_REGS", \ 1100*404b540aSrobert "FDPIC_FPTR_REGS", \ 1101*404b540aSrobert "FDPIC_CALL_REGS", \ 1102*404b540aSrobert "SPR_REGS", \ 1103*404b540aSrobert "QUAD_ACC_REGS", \ 1104*404b540aSrobert "EVEN_ACC_REGS", \ 1105*404b540aSrobert "ACC_REGS", \ 1106*404b540aSrobert "ACCG_REGS", \ 1107*404b540aSrobert "QUAD_FPR_REGS", \ 1108*404b540aSrobert "FEVEN_REGS", \ 1109*404b540aSrobert "FPR_REGS", \ 1110*404b540aSrobert "QUAD_REGS", \ 1111*404b540aSrobert "EVEN_REGS", \ 1112*404b540aSrobert "GPR_REGS", \ 1113*404b540aSrobert "ALL_REGS" \ 1114*404b540aSrobert } 1115*404b540aSrobert 1116*404b540aSrobert /* An initializer containing the contents of the register classes, as integers 1117*404b540aSrobert which are bit masks. The Nth integer specifies the contents of class N. 1118*404b540aSrobert The way the integer MASK is interpreted is that register R is in the class 1119*404b540aSrobert if `MASK & (1 << R)' is 1. 1120*404b540aSrobert 1121*404b540aSrobert When the machine has more than 32 registers, an integer does not suffice. 1122*404b540aSrobert Then the integers are replaced by sub-initializers, braced groupings 1123*404b540aSrobert containing several integers. Each sub-initializer must be suitable as an 1124*404b540aSrobert initializer for the type `HARD_REG_SET' which is defined in 1125*404b540aSrobert `hard-reg-set.h'. */ 1126*404b540aSrobert #define REG_CLASS_CONTENTS \ 1127*404b540aSrobert { /* gr0-gr31 gr32-gr63 fr0-fr31 fr32-fr-63 cc/ccr/acc ap/spr */ \ 1128*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* NO_REGS */\ 1129*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000f0,0x0}, /* ICC_REGS */\ 1130*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000000f,0x0}, /* FCC_REGS */\ 1131*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000ff,0x0}, /* CC_REGS */\ 1132*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000f000,0x0}, /* ICR_REGS */\ 1133*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000f00,0x0}, /* FCR_REGS */\ 1134*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000ff00,0x0}, /* CR_REGS */\ 1135*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x400}, /* LCR_REGS */\ 1136*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x200}, /* LR_REGS */\ 1137*404b540aSrobert { 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR8_REGS */\ 1138*404b540aSrobert { 0x00000200,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR9_REGS */\ 1139*404b540aSrobert { 0x00000300,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR89_REGS */\ 1140*404b540aSrobert { 0x00008000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_REGS */\ 1141*404b540aSrobert { 0x00004000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_FPTR_REGS */\ 1142*404b540aSrobert { 0x0000c000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_CALL_REGS */\ 1143*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x1e00}, /* SPR_REGS */\ 1144*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* QUAD_ACC */\ 1145*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* EVEN_ACC */\ 1146*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* ACC_REGS */\ 1147*404b540aSrobert { 0x00000000,0x00000000,0x00000000,0x00000000,0xf0000000,0xff}, /* ACCG_REGS*/\ 1148*404b540aSrobert { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* QUAD_FPR */\ 1149*404b540aSrobert { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FEVEN_REG*/\ 1150*404b540aSrobert { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FPR_REGS */\ 1151*404b540aSrobert { 0x0ffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* QUAD_REGS*/\ 1152*404b540aSrobert { 0xfffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* EVEN_REGS*/\ 1153*404b540aSrobert { 0xffffffff,0xffffffff,0x00000000,0x00000000,0x00000000,0x100}, /* GPR_REGS */\ 1154*404b540aSrobert { 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0x1fff}, /* ALL_REGS */\ 1155*404b540aSrobert } 1156*404b540aSrobert 1157*404b540aSrobert /* A C expression whose value is a register class containing hard register 1158*404b540aSrobert REGNO. In general there is more than one such class; choose a class which 1159*404b540aSrobert is "minimal", meaning that no smaller class also contains the register. */ 1160*404b540aSrobert 1161*404b540aSrobert extern enum reg_class regno_reg_class[]; 1162*404b540aSrobert #define REGNO_REG_CLASS(REGNO) regno_reg_class [REGNO] 1163*404b540aSrobert 1164*404b540aSrobert /* A macro whose definition is the name of the class to which a valid base 1165*404b540aSrobert register must belong. A base register is one used in an address which is 1166*404b540aSrobert the register value plus a displacement. */ 1167*404b540aSrobert #define BASE_REG_CLASS GPR_REGS 1168*404b540aSrobert 1169*404b540aSrobert /* A macro whose definition is the name of the class to which a valid index 1170*404b540aSrobert register must belong. An index register is one used in an address where its 1171*404b540aSrobert value is either multiplied by a scale factor or added to another register 1172*404b540aSrobert (as well as added to a displacement). */ 1173*404b540aSrobert #define INDEX_REG_CLASS GPR_REGS 1174*404b540aSrobert 1175*404b540aSrobert /* A C expression which defines the machine-dependent operand constraint 1176*404b540aSrobert letters for register classes. If CHAR is such a letter, the value should be 1177*404b540aSrobert the register class corresponding to it. Otherwise, the value should be 1178*404b540aSrobert `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS', 1179*404b540aSrobert will not be passed to this macro; you do not need to handle it. 1180*404b540aSrobert 1181*404b540aSrobert The following letters are unavailable, due to being used as 1182*404b540aSrobert constraints: 1183*404b540aSrobert '0'..'9' 1184*404b540aSrobert '<', '>' 1185*404b540aSrobert 'E', 'F', 'G', 'H' 1186*404b540aSrobert 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P' 1187*404b540aSrobert 'Q', 'R', 'S', 'T', 'U' 1188*404b540aSrobert 'V', 'X' 1189*404b540aSrobert 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */ 1190*404b540aSrobert 1191*404b540aSrobert extern enum reg_class reg_class_from_letter[]; 1192*404b540aSrobert #define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)] 1193*404b540aSrobert 1194*404b540aSrobert /* A C expression which is nonzero if register number NUM is suitable for use 1195*404b540aSrobert as a base register in operand addresses. It may be either a suitable hard 1196*404b540aSrobert register or a pseudo register that has been allocated such a hard register. */ 1197*404b540aSrobert #define REGNO_OK_FOR_BASE_P(NUM) \ 1198*404b540aSrobert ((NUM) < FIRST_PSEUDO_REGISTER \ 1199*404b540aSrobert ? GPR_P (NUM) \ 1200*404b540aSrobert : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM]))) 1201*404b540aSrobert 1202*404b540aSrobert /* A C expression which is nonzero if register number NUM is suitable for use 1203*404b540aSrobert as an index register in operand addresses. It may be either a suitable hard 1204*404b540aSrobert register or a pseudo register that has been allocated such a hard register. 1205*404b540aSrobert 1206*404b540aSrobert The difference between an index register and a base register is that the 1207*404b540aSrobert index register may be scaled. If an address involves the sum of two 1208*404b540aSrobert registers, neither one of them scaled, then either one may be labeled the 1209*404b540aSrobert "base" and the other the "index"; but whichever labeling is used must fit 1210*404b540aSrobert the machine's constraints of which registers may serve in each capacity. 1211*404b540aSrobert The compiler will try both labelings, looking for one that is valid, and 1212*404b540aSrobert will reload one or both registers only if neither labeling works. */ 1213*404b540aSrobert #define REGNO_OK_FOR_INDEX_P(NUM) \ 1214*404b540aSrobert ((NUM) < FIRST_PSEUDO_REGISTER \ 1215*404b540aSrobert ? GPR_P (NUM) \ 1216*404b540aSrobert : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM]))) 1217*404b540aSrobert 1218*404b540aSrobert /* A C expression that places additional restrictions on the register class to 1219*404b540aSrobert use when it is necessary to copy value X into a register in class CLASS. 1220*404b540aSrobert The value is a register class; perhaps CLASS, or perhaps another, smaller 1221*404b540aSrobert class. On many machines, the following definition is safe: 1222*404b540aSrobert 1223*404b540aSrobert #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS 1224*404b540aSrobert 1225*404b540aSrobert Sometimes returning a more restrictive class makes better code. For 1226*404b540aSrobert example, on the 68000, when X is an integer constant that is in range for a 1227*404b540aSrobert `moveq' instruction, the value of this macro is always `DATA_REGS' as long 1228*404b540aSrobert as CLASS includes the data registers. Requiring a data register guarantees 1229*404b540aSrobert that a `moveq' will be used. 1230*404b540aSrobert 1231*404b540aSrobert If X is a `const_double', by returning `NO_REGS' you can force X into a 1232*404b540aSrobert memory constant. This is useful on certain machines where immediate 1233*404b540aSrobert floating values cannot be loaded into certain kinds of registers. 1234*404b540aSrobert 1235*404b540aSrobert This declaration must be present. */ 1236*404b540aSrobert #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS 1237*404b540aSrobert 1238*404b540aSrobert #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1239*404b540aSrobert frv_secondary_reload_class (CLASS, MODE, X, TRUE) 1240*404b540aSrobert 1241*404b540aSrobert #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1242*404b540aSrobert frv_secondary_reload_class (CLASS, MODE, X, FALSE) 1243*404b540aSrobert 1244*404b540aSrobert /* A C expression whose value is nonzero if pseudos that have been assigned to 1245*404b540aSrobert registers of class CLASS would likely be spilled because registers of CLASS 1246*404b540aSrobert are needed for spill registers. 1247*404b540aSrobert 1248*404b540aSrobert The default value of this macro returns 1 if CLASS has exactly one register 1249*404b540aSrobert and zero otherwise. On most machines, this default should be used. Only 1250*404b540aSrobert define this macro to some other expression if pseudo allocated by 1251*404b540aSrobert `local-alloc.c' end up in memory because their hard registers were needed 1252*404b540aSrobert for spill registers. If this macro returns nonzero for those classes, those 1253*404b540aSrobert pseudos will only be allocated by `global.c', which knows how to reallocate 1254*404b540aSrobert the pseudo to another register. If there would not be another register 1255*404b540aSrobert available for reallocation, you should not change the definition of this 1256*404b540aSrobert macro since the only effect of such a definition would be to slow down 1257*404b540aSrobert register allocation. */ 1258*404b540aSrobert #define CLASS_LIKELY_SPILLED_P(CLASS) frv_class_likely_spilled_p (CLASS) 1259*404b540aSrobert 1260*404b540aSrobert /* A C expression for the maximum number of consecutive registers of 1261*404b540aSrobert class CLASS needed to hold a value of mode MODE. 1262*404b540aSrobert 1263*404b540aSrobert This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value 1264*404b540aSrobert of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of 1265*404b540aSrobert `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS. 1266*404b540aSrobert 1267*404b540aSrobert This macro helps control the handling of multiple-word values in 1268*404b540aSrobert the reload pass. 1269*404b540aSrobert 1270*404b540aSrobert This declaration is required. */ 1271*404b540aSrobert #define CLASS_MAX_NREGS(CLASS, MODE) frv_class_max_nregs (CLASS, MODE) 1272*404b540aSrobert 1273*404b540aSrobert #define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x))) 1274*404b540aSrobert 1275*404b540aSrobert /* 6 bit signed immediate. */ 1276*404b540aSrobert #define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31) 1277*404b540aSrobert /* 10 bit signed immediate. */ 1278*404b540aSrobert #define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511) 1279*404b540aSrobert /* Unused */ 1280*404b540aSrobert #define CONST_OK_FOR_K(VALUE) 0 1281*404b540aSrobert /* 16 bit signed immediate. */ 1282*404b540aSrobert #define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767) 1283*404b540aSrobert /* 16 bit unsigned immediate. */ 1284*404b540aSrobert #define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535) 1285*404b540aSrobert /* 12 bit signed immediate that is negative. */ 1286*404b540aSrobert #define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1) 1287*404b540aSrobert /* Zero */ 1288*404b540aSrobert #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0) 1289*404b540aSrobert /* 12 bit signed immediate that is negative. */ 1290*404b540aSrobert #define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047) 1291*404b540aSrobert 1292*404b540aSrobert /* A C expression that defines the machine-dependent operand constraint letters 1293*404b540aSrobert (`I', `J', `K', .. 'P') that specify particular ranges of integer values. 1294*404b540aSrobert If C is one of those letters, the expression should check that VALUE, an 1295*404b540aSrobert integer, is in the appropriate range and return 1 if so, 0 otherwise. If C 1296*404b540aSrobert is not one of those letters, the value should be 0 regardless of VALUE. */ 1297*404b540aSrobert #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 1298*404b540aSrobert ( (C) == 'I' ? CONST_OK_FOR_I (VALUE) \ 1299*404b540aSrobert : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \ 1300*404b540aSrobert : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \ 1301*404b540aSrobert : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \ 1302*404b540aSrobert : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \ 1303*404b540aSrobert : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \ 1304*404b540aSrobert : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \ 1305*404b540aSrobert : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \ 1306*404b540aSrobert : 0) 1307*404b540aSrobert 1308*404b540aSrobert 1309*404b540aSrobert /* A C expression that defines the machine-dependent operand constraint letters 1310*404b540aSrobert (`G', `H') that specify particular ranges of `const_double' values. 1311*404b540aSrobert 1312*404b540aSrobert If C is one of those letters, the expression should check that VALUE, an RTX 1313*404b540aSrobert of code `const_double', is in the appropriate range and return 1 if so, 0 1314*404b540aSrobert otherwise. If C is not one of those letters, the value should be 0 1315*404b540aSrobert regardless of VALUE. 1316*404b540aSrobert 1317*404b540aSrobert `const_double' is used for all floating-point constants and for `DImode' 1318*404b540aSrobert fixed-point constants. A given letter can accept either or both kinds of 1319*404b540aSrobert values. It can use `GET_MODE' to distinguish between these kinds. */ 1320*404b540aSrobert 1321*404b540aSrobert #define CONST_DOUBLE_OK_FOR_G(VALUE) \ 1322*404b540aSrobert ((GET_MODE (VALUE) == VOIDmode \ 1323*404b540aSrobert && CONST_DOUBLE_LOW (VALUE) == 0 \ 1324*404b540aSrobert && CONST_DOUBLE_HIGH (VALUE) == 0) \ 1325*404b540aSrobert || ((GET_MODE (VALUE) == SFmode \ 1326*404b540aSrobert || GET_MODE (VALUE) == DFmode) \ 1327*404b540aSrobert && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))) 1328*404b540aSrobert 1329*404b540aSrobert #define CONST_DOUBLE_OK_FOR_H(VALUE) 0 1330*404b540aSrobert 1331*404b540aSrobert #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 1332*404b540aSrobert ( (C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) \ 1333*404b540aSrobert : (C) == 'H' ? CONST_DOUBLE_OK_FOR_H (VALUE) \ 1334*404b540aSrobert : 0) 1335*404b540aSrobert 1336*404b540aSrobert /* A C expression that defines the optional machine-dependent constraint 1337*404b540aSrobert letters (`Q', `R', `S', `T', `U') that can be used to segregate specific 1338*404b540aSrobert types of operands, usually memory references, for the target machine. 1339*404b540aSrobert Normally this macro will not be defined. If it is required for a particular 1340*404b540aSrobert target machine, it should return 1 if VALUE corresponds to the operand type 1341*404b540aSrobert represented by the constraint letter C. If C is not defined as an extra 1342*404b540aSrobert constraint, the value returned should be 0 regardless of VALUE. 1343*404b540aSrobert 1344*404b540aSrobert For example, on the ROMP, load instructions cannot have their output in r0 1345*404b540aSrobert if the memory reference contains a symbolic address. Constraint letter `Q' 1346*404b540aSrobert is defined as representing a memory address that does *not* contain a 1347*404b540aSrobert symbolic address. An alternative is specified with a `Q' constraint on the 1348*404b540aSrobert input and `r' on the output. The next alternative specifies `m' on the 1349*404b540aSrobert input and a register class that does not include r0 on the output. */ 1350*404b540aSrobert 1351*404b540aSrobert /* 12-bit relocations. */ 1352*404b540aSrobert #define EXTRA_CONSTRAINT_FOR_Q(VALUE) \ 1353*404b540aSrobert (got12_operand (VALUE, GET_MODE (VALUE))) 1354*404b540aSrobert 1355*404b540aSrobert /* Double word memory ops that take one instruction. */ 1356*404b540aSrobert #define EXTRA_CONSTRAINT_FOR_R(VALUE) \ 1357*404b540aSrobert (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE))) 1358*404b540aSrobert 1359*404b540aSrobert /* SYMBOL_REF */ 1360*404b540aSrobert #define EXTRA_CONSTRAINT_FOR_S(VALUE) \ 1361*404b540aSrobert (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode)) 1362*404b540aSrobert 1363*404b540aSrobert /* Double word memory ops that take two instructions. */ 1364*404b540aSrobert #define EXTRA_CONSTRAINT_FOR_T(VALUE) \ 1365*404b540aSrobert (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE))) 1366*404b540aSrobert 1367*404b540aSrobert /* Memory operand for conditional execution. */ 1368*404b540aSrobert #define EXTRA_CONSTRAINT_FOR_U(VALUE) \ 1369*404b540aSrobert (condexec_memory_operand (VALUE, GET_MODE (VALUE))) 1370*404b540aSrobert 1371*404b540aSrobert #define EXTRA_CONSTRAINT(VALUE, C) \ 1372*404b540aSrobert ( (C) == 'Q' ? EXTRA_CONSTRAINT_FOR_Q (VALUE) \ 1373*404b540aSrobert : (C) == 'R' ? EXTRA_CONSTRAINT_FOR_R (VALUE) \ 1374*404b540aSrobert : (C) == 'S' ? EXTRA_CONSTRAINT_FOR_S (VALUE) \ 1375*404b540aSrobert : (C) == 'T' ? EXTRA_CONSTRAINT_FOR_T (VALUE) \ 1376*404b540aSrobert : (C) == 'U' ? EXTRA_CONSTRAINT_FOR_U (VALUE) \ 1377*404b540aSrobert : 0) 1378*404b540aSrobert 1379*404b540aSrobert #define EXTRA_MEMORY_CONSTRAINT(C,STR) \ 1380*404b540aSrobert ((C) == 'U' || (C) == 'R' || (C) == 'T') 1381*404b540aSrobert 1382*404b540aSrobert #define CONSTRAINT_LEN(C, STR) \ 1383*404b540aSrobert ((C) == 'D' ? 3 : DEFAULT_CONSTRAINT_LEN ((C), (STR))) 1384*404b540aSrobert 1385*404b540aSrobert #define REG_CLASS_FROM_CONSTRAINT(C, STR) \ 1386*404b540aSrobert (((C) == 'D' && (STR)[1] == '8' && (STR)[2] == '9') ? GR89_REGS : \ 1387*404b540aSrobert ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '9') ? GR9_REGS : \ 1388*404b540aSrobert ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '8') ? GR8_REGS : \ 1389*404b540aSrobert ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '4') ? FDPIC_FPTR_REGS : \ 1390*404b540aSrobert ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '5') ? FDPIC_REGS : \ 1391*404b540aSrobert REG_CLASS_FROM_LETTER ((C))) 1392*404b540aSrobert 1393*404b540aSrobert 1394*404b540aSrobert /* Basic Stack Layout. */ 1395*404b540aSrobert 1396*404b540aSrobert /* Structure to describe information about a saved range of registers */ 1397*404b540aSrobert 1398*404b540aSrobert typedef struct frv_stack_regs { 1399*404b540aSrobert const char * name; /* name of the register ranges */ 1400*404b540aSrobert int first; /* first register in the range */ 1401*404b540aSrobert int last; /* last register in the range */ 1402*404b540aSrobert int size_1word; /* # of bytes to be stored via 1 word stores */ 1403*404b540aSrobert int size_2words; /* # of bytes to be stored via 2 word stores */ 1404*404b540aSrobert unsigned char field_p; /* true if the registers are a single SPR */ 1405*404b540aSrobert unsigned char dword_p; /* true if we can do dword stores */ 1406*404b540aSrobert unsigned char special_p; /* true if the regs have a fixed save loc. */ 1407*404b540aSrobert } frv_stack_regs_t; 1408*404b540aSrobert 1409*404b540aSrobert /* Register ranges to look into saving. */ 1410*404b540aSrobert #define STACK_REGS_GPR 0 /* Gprs (normally gr16..gr31, gr48..gr63) */ 1411*404b540aSrobert #define STACK_REGS_FPR 1 /* Fprs (normally fr16..fr31, fr48..fr63) */ 1412*404b540aSrobert #define STACK_REGS_LR 2 /* LR register */ 1413*404b540aSrobert #define STACK_REGS_CC 3 /* CCrs (normally not saved) */ 1414*404b540aSrobert #define STACK_REGS_LCR 5 /* lcr register */ 1415*404b540aSrobert #define STACK_REGS_STDARG 6 /* stdarg registers */ 1416*404b540aSrobert #define STACK_REGS_STRUCT 7 /* structure return (gr3) */ 1417*404b540aSrobert #define STACK_REGS_FP 8 /* FP register */ 1418*404b540aSrobert #define STACK_REGS_MAX 9 /* # of register ranges */ 1419*404b540aSrobert 1420*404b540aSrobert /* Values for save_p field. */ 1421*404b540aSrobert #define REG_SAVE_NO_SAVE 0 /* register not saved */ 1422*404b540aSrobert #define REG_SAVE_1WORD 1 /* save the register */ 1423*404b540aSrobert #define REG_SAVE_2WORDS 2 /* save register and register+1 */ 1424*404b540aSrobert 1425*404b540aSrobert /* Structure used to define the frv stack. */ 1426*404b540aSrobert 1427*404b540aSrobert typedef struct frv_stack { 1428*404b540aSrobert int total_size; /* total bytes allocated for stack */ 1429*404b540aSrobert int vars_size; /* variable save area size */ 1430*404b540aSrobert int parameter_size; /* outgoing parameter size */ 1431*404b540aSrobert int stdarg_size; /* size of regs needed to be saved for stdarg */ 1432*404b540aSrobert int regs_size; /* size of the saved registers */ 1433*404b540aSrobert int regs_size_1word; /* # of bytes to be stored via 1 word stores */ 1434*404b540aSrobert int regs_size_2words; /* # of bytes to be stored via 2 word stores */ 1435*404b540aSrobert int header_size; /* size of the old FP, struct ret., LR save */ 1436*404b540aSrobert int pretend_size; /* size of pretend args */ 1437*404b540aSrobert int vars_offset; /* offset to save local variables from new SP*/ 1438*404b540aSrobert int regs_offset; /* offset to save registers from new SP */ 1439*404b540aSrobert /* register range information */ 1440*404b540aSrobert frv_stack_regs_t regs[STACK_REGS_MAX]; 1441*404b540aSrobert /* offset to store each register */ 1442*404b540aSrobert int reg_offset[FIRST_PSEUDO_REGISTER]; 1443*404b540aSrobert /* whether to save register (& reg+1) */ 1444*404b540aSrobert unsigned char save_p[FIRST_PSEUDO_REGISTER]; 1445*404b540aSrobert } frv_stack_t; 1446*404b540aSrobert 1447*404b540aSrobert /* Define this macro if pushing a word onto the stack moves the stack pointer 1448*404b540aSrobert to a smaller address. */ 1449*404b540aSrobert #define STACK_GROWS_DOWNWARD 1 1450*404b540aSrobert 1451*404b540aSrobert /* Define this macro to nonzero if the addresses of local variable slots 1452*404b540aSrobert are at negative offsets from the frame pointer. */ 1453*404b540aSrobert #define FRAME_GROWS_DOWNWARD 1 1454*404b540aSrobert 1455*404b540aSrobert /* Offset from the frame pointer to the first local variable slot to be 1456*404b540aSrobert allocated. 1457*404b540aSrobert 1458*404b540aSrobert If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the 1459*404b540aSrobert first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by 1460*404b540aSrobert adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */ 1461*404b540aSrobert #define STARTING_FRAME_OFFSET 0 1462*404b540aSrobert 1463*404b540aSrobert /* Offset from the stack pointer register to the first location at which 1464*404b540aSrobert outgoing arguments are placed. If not specified, the default value of zero 1465*404b540aSrobert is used. This is the proper value for most machines. 1466*404b540aSrobert 1467*404b540aSrobert If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first 1468*404b540aSrobert location at which outgoing arguments are placed. */ 1469*404b540aSrobert #define STACK_POINTER_OFFSET 0 1470*404b540aSrobert 1471*404b540aSrobert /* Offset from the argument pointer register to the first argument's address. 1472*404b540aSrobert On some machines it may depend on the data type of the function. 1473*404b540aSrobert 1474*404b540aSrobert If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first 1475*404b540aSrobert argument's address. */ 1476*404b540aSrobert #define FIRST_PARM_OFFSET(FUNDECL) 0 1477*404b540aSrobert 1478*404b540aSrobert /* A C expression whose value is RTL representing the address in a stack frame 1479*404b540aSrobert where the pointer to the caller's frame is stored. Assume that FRAMEADDR is 1480*404b540aSrobert an RTL expression for the address of the stack frame itself. 1481*404b540aSrobert 1482*404b540aSrobert If you don't define this macro, the default is to return the value of 1483*404b540aSrobert FRAMEADDR--that is, the stack frame address is also the address of the stack 1484*404b540aSrobert word that points to the previous frame. */ 1485*404b540aSrobert #define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) frv_dynamic_chain_address (FRAMEADDR) 1486*404b540aSrobert 1487*404b540aSrobert /* A C expression whose value is RTL representing the value of the return 1488*404b540aSrobert address for the frame COUNT steps up from the current frame, after the 1489*404b540aSrobert prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame 1490*404b540aSrobert pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' is 1491*404b540aSrobert defined. 1492*404b540aSrobert 1493*404b540aSrobert The value of the expression must always be the correct address when COUNT is 1494*404b540aSrobert zero, but may be `NULL_RTX' if there is not way to determine the return 1495*404b540aSrobert address of other frames. */ 1496*404b540aSrobert #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR) 1497*404b540aSrobert 1498*404b540aSrobert #define RETURN_POINTER_REGNUM LR_REGNO 1499*404b540aSrobert 1500*404b540aSrobert /* A C expression whose value is RTL representing the location of the incoming 1501*404b540aSrobert return address at the beginning of any function, before the prologue. This 1502*404b540aSrobert RTL is either a `REG', indicating that the return value is saved in `REG', 1503*404b540aSrobert or a `MEM' representing a location in the stack. 1504*404b540aSrobert 1505*404b540aSrobert You only need to define this macro if you want to support call frame 1506*404b540aSrobert debugging information like that provided by DWARF 2. */ 1507*404b540aSrobert #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM) 1508*404b540aSrobert 1509*404b540aSrobert 1510*404b540aSrobert /* Register That Address the Stack Frame. */ 1511*404b540aSrobert 1512*404b540aSrobert /* The register number of the stack pointer register, which must also be a 1513*404b540aSrobert fixed register according to `FIXED_REGISTERS'. On most machines, the 1514*404b540aSrobert hardware determines which register this is. */ 1515*404b540aSrobert #define STACK_POINTER_REGNUM (GPR_FIRST + 1) 1516*404b540aSrobert 1517*404b540aSrobert /* The register number of the frame pointer register, which is used to access 1518*404b540aSrobert automatic variables in the stack frame. On some machines, the hardware 1519*404b540aSrobert determines which register this is. On other machines, you can choose any 1520*404b540aSrobert register you wish for this purpose. */ 1521*404b540aSrobert #define FRAME_POINTER_REGNUM (GPR_FIRST + 2) 1522*404b540aSrobert 1523*404b540aSrobert /* The register number of the arg pointer register, which is used to access the 1524*404b540aSrobert function's argument list. On some machines, this is the same as the frame 1525*404b540aSrobert pointer register. On some machines, the hardware determines which register 1526*404b540aSrobert this is. On other machines, you can choose any register you wish for this 1527*404b540aSrobert purpose. If this is not the same register as the frame pointer register, 1528*404b540aSrobert then you must mark it as a fixed register according to `FIXED_REGISTERS', or 1529*404b540aSrobert arrange to be able to eliminate it. */ 1530*404b540aSrobert 1531*404b540aSrobert /* On frv this is a fake register that is eliminated in 1532*404b540aSrobert terms of either the frame pointer or stack pointer. */ 1533*404b540aSrobert #define ARG_POINTER_REGNUM AP_FIRST 1534*404b540aSrobert 1535*404b540aSrobert /* Register numbers used for passing a function's static chain pointer. If 1536*404b540aSrobert register windows are used, the register number as seen by the called 1537*404b540aSrobert function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as 1538*404b540aSrobert seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers 1539*404b540aSrobert are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined. 1540*404b540aSrobert 1541*404b540aSrobert The static chain register need not be a fixed register. 1542*404b540aSrobert 1543*404b540aSrobert If the static chain is passed in memory, these macros should not be defined; 1544*404b540aSrobert instead, the next two macros should be defined. */ 1545*404b540aSrobert #define STATIC_CHAIN_REGNUM (GPR_FIRST + 7) 1546*404b540aSrobert #define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7) 1547*404b540aSrobert 1548*404b540aSrobert 1549*404b540aSrobert /* Eliminating the Frame Pointer and the Arg Pointer. */ 1550*404b540aSrobert 1551*404b540aSrobert /* A C expression which is nonzero if a function must have and use a frame 1552*404b540aSrobert pointer. This expression is evaluated in the reload pass. If its value is 1553*404b540aSrobert nonzero the function will have a frame pointer. 1554*404b540aSrobert 1555*404b540aSrobert The expression can in principle examine the current function and decide 1556*404b540aSrobert according to the facts, but on most machines the constant 0 or the constant 1557*404b540aSrobert 1 suffices. Use 0 when the machine allows code to be generated with no 1558*404b540aSrobert frame pointer, and doing so saves some time or space. Use 1 when there is 1559*404b540aSrobert no possible advantage to avoiding a frame pointer. 1560*404b540aSrobert 1561*404b540aSrobert In certain cases, the compiler does not know how to produce valid code 1562*404b540aSrobert without a frame pointer. The compiler recognizes those cases and 1563*404b540aSrobert automatically gives the function a frame pointer regardless of what 1564*404b540aSrobert `FRAME_POINTER_REQUIRED' says. You don't need to worry about them. 1565*404b540aSrobert 1566*404b540aSrobert In a function that does not require a frame pointer, the frame pointer 1567*404b540aSrobert register can be allocated for ordinary usage, unless you mark it as a fixed 1568*404b540aSrobert register. See `FIXED_REGISTERS' for more information. */ 1569*404b540aSrobert #define FRAME_POINTER_REQUIRED frv_frame_pointer_required () 1570*404b540aSrobert 1571*404b540aSrobert /* If defined, this macro specifies a table of register pairs used to eliminate 1572*404b540aSrobert unneeded registers that point into the stack frame. If it is not defined, 1573*404b540aSrobert the only elimination attempted by the compiler is to replace references to 1574*404b540aSrobert the frame pointer with references to the stack pointer. 1575*404b540aSrobert 1576*404b540aSrobert The definition of this macro is a list of structure initializations, each of 1577*404b540aSrobert which specifies an original and replacement register. 1578*404b540aSrobert 1579*404b540aSrobert On some machines, the position of the argument pointer is not known until 1580*404b540aSrobert the compilation is completed. In such a case, a separate hard register must 1581*404b540aSrobert be used for the argument pointer. This register can be eliminated by 1582*404b540aSrobert replacing it with either the frame pointer or the argument pointer, 1583*404b540aSrobert depending on whether or not the frame pointer has been eliminated. 1584*404b540aSrobert 1585*404b540aSrobert In this case, you might specify: 1586*404b540aSrobert #define ELIMINABLE_REGS \ 1587*404b540aSrobert {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1588*404b540aSrobert {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1589*404b540aSrobert {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 1590*404b540aSrobert 1591*404b540aSrobert Note that the elimination of the argument pointer with the stack pointer is 1592*404b540aSrobert specified first since that is the preferred elimination. */ 1593*404b540aSrobert 1594*404b540aSrobert #define ELIMINABLE_REGS \ 1595*404b540aSrobert { \ 1596*404b540aSrobert {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1597*404b540aSrobert {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1598*404b540aSrobert {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \ 1599*404b540aSrobert } 1600*404b540aSrobert 1601*404b540aSrobert /* A C expression that returns nonzero if the compiler is allowed to try to 1602*404b540aSrobert replace register number FROM with register number TO. This macro need only 1603*404b540aSrobert be defined if `ELIMINABLE_REGS' is defined, and will usually be the constant 1604*404b540aSrobert 1, since most of the cases preventing register elimination are things that 1605*404b540aSrobert the compiler already knows about. */ 1606*404b540aSrobert 1607*404b540aSrobert #define CAN_ELIMINATE(FROM, TO) \ 1608*404b540aSrobert ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ 1609*404b540aSrobert ? ! frame_pointer_needed \ 1610*404b540aSrobert : 1) 1611*404b540aSrobert 1612*404b540aSrobert /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the 1613*404b540aSrobert initial difference between the specified pair of registers. This macro must 1614*404b540aSrobert be defined if `ELIMINABLE_REGS' is defined. */ 1615*404b540aSrobert 1616*404b540aSrobert #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1617*404b540aSrobert (OFFSET) = frv_initial_elimination_offset (FROM, TO) 1618*404b540aSrobert 1619*404b540aSrobert 1620*404b540aSrobert /* Passing Function Arguments on the Stack. */ 1621*404b540aSrobert 1622*404b540aSrobert /* If defined, the maximum amount of space required for outgoing arguments will 1623*404b540aSrobert be computed and placed into the variable 1624*404b540aSrobert `current_function_outgoing_args_size'. No space will be pushed onto the 1625*404b540aSrobert stack for each call; instead, the function prologue should increase the 1626*404b540aSrobert stack frame size by this amount. 1627*404b540aSrobert 1628*404b540aSrobert Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not 1629*404b540aSrobert proper. */ 1630*404b540aSrobert #define ACCUMULATE_OUTGOING_ARGS 1 1631*404b540aSrobert 1632*404b540aSrobert /* A C expression that should indicate the number of bytes of its own arguments 1633*404b540aSrobert that a function pops on returning, or 0 if the function pops no arguments 1634*404b540aSrobert and the caller must therefore pop them all after the function returns. 1635*404b540aSrobert 1636*404b540aSrobert FUNDECL is a C variable whose value is a tree node that describes the 1637*404b540aSrobert function in question. Normally it is a node of type `FUNCTION_DECL' that 1638*404b540aSrobert describes the declaration of the function. From this it is possible to 1639*404b540aSrobert obtain the DECL_ATTRIBUTES of the function. 1640*404b540aSrobert 1641*404b540aSrobert FUNTYPE is a C variable whose value is a tree node that describes the 1642*404b540aSrobert function in question. Normally it is a node of type `FUNCTION_TYPE' that 1643*404b540aSrobert describes the data type of the function. From this it is possible to obtain 1644*404b540aSrobert the data types of the value and arguments (if known). 1645*404b540aSrobert 1646*404b540aSrobert When a call to a library function is being considered, FUNTYPE will contain 1647*404b540aSrobert an identifier node for the library function. Thus, if you need to 1648*404b540aSrobert distinguish among various library functions, you can do so by their names. 1649*404b540aSrobert Note that "library function" in this context means a function used to 1650*404b540aSrobert perform arithmetic, whose name is known specially in the compiler and was 1651*404b540aSrobert not mentioned in the C code being compiled. 1652*404b540aSrobert 1653*404b540aSrobert STACK-SIZE is the number of bytes of arguments passed on the stack. If a 1654*404b540aSrobert variable number of bytes is passed, it is zero, and argument popping will 1655*404b540aSrobert always be the responsibility of the calling function. 1656*404b540aSrobert 1657*404b540aSrobert On the VAX, all functions always pop their arguments, so the definition of 1658*404b540aSrobert this macro is STACK-SIZE. On the 68000, using the standard calling 1659*404b540aSrobert convention, no functions pop their arguments, so the value of the macro is 1660*404b540aSrobert always 0 in this case. But an alternative calling convention is available 1661*404b540aSrobert in which functions that take a fixed number of arguments pop them but other 1662*404b540aSrobert functions (such as `printf') pop nothing (the caller pops all). When this 1663*404b540aSrobert convention is in use, FUNTYPE is examined to determine whether a function 1664*404b540aSrobert takes a fixed number of arguments. */ 1665*404b540aSrobert #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0 1666*404b540aSrobert 1667*404b540aSrobert 1668*404b540aSrobert /* The number of register assigned to holding function arguments. */ 1669*404b540aSrobert 1670*404b540aSrobert #define FRV_NUM_ARG_REGS 6 1671*404b540aSrobert 1672*404b540aSrobert #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1673*404b540aSrobert frv_function_arg (&CUM, MODE, TYPE, NAMED, FALSE) 1674*404b540aSrobert 1675*404b540aSrobert /* Define this macro if the target machine has "register windows", so that the 1676*404b540aSrobert register in which a function sees an arguments is not necessarily the same 1677*404b540aSrobert as the one in which the caller passed the argument. 1678*404b540aSrobert 1679*404b540aSrobert For such machines, `FUNCTION_ARG' computes the register in which the caller 1680*404b540aSrobert passes the value, and `FUNCTION_INCOMING_ARG' should be defined in a similar 1681*404b540aSrobert fashion to tell the function being called where the arguments will arrive. 1682*404b540aSrobert 1683*404b540aSrobert If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves both 1684*404b540aSrobert purposes. */ 1685*404b540aSrobert 1686*404b540aSrobert #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 1687*404b540aSrobert frv_function_arg (&CUM, MODE, TYPE, NAMED, TRUE) 1688*404b540aSrobert 1689*404b540aSrobert /* A C type for declaring a variable that is used as the first argument of 1690*404b540aSrobert `FUNCTION_ARG' and other related values. For some target machines, the type 1691*404b540aSrobert `int' suffices and can hold the number of bytes of argument so far. 1692*404b540aSrobert 1693*404b540aSrobert There is no need to record in `CUMULATIVE_ARGS' anything about the arguments 1694*404b540aSrobert that have been passed on the stack. The compiler has other variables to 1695*404b540aSrobert keep track of that. For target machines on which all arguments are passed 1696*404b540aSrobert on the stack, there is no need to store anything in `CUMULATIVE_ARGS'; 1697*404b540aSrobert however, the data structure must exist and should not be empty, so use 1698*404b540aSrobert `int'. */ 1699*404b540aSrobert #define CUMULATIVE_ARGS int 1700*404b540aSrobert 1701*404b540aSrobert /* A C statement (sans semicolon) for initializing the variable CUM for the 1702*404b540aSrobert state at the beginning of the argument list. The variable has type 1703*404b540aSrobert `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type 1704*404b540aSrobert of the function which will receive the args, or 0 if the args are to a 1705*404b540aSrobert compiler support library function. The value of INDIRECT is nonzero when 1706*404b540aSrobert processing an indirect call, for example a call through a function pointer. 1707*404b540aSrobert The value of INDIRECT is zero for a call to an explicitly named function, a 1708*404b540aSrobert library function call, or when `INIT_CUMULATIVE_ARGS' is used to find 1709*404b540aSrobert arguments for the function being compiled. 1710*404b540aSrobert 1711*404b540aSrobert When processing a call to a compiler support library function, LIBNAME 1712*404b540aSrobert identifies which one. It is a `symbol_ref' rtx which contains the name of 1713*404b540aSrobert the function, as a string. LIBNAME is 0 when an ordinary C function call is 1714*404b540aSrobert being processed. Thus, each time this macro is called, either LIBNAME or 1715*404b540aSrobert FNTYPE is nonzero, but never both of them at once. */ 1716*404b540aSrobert 1717*404b540aSrobert #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1718*404b540aSrobert frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, FALSE) 1719*404b540aSrobert 1720*404b540aSrobert /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the 1721*404b540aSrobert arguments for the function being compiled. If this macro is undefined, 1722*404b540aSrobert `INIT_CUMULATIVE_ARGS' is used instead. 1723*404b540aSrobert 1724*404b540aSrobert The value passed for LIBNAME is always 0, since library routines with 1725*404b540aSrobert special calling conventions are never compiled with GCC. The argument 1726*404b540aSrobert LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'. */ 1727*404b540aSrobert 1728*404b540aSrobert #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \ 1729*404b540aSrobert frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, NULL, TRUE) 1730*404b540aSrobert 1731*404b540aSrobert /* A C statement (sans semicolon) to update the summarizer variable CUM to 1732*404b540aSrobert advance past an argument in the argument list. The values MODE, TYPE and 1733*404b540aSrobert NAMED describe that argument. Once this is done, the variable CUM is 1734*404b540aSrobert suitable for analyzing the *following* argument with `FUNCTION_ARG', etc. 1735*404b540aSrobert 1736*404b540aSrobert This macro need not do anything if the argument in question was passed on 1737*404b540aSrobert the stack. The compiler knows how to track the amount of stack space used 1738*404b540aSrobert for arguments without any special help. */ 1739*404b540aSrobert #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1740*404b540aSrobert frv_function_arg_advance (&CUM, MODE, TYPE, NAMED) 1741*404b540aSrobert 1742*404b540aSrobert /* If defined, a C expression that gives the alignment boundary, in bits, of an 1743*404b540aSrobert argument with the specified mode and type. If it is not defined, 1744*404b540aSrobert `PARM_BOUNDARY' is used for all arguments. */ 1745*404b540aSrobert 1746*404b540aSrobert #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 1747*404b540aSrobert frv_function_arg_boundary (MODE, TYPE) 1748*404b540aSrobert 1749*404b540aSrobert /* A C expression that is nonzero if REGNO is the number of a hard register in 1750*404b540aSrobert which function arguments are sometimes passed. This does *not* include 1751*404b540aSrobert implicit arguments such as the static chain and the structure-value address. 1752*404b540aSrobert On many machines, no registers can be used for this purpose since all 1753*404b540aSrobert function arguments are pushed on the stack. */ 1754*404b540aSrobert #define FUNCTION_ARG_REGNO_P(REGNO) \ 1755*404b540aSrobert ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM)) 1756*404b540aSrobert 1757*404b540aSrobert 1758*404b540aSrobert /* How Scalar Function Values are Returned. */ 1759*404b540aSrobert 1760*404b540aSrobert /* The number of the hard register that is used to return a scalar value from a 1761*404b540aSrobert function call. */ 1762*404b540aSrobert #define RETURN_VALUE_REGNUM (GPR_FIRST + 8) 1763*404b540aSrobert 1764*404b540aSrobert /* A C expression to create an RTX representing the place where a function 1765*404b540aSrobert returns a value of data type VALTYPE. VALTYPE is a tree node representing a 1766*404b540aSrobert data type. Write `TYPE_MODE (VALTYPE)' to get the machine mode used to 1767*404b540aSrobert represent that type. On many machines, only the mode is relevant. 1768*404b540aSrobert (Actually, on most machines, scalar values are returned in the same place 1769*404b540aSrobert regardless of mode). 1770*404b540aSrobert 1771*404b540aSrobert If `TARGET_PROMOTE_FUNCTION_RETURN' is defined to return true, you 1772*404b540aSrobert must apply the same promotion rules specified in `PROMOTE_MODE' if 1773*404b540aSrobert VALTYPE is a scalar type. 1774*404b540aSrobert 1775*404b540aSrobert If the precise function being called is known, FUNC is a tree node 1776*404b540aSrobert (`FUNCTION_DECL') for it; otherwise, FUNC is a null pointer. This makes it 1777*404b540aSrobert possible to use a different value-returning convention for specific 1778*404b540aSrobert functions when all their calls are known. 1779*404b540aSrobert 1780*404b540aSrobert `FUNCTION_VALUE' is not used for return vales with aggregate data types, 1781*404b540aSrobert because these are returned in another way. See 1782*404b540aSrobert `TARGET_STRUCT_VALUE_RTX' and related macros, below. */ 1783*404b540aSrobert #define FUNCTION_VALUE(VALTYPE, FUNC) \ 1784*404b540aSrobert gen_rtx_REG (TYPE_MODE (VALTYPE), RETURN_VALUE_REGNUM) 1785*404b540aSrobert 1786*404b540aSrobert /* A C expression to create an RTX representing the place where a library 1787*404b540aSrobert function returns a value of mode MODE. 1788*404b540aSrobert 1789*404b540aSrobert Note that "library function" in this context means a compiler support 1790*404b540aSrobert routine, used to perform arithmetic, whose name is known specially by the 1791*404b540aSrobert compiler and was not mentioned in the C code being compiled. 1792*404b540aSrobert 1793*404b540aSrobert The definition of `LIBRARY_VALUE' need not be concerned aggregate data 1794*404b540aSrobert types, because none of the library functions returns such types. */ 1795*404b540aSrobert #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM) 1796*404b540aSrobert 1797*404b540aSrobert /* A C expression that is nonzero if REGNO is the number of a hard register in 1798*404b540aSrobert which the values of called function may come back. 1799*404b540aSrobert 1800*404b540aSrobert A register whose use for returning values is limited to serving as the 1801*404b540aSrobert second of a pair (for a value of type `double', say) need not be recognized 1802*404b540aSrobert by this macro. So for most machines, this definition suffices: 1803*404b540aSrobert 1804*404b540aSrobert #define FUNCTION_VALUE_REGNO_P(N) ((N) == RETURN) 1805*404b540aSrobert 1806*404b540aSrobert If the machine has register windows, so that the caller and the called 1807*404b540aSrobert function use different registers for the return value, this macro should 1808*404b540aSrobert recognize only the caller's register numbers. */ 1809*404b540aSrobert #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM) 1810*404b540aSrobert 1811*404b540aSrobert 1812*404b540aSrobert /* How Large Values are Returned. */ 1813*404b540aSrobert 1814*404b540aSrobert /* The number of the register that is used to pass the structure 1815*404b540aSrobert value address. */ 1816*404b540aSrobert #define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3) 1817*404b540aSrobert 1818*404b540aSrobert 1819*404b540aSrobert /* Function Entry and Exit. */ 1820*404b540aSrobert 1821*404b540aSrobert /* Define this macro as a C expression that is nonzero if the return 1822*404b540aSrobert instruction or the function epilogue ignores the value of the stack pointer; 1823*404b540aSrobert in other words, if it is safe to delete an instruction to adjust the stack 1824*404b540aSrobert pointer before a return from the function. 1825*404b540aSrobert 1826*404b540aSrobert Note that this macro's value is relevant only for functions for which frame 1827*404b540aSrobert pointers are maintained. It is never safe to delete a final stack 1828*404b540aSrobert adjustment in a function that has no frame pointer, and the compiler knows 1829*404b540aSrobert this regardless of `EXIT_IGNORE_STACK'. */ 1830*404b540aSrobert #define EXIT_IGNORE_STACK 1 1831*404b540aSrobert 1832*404b540aSrobert /* Generating Code for Profiling. */ 1833*404b540aSrobert 1834*404b540aSrobert /* A C statement or compound statement to output to FILE some assembler code to 1835*404b540aSrobert call the profiling subroutine `mcount'. Before calling, the assembler code 1836*404b540aSrobert must load the address of a counter variable into a register where `mcount' 1837*404b540aSrobert expects to find the address. The name of this variable is `LP' followed by 1838*404b540aSrobert the number LABELNO, so you would generate the name using `LP%d' in a 1839*404b540aSrobert `fprintf'. 1840*404b540aSrobert 1841*404b540aSrobert The details of how the address should be passed to `mcount' are determined 1842*404b540aSrobert by your operating system environment, not by GCC. To figure them out, 1843*404b540aSrobert compile a small program for profiling using the system's installed C 1844*404b540aSrobert compiler and look at the assembler code that results. 1845*404b540aSrobert 1846*404b540aSrobert This declaration must be present, but it can be an abort if profiling is 1847*404b540aSrobert not implemented. */ 1848*404b540aSrobert 1849*404b540aSrobert #define FUNCTION_PROFILER(FILE, LABELNO) 1850*404b540aSrobert 1851*404b540aSrobert 1852*404b540aSrobert /* Implementing the Varargs Macros. */ 1853*404b540aSrobert 1854*404b540aSrobert /* Implement the stdarg/varargs va_start macro. STDARG_P is nonzero if this 1855*404b540aSrobert is stdarg.h instead of varargs.h. VALIST is the tree of the va_list 1856*404b540aSrobert variable to initialize. NEXTARG is the machine independent notion of the 1857*404b540aSrobert 'next' argument after the variable arguments. If not defined, a standard 1858*404b540aSrobert implementation will be defined that works for arguments passed on the stack. */ 1859*404b540aSrobert 1860*404b540aSrobert #define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \ 1861*404b540aSrobert (frv_expand_builtin_va_start(VALIST, NEXTARG)) 1862*404b540aSrobert 1863*404b540aSrobert 1864*404b540aSrobert /* Trampolines for Nested Functions. */ 1865*404b540aSrobert 1866*404b540aSrobert /* A C expression for the size in bytes of the trampoline, as an integer. */ 1867*404b540aSrobert #define TRAMPOLINE_SIZE frv_trampoline_size () 1868*404b540aSrobert 1869*404b540aSrobert /* Alignment required for trampolines, in bits. 1870*404b540aSrobert 1871*404b540aSrobert If you don't define this macro, the value of `BIGGEST_ALIGNMENT' is used for 1872*404b540aSrobert aligning trampolines. */ 1873*404b540aSrobert #define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32) 1874*404b540aSrobert 1875*404b540aSrobert /* A C statement to initialize the variable parts of a trampoline. ADDR is an 1876*404b540aSrobert RTX for the address of the trampoline; FNADDR is an RTX for the address of 1877*404b540aSrobert the nested function; STATIC_CHAIN is an RTX for the static chain value that 1878*404b540aSrobert should be passed to the function when it is called. */ 1879*404b540aSrobert #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \ 1880*404b540aSrobert frv_initialize_trampoline (ADDR, FNADDR, STATIC_CHAIN) 1881*404b540aSrobert 1882*404b540aSrobert /* Define this macro if trampolines need a special subroutine to do their work. 1883*404b540aSrobert The macro should expand to a series of `asm' statements which will be 1884*404b540aSrobert compiled with GCC. They go in a library function named 1885*404b540aSrobert `__transfer_from_trampoline'. 1886*404b540aSrobert 1887*404b540aSrobert If you need to avoid executing the ordinary prologue code of a compiled C 1888*404b540aSrobert function when you jump to the subroutine, you can do so by placing a special 1889*404b540aSrobert label of your own in the assembler code. Use one `asm' statement to 1890*404b540aSrobert generate an assembler label, and another to make the label global. Then 1891*404b540aSrobert trampolines can use that label to jump directly to your special assembler 1892*404b540aSrobert code. */ 1893*404b540aSrobert 1894*404b540aSrobert #ifdef __FRV_UNDERSCORE__ 1895*404b540aSrobert #define TRAMPOLINE_TEMPLATE_NAME "___trampoline_template" 1896*404b540aSrobert #else 1897*404b540aSrobert #define TRAMPOLINE_TEMPLATE_NAME "__trampoline_template" 1898*404b540aSrobert #endif 1899*404b540aSrobert 1900*404b540aSrobert #define Twrite _write 1901*404b540aSrobert 1902*404b540aSrobert #if ! __FRV_FDPIC__ 1903*404b540aSrobert #define TRANSFER_FROM_TRAMPOLINE \ 1904*404b540aSrobert extern int Twrite (int, const void *, unsigned); \ 1905*404b540aSrobert \ 1906*404b540aSrobert void \ 1907*404b540aSrobert __trampoline_setup (short * addr, int size, int fnaddr, int sc) \ 1908*404b540aSrobert { \ 1909*404b540aSrobert extern short __trampoline_template[]; \ 1910*404b540aSrobert short * to = addr; \ 1911*404b540aSrobert short * from = &__trampoline_template[0]; \ 1912*404b540aSrobert int i; \ 1913*404b540aSrobert \ 1914*404b540aSrobert if (size < 20) \ 1915*404b540aSrobert { \ 1916*404b540aSrobert Twrite (2, "__trampoline_setup bad size\n", \ 1917*404b540aSrobert sizeof ("__trampoline_setup bad size\n") - 1); \ 1918*404b540aSrobert exit (-1); \ 1919*404b540aSrobert } \ 1920*404b540aSrobert \ 1921*404b540aSrobert to[0] = from[0]; \ 1922*404b540aSrobert to[1] = (short)(fnaddr); \ 1923*404b540aSrobert to[2] = from[2]; \ 1924*404b540aSrobert to[3] = (short)(sc); \ 1925*404b540aSrobert to[4] = from[4]; \ 1926*404b540aSrobert to[5] = (short)(fnaddr >> 16); \ 1927*404b540aSrobert to[6] = from[6]; \ 1928*404b540aSrobert to[7] = (short)(sc >> 16); \ 1929*404b540aSrobert to[8] = from[8]; \ 1930*404b540aSrobert to[9] = from[9]; \ 1931*404b540aSrobert \ 1932*404b540aSrobert for (i = 0; i < 20; i++) \ 1933*404b540aSrobert __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \ 1934*404b540aSrobert } \ 1935*404b540aSrobert \ 1936*404b540aSrobert __asm__("\n" \ 1937*404b540aSrobert "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \ 1938*404b540aSrobert "\t.text\n" \ 1939*404b540aSrobert TRAMPOLINE_TEMPLATE_NAME ":\n" \ 1940*404b540aSrobert "\tsetlos #0, gr6\n" /* jump register */ \ 1941*404b540aSrobert "\tsetlos #0, gr7\n" /* static chain */ \ 1942*404b540aSrobert "\tsethi #0, gr6\n" \ 1943*404b540aSrobert "\tsethi #0, gr7\n" \ 1944*404b540aSrobert "\tjmpl @(gr0,gr6)\n"); 1945*404b540aSrobert #else 1946*404b540aSrobert #define TRANSFER_FROM_TRAMPOLINE \ 1947*404b540aSrobert extern int Twrite (int, const void *, unsigned); \ 1948*404b540aSrobert \ 1949*404b540aSrobert void \ 1950*404b540aSrobert __trampoline_setup (addr, size, fnaddr, sc) \ 1951*404b540aSrobert short * addr; \ 1952*404b540aSrobert int size; \ 1953*404b540aSrobert int fnaddr; \ 1954*404b540aSrobert int sc; \ 1955*404b540aSrobert { \ 1956*404b540aSrobert extern short __trampoline_template[]; \ 1957*404b540aSrobert short * from = &__trampoline_template[0]; \ 1958*404b540aSrobert int i; \ 1959*404b540aSrobert short **desc = (short **)addr; \ 1960*404b540aSrobert short * to = addr + 4; \ 1961*404b540aSrobert \ 1962*404b540aSrobert if (size != 32) \ 1963*404b540aSrobert { \ 1964*404b540aSrobert Twrite (2, "__trampoline_setup bad size\n", \ 1965*404b540aSrobert sizeof ("__trampoline_setup bad size\n") - 1); \ 1966*404b540aSrobert exit (-1); \ 1967*404b540aSrobert } \ 1968*404b540aSrobert \ 1969*404b540aSrobert /* Create a function descriptor with the address of the code below 1970*404b540aSrobert and NULL as the FDPIC value. We don't need the real GOT value 1971*404b540aSrobert here, since we don't use it, so we use NULL, that is just as 1972*404b540aSrobert good. */ \ 1973*404b540aSrobert desc[0] = to; \ 1974*404b540aSrobert desc[1] = NULL; \ 1975*404b540aSrobert size -= 8; \ 1976*404b540aSrobert \ 1977*404b540aSrobert to[0] = from[0]; \ 1978*404b540aSrobert to[1] = (short)(fnaddr); \ 1979*404b540aSrobert to[2] = from[2]; \ 1980*404b540aSrobert to[3] = (short)(sc); \ 1981*404b540aSrobert to[4] = from[4]; \ 1982*404b540aSrobert to[5] = (short)(fnaddr >> 16); \ 1983*404b540aSrobert to[6] = from[6]; \ 1984*404b540aSrobert to[7] = (short)(sc >> 16); \ 1985*404b540aSrobert to[8] = from[8]; \ 1986*404b540aSrobert to[9] = from[9]; \ 1987*404b540aSrobert to[10] = from[10]; \ 1988*404b540aSrobert to[11] = from[11]; \ 1989*404b540aSrobert \ 1990*404b540aSrobert for (i = 0; i < size; i++) \ 1991*404b540aSrobert __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \ 1992*404b540aSrobert } \ 1993*404b540aSrobert \ 1994*404b540aSrobert __asm__("\n" \ 1995*404b540aSrobert "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \ 1996*404b540aSrobert "\t.text\n" \ 1997*404b540aSrobert TRAMPOLINE_TEMPLATE_NAME ":\n" \ 1998*404b540aSrobert "\tsetlos #0, gr6\n" /* Jump register. */ \ 1999*404b540aSrobert "\tsetlos #0, gr7\n" /* Static chain. */ \ 2000*404b540aSrobert "\tsethi #0, gr6\n" \ 2001*404b540aSrobert "\tsethi #0, gr7\n" \ 2002*404b540aSrobert "\tldd @(gr6,gr0),gr14\n" \ 2003*404b540aSrobert "\tjmpl @(gr14,gr0)\n" \ 2004*404b540aSrobert ); 2005*404b540aSrobert #endif 2006*404b540aSrobert 2007*404b540aSrobert 2008*404b540aSrobert /* Addressing Modes. */ 2009*404b540aSrobert 2010*404b540aSrobert /* A C expression that is 1 if the RTX X is a constant which is a valid 2011*404b540aSrobert address. On most machines, this can be defined as `CONSTANT_P (X)', but a 2012*404b540aSrobert few machines are more restrictive in which constant addresses are supported. 2013*404b540aSrobert 2014*404b540aSrobert `CONSTANT_P' accepts integer-values expressions whose values are not 2015*404b540aSrobert explicitly known, such as `symbol_ref', `label_ref', and `high' expressions 2016*404b540aSrobert and `const' arithmetic expressions, in addition to `const_int' and 2017*404b540aSrobert `const_double' expressions. */ 2018*404b540aSrobert #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) 2019*404b540aSrobert 2020*404b540aSrobert /* A number, the maximum number of registers that can appear in a valid memory 2021*404b540aSrobert address. Note that it is up to you to specify a value equal to the maximum 2022*404b540aSrobert number that `GO_IF_LEGITIMATE_ADDRESS' would ever accept. */ 2023*404b540aSrobert #define MAX_REGS_PER_ADDRESS 2 2024*404b540aSrobert 2025*404b540aSrobert /* A C compound statement with a conditional `goto LABEL;' executed if X (an 2026*404b540aSrobert RTX) is a legitimate memory address on the target machine for a memory 2027*404b540aSrobert operand of mode MODE. 2028*404b540aSrobert 2029*404b540aSrobert It usually pays to define several simpler macros to serve as subroutines for 2030*404b540aSrobert this one. Otherwise it may be too complicated to understand. 2031*404b540aSrobert 2032*404b540aSrobert This macro must exist in two variants: a strict variant and a non-strict 2033*404b540aSrobert one. The strict variant is used in the reload pass. It must be defined so 2034*404b540aSrobert that any pseudo-register that has not been allocated a hard register is 2035*404b540aSrobert considered a memory reference. In contexts where some kind of register is 2036*404b540aSrobert required, a pseudo-register with no hard register must be rejected. 2037*404b540aSrobert 2038*404b540aSrobert The non-strict variant is used in other passes. It must be defined to 2039*404b540aSrobert accept all pseudo-registers in every context where some kind of register is 2040*404b540aSrobert required. 2041*404b540aSrobert 2042*404b540aSrobert Compiler source files that want to use the strict variant of this macro 2043*404b540aSrobert define the macro `REG_OK_STRICT'. You should use an `#ifdef REG_OK_STRICT' 2044*404b540aSrobert conditional to define the strict variant in that case and the non-strict 2045*404b540aSrobert variant otherwise. 2046*404b540aSrobert 2047*404b540aSrobert Subroutines to check for acceptable registers for various purposes (one for 2048*404b540aSrobert base registers, one for index registers, and so on) are typically among the 2049*404b540aSrobert subroutines used to define `GO_IF_LEGITIMATE_ADDRESS'. Then only these 2050*404b540aSrobert subroutine macros need have two variants; the higher levels of macros may be 2051*404b540aSrobert the same whether strict or not. 2052*404b540aSrobert 2053*404b540aSrobert Normally, constant addresses which are the sum of a `symbol_ref' and an 2054*404b540aSrobert integer are stored inside a `const' RTX to mark them as constant. 2055*404b540aSrobert Therefore, there is no need to recognize such sums specifically as 2056*404b540aSrobert legitimate addresses. Normally you would simply recognize any `const' as 2057*404b540aSrobert legitimate. 2058*404b540aSrobert 2059*404b540aSrobert Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle constant sums that 2060*404b540aSrobert are not marked with `const'. It assumes that a naked `plus' indicates 2061*404b540aSrobert indexing. If so, then you *must* reject such naked constant sums as 2062*404b540aSrobert illegitimate addresses, so that none of them will be given to 2063*404b540aSrobert `PRINT_OPERAND_ADDRESS'. 2064*404b540aSrobert 2065*404b540aSrobert On some machines, whether a symbolic address is legitimate depends on the 2066*404b540aSrobert section that the address refers to. On these machines, define the macro 2067*404b540aSrobert `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and 2068*404b540aSrobert then check for it here. When you see a `const', you will have to look 2069*404b540aSrobert inside it to find the `symbol_ref' in order to determine the section. 2070*404b540aSrobert 2071*404b540aSrobert The best way to modify the name string is by adding text to the beginning, 2072*404b540aSrobert with suitable punctuation to prevent any ambiguity. Allocate the new name 2073*404b540aSrobert in `saveable_obstack'. You will have to modify `ASM_OUTPUT_LABELREF' to 2074*404b540aSrobert remove and decode the added text and output the name accordingly, and define 2075*404b540aSrobert `(* targetm.strip_name_encoding)' to access the original name string. 2076*404b540aSrobert 2077*404b540aSrobert You can check the information stored here into the `symbol_ref' in the 2078*404b540aSrobert definitions of the macros `GO_IF_LEGITIMATE_ADDRESS' and 2079*404b540aSrobert `PRINT_OPERAND_ADDRESS'. */ 2080*404b540aSrobert 2081*404b540aSrobert #ifdef REG_OK_STRICT 2082*404b540aSrobert #define REG_OK_STRICT_P 1 2083*404b540aSrobert #else 2084*404b540aSrobert #define REG_OK_STRICT_P 0 2085*404b540aSrobert #endif 2086*404b540aSrobert 2087*404b540aSrobert #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ 2088*404b540aSrobert do \ 2089*404b540aSrobert { \ 2090*404b540aSrobert if (frv_legitimate_address_p (MODE, X, REG_OK_STRICT_P, \ 2091*404b540aSrobert FALSE, FALSE)) \ 2092*404b540aSrobert goto LABEL; \ 2093*404b540aSrobert } \ 2094*404b540aSrobert while (0) 2095*404b540aSrobert 2096*404b540aSrobert /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for 2097*404b540aSrobert use as a base register. For hard registers, it should always accept those 2098*404b540aSrobert which the hardware permits and reject the others. Whether the macro accepts 2099*404b540aSrobert or rejects pseudo registers must be controlled by `REG_OK_STRICT' as 2100*404b540aSrobert described above. This usually requires two variant definitions, of which 2101*404b540aSrobert `REG_OK_STRICT' controls the one actually used. */ 2102*404b540aSrobert #ifdef REG_OK_STRICT 2103*404b540aSrobert #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X)) 2104*404b540aSrobert #else 2105*404b540aSrobert #define REG_OK_FOR_BASE_P(X) GPR_AP_OR_PSEUDO_P (REGNO (X)) 2106*404b540aSrobert #endif 2107*404b540aSrobert 2108*404b540aSrobert /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for 2109*404b540aSrobert use as an index register. 2110*404b540aSrobert 2111*404b540aSrobert The difference between an index register and a base register is that the 2112*404b540aSrobert index register may be scaled. If an address involves the sum of two 2113*404b540aSrobert registers, neither one of them scaled, then either one may be labeled the 2114*404b540aSrobert "base" and the other the "index"; but whichever labeling is used must fit 2115*404b540aSrobert the machine's constraints of which registers may serve in each capacity. 2116*404b540aSrobert The compiler will try both labelings, looking for one that is valid, and 2117*404b540aSrobert will reload one or both registers only if neither labeling works. */ 2118*404b540aSrobert #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) 2119*404b540aSrobert 2120*404b540aSrobert #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 2121*404b540aSrobert do { \ 2122*404b540aSrobert rtx new_x = frv_legitimize_address (X, OLDX, MODE); \ 2123*404b540aSrobert if (new_x) \ 2124*404b540aSrobert { \ 2125*404b540aSrobert (X) = new_x; \ 2126*404b540aSrobert goto WIN; \ 2127*404b540aSrobert } \ 2128*404b540aSrobert } while (0) 2129*404b540aSrobert 2130*404b540aSrobert #define FIND_BASE_TERM frv_find_base_term 2131*404b540aSrobert 2132*404b540aSrobert /* A C statement or compound statement with a conditional `goto LABEL;' 2133*404b540aSrobert executed if memory address X (an RTX) can have different meanings depending 2134*404b540aSrobert on the machine mode of the memory reference it is used for or if the address 2135*404b540aSrobert is valid for some modes but not others. 2136*404b540aSrobert 2137*404b540aSrobert Autoincrement and autodecrement addresses typically have mode-dependent 2138*404b540aSrobert effects because the amount of the increment or decrement is the size of the 2139*404b540aSrobert operand being addressed. Some machines have other mode-dependent addresses. 2140*404b540aSrobert Many RISC machines have no mode-dependent addresses. 2141*404b540aSrobert 2142*404b540aSrobert You may assume that ADDR is a valid address for the machine. */ 2143*404b540aSrobert #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) 2144*404b540aSrobert 2145*404b540aSrobert /* A C expression that is nonzero if X is a legitimate constant for an 2146*404b540aSrobert immediate operand on the target machine. You can assume that X satisfies 2147*404b540aSrobert `CONSTANT_P', so you need not check this. In fact, `1' is a suitable 2148*404b540aSrobert definition for this macro on machines where anything `CONSTANT_P' is valid. */ 2149*404b540aSrobert #define LEGITIMATE_CONSTANT_P(X) frv_legitimate_constant_p (X) 2150*404b540aSrobert 2151*404b540aSrobert /* The load-and-update commands allow pre-modification in addresses. 2152*404b540aSrobert The index has to be in a register. */ 2153*404b540aSrobert #define HAVE_PRE_MODIFY_REG 1 2154*404b540aSrobert 2155*404b540aSrobert 2156*404b540aSrobert /* We define extra CC modes in frv-modes.def so we need a selector. */ 2157*404b540aSrobert 2158*404b540aSrobert #define SELECT_CC_MODE frv_select_cc_mode 2159*404b540aSrobert 2160*404b540aSrobert /* A C expression whose value is one if it is always safe to reverse a 2161*404b540aSrobert comparison whose mode is MODE. If `SELECT_CC_MODE' can ever return MODE for 2162*404b540aSrobert a floating-point inequality comparison, then `REVERSIBLE_CC_MODE (MODE)' 2163*404b540aSrobert must be zero. 2164*404b540aSrobert 2165*404b540aSrobert You need not define this macro if it would always returns zero or if the 2166*404b540aSrobert floating-point format is anything other than `IEEE_FLOAT_FORMAT'. For 2167*404b540aSrobert example, here is the definition used on the SPARC, where floating-point 2168*404b540aSrobert inequality comparisons are always given `CCFPEmode': 2169*404b540aSrobert 2170*404b540aSrobert #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) */ 2171*404b540aSrobert 2172*404b540aSrobert /* On frv, don't consider floating point comparisons to be reversible. In 2173*404b540aSrobert theory, fp equality comparisons can be reversible. */ 2174*404b540aSrobert #define REVERSIBLE_CC_MODE(MODE) \ 2175*404b540aSrobert ((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode) 2176*404b540aSrobert 2177*404b540aSrobert /* Frv CCR_MODE's are not reversible. */ 2178*404b540aSrobert #define REVERSE_CONDEXEC_PREDICATES_P(x,y) 0 2179*404b540aSrobert 2180*404b540aSrobert 2181*404b540aSrobert /* Describing Relative Costs of Operations. */ 2182*404b540aSrobert 2183*404b540aSrobert /* A C expression for the cost of moving data from a register in class FROM to 2184*404b540aSrobert one in class TO. The classes are expressed using the enumeration values 2185*404b540aSrobert such as `GENERAL_REGS'. A value of 4 is the default; other values are 2186*404b540aSrobert interpreted relative to that. 2187*404b540aSrobert 2188*404b540aSrobert It is not required that the cost always equal 2 when FROM is the same as TO; 2189*404b540aSrobert on some machines it is expensive to move between registers if they are not 2190*404b540aSrobert general registers. 2191*404b540aSrobert 2192*404b540aSrobert If reload sees an insn consisting of a single `set' between two hard 2193*404b540aSrobert registers, and if `REGISTER_MOVE_COST' applied to their classes returns a 2194*404b540aSrobert value of 2, reload does not check to ensure that the constraints of the insn 2195*404b540aSrobert are met. Setting a cost of other than 2 will allow reload to verify that 2196*404b540aSrobert the constraints are met. You should do this if the `movM' pattern's 2197*404b540aSrobert constraints do not allow such copying. */ 2198*404b540aSrobert #define REGISTER_MOVE_COST(MODE, FROM, TO) frv_register_move_cost (FROM, TO) 2199*404b540aSrobert 2200*404b540aSrobert /* A C expression for the cost of moving data of mode M between a register and 2201*404b540aSrobert memory. A value of 2 is the default; this cost is relative to those in 2202*404b540aSrobert `REGISTER_MOVE_COST'. 2203*404b540aSrobert 2204*404b540aSrobert If moving between registers and memory is more expensive than between two 2205*404b540aSrobert registers, you should define this macro to express the relative cost. */ 2206*404b540aSrobert #define MEMORY_MOVE_COST(M,C,I) 4 2207*404b540aSrobert 2208*404b540aSrobert /* A C expression for the cost of a branch instruction. A value of 1 is the 2209*404b540aSrobert default; other values are interpreted relative to that. */ 2210*404b540aSrobert #define BRANCH_COST frv_branch_cost_int 2211*404b540aSrobert 2212*404b540aSrobert /* Define this macro as a C expression which is nonzero if accessing less than 2213*404b540aSrobert a word of memory (i.e. a `char' or a `short') is no faster than accessing a 2214*404b540aSrobert word of memory, i.e., if such access require more than one instruction or if 2215*404b540aSrobert there is no difference in cost between byte and (aligned) word loads. 2216*404b540aSrobert 2217*404b540aSrobert When this macro is not defined, the compiler will access a field by finding 2218*404b540aSrobert the smallest containing object; when it is defined, a fullword load will be 2219*404b540aSrobert used if alignment permits. Unless bytes accesses are faster than word 2220*404b540aSrobert accesses, using word accesses is preferable since it may eliminate 2221*404b540aSrobert subsequent memory access if subsequent accesses occur to other fields in the 2222*404b540aSrobert same word of the structure, but to different bytes. */ 2223*404b540aSrobert #define SLOW_BYTE_ACCESS 1 2224*404b540aSrobert 2225*404b540aSrobert /* Define this macro if it is as good or better to call a constant function 2226*404b540aSrobert address than to call an address kept in a register. */ 2227*404b540aSrobert #define NO_FUNCTION_CSE 2228*404b540aSrobert 2229*404b540aSrobert 2230*404b540aSrobert /* Dividing the output into sections. */ 2231*404b540aSrobert 2232*404b540aSrobert /* A C expression whose value is a string containing the assembler operation 2233*404b540aSrobert that should precede instructions and read-only data. Normally `".text"' is 2234*404b540aSrobert right. */ 2235*404b540aSrobert #define TEXT_SECTION_ASM_OP "\t.text" 2236*404b540aSrobert 2237*404b540aSrobert /* A C expression whose value is a string containing the assembler operation to 2238*404b540aSrobert identify the following data as writable initialized data. Normally 2239*404b540aSrobert `".data"' is right. */ 2240*404b540aSrobert #define DATA_SECTION_ASM_OP "\t.data" 2241*404b540aSrobert 2242*404b540aSrobert /* If defined, a C expression whose value is a string containing the 2243*404b540aSrobert assembler operation to identify the following data as 2244*404b540aSrobert uninitialized global data. If not defined, and neither 2245*404b540aSrobert `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined, 2246*404b540aSrobert uninitialized global data will be output in the data section if 2247*404b540aSrobert `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be 2248*404b540aSrobert used. */ 2249*404b540aSrobert #define BSS_SECTION_ASM_OP "\t.section .bss,\"aw\"" 2250*404b540aSrobert 2251*404b540aSrobert /* Short Data Support */ 2252*404b540aSrobert #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\"" 2253*404b540aSrobert 2254*404b540aSrobert /* On svr4, we *do* have support for the .init and .fini sections, and we 2255*404b540aSrobert can put stuff in there to be executed before and after `main'. We let 2256*404b540aSrobert crtstuff.c and other files know this by defining the following symbols. 2257*404b540aSrobert The definitions say how to change sections to the .init and .fini 2258*404b540aSrobert sections. This is the same for all known svr4 assemblers. 2259*404b540aSrobert 2260*404b540aSrobert The standard System V.4 macros will work, but they look ugly in the 2261*404b540aSrobert assembly output, so redefine them. */ 2262*404b540aSrobert 2263*404b540aSrobert #undef INIT_SECTION_ASM_OP 2264*404b540aSrobert #undef FINI_SECTION_ASM_OP 2265*404b540aSrobert #define INIT_SECTION_ASM_OP "\t.section .init,\"ax\"" 2266*404b540aSrobert #define FINI_SECTION_ASM_OP "\t.section .fini,\"ax\"" 2267*404b540aSrobert 2268*404b540aSrobert #undef CTORS_SECTION_ASM_OP 2269*404b540aSrobert #undef DTORS_SECTION_ASM_OP 2270*404b540aSrobert #define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"a\"" 2271*404b540aSrobert #define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"a\"" 2272*404b540aSrobert 2273*404b540aSrobert /* A C expression whose value is a string containing the assembler operation to 2274*404b540aSrobert switch to the fixup section that records all initialized pointers in a -fpic 2275*404b540aSrobert program so they can be changed program startup time if the program is loaded 2276*404b540aSrobert at a different address than linked for. */ 2277*404b540aSrobert #define FIXUP_SECTION_ASM_OP "\t.section .rofixup,\"a\"" 2278*404b540aSrobert 2279*404b540aSrobert /* Position Independent Code. */ 2280*404b540aSrobert 2281*404b540aSrobert /* A C expression that is nonzero if X is a legitimate immediate operand on the 2282*404b540aSrobert target machine when generating position independent code. You can assume 2283*404b540aSrobert that X satisfies `CONSTANT_P', so you need not check this. You can also 2284*404b540aSrobert assume FLAG_PIC is true, so you need not check it either. You need not 2285*404b540aSrobert define this macro if all constants (including `SYMBOL_REF') can be immediate 2286*404b540aSrobert operands when generating position independent code. */ 2287*404b540aSrobert #define LEGITIMATE_PIC_OPERAND_P(X) \ 2288*404b540aSrobert ( GET_CODE (X) == CONST_INT \ 2289*404b540aSrobert || GET_CODE (X) == CONST_DOUBLE \ 2290*404b540aSrobert || (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \ 2291*404b540aSrobert || got12_operand (X, VOIDmode)) \ 2292*404b540aSrobert 2293*404b540aSrobert 2294*404b540aSrobert /* The Overall Framework of an Assembler File. */ 2295*404b540aSrobert 2296*404b540aSrobert /* A C string constant describing how to begin a comment in the target 2297*404b540aSrobert assembler language. The compiler assumes that the comment will end at the 2298*404b540aSrobert end of the line. */ 2299*404b540aSrobert #define ASM_COMMENT_START ";" 2300*404b540aSrobert 2301*404b540aSrobert /* A C string constant for text to be output before each `asm' statement or 2302*404b540aSrobert group of consecutive ones. Normally this is `"#APP"', which is a comment 2303*404b540aSrobert that has no effect on most assemblers but tells the GNU assembler that it 2304*404b540aSrobert must check the lines that follow for all valid assembler constructs. */ 2305*404b540aSrobert #define ASM_APP_ON "#APP\n" 2306*404b540aSrobert 2307*404b540aSrobert /* A C string constant for text to be output after each `asm' statement or 2308*404b540aSrobert group of consecutive ones. Normally this is `"#NO_APP"', which tells the 2309*404b540aSrobert GNU assembler to resume making the time-saving assumptions that are valid 2310*404b540aSrobert for ordinary compiler output. */ 2311*404b540aSrobert #define ASM_APP_OFF "#NO_APP\n" 2312*404b540aSrobert 2313*404b540aSrobert 2314*404b540aSrobert /* Output of Data. */ 2315*404b540aSrobert 2316*404b540aSrobert /* This is how to output a label to dwarf/dwarf2. */ 2317*404b540aSrobert #define ASM_OUTPUT_DWARF_ADDR(STREAM, LABEL) \ 2318*404b540aSrobert do { \ 2319*404b540aSrobert fprintf (STREAM, "\t.picptr\t"); \ 2320*404b540aSrobert assemble_name (STREAM, LABEL); \ 2321*404b540aSrobert } while (0) 2322*404b540aSrobert 2323*404b540aSrobert /* Whether to emit the gas specific dwarf2 line number support. */ 2324*404b540aSrobert #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC) 2325*404b540aSrobert 2326*404b540aSrobert /* Output of Uninitialized Variables. */ 2327*404b540aSrobert 2328*404b540aSrobert /* A C statement (sans semicolon) to output to the stdio stream STREAM the 2329*404b540aSrobert assembler definition of a local-common-label named NAME whose size is SIZE 2330*404b540aSrobert bytes. The variable ROUNDED is the size rounded up to whatever alignment 2331*404b540aSrobert the caller wants. 2332*404b540aSrobert 2333*404b540aSrobert Use the expression `assemble_name (STREAM, NAME)' to output the name itself; 2334*404b540aSrobert before and after that, output the additional assembler syntax for defining 2335*404b540aSrobert the name, and a newline. 2336*404b540aSrobert 2337*404b540aSrobert This macro controls how the assembler definitions of uninitialized static 2338*404b540aSrobert variables are output. */ 2339*404b540aSrobert #undef ASM_OUTPUT_LOCAL 2340*404b540aSrobert 2341*404b540aSrobert /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a separate, 2342*404b540aSrobert explicit argument. If you define this macro, it is used in place of 2343*404b540aSrobert `ASM_OUTPUT_LOCAL', and gives you more flexibility in handling the required 2344*404b540aSrobert alignment of the variable. The alignment is specified as the number of 2345*404b540aSrobert bits. 2346*404b540aSrobert 2347*404b540aSrobert Defined in svr4.h. */ 2348*404b540aSrobert #undef ASM_OUTPUT_ALIGNED_LOCAL 2349*404b540aSrobert 2350*404b540aSrobert /* This is for final.c, because it is used by ASM_DECLARE_OBJECT_NAME. */ 2351*404b540aSrobert extern int size_directive_output; 2352*404b540aSrobert 2353*404b540aSrobert /* Like `ASM_OUTPUT_ALIGNED_LOCAL' except that it takes an additional 2354*404b540aSrobert parameter - the DECL of variable to be output, if there is one. 2355*404b540aSrobert This macro can be called with DECL == NULL_TREE. If you define 2356*404b540aSrobert this macro, it is used in place of `ASM_OUTPUT_LOCAL' and 2357*404b540aSrobert `ASM_OUTPUT_ALIGNED_LOCAL', and gives you more flexibility in 2358*404b540aSrobert handling the destination of the variable. */ 2359*404b540aSrobert #undef ASM_OUTPUT_ALIGNED_DECL_LOCAL 2360*404b540aSrobert #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ 2361*404b540aSrobert do { \ 2362*404b540aSrobert if ((SIZE) > 0 && (SIZE) <= g_switch_value) \ 2363*404b540aSrobert switch_to_section (get_named_section (NULL, ".sbss", 0)); \ 2364*404b540aSrobert else \ 2365*404b540aSrobert switch_to_section (bss_section); \ 2366*404b540aSrobert ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \ 2367*404b540aSrobert ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \ 2368*404b540aSrobert ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \ 2369*404b540aSrobert } while (0) 2370*404b540aSrobert 2371*404b540aSrobert 2372*404b540aSrobert /* Output and Generation of Labels. */ 2373*404b540aSrobert 2374*404b540aSrobert /* A C statement (sans semicolon) to output to the stdio stream STREAM the 2375*404b540aSrobert assembler definition of a label named NAME. Use the expression 2376*404b540aSrobert `assemble_name (STREAM, NAME)' to output the name itself; before and after 2377*404b540aSrobert that, output the additional assembler syntax for defining the name, and a 2378*404b540aSrobert newline. */ 2379*404b540aSrobert #define ASM_OUTPUT_LABEL(STREAM, NAME) \ 2380*404b540aSrobert do { \ 2381*404b540aSrobert assemble_name (STREAM, NAME); \ 2382*404b540aSrobert fputs (":\n", STREAM); \ 2383*404b540aSrobert } while (0) 2384*404b540aSrobert 2385*404b540aSrobert /* Globalizing directive for a label. */ 2386*404b540aSrobert #define GLOBAL_ASM_OP "\t.globl " 2387*404b540aSrobert 2388*404b540aSrobert /* A C statement to store into the string STRING a label whose name is made 2389*404b540aSrobert from the string PREFIX and the number NUM. 2390*404b540aSrobert 2391*404b540aSrobert This string, when output subsequently by `assemble_name', should produce the 2392*404b540aSrobert output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX 2393*404b540aSrobert and NUM. 2394*404b540aSrobert 2395*404b540aSrobert If the string begins with `*', then `assemble_name' will output the rest of 2396*404b540aSrobert the string unchanged. It is often convenient for 2397*404b540aSrobert `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way. If the string doesn't 2398*404b540aSrobert start with `*', then `ASM_OUTPUT_LABELREF' gets to output the string, and 2399*404b540aSrobert may change it. (Of course, `ASM_OUTPUT_LABELREF' is also part of your 2400*404b540aSrobert machine description, so you should know what it does on your machine.) 2401*404b540aSrobert 2402*404b540aSrobert Defined in svr4.h. */ 2403*404b540aSrobert #undef ASM_GENERATE_INTERNAL_LABEL 2404*404b540aSrobert #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ 2405*404b540aSrobert do { \ 2406*404b540aSrobert sprintf (LABEL, "*.%s%ld", PREFIX, (long)NUM); \ 2407*404b540aSrobert } while (0) 2408*404b540aSrobert 2409*404b540aSrobert 2410*404b540aSrobert /* Macros Controlling Initialization Routines. */ 2411*404b540aSrobert 2412*404b540aSrobert /* If defined, a C string constant for the assembler operation to identify the 2413*404b540aSrobert following data as initialization code. If not defined, GCC will assume 2414*404b540aSrobert such a section does not exist. When you are using special sections for 2415*404b540aSrobert initialization and termination functions, this macro also controls how 2416*404b540aSrobert `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions. 2417*404b540aSrobert 2418*404b540aSrobert Defined in svr4.h. */ 2419*404b540aSrobert #undef INIT_SECTION_ASM_OP 2420*404b540aSrobert 2421*404b540aSrobert /* If defined, `main' will call `__main' despite the presence of 2422*404b540aSrobert `INIT_SECTION_ASM_OP'. This macro should be defined for systems where the 2423*404b540aSrobert init section is not actually run automatically, but is still useful for 2424*404b540aSrobert collecting the lists of constructors and destructors. */ 2425*404b540aSrobert #define INVOKE__main 2426*404b540aSrobert 2427*404b540aSrobert /* Output of Assembler Instructions. */ 2428*404b540aSrobert 2429*404b540aSrobert /* A C initializer containing the assembler's names for the machine registers, 2430*404b540aSrobert each one as a C string constant. This is what translates register numbers 2431*404b540aSrobert in the compiler into assembler language. */ 2432*404b540aSrobert #define REGISTER_NAMES \ 2433*404b540aSrobert { \ 2434*404b540aSrobert "gr0", "sp", "fp", "gr3", "gr4", "gr5", "gr6", "gr7", \ 2435*404b540aSrobert "gr8", "gr9", "gr10", "gr11", "gr12", "gr13", "gr14", "gr15", \ 2436*404b540aSrobert "gr16", "gr17", "gr18", "gr19", "gr20", "gr21", "gr22", "gr23", \ 2437*404b540aSrobert "gr24", "gr25", "gr26", "gr27", "gr28", "gr29", "gr30", "gr31", \ 2438*404b540aSrobert "gr32", "gr33", "gr34", "gr35", "gr36", "gr37", "gr38", "gr39", \ 2439*404b540aSrobert "gr40", "gr41", "gr42", "gr43", "gr44", "gr45", "gr46", "gr47", \ 2440*404b540aSrobert "gr48", "gr49", "gr50", "gr51", "gr52", "gr53", "gr54", "gr55", \ 2441*404b540aSrobert "gr56", "gr57", "gr58", "gr59", "gr60", "gr61", "gr62", "gr63", \ 2442*404b540aSrobert \ 2443*404b540aSrobert "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \ 2444*404b540aSrobert "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \ 2445*404b540aSrobert "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \ 2446*404b540aSrobert "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31", \ 2447*404b540aSrobert "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39", \ 2448*404b540aSrobert "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47", \ 2449*404b540aSrobert "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55", \ 2450*404b540aSrobert "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63", \ 2451*404b540aSrobert \ 2452*404b540aSrobert "fcc0", "fcc1", "fcc2", "fcc3", "icc0", "icc1", "icc2", "icc3", \ 2453*404b540aSrobert "cc0", "cc1", "cc2", "cc3", "cc4", "cc5", "cc6", "cc7", \ 2454*404b540aSrobert "acc0", "acc1", "acc2", "acc3", "acc4", "acc5", "acc6", "acc7", \ 2455*404b540aSrobert "acc8", "acc9", "acc10", "acc11", \ 2456*404b540aSrobert "accg0","accg1","accg2","accg3","accg4","accg5","accg6","accg7", \ 2457*404b540aSrobert "accg8", "accg9", "accg10", "accg11", \ 2458*404b540aSrobert "ap", "lr", "lcr", "iacc0h", "iacc0l" \ 2459*404b540aSrobert } 2460*404b540aSrobert 2461*404b540aSrobert /* Define this macro if you are using an unusual assembler that 2462*404b540aSrobert requires different names for the machine instructions. 2463*404b540aSrobert 2464*404b540aSrobert The definition is a C statement or statements which output an 2465*404b540aSrobert assembler instruction opcode to the stdio stream STREAM. The 2466*404b540aSrobert macro-operand PTR is a variable of type `char *' which points to 2467*404b540aSrobert the opcode name in its "internal" form--the form that is written 2468*404b540aSrobert in the machine description. The definition should output the 2469*404b540aSrobert opcode name to STREAM, performing any translation you desire, and 2470*404b540aSrobert increment the variable PTR to point at the end of the opcode so 2471*404b540aSrobert that it will not be output twice. 2472*404b540aSrobert 2473*404b540aSrobert In fact, your macro definition may process less than the entire 2474*404b540aSrobert opcode name, or more than the opcode name; but if you want to 2475*404b540aSrobert process text that includes `%'-sequences to substitute operands, 2476*404b540aSrobert you must take care of the substitution yourself. Just be sure to 2477*404b540aSrobert increment PTR over whatever text should not be output normally. 2478*404b540aSrobert 2479*404b540aSrobert If you need to look at the operand values, they can be found as the 2480*404b540aSrobert elements of `recog_operand'. 2481*404b540aSrobert 2482*404b540aSrobert If the macro definition does nothing, the instruction is output in 2483*404b540aSrobert the usual way. */ 2484*404b540aSrobert 2485*404b540aSrobert #define ASM_OUTPUT_OPCODE(STREAM, PTR)\ 2486*404b540aSrobert (PTR) = frv_asm_output_opcode (STREAM, PTR) 2487*404b540aSrobert 2488*404b540aSrobert /* If defined, a C statement to be executed just prior to the output 2489*404b540aSrobert of assembler code for INSN, to modify the extracted operands so 2490*404b540aSrobert they will be output differently. 2491*404b540aSrobert 2492*404b540aSrobert Here the argument OPVEC is the vector containing the operands 2493*404b540aSrobert extracted from INSN, and NOPERANDS is the number of elements of 2494*404b540aSrobert the vector which contain meaningful data for this insn. The 2495*404b540aSrobert contents of this vector are what will be used to convert the insn 2496*404b540aSrobert template into assembler code, so you can change the assembler 2497*404b540aSrobert output by changing the contents of the vector. 2498*404b540aSrobert 2499*404b540aSrobert This macro is useful when various assembler syntaxes share a single 2500*404b540aSrobert file of instruction patterns; by defining this macro differently, 2501*404b540aSrobert you can cause a large class of instructions to be output 2502*404b540aSrobert differently (such as with rearranged operands). Naturally, 2503*404b540aSrobert variations in assembler syntax affecting individual insn patterns 2504*404b540aSrobert ought to be handled by writing conditional output routines in 2505*404b540aSrobert those patterns. 2506*404b540aSrobert 2507*404b540aSrobert If this macro is not defined, it is equivalent to a null statement. */ 2508*404b540aSrobert 2509*404b540aSrobert #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)\ 2510*404b540aSrobert frv_final_prescan_insn (INSN, OPVEC, NOPERANDS) 2511*404b540aSrobert 2512*404b540aSrobert 2513*404b540aSrobert /* A C compound statement to output to stdio stream STREAM the assembler syntax 2514*404b540aSrobert for an instruction operand X. X is an RTL expression. 2515*404b540aSrobert 2516*404b540aSrobert CODE is a value that can be used to specify one of several ways of printing 2517*404b540aSrobert the operand. It is used when identical operands must be printed differently 2518*404b540aSrobert depending on the context. CODE comes from the `%' specification that was 2519*404b540aSrobert used to request printing of the operand. If the specification was just 2520*404b540aSrobert `%DIGIT' then CODE is 0; if the specification was `%LTR DIGIT' then CODE is 2521*404b540aSrobert the ASCII code for LTR. 2522*404b540aSrobert 2523*404b540aSrobert If X is a register, this macro should print the register's name. The names 2524*404b540aSrobert can be found in an array `reg_names' whose type is `char *[]'. `reg_names' 2525*404b540aSrobert is initialized from `REGISTER_NAMES'. 2526*404b540aSrobert 2527*404b540aSrobert When the machine description has a specification `%PUNCT' (a `%' followed by 2528*404b540aSrobert a punctuation character), this macro is called with a null pointer for X and 2529*404b540aSrobert the punctuation character for CODE. */ 2530*404b540aSrobert #define PRINT_OPERAND(STREAM, X, CODE) frv_print_operand (STREAM, X, CODE) 2531*404b540aSrobert 2532*404b540aSrobert /* A C expression which evaluates to true if CODE is a valid punctuation 2533*404b540aSrobert character for use in the `PRINT_OPERAND' macro. If 2534*404b540aSrobert `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no punctuation 2535*404b540aSrobert characters (except for the standard one, `%') are used in this way. */ 2536*404b540aSrobert /* . == gr0 2537*404b540aSrobert # == hint operand -- always zero for now 2538*404b540aSrobert @ == small data base register (gr16) 2539*404b540aSrobert ~ == pic register (gr17) 2540*404b540aSrobert * == temporary integer CCR register (cr3) 2541*404b540aSrobert & == temporary integer ICC register (icc3) */ 2542*404b540aSrobert #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2543*404b540aSrobert ((CODE) == '.' || (CODE) == '#' || (CODE) == '@' || (CODE) == '~' \ 2544*404b540aSrobert || (CODE) == '*' || (CODE) == '&') 2545*404b540aSrobert 2546*404b540aSrobert /* A C compound statement to output to stdio stream STREAM the assembler syntax 2547*404b540aSrobert for an instruction operand that is a memory reference whose address is X. X 2548*404b540aSrobert is an RTL expression. 2549*404b540aSrobert 2550*404b540aSrobert On some machines, the syntax for a symbolic address depends on the section 2551*404b540aSrobert that the address refers to. On these machines, define the macro 2552*404b540aSrobert `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and 2553*404b540aSrobert then check for it here. 2554*404b540aSrobert 2555*404b540aSrobert This declaration must be present. */ 2556*404b540aSrobert #define PRINT_OPERAND_ADDRESS(STREAM, X) frv_print_operand_address (STREAM, X) 2557*404b540aSrobert 2558*404b540aSrobert /* If defined, C string expressions to be used for the `%R', `%L', `%U', and 2559*404b540aSrobert `%I' options of `asm_fprintf' (see `final.c'). These are useful when a 2560*404b540aSrobert single `md' file must support multiple assembler formats. In that case, the 2561*404b540aSrobert various `tm.h' files can define these macros differently. 2562*404b540aSrobert 2563*404b540aSrobert USER_LABEL_PREFIX is defined in svr4.h. */ 2564*404b540aSrobert #undef USER_LABEL_PREFIX 2565*404b540aSrobert #define USER_LABEL_PREFIX "" 2566*404b540aSrobert #define REGISTER_PREFIX "" 2567*404b540aSrobert #define LOCAL_LABEL_PREFIX "." 2568*404b540aSrobert #define IMMEDIATE_PREFIX "#" 2569*404b540aSrobert 2570*404b540aSrobert 2571*404b540aSrobert /* Output of dispatch tables. */ 2572*404b540aSrobert 2573*404b540aSrobert /* This macro should be provided on machines where the addresses in a dispatch 2574*404b540aSrobert table are relative to the table's own address. 2575*404b540aSrobert 2576*404b540aSrobert The definition should be a C statement to output to the stdio stream STREAM 2577*404b540aSrobert an assembler pseudo-instruction to generate a difference between two labels. 2578*404b540aSrobert VALUE and REL are the numbers of two internal labels. The definitions of 2579*404b540aSrobert these labels are output using `(*targetm.asm_out.internal_label)', and they must be 2580*404b540aSrobert printed in the same way here. For example, 2581*404b540aSrobert 2582*404b540aSrobert fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */ 2583*404b540aSrobert #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ 2584*404b540aSrobert fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL) 2585*404b540aSrobert 2586*404b540aSrobert /* This macro should be provided on machines where the addresses in a dispatch 2587*404b540aSrobert table are absolute. 2588*404b540aSrobert 2589*404b540aSrobert The definition should be a C statement to output to the stdio stream STREAM 2590*404b540aSrobert an assembler pseudo-instruction to generate a reference to a label. VALUE 2591*404b540aSrobert is the number of an internal label whose definition is output using 2592*404b540aSrobert `(*targetm.asm_out.internal_label)'. For example, 2593*404b540aSrobert 2594*404b540aSrobert fprintf (STREAM, "\t.word L%d\n", VALUE) */ 2595*404b540aSrobert #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ 2596*404b540aSrobert fprintf (STREAM, "\t.word .L%d\n", VALUE) 2597*404b540aSrobert 2598*404b540aSrobert /* Define this if the label before a jump-table needs to be output specially. 2599*404b540aSrobert The first three arguments are the same as for `(*targetm.asm_out.internal_label)'; 2600*404b540aSrobert the fourth argument is the jump-table which follows (a `jump_insn' 2601*404b540aSrobert containing an `addr_vec' or `addr_diff_vec'). 2602*404b540aSrobert 2603*404b540aSrobert This feature is used on system V to output a `swbeg' statement for the 2604*404b540aSrobert table. 2605*404b540aSrobert 2606*404b540aSrobert If this macro is not defined, these labels are output with 2607*404b540aSrobert `(*targetm.asm_out.internal_label)'. 2608*404b540aSrobert 2609*404b540aSrobert Defined in svr4.h. */ 2610*404b540aSrobert /* When generating embedded PIC or mips16 code we want to put the jump 2611*404b540aSrobert table in the .text section. In all other cases, we want to put the 2612*404b540aSrobert jump table in the .rdata section. Unfortunately, we can't use 2613*404b540aSrobert JUMP_TABLES_IN_TEXT_SECTION, because it is not conditional. 2614*404b540aSrobert Instead, we use ASM_OUTPUT_CASE_LABEL to switch back to the .text 2615*404b540aSrobert section if appropriate. */ 2616*404b540aSrobert 2617*404b540aSrobert #undef ASM_OUTPUT_CASE_LABEL 2618*404b540aSrobert #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \ 2619*404b540aSrobert do { \ 2620*404b540aSrobert if (flag_pic) \ 2621*404b540aSrobert switch_to_section (function_section (current_function_decl)); \ 2622*404b540aSrobert (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM); \ 2623*404b540aSrobert } while (0) 2624*404b540aSrobert 2625*404b540aSrobert 2626*404b540aSrobert /* Assembler Commands for Exception Regions. */ 2627*404b540aSrobert 2628*404b540aSrobert /* Define this macro to 0 if your target supports DWARF 2 frame unwind 2629*404b540aSrobert information, but it does not yet work with exception handling. Otherwise, 2630*404b540aSrobert if your target supports this information (if it defines 2631*404b540aSrobert `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or 2632*404b540aSrobert `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1. 2633*404b540aSrobert 2634*404b540aSrobert If this macro is defined to 1, the DWARF 2 unwinder will be the default 2635*404b540aSrobert exception handling mechanism; otherwise, setjmp/longjmp will be used by 2636*404b540aSrobert default. 2637*404b540aSrobert 2638*404b540aSrobert If this macro is defined to anything, the DWARF 2 unwinder will be used 2639*404b540aSrobert instead of inline unwinders and __unwind_function in the non-setjmp case. */ 2640*404b540aSrobert #define DWARF2_UNWIND_INFO 1 2641*404b540aSrobert 2642*404b540aSrobert #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO) 2643*404b540aSrobert 2644*404b540aSrobert /* Assembler Commands for Alignment. */ 2645*404b540aSrobert 2646*404b540aSrobert /* A C statement to output to the stdio stream STREAM an assembler instruction 2647*404b540aSrobert to advance the location counter by NBYTES bytes. Those bytes should be zero 2648*404b540aSrobert when loaded. NBYTES will be a C expression of type `int'. 2649*404b540aSrobert 2650*404b540aSrobert Defined in svr4.h. */ 2651*404b540aSrobert #undef ASM_OUTPUT_SKIP 2652*404b540aSrobert #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \ 2653*404b540aSrobert fprintf (STREAM, "\t.zero\t%u\n", (int)(NBYTES)) 2654*404b540aSrobert 2655*404b540aSrobert /* A C statement to output to the stdio stream STREAM an assembler command to 2656*404b540aSrobert advance the location counter to a multiple of 2 to the POWER bytes. POWER 2657*404b540aSrobert will be a C expression of type `int'. */ 2658*404b540aSrobert #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ 2659*404b540aSrobert fprintf ((STREAM), "\t.p2align %d\n", (POWER)) 2660*404b540aSrobert 2661*404b540aSrobert /* Inside the text section, align with unpacked nops rather than zeros. */ 2662*404b540aSrobert #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \ 2663*404b540aSrobert fprintf ((STREAM), "\t.p2alignl %d,0x80880000\n", (POWER)) 2664*404b540aSrobert 2665*404b540aSrobert /* Macros Affecting all Debug Formats. */ 2666*404b540aSrobert 2667*404b540aSrobert /* A C expression that returns the DBX register number for the compiler 2668*404b540aSrobert register number REGNO. In simple cases, the value of this expression may be 2669*404b540aSrobert REGNO itself. But sometimes there are some registers that the compiler 2670*404b540aSrobert knows about and DBX does not, or vice versa. In such cases, some register 2671*404b540aSrobert may need to have one number in the compiler and another for DBX. 2672*404b540aSrobert 2673*404b540aSrobert If two registers have consecutive numbers inside GCC, and they can be 2674*404b540aSrobert used as a pair to hold a multiword value, then they *must* have consecutive 2675*404b540aSrobert numbers after renumbering with `DBX_REGISTER_NUMBER'. Otherwise, debuggers 2676*404b540aSrobert will be unable to access such a pair, because they expect register pairs to 2677*404b540aSrobert be consecutive in their own numbering scheme. 2678*404b540aSrobert 2679*404b540aSrobert If you find yourself defining `DBX_REGISTER_NUMBER' in way that does not 2680*404b540aSrobert preserve register pairs, then what you must do instead is redefine the 2681*404b540aSrobert actual register numbering scheme. 2682*404b540aSrobert 2683*404b540aSrobert This declaration is required. */ 2684*404b540aSrobert #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 2685*404b540aSrobert 2686*404b540aSrobert /* A C expression that returns the type of debugging output GCC produces 2687*404b540aSrobert when the user specifies `-g' or `-ggdb'. Define this if you have arranged 2688*404b540aSrobert for GCC to support more than one format of debugging output. Currently, 2689*404b540aSrobert the allowable values are `DBX_DEBUG', `SDB_DEBUG', `DWARF_DEBUG', 2690*404b540aSrobert `DWARF2_DEBUG', and `XCOFF_DEBUG'. 2691*404b540aSrobert 2692*404b540aSrobert The value of this macro only affects the default debugging output; the user 2693*404b540aSrobert can always get a specific type of output by using `-gstabs', `-gcoff', 2694*404b540aSrobert `-gdwarf-1', `-gdwarf-2', or `-gxcoff'. 2695*404b540aSrobert 2696*404b540aSrobert Defined in svr4.h. */ 2697*404b540aSrobert #undef PREFERRED_DEBUGGING_TYPE 2698*404b540aSrobert #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 2699*404b540aSrobert 2700*404b540aSrobert /* Miscellaneous Parameters. */ 2701*404b540aSrobert 2702*404b540aSrobert /* An alias for a machine mode name. This is the machine mode that elements of 2703*404b540aSrobert a jump-table should have. */ 2704*404b540aSrobert #define CASE_VECTOR_MODE SImode 2705*404b540aSrobert 2706*404b540aSrobert /* Define this macro if operations between registers with integral mode smaller 2707*404b540aSrobert than a word are always performed on the entire register. Most RISC machines 2708*404b540aSrobert have this property and most CISC machines do not. */ 2709*404b540aSrobert #define WORD_REGISTER_OPERATIONS 2710*404b540aSrobert 2711*404b540aSrobert /* Define this macro to be a C expression indicating when insns that read 2712*404b540aSrobert memory in MODE, an integral mode narrower than a word, set the bits outside 2713*404b540aSrobert of MODE to be either the sign-extension or the zero-extension of the data 2714*404b540aSrobert read. Return `SIGN_EXTEND' for values of MODE for which the insn 2715*404b540aSrobert sign-extends, `ZERO_EXTEND' for which it zero-extends, and `UNKNOWN' for other 2716*404b540aSrobert modes. 2717*404b540aSrobert 2718*404b540aSrobert This macro is not called with MODE non-integral or with a width greater than 2719*404b540aSrobert or equal to `BITS_PER_WORD', so you may return any value in this case. Do 2720*404b540aSrobert not define this macro if it would always return `UNKNOWN'. On machines where 2721*404b540aSrobert this macro is defined, you will normally define it as the constant 2722*404b540aSrobert `SIGN_EXTEND' or `ZERO_EXTEND'. */ 2723*404b540aSrobert #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND 2724*404b540aSrobert 2725*404b540aSrobert /* Define if loading short immediate values into registers sign extends. */ 2726*404b540aSrobert #define SHORT_IMMEDIATES_SIGN_EXTEND 2727*404b540aSrobert 2728*404b540aSrobert /* The maximum number of bytes that a single instruction can move quickly from 2729*404b540aSrobert memory to memory. */ 2730*404b540aSrobert #define MOVE_MAX 8 2731*404b540aSrobert 2732*404b540aSrobert /* A C expression which is nonzero if on this machine it is safe to "convert" 2733*404b540aSrobert an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller 2734*404b540aSrobert than INPREC) by merely operating on it as if it had only OUTPREC bits. 2735*404b540aSrobert 2736*404b540aSrobert On many machines, this expression can be 1. 2737*404b540aSrobert 2738*404b540aSrobert When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for 2739*404b540aSrobert which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the 2740*404b540aSrobert case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve 2741*404b540aSrobert things. */ 2742*404b540aSrobert #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 2743*404b540aSrobert 2744*404b540aSrobert /* An alias for the machine mode for pointers. On most machines, define this 2745*404b540aSrobert to be the integer mode corresponding to the width of a hardware pointer; 2746*404b540aSrobert `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines 2747*404b540aSrobert you must define this to be one of the partial integer modes, such as 2748*404b540aSrobert `PSImode'. 2749*404b540aSrobert 2750*404b540aSrobert The width of `Pmode' must be at least as large as the value of 2751*404b540aSrobert `POINTER_SIZE'. If it is not equal, you must define the macro 2752*404b540aSrobert `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */ 2753*404b540aSrobert #define Pmode SImode 2754*404b540aSrobert 2755*404b540aSrobert /* An alias for the machine mode used for memory references to functions being 2756*404b540aSrobert called, in `call' RTL expressions. On most machines this should be 2757*404b540aSrobert `QImode'. */ 2758*404b540aSrobert #define FUNCTION_MODE QImode 2759*404b540aSrobert 2760*404b540aSrobert /* Define this macro to handle System V style pragmas: #pragma pack and 2761*404b540aSrobert #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is 2762*404b540aSrobert defined. 2763*404b540aSrobert 2764*404b540aSrobert Defined in svr4.h. */ 2765*404b540aSrobert #define HANDLE_SYSV_PRAGMA 1 2766*404b540aSrobert 2767*404b540aSrobert /* A C expression for the maximum number of instructions to execute via 2768*404b540aSrobert conditional execution instructions instead of a branch. A value of 2769*404b540aSrobert BRANCH_COST+1 is the default if the machine does not use 2770*404b540aSrobert cc0, and 1 if it does use cc0. */ 2771*404b540aSrobert #define MAX_CONDITIONAL_EXECUTE frv_condexec_insns 2772*404b540aSrobert 2773*404b540aSrobert /* A C expression to modify the code described by the conditional if 2774*404b540aSrobert information CE_INFO, possibly updating the tests in TRUE_EXPR, and 2775*404b540aSrobert FALSE_EXPR for converting if-then and if-then-else code to conditional 2776*404b540aSrobert instructions. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if the 2777*404b540aSrobert tests cannot be converted. */ 2778*404b540aSrobert #define IFCVT_MODIFY_TESTS(CE_INFO, TRUE_EXPR, FALSE_EXPR) \ 2779*404b540aSrobert frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR) 2780*404b540aSrobert 2781*404b540aSrobert /* A C expression to modify the code described by the conditional if 2782*404b540aSrobert information CE_INFO, for the basic block BB, possibly updating the tests in 2783*404b540aSrobert TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or 2784*404b540aSrobert if-then-else code to conditional instructions. OLD_TRUE and OLD_FALSE are 2785*404b540aSrobert the previous tests. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if 2786*404b540aSrobert the tests cannot be converted. */ 2787*404b540aSrobert #define IFCVT_MODIFY_MULTIPLE_TESTS(CE_INFO, BB, TRUE_EXPR, FALSE_EXPR) \ 2788*404b540aSrobert frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR) 2789*404b540aSrobert 2790*404b540aSrobert /* A C expression to modify the code described by the conditional if 2791*404b540aSrobert information CE_INFO with the new PATTERN in INSN. If PATTERN is a null 2792*404b540aSrobert pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that 2793*404b540aSrobert insn cannot be converted to be executed conditionally. */ 2794*404b540aSrobert #define IFCVT_MODIFY_INSN(CE_INFO, PATTERN, INSN) \ 2795*404b540aSrobert (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN) 2796*404b540aSrobert 2797*404b540aSrobert /* A C expression to perform any final machine dependent modifications in 2798*404b540aSrobert converting code to conditional execution in the code described by the 2799*404b540aSrobert conditional if information CE_INFO. */ 2800*404b540aSrobert #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO) 2801*404b540aSrobert 2802*404b540aSrobert /* A C expression to cancel any machine dependent modifications in converting 2803*404b540aSrobert code to conditional execution in the code described by the conditional if 2804*404b540aSrobert information CE_INFO. */ 2805*404b540aSrobert #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO) 2806*404b540aSrobert 2807*404b540aSrobert /* Initialize the extra fields provided by IFCVT_EXTRA_FIELDS. */ 2808*404b540aSrobert #define IFCVT_INIT_EXTRA_FIELDS(CE_INFO) frv_ifcvt_init_extra_fields (CE_INFO) 2809*404b540aSrobert 2810*404b540aSrobert /* The definition of the following macro results in that the 2nd jump 2811*404b540aSrobert optimization (after the 2nd insn scheduling) is minimal. It is 2812*404b540aSrobert necessary to define when start cycle marks of insns (TImode is used 2813*404b540aSrobert for this) is used for VLIW insn packing. Some jump optimizations 2814*404b540aSrobert make such marks invalid. These marks are corrected for some 2815*404b540aSrobert (minimal) optimizations. ??? Probably the macro is temporary. 2816*404b540aSrobert Final solution could making the 2nd jump optimizations before the 2817*404b540aSrobert 2nd instruction scheduling or corrections of the marks for all jump 2818*404b540aSrobert optimizations. Although some jump optimizations are actually 2819*404b540aSrobert deoptimizations for VLIW (super-scalar) processors. */ 2820*404b540aSrobert 2821*404b540aSrobert #define MINIMAL_SECOND_JUMP_OPTIMIZATION 2822*404b540aSrobert 2823*404b540aSrobert 2824*404b540aSrobert /* If the following macro is defined and nonzero and deterministic 2825*404b540aSrobert finite state automata are used for pipeline hazard recognition, the 2826*404b540aSrobert code making resource-constrained software pipelining is on. */ 2827*404b540aSrobert #define RCSP_SOFTWARE_PIPELINING 1 2828*404b540aSrobert 2829*404b540aSrobert /* If the following macro is defined and nonzero and deterministic 2830*404b540aSrobert finite state automata are used for pipeline hazard recognition, we 2831*404b540aSrobert will try to exchange insns in queue ready to improve the schedule. 2832*404b540aSrobert The more macro value, the more tries will be made. */ 2833*404b540aSrobert #define FIRST_CYCLE_MULTIPASS_SCHEDULING 1 2834*404b540aSrobert 2835*404b540aSrobert /* The following macro is used only when value of 2836*404b540aSrobert FIRST_CYCLE_MULTIPASS_SCHEDULING is nonzero. The more macro value, 2837*404b540aSrobert the more tries will be made to choose better schedule. If the 2838*404b540aSrobert macro value is zero or negative there will be no multi-pass 2839*404b540aSrobert scheduling. */ 2840*404b540aSrobert #define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead 2841*404b540aSrobert 2842*404b540aSrobert enum frv_builtins 2843*404b540aSrobert { 2844*404b540aSrobert FRV_BUILTIN_MAND, 2845*404b540aSrobert FRV_BUILTIN_MOR, 2846*404b540aSrobert FRV_BUILTIN_MXOR, 2847*404b540aSrobert FRV_BUILTIN_MNOT, 2848*404b540aSrobert FRV_BUILTIN_MAVEH, 2849*404b540aSrobert FRV_BUILTIN_MSATHS, 2850*404b540aSrobert FRV_BUILTIN_MSATHU, 2851*404b540aSrobert FRV_BUILTIN_MADDHSS, 2852*404b540aSrobert FRV_BUILTIN_MADDHUS, 2853*404b540aSrobert FRV_BUILTIN_MSUBHSS, 2854*404b540aSrobert FRV_BUILTIN_MSUBHUS, 2855*404b540aSrobert FRV_BUILTIN_MPACKH, 2856*404b540aSrobert FRV_BUILTIN_MQADDHSS, 2857*404b540aSrobert FRV_BUILTIN_MQADDHUS, 2858*404b540aSrobert FRV_BUILTIN_MQSUBHSS, 2859*404b540aSrobert FRV_BUILTIN_MQSUBHUS, 2860*404b540aSrobert FRV_BUILTIN_MUNPACKH, 2861*404b540aSrobert FRV_BUILTIN_MDPACKH, 2862*404b540aSrobert FRV_BUILTIN_MBTOH, 2863*404b540aSrobert FRV_BUILTIN_MHTOB, 2864*404b540aSrobert FRV_BUILTIN_MCOP1, 2865*404b540aSrobert FRV_BUILTIN_MCOP2, 2866*404b540aSrobert FRV_BUILTIN_MROTLI, 2867*404b540aSrobert FRV_BUILTIN_MROTRI, 2868*404b540aSrobert FRV_BUILTIN_MWCUT, 2869*404b540aSrobert FRV_BUILTIN_MSLLHI, 2870*404b540aSrobert FRV_BUILTIN_MSRLHI, 2871*404b540aSrobert FRV_BUILTIN_MSRAHI, 2872*404b540aSrobert FRV_BUILTIN_MEXPDHW, 2873*404b540aSrobert FRV_BUILTIN_MEXPDHD, 2874*404b540aSrobert FRV_BUILTIN_MMULHS, 2875*404b540aSrobert FRV_BUILTIN_MMULHU, 2876*404b540aSrobert FRV_BUILTIN_MMULXHS, 2877*404b540aSrobert FRV_BUILTIN_MMULXHU, 2878*404b540aSrobert FRV_BUILTIN_MMACHS, 2879*404b540aSrobert FRV_BUILTIN_MMACHU, 2880*404b540aSrobert FRV_BUILTIN_MMRDHS, 2881*404b540aSrobert FRV_BUILTIN_MMRDHU, 2882*404b540aSrobert FRV_BUILTIN_MQMULHS, 2883*404b540aSrobert FRV_BUILTIN_MQMULHU, 2884*404b540aSrobert FRV_BUILTIN_MQMULXHU, 2885*404b540aSrobert FRV_BUILTIN_MQMULXHS, 2886*404b540aSrobert FRV_BUILTIN_MQMACHS, 2887*404b540aSrobert FRV_BUILTIN_MQMACHU, 2888*404b540aSrobert FRV_BUILTIN_MCPXRS, 2889*404b540aSrobert FRV_BUILTIN_MCPXRU, 2890*404b540aSrobert FRV_BUILTIN_MCPXIS, 2891*404b540aSrobert FRV_BUILTIN_MCPXIU, 2892*404b540aSrobert FRV_BUILTIN_MQCPXRS, 2893*404b540aSrobert FRV_BUILTIN_MQCPXRU, 2894*404b540aSrobert FRV_BUILTIN_MQCPXIS, 2895*404b540aSrobert FRV_BUILTIN_MQCPXIU, 2896*404b540aSrobert FRV_BUILTIN_MCUT, 2897*404b540aSrobert FRV_BUILTIN_MCUTSS, 2898*404b540aSrobert FRV_BUILTIN_MWTACC, 2899*404b540aSrobert FRV_BUILTIN_MWTACCG, 2900*404b540aSrobert FRV_BUILTIN_MRDACC, 2901*404b540aSrobert FRV_BUILTIN_MRDACCG, 2902*404b540aSrobert FRV_BUILTIN_MTRAP, 2903*404b540aSrobert FRV_BUILTIN_MCLRACC, 2904*404b540aSrobert FRV_BUILTIN_MCLRACCA, 2905*404b540aSrobert FRV_BUILTIN_MDUNPACKH, 2906*404b540aSrobert FRV_BUILTIN_MBTOHE, 2907*404b540aSrobert FRV_BUILTIN_MQXMACHS, 2908*404b540aSrobert FRV_BUILTIN_MQXMACXHS, 2909*404b540aSrobert FRV_BUILTIN_MQMACXHS, 2910*404b540aSrobert FRV_BUILTIN_MADDACCS, 2911*404b540aSrobert FRV_BUILTIN_MSUBACCS, 2912*404b540aSrobert FRV_BUILTIN_MASACCS, 2913*404b540aSrobert FRV_BUILTIN_MDADDACCS, 2914*404b540aSrobert FRV_BUILTIN_MDSUBACCS, 2915*404b540aSrobert FRV_BUILTIN_MDASACCS, 2916*404b540aSrobert FRV_BUILTIN_MABSHS, 2917*404b540aSrobert FRV_BUILTIN_MDROTLI, 2918*404b540aSrobert FRV_BUILTIN_MCPLHI, 2919*404b540aSrobert FRV_BUILTIN_MCPLI, 2920*404b540aSrobert FRV_BUILTIN_MDCUTSSI, 2921*404b540aSrobert FRV_BUILTIN_MQSATHS, 2922*404b540aSrobert FRV_BUILTIN_MQLCLRHS, 2923*404b540aSrobert FRV_BUILTIN_MQLMTHS, 2924*404b540aSrobert FRV_BUILTIN_MQSLLHI, 2925*404b540aSrobert FRV_BUILTIN_MQSRAHI, 2926*404b540aSrobert FRV_BUILTIN_MHSETLOS, 2927*404b540aSrobert FRV_BUILTIN_MHSETLOH, 2928*404b540aSrobert FRV_BUILTIN_MHSETHIS, 2929*404b540aSrobert FRV_BUILTIN_MHSETHIH, 2930*404b540aSrobert FRV_BUILTIN_MHDSETS, 2931*404b540aSrobert FRV_BUILTIN_MHDSETH, 2932*404b540aSrobert FRV_BUILTIN_SMUL, 2933*404b540aSrobert FRV_BUILTIN_UMUL, 2934*404b540aSrobert FRV_BUILTIN_PREFETCH0, 2935*404b540aSrobert FRV_BUILTIN_PREFETCH, 2936*404b540aSrobert FRV_BUILTIN_SMASS, 2937*404b540aSrobert FRV_BUILTIN_SMSSS, 2938*404b540aSrobert FRV_BUILTIN_SMU, 2939*404b540aSrobert FRV_BUILTIN_SCUTSS, 2940*404b540aSrobert FRV_BUILTIN_ADDSS, 2941*404b540aSrobert FRV_BUILTIN_SUBSS, 2942*404b540aSrobert FRV_BUILTIN_SLASS, 2943*404b540aSrobert FRV_BUILTIN_IACCreadll, 2944*404b540aSrobert FRV_BUILTIN_IACCreadl, 2945*404b540aSrobert FRV_BUILTIN_IACCsetll, 2946*404b540aSrobert FRV_BUILTIN_IACCsetl, 2947*404b540aSrobert FRV_BUILTIN_SCAN, 2948*404b540aSrobert FRV_BUILTIN_READ8, 2949*404b540aSrobert FRV_BUILTIN_READ16, 2950*404b540aSrobert FRV_BUILTIN_READ32, 2951*404b540aSrobert FRV_BUILTIN_READ64, 2952*404b540aSrobert FRV_BUILTIN_WRITE8, 2953*404b540aSrobert FRV_BUILTIN_WRITE16, 2954*404b540aSrobert FRV_BUILTIN_WRITE32, 2955*404b540aSrobert FRV_BUILTIN_WRITE64 2956*404b540aSrobert }; 2957*404b540aSrobert #define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL 2958*404b540aSrobert 2959*404b540aSrobert /* Enable prototypes on the call rtl functions. */ 2960*404b540aSrobert #define MD_CALL_PROTOTYPES 1 2961*404b540aSrobert 2962*404b540aSrobert extern GTY(()) rtx frv_compare_op0; /* operand save for */ 2963*404b540aSrobert extern GTY(()) rtx frv_compare_op1; /* comparison generation */ 2964*404b540aSrobert 2965*404b540aSrobert #define CPU_UNITS_QUERY 1 2966*404b540aSrobert 2967*404b540aSrobert #ifdef __FRV_FDPIC__ 2968*404b540aSrobert #define CRT_GET_RFIB_DATA(dbase) \ 2969*404b540aSrobert ({ extern void *_GLOBAL_OFFSET_TABLE_; (dbase) = &_GLOBAL_OFFSET_TABLE_; }) 2970*404b540aSrobert #endif 2971*404b540aSrobert 2972*404b540aSrobert #endif /* __FRV_H__ */ 2973