xref: /openbsd/gnu/gcc/gcc/config/mips/irix-crti.asm (revision 404b540a)
1*404b540aSrobert	.abicalls
2*404b540aSrobert	.set	noreorder
3*404b540aSrobert	.set	nomacro
4*404b540aSrobert
5*404b540aSrobert/* The GNU and SGI linkers differ in their implementation of -init and -fini.
6*404b540aSrobert   With the GNU linker, there can only be a single -init option, and the
7*404b540aSrobert   linker simply sets DT_INIT to that value.  gcc's initialization and
8*404b540aSrobert   finalization code can go directly in .init, with the prologue and
9*404b540aSrobert   epilogue of the main initialization routine being provided by external
10*404b540aSrobert   object files (*crti.o and *crtn.o in this case).
11*404b540aSrobert
12*404b540aSrobert   The SGI linker instead accepts several -init options.  It will set DT_INIT
13*404b540aSrobert   to a linker-created function (placed in .init) that calls each of the -init
14*404b540aSrobert   functions in turn.  If there is any user code in .init, this linker-created
15*404b540aSrobert   function will be placed after it.  Note that such user code is not treated
16*404b540aSrobert   specially; it will only be called if the -init options arrange for it to
17*404b540aSrobert   be called.
18*404b540aSrobert
19*404b540aSrobert   In theory, the SGI model should allow the crti, crtn and intermediate code
20*404b540aSrobert   to go in .init, just like it can with the GNU linker.  However, doing this
21*404b540aSrobert   seems to confuse the linker and triggers an internal error:
22*404b540aSrobert
23*404b540aSrobert      ld32: FATAL   2  : Internal: at ../../ld/mips_code.c mips_code_fixup()
24*404b540aSrobert	 text section overflow!
25*404b540aSrobert
26*404b540aSrobert   (seen with MIPSpro 7.30).  We therefore put everything in a special
27*404b540aSrobert   .gcc_init section instead.  */
28*404b540aSrobert
29*404b540aSrobert	.section .gcc_init,"ax",@progbits
30*404b540aSrobert	.globl	__gcc_init
31*404b540aSrobert__gcc_init:
32*404b540aSrobert#if _MIPS_SIM == _ABIO32
33*404b540aSrobert	addiu	$sp,$sp,-16
34*404b540aSrobert	sw	$31,0($sp)
35*404b540aSrobert#else
36*404b540aSrobert	daddiu	$sp,$sp,-16
37*404b540aSrobert	sd	$31,0($sp)
38*404b540aSrobert	sd	$28,8($sp)
39*404b540aSrobert#endif
40*404b540aSrobert
41*404b540aSrobert	.section .gcc_fini,"ax",@progbits
42*404b540aSrobert	.globl	__gcc_fini
43*404b540aSrobert__gcc_fini:
44*404b540aSrobert#if _MIPS_SIM == _ABIO32
45*404b540aSrobert	addiu	$sp,$sp,-16
46*404b540aSrobert	sw	$31,0($sp)
47*404b540aSrobert#else
48*404b540aSrobert	daddiu	$sp,$sp,-16
49*404b540aSrobert	sd	$31,0($sp)
50*404b540aSrobert	sd	$28,8($sp)
51*404b540aSrobert#endif
52