1*404b540aSrobert# BEGIN boiler-plate MIPS stuff 2*404b540aSrobert 3*404b540aSrobert# Don't let CTOR_LIST end up in sdata section. 4*404b540aSrobertCRTSTUFF_T_CFLAGS = -G 0 5*404b540aSrobert 6*404b540aSrobert# We must build libgcc2.a with -G 0, in case the user wants to link 7*404b540aSrobert# without the $gp register. 8*404b540aSrobertTARGET_LIBGCC2_CFLAGS = -G 0 9*404b540aSrobert 10*404b540aSrobertLIB2FUNCS_STATIC_EXTRA = $(srcdir)/config/mips/mips16.S \ 11*404b540aSrobert $(srcdir)/config/mips/vr4120-div.S 12*404b540aSrobertEXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o 13*404b540aSrobert 14*404b540aSrobert# Assemble startup files. 15*404b540aSrobert$(T)crti.o: $(srcdir)/config/mips/crti.asm $(GCC_PASSES) 16*404b540aSrobert $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ 17*404b540aSrobert -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/mips/crti.asm 18*404b540aSrobert 19*404b540aSrobert$(T)crtn.o: $(srcdir)/config/mips/crtn.asm $(GCC_PASSES) 20*404b540aSrobert $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ 21*404b540aSrobert -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/mips/crtn.asm 22*404b540aSrobert 23*404b540aSrobert# END boiler-plate 24*404b540aSrobert 25*404b540aSrobert# Main multilibs 26*404b540aSrobert# -------------- 27*404b540aSrobert# 28*404b540aSrobert# Endianness: EB or EL 29*404b540aSrobert# 30*404b540aSrobert# ABIs: mabi=32 31*404b540aSrobert# mabi=o64 32*404b540aSrobert# mabi=eabi 33*404b540aSrobert# mabi=eabi/mlong32 34*404b540aSrobert# mabi=eabi/mgp32 35*404b540aSrobert# mabi=eabi/mgp32/mlong64 36*404b540aSrobert# 37*404b540aSrobert# Architecture: march=vr4120 with -mfix-vr4120 38*404b540aSrobert# march=vr4130 with -mfix-vr4130 (default) 39*404b540aSrobert# march=vr5000 40*404b540aSrobert# march=vr5400 41*404b540aSrobert# march=vr5500 42*404b540aSrobert# 43*404b540aSrobert# Total: 2 * 6 * 5 = 60 multilibs. 44*404b540aSrobert# 45*404b540aSrobert# 46*404b540aSrobert# Extra vr4300 multilibs 47*404b540aSrobert# ---------------------- 48*404b540aSrobert# 49*404b540aSrobert# Endianness: EB or EL 50*404b540aSrobert# 51*404b540aSrobert# ABI: o64 52*404b540aSrobert# 53*404b540aSrobert# Architecture: vr4300. 54*404b540aSrobert# 55*404b540aSrobert# Total: 2 * 1 * 2 = 2 multilibs. 56*404b540aSrobert# 57*404b540aSrobert# 58*404b540aSrobert# Extra MIPS16 multilibs 59*404b540aSrobert# ---------------------- 60*404b540aSrobert# 61*404b540aSrobert# Endianness: EB or EL 62*404b540aSrobert# 63*404b540aSrobert# ABIs: mabi=o64 64*404b540aSrobert# mabi=eabi/mlong32 65*404b540aSrobert# mabi=eabi/mgp32 66*404b540aSrobert# 67*404b540aSrobert# Architecture: march=vr4120 with -mfix-vr4120 68*404b540aSrobert# march=vr4130 with -mfix-vr4130 (default) 69*404b540aSrobert# 70*404b540aSrobert# Total: 2 * 3 * 2 = 12 multilibs. 71*404b540aSrobertMULTILIB_OPTIONS = \ 72*404b540aSrobert EL/EB \ 73*404b540aSrobert mabi=32/mabi=o64/mabi=eabi \ 74*404b540aSrobert mgp32 \ 75*404b540aSrobert mlong64 \ 76*404b540aSrobert mips16 \ 77*404b540aSrobert mfix-vr4120/mfix-vr4130/march=vr4300/march=vr5000/march=vr5400/march=vr5500 78*404b540aSrobert 79*404b540aSrobertMULTILIB_DIRNAMES = \ 80*404b540aSrobert el eb \ 81*404b540aSrobert o32 o64 eabi \ 82*404b540aSrobert gp32 \ 83*404b540aSrobert long64 \ 84*404b540aSrobert mips16 \ 85*404b540aSrobert vr4120 vr4130 vr4300 vr5000 vr5400 vr5500 86*404b540aSrobert 87*404b540aSrobertMULTILIB_MATCHES = EL=mel EB=meb mfix-vr4120=march?vr4120 \ 88*404b540aSrobert mfix-vr4130=march?vr4130 89*404b540aSrobert 90*404b540aSrobert# Assume a 41xx-series is the default: we'd need a *mips16 entry if 91*404b540aSrobert# the default processor didn't support mips16. Also assume the 92*404b540aSrobert# default ABI is EABI64 -mlong32. 93*404b540aSrobertMULTILIB_EXCEPTIONS = \ 94*404b540aSrobert *mabi=32/mlong64* \ 95*404b540aSrobert *mabi=32/mgp32* \ 96*404b540aSrobert *mabi=o64/mgp32* \ 97*404b540aSrobert *mabi=o64/mlong64* \ 98*404b540aSrobert *mips16/march=vr5* \ 99*404b540aSrobert *mips16/march=vr4300 \ 100*404b540aSrobert $(MIPS16_EXCEPTIONS) \ 101*404b540aSrobert $(VR4300_EXCEPTIONS) 102*404b540aSrobert 103*404b540aSrobertMIPS16_EXCEPTIONS = \ 104*404b540aSrobert *mabi=32*mips16* \ 105*404b540aSrobert *mlong64*mips16* 106*404b540aSrobert 107*404b540aSrobertVR4300_EXCEPTIONS = \ 108*404b540aSrobert *mabi=32*march=vr4300 \ 109*404b540aSrobert *mgp32*march=vr4300 \ 110*404b540aSrobert *mlong64*march=vr4300 \ 111*404b540aSrobert march=vr4300 \ 112*404b540aSrobert E[LB]/march=vr4300 113