1 //===-- AArch66.h ---------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "ABIAArch64.h"
10 #include "ABIMacOSX_arm64.h"
11 #include "ABISysV_arm64.h"
12 #include "Utility/ARM64_DWARF_Registers.h"
13 #include "lldb/Core/PluginManager.h"
14 #include "lldb/Target/Process.h"
15 
16 #include <bitset>
17 #include <optional>
18 
19 LLDB_PLUGIN_DEFINE(ABIAArch64)
20 
21 void ABIAArch64::Initialize() {
22   ABISysV_arm64::Initialize();
23   ABIMacOSX_arm64::Initialize();
24 }
25 
26 void ABIAArch64::Terminate() {
27   ABISysV_arm64::Terminate();
28   ABIMacOSX_arm64::Terminate();
29 }
30 
31 lldb::addr_t ABIAArch64::FixCodeAddress(lldb::addr_t pc) {
32   if (lldb::ProcessSP process_sp = GetProcessSP())
33     return FixAddress(pc, process_sp->GetCodeAddressMask());
34   return pc;
35 }
36 
37 lldb::addr_t ABIAArch64::FixDataAddress(lldb::addr_t pc) {
38   if (lldb::ProcessSP process_sp = GetProcessSP())
39     return FixAddress(pc, process_sp->GetDataAddressMask());
40   return pc;
41 }
42 
43 std::pair<uint32_t, uint32_t>
44 ABIAArch64::GetEHAndDWARFNums(llvm::StringRef name) {
45   if (name == "pc")
46     return {LLDB_INVALID_REGNUM, arm64_dwarf::pc};
47   if (name == "cpsr")
48     return {LLDB_INVALID_REGNUM, arm64_dwarf::cpsr};
49   return MCBasedABI::GetEHAndDWARFNums(name);
50 }
51 
52 std::string ABIAArch64::GetMCName(std::string reg) {
53   MapRegisterName(reg, "v", "q");
54   MapRegisterName(reg, "x29", "fp");
55   MapRegisterName(reg, "x30", "lr");
56   return reg;
57 }
58 
59 uint32_t ABIAArch64::GetGenericNum(llvm::StringRef name) {
60   return llvm::StringSwitch<uint32_t>(name)
61       .Case("pc", LLDB_REGNUM_GENERIC_PC)
62       .Cases("lr", "x30", LLDB_REGNUM_GENERIC_RA)
63       .Cases("sp", "x31", LLDB_REGNUM_GENERIC_SP)
64       .Cases("fp", "x29", LLDB_REGNUM_GENERIC_FP)
65       .Case("cpsr", LLDB_REGNUM_GENERIC_FLAGS)
66       .Case("x0", LLDB_REGNUM_GENERIC_ARG1)
67       .Case("x1", LLDB_REGNUM_GENERIC_ARG2)
68       .Case("x2", LLDB_REGNUM_GENERIC_ARG3)
69       .Case("x3", LLDB_REGNUM_GENERIC_ARG4)
70       .Case("x4", LLDB_REGNUM_GENERIC_ARG5)
71       .Case("x5", LLDB_REGNUM_GENERIC_ARG6)
72       .Case("x6", LLDB_REGNUM_GENERIC_ARG7)
73       .Case("x7", LLDB_REGNUM_GENERIC_ARG8)
74       .Default(LLDB_INVALID_REGNUM);
75 }
76 
77 static void addPartialRegisters(
78     std::vector<lldb_private::DynamicRegisterInfo::Register> &regs,
79     llvm::ArrayRef<std::optional<uint32_t>> full_reg_indices,
80     uint32_t full_reg_size, const char *partial_reg_format,
81     uint32_t partial_reg_size, lldb::Encoding encoding, lldb::Format format) {
82   for (auto it : llvm::enumerate(full_reg_indices)) {
83     std::optional<uint32_t> full_reg_index = it.value();
84     if (!full_reg_index || regs[*full_reg_index].byte_size != full_reg_size)
85       return;
86 
87     lldb_private::DynamicRegisterInfo::Register partial_reg{
88         lldb_private::ConstString(
89             llvm::formatv(partial_reg_format, it.index()).str()),
90         lldb_private::ConstString(),
91         lldb_private::ConstString("supplementary registers"),
92         partial_reg_size,
93         LLDB_INVALID_INDEX32,
94         encoding,
95         format,
96         LLDB_INVALID_REGNUM,
97         LLDB_INVALID_REGNUM,
98         LLDB_INVALID_REGNUM,
99         LLDB_INVALID_REGNUM,
100         {*full_reg_index},
101         {}};
102     addSupplementaryRegister(regs, partial_reg);
103   }
104 }
105 
106 void ABIAArch64::AugmentRegisterInfo(
107     std::vector<lldb_private::DynamicRegisterInfo::Register> &regs) {
108   lldb_private::MCBasedABI::AugmentRegisterInfo(regs);
109 
110   lldb_private::ConstString sp_string{"sp"};
111 
112   std::array<std::optional<uint32_t>, 32> x_regs;
113   std::array<std::optional<uint32_t>, 32> v_regs;
114 
115   for (auto it : llvm::enumerate(regs)) {
116     lldb_private::DynamicRegisterInfo::Register &info = it.value();
117     // GDB sends x31 as "sp".  Add the "x31" alt_name for convenience.
118     if (info.name == sp_string && !info.alt_name)
119       info.alt_name.SetCString("x31");
120 
121     unsigned int reg_num;
122     auto get_reg = [&info, &reg_num](const char *prefix) {
123       llvm::StringRef reg_name = info.name.GetStringRef();
124       llvm::StringRef alt_name = info.alt_name.GetStringRef();
125       return (reg_name.consume_front(prefix) &&
126               llvm::to_integer(reg_name, reg_num, 10) && reg_num < 32) ||
127              (alt_name.consume_front(prefix) &&
128               llvm::to_integer(alt_name, reg_num, 10) && reg_num < 32);
129     };
130 
131     if (get_reg("x"))
132       x_regs[reg_num] = it.index();
133     else if (get_reg("v"))
134       v_regs[reg_num] = it.index();
135     // if we have at least one subregister, abort
136     else if (get_reg("w") || get_reg("s") || get_reg("d"))
137       return;
138   }
139 
140   // Create aliases for partial registers: wN for xN, and sN/dN for vN.
141   addPartialRegisters(regs, x_regs, 8, "w{0}", 4, lldb::eEncodingUint,
142                       lldb::eFormatHex);
143   addPartialRegisters(regs, v_regs, 16, "s{0}", 4, lldb::eEncodingIEEE754,
144                       lldb::eFormatFloat);
145   addPartialRegisters(regs, v_regs, 16, "d{0}", 8, lldb::eEncodingIEEE754,
146                       lldb::eFormatFloat);
147 }
148