1*f6aab3d8Srobert //===-- RISCV_DWARF_Registers.h ---------------------------------*- C++ -*-===//
2*f6aab3d8Srobert //
3*f6aab3d8Srobert // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*f6aab3d8Srobert // See https://llvm.org/LICENSE.txt for license information.
5*f6aab3d8Srobert // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*f6aab3d8Srobert //
7*f6aab3d8Srobert //===----------------------------------------------------------------------===//
8*f6aab3d8Srobert 
9*f6aab3d8Srobert #ifndef LLDB_SOURCE_UTILITY_RISCV_DWARF_REGISTERS_H
10*f6aab3d8Srobert #define LLDB_SOURCE_UTILITY_RISCV_DWARF_REGISTERS_H
11*f6aab3d8Srobert 
12*f6aab3d8Srobert #include "lldb/lldb-private.h"
13*f6aab3d8Srobert 
14*f6aab3d8Srobert namespace riscv_dwarf {
15*f6aab3d8Srobert 
16*f6aab3d8Srobert enum {
17*f6aab3d8Srobert   dwarf_gpr_x0 = 0,
18*f6aab3d8Srobert   dwarf_gpr_x1,
19*f6aab3d8Srobert   dwarf_gpr_x2,
20*f6aab3d8Srobert   dwarf_gpr_x3,
21*f6aab3d8Srobert   dwarf_gpr_x4,
22*f6aab3d8Srobert   dwarf_gpr_x5,
23*f6aab3d8Srobert   dwarf_gpr_x6,
24*f6aab3d8Srobert   dwarf_gpr_x7,
25*f6aab3d8Srobert   dwarf_gpr_x8,
26*f6aab3d8Srobert   dwarf_gpr_x9,
27*f6aab3d8Srobert   dwarf_gpr_x10,
28*f6aab3d8Srobert   dwarf_gpr_x11,
29*f6aab3d8Srobert   dwarf_gpr_x12,
30*f6aab3d8Srobert   dwarf_gpr_x13,
31*f6aab3d8Srobert   dwarf_gpr_x14,
32*f6aab3d8Srobert   dwarf_gpr_x15,
33*f6aab3d8Srobert   dwarf_gpr_x16,
34*f6aab3d8Srobert   dwarf_gpr_x17,
35*f6aab3d8Srobert   dwarf_gpr_x18,
36*f6aab3d8Srobert   dwarf_gpr_x19,
37*f6aab3d8Srobert   dwarf_gpr_x20,
38*f6aab3d8Srobert   dwarf_gpr_x21,
39*f6aab3d8Srobert   dwarf_gpr_x22,
40*f6aab3d8Srobert   dwarf_gpr_x23,
41*f6aab3d8Srobert   dwarf_gpr_x24,
42*f6aab3d8Srobert   dwarf_gpr_x25,
43*f6aab3d8Srobert   dwarf_gpr_x26,
44*f6aab3d8Srobert   dwarf_gpr_x27,
45*f6aab3d8Srobert   dwarf_gpr_x28,
46*f6aab3d8Srobert   dwarf_gpr_x29,
47*f6aab3d8Srobert   dwarf_gpr_x30,
48*f6aab3d8Srobert   dwarf_gpr_x31 = 31,
49*f6aab3d8Srobert 
50*f6aab3d8Srobert   dwarf_fpr_f0 = 32,
51*f6aab3d8Srobert   dwarf_fpr_f1,
52*f6aab3d8Srobert   dwarf_fpr_f2,
53*f6aab3d8Srobert   dwarf_fpr_f3,
54*f6aab3d8Srobert   dwarf_fpr_f4,
55*f6aab3d8Srobert   dwarf_fpr_f5,
56*f6aab3d8Srobert   dwarf_fpr_f6,
57*f6aab3d8Srobert   dwarf_fpr_f7,
58*f6aab3d8Srobert   dwarf_fpr_f8,
59*f6aab3d8Srobert   dwarf_fpr_f9,
60*f6aab3d8Srobert   dwarf_fpr_f10,
61*f6aab3d8Srobert   dwarf_fpr_f11,
62*f6aab3d8Srobert   dwarf_fpr_f12,
63*f6aab3d8Srobert   dwarf_fpr_f13,
64*f6aab3d8Srobert   dwarf_fpr_f14,
65*f6aab3d8Srobert   dwarf_fpr_f15,
66*f6aab3d8Srobert   dwarf_fpr_f16,
67*f6aab3d8Srobert   dwarf_fpr_f17,
68*f6aab3d8Srobert   dwarf_fpr_f18,
69*f6aab3d8Srobert   dwarf_fpr_f19,
70*f6aab3d8Srobert   dwarf_fpr_f20,
71*f6aab3d8Srobert   dwarf_fpr_f21,
72*f6aab3d8Srobert   dwarf_fpr_f22,
73*f6aab3d8Srobert   dwarf_fpr_f23,
74*f6aab3d8Srobert   dwarf_fpr_f24,
75*f6aab3d8Srobert   dwarf_fpr_f25,
76*f6aab3d8Srobert   dwarf_fpr_f26,
77*f6aab3d8Srobert   dwarf_fpr_f27,
78*f6aab3d8Srobert   dwarf_fpr_f28,
79*f6aab3d8Srobert   dwarf_fpr_f29,
80*f6aab3d8Srobert   dwarf_fpr_f30,
81*f6aab3d8Srobert   dwarf_fpr_f31 = 63,
82*f6aab3d8Srobert 
83*f6aab3d8Srobert   // alternate frame return column
84*f6aab3d8Srobert   dwarf_alt_fr_col = 64,
85*f6aab3d8Srobert 
86*f6aab3d8Srobert   dwarf_v0 = 96,
87*f6aab3d8Srobert   dwarf_v1,
88*f6aab3d8Srobert   dwarf_v2,
89*f6aab3d8Srobert   dwarf_v3,
90*f6aab3d8Srobert   dwarf_v4,
91*f6aab3d8Srobert   dwarf_v5,
92*f6aab3d8Srobert   dwarf_v6,
93*f6aab3d8Srobert   dwarf_v7,
94*f6aab3d8Srobert   dwarf_v8,
95*f6aab3d8Srobert   dwarf_v9,
96*f6aab3d8Srobert   dwarf_v10,
97*f6aab3d8Srobert   dwarf_v11,
98*f6aab3d8Srobert   dwarf_v12,
99*f6aab3d8Srobert   dwarf_v13,
100*f6aab3d8Srobert   dwarf_v14,
101*f6aab3d8Srobert   dwarf_v15,
102*f6aab3d8Srobert   dwarf_v16,
103*f6aab3d8Srobert   dwarf_v17,
104*f6aab3d8Srobert   dwarf_v18,
105*f6aab3d8Srobert   dwarf_v19,
106*f6aab3d8Srobert   dwarf_v20,
107*f6aab3d8Srobert   dwarf_v21,
108*f6aab3d8Srobert   dwarf_v22,
109*f6aab3d8Srobert   dwarf_v23,
110*f6aab3d8Srobert   dwarf_v24,
111*f6aab3d8Srobert   dwarf_v25,
112*f6aab3d8Srobert   dwarf_v26,
113*f6aab3d8Srobert   dwarf_v27,
114*f6aab3d8Srobert   dwarf_v28,
115*f6aab3d8Srobert   dwarf_v29,
116*f6aab3d8Srobert   dwarf_v30,
117*f6aab3d8Srobert   dwarf_v31 = 127,
118*f6aab3d8Srobert   dwarf_first_csr = 4096,
119*f6aab3d8Srobert   dwarf_fpr_fcsr = dwarf_first_csr + 0x003,
120*f6aab3d8Srobert   dwarf_last_csr = 8191,
121*f6aab3d8Srobert 
122*f6aab3d8Srobert   // register ABI name
123*f6aab3d8Srobert   dwarf_gpr_zero = dwarf_gpr_x0,
124*f6aab3d8Srobert   dwarf_gpr_ra = dwarf_gpr_x1,
125*f6aab3d8Srobert   dwarf_gpr_sp = dwarf_gpr_x2,
126*f6aab3d8Srobert   dwarf_gpr_gp = dwarf_gpr_x3,
127*f6aab3d8Srobert   dwarf_gpr_tp = dwarf_gpr_x4,
128*f6aab3d8Srobert   dwarf_gpr_t0 = dwarf_gpr_x5,
129*f6aab3d8Srobert   dwarf_gpr_t1 = dwarf_gpr_x6,
130*f6aab3d8Srobert   dwarf_gpr_t2 = dwarf_gpr_x7,
131*f6aab3d8Srobert   dwarf_gpr_fp = dwarf_gpr_x8,
132*f6aab3d8Srobert   dwarf_gpr_s1 = dwarf_gpr_x9,
133*f6aab3d8Srobert   dwarf_gpr_a0 = dwarf_gpr_x10,
134*f6aab3d8Srobert   dwarf_gpr_a1 = dwarf_gpr_x11,
135*f6aab3d8Srobert   dwarf_gpr_a2 = dwarf_gpr_x12,
136*f6aab3d8Srobert   dwarf_gpr_a3 = dwarf_gpr_x13,
137*f6aab3d8Srobert   dwarf_gpr_a4 = dwarf_gpr_x14,
138*f6aab3d8Srobert   dwarf_gpr_a5 = dwarf_gpr_x15,
139*f6aab3d8Srobert   dwarf_gpr_a6 = dwarf_gpr_x16,
140*f6aab3d8Srobert   dwarf_gpr_a7 = dwarf_gpr_x17,
141*f6aab3d8Srobert   dwarf_gpr_s2 = dwarf_gpr_x18,
142*f6aab3d8Srobert   dwarf_gpr_s3 = dwarf_gpr_x19,
143*f6aab3d8Srobert   dwarf_gpr_s4 = dwarf_gpr_x20,
144*f6aab3d8Srobert   dwarf_gpr_s5 = dwarf_gpr_x21,
145*f6aab3d8Srobert   dwarf_gpr_s6 = dwarf_gpr_x22,
146*f6aab3d8Srobert   dwarf_gpr_s7 = dwarf_gpr_x23,
147*f6aab3d8Srobert   dwarf_gpr_s8 = dwarf_gpr_x24,
148*f6aab3d8Srobert   dwarf_gpr_s9 = dwarf_gpr_x25,
149*f6aab3d8Srobert   dwarf_gpr_s10 = dwarf_gpr_x26,
150*f6aab3d8Srobert   dwarf_gpr_s11 = dwarf_gpr_x27,
151*f6aab3d8Srobert   dwarf_gpr_t3 = dwarf_gpr_x28,
152*f6aab3d8Srobert   dwarf_gpr_t4 = dwarf_gpr_x29,
153*f6aab3d8Srobert   dwarf_gpr_t5 = dwarf_gpr_x30,
154*f6aab3d8Srobert   dwarf_gpr_t6 = dwarf_gpr_x31,
155*f6aab3d8Srobert 
156*f6aab3d8Srobert   dwarf_fpr_ft0 = dwarf_fpr_f0,
157*f6aab3d8Srobert   dwarf_fpr_ft1 = dwarf_fpr_f1,
158*f6aab3d8Srobert   dwarf_fpr_ft2 = dwarf_fpr_f2,
159*f6aab3d8Srobert   dwarf_fpr_ft3 = dwarf_fpr_f3,
160*f6aab3d8Srobert   dwarf_fpr_ft4 = dwarf_fpr_f4,
161*f6aab3d8Srobert   dwarf_fpr_ft5 = dwarf_fpr_f5,
162*f6aab3d8Srobert   dwarf_fpr_ft6 = dwarf_fpr_f6,
163*f6aab3d8Srobert   dwarf_fpr_ft7 = dwarf_fpr_f7,
164*f6aab3d8Srobert   dwarf_fpr_fs0 = dwarf_fpr_f8,
165*f6aab3d8Srobert   dwarf_fpr_fs1 = dwarf_fpr_f9,
166*f6aab3d8Srobert   dwarf_fpr_fa0 = dwarf_fpr_f10,
167*f6aab3d8Srobert   dwarf_fpr_fa1 = dwarf_fpr_f11,
168*f6aab3d8Srobert   dwarf_fpr_fa2 = dwarf_fpr_f12,
169*f6aab3d8Srobert   dwarf_fpr_fa3 = dwarf_fpr_f13,
170*f6aab3d8Srobert   dwarf_fpr_fa4 = dwarf_fpr_f14,
171*f6aab3d8Srobert   dwarf_fpr_fa5 = dwarf_fpr_f15,
172*f6aab3d8Srobert   dwarf_fpr_fa6 = dwarf_fpr_f16,
173*f6aab3d8Srobert   dwarf_fpr_fa7 = dwarf_fpr_f17,
174*f6aab3d8Srobert   dwarf_fpr_fs2 = dwarf_fpr_f18,
175*f6aab3d8Srobert   dwarf_fpr_fs3 = dwarf_fpr_f19,
176*f6aab3d8Srobert   dwarf_fpr_fs4 = dwarf_fpr_f20,
177*f6aab3d8Srobert   dwarf_fpr_fs5 = dwarf_fpr_f21,
178*f6aab3d8Srobert   dwarf_fpr_fs6 = dwarf_fpr_f22,
179*f6aab3d8Srobert   dwarf_fpr_fs7 = dwarf_fpr_f23,
180*f6aab3d8Srobert   dwarf_fpr_fs8 = dwarf_fpr_f24,
181*f6aab3d8Srobert   dwarf_fpr_fs9 = dwarf_fpr_f25,
182*f6aab3d8Srobert   dwarf_fpr_fs10 = dwarf_fpr_f26,
183*f6aab3d8Srobert   dwarf_fpr_fs11 = dwarf_fpr_f27,
184*f6aab3d8Srobert   dwarf_fpr_ft8 = dwarf_fpr_f28,
185*f6aab3d8Srobert   dwarf_fpr_ft9 = dwarf_fpr_f29,
186*f6aab3d8Srobert   dwarf_fpr_ft10 = dwarf_fpr_f30,
187*f6aab3d8Srobert   dwarf_fpr_ft11 = dwarf_fpr_f31,
188*f6aab3d8Srobert 
189*f6aab3d8Srobert   // mock pc regnum
190*f6aab3d8Srobert   dwarf_gpr_pc = 11451,
191*f6aab3d8Srobert };
192*f6aab3d8Srobert 
193*f6aab3d8Srobert } // namespace riscv_dwarf
194*f6aab3d8Srobert 
195*f6aab3d8Srobert #endif // LLDB_SOURCE_UTILITY_RISCV_DWARF_REGISTERS_H
196