109467b48Spatrick //===- lib/CodeGen/MachineOperand.cpp -------------------------------------===//
209467b48Spatrick //
309467b48Spatrick // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
409467b48Spatrick // See https://llvm.org/LICENSE.txt for license information.
509467b48Spatrick // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
609467b48Spatrick //
709467b48Spatrick //===----------------------------------------------------------------------===//
809467b48Spatrick //
909467b48Spatrick /// \file Methods common to all machine operands.
1009467b48Spatrick //
1109467b48Spatrick //===----------------------------------------------------------------------===//
1209467b48Spatrick
1309467b48Spatrick #include "llvm/CodeGen/MachineOperand.h"
14097a140dSpatrick #include "llvm/ADT/FoldingSet.h"
1509467b48Spatrick #include "llvm/ADT/StringExtras.h"
1609467b48Spatrick #include "llvm/Analysis/Loads.h"
1709467b48Spatrick #include "llvm/CodeGen/MIRFormatter.h"
1809467b48Spatrick #include "llvm/CodeGen/MachineFrameInfo.h"
1909467b48Spatrick #include "llvm/CodeGen/MachineJumpTableInfo.h"
2009467b48Spatrick #include "llvm/CodeGen/MachineRegisterInfo.h"
21*d415bd75Srobert #include "llvm/CodeGen/StableHashing.h"
2209467b48Spatrick #include "llvm/CodeGen/TargetInstrInfo.h"
2309467b48Spatrick #include "llvm/CodeGen/TargetRegisterInfo.h"
2409467b48Spatrick #include "llvm/Config/llvm-config.h"
2509467b48Spatrick #include "llvm/IR/Constants.h"
2609467b48Spatrick #include "llvm/IR/IRPrintingPasses.h"
27097a140dSpatrick #include "llvm/IR/Instructions.h"
2809467b48Spatrick #include "llvm/IR/ModuleSlotTracker.h"
2909467b48Spatrick #include "llvm/MC/MCDwarf.h"
3009467b48Spatrick #include "llvm/Target/TargetIntrinsicInfo.h"
3109467b48Spatrick #include "llvm/Target/TargetMachine.h"
32*d415bd75Srobert #include <optional>
3309467b48Spatrick
3409467b48Spatrick using namespace llvm;
3509467b48Spatrick
3609467b48Spatrick static cl::opt<int>
3709467b48Spatrick PrintRegMaskNumRegs("print-regmask-num-regs",
3809467b48Spatrick cl::desc("Number of registers to limit to when "
3909467b48Spatrick "printing regmask operands in IR dumps. "
4009467b48Spatrick "unlimited = -1"),
4109467b48Spatrick cl::init(32), cl::Hidden);
4209467b48Spatrick
getMFIfAvailable(const MachineOperand & MO)4309467b48Spatrick static const MachineFunction *getMFIfAvailable(const MachineOperand &MO) {
4409467b48Spatrick if (const MachineInstr *MI = MO.getParent())
4509467b48Spatrick if (const MachineBasicBlock *MBB = MI->getParent())
4609467b48Spatrick if (const MachineFunction *MF = MBB->getParent())
4709467b48Spatrick return MF;
4809467b48Spatrick return nullptr;
4909467b48Spatrick }
50*d415bd75Srobert
getMFIfAvailable(MachineOperand & MO)5109467b48Spatrick static MachineFunction *getMFIfAvailable(MachineOperand &MO) {
5209467b48Spatrick return const_cast<MachineFunction *>(
5309467b48Spatrick getMFIfAvailable(const_cast<const MachineOperand &>(MO)));
5409467b48Spatrick }
5509467b48Spatrick
setReg(Register Reg)5609467b48Spatrick void MachineOperand::setReg(Register Reg) {
5709467b48Spatrick if (getReg() == Reg)
5809467b48Spatrick return; // No change.
5909467b48Spatrick
6009467b48Spatrick // Clear the IsRenamable bit to keep it conservatively correct.
6109467b48Spatrick IsRenamable = false;
6209467b48Spatrick
6309467b48Spatrick // Otherwise, we have to change the register. If this operand is embedded
6409467b48Spatrick // into a machine function, we need to update the old and new register's
6509467b48Spatrick // use/def lists.
6609467b48Spatrick if (MachineFunction *MF = getMFIfAvailable(*this)) {
6709467b48Spatrick MachineRegisterInfo &MRI = MF->getRegInfo();
6809467b48Spatrick MRI.removeRegOperandFromUseList(this);
6909467b48Spatrick SmallContents.RegNo = Reg;
7009467b48Spatrick MRI.addRegOperandToUseList(this);
7109467b48Spatrick return;
7209467b48Spatrick }
7309467b48Spatrick
7409467b48Spatrick // Otherwise, just change the register, no problem. :)
7509467b48Spatrick SmallContents.RegNo = Reg;
7609467b48Spatrick }
7709467b48Spatrick
substVirtReg(Register Reg,unsigned SubIdx,const TargetRegisterInfo & TRI)7809467b48Spatrick void MachineOperand::substVirtReg(Register Reg, unsigned SubIdx,
7909467b48Spatrick const TargetRegisterInfo &TRI) {
8009467b48Spatrick assert(Reg.isVirtual());
8109467b48Spatrick if (SubIdx && getSubReg())
8209467b48Spatrick SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg());
8309467b48Spatrick setReg(Reg);
8409467b48Spatrick if (SubIdx)
8509467b48Spatrick setSubReg(SubIdx);
8609467b48Spatrick }
8709467b48Spatrick
substPhysReg(MCRegister Reg,const TargetRegisterInfo & TRI)8809467b48Spatrick void MachineOperand::substPhysReg(MCRegister Reg, const TargetRegisterInfo &TRI) {
8973471bf0Spatrick assert(Register::isPhysicalRegister(Reg));
9009467b48Spatrick if (getSubReg()) {
9109467b48Spatrick Reg = TRI.getSubReg(Reg, getSubReg());
9209467b48Spatrick // Note that getSubReg() may return 0 if the sub-register doesn't exist.
9309467b48Spatrick // That won't happen in legal code.
9409467b48Spatrick setSubReg(0);
9509467b48Spatrick if (isDef())
9609467b48Spatrick setIsUndef(false);
9709467b48Spatrick }
9809467b48Spatrick setReg(Reg);
9909467b48Spatrick }
10009467b48Spatrick
10109467b48Spatrick /// Change a def to a use, or a use to a def.
setIsDef(bool Val)10209467b48Spatrick void MachineOperand::setIsDef(bool Val) {
10309467b48Spatrick assert(isReg() && "Wrong MachineOperand accessor");
10409467b48Spatrick assert((!Val || !isDebug()) && "Marking a debug operation as def");
10509467b48Spatrick if (IsDef == Val)
10609467b48Spatrick return;
10709467b48Spatrick assert(!IsDeadOrKill && "Changing def/use with dead/kill set not supported");
10809467b48Spatrick // MRI may keep uses and defs in different list positions.
10909467b48Spatrick if (MachineFunction *MF = getMFIfAvailable(*this)) {
11009467b48Spatrick MachineRegisterInfo &MRI = MF->getRegInfo();
11109467b48Spatrick MRI.removeRegOperandFromUseList(this);
11209467b48Spatrick IsDef = Val;
11309467b48Spatrick MRI.addRegOperandToUseList(this);
11409467b48Spatrick return;
11509467b48Spatrick }
11609467b48Spatrick IsDef = Val;
11709467b48Spatrick }
11809467b48Spatrick
isRenamable() const11909467b48Spatrick bool MachineOperand::isRenamable() const {
12009467b48Spatrick assert(isReg() && "Wrong MachineOperand accessor");
121*d415bd75Srobert assert(getReg().isPhysical() &&
12209467b48Spatrick "isRenamable should only be checked on physical registers");
12309467b48Spatrick if (!IsRenamable)
12409467b48Spatrick return false;
12509467b48Spatrick
12609467b48Spatrick const MachineInstr *MI = getParent();
12709467b48Spatrick if (!MI)
12809467b48Spatrick return true;
12909467b48Spatrick
13009467b48Spatrick if (isDef())
13109467b48Spatrick return !MI->hasExtraDefRegAllocReq(MachineInstr::IgnoreBundle);
13209467b48Spatrick
13309467b48Spatrick assert(isUse() && "Reg is not def or use");
13409467b48Spatrick return !MI->hasExtraSrcRegAllocReq(MachineInstr::IgnoreBundle);
13509467b48Spatrick }
13609467b48Spatrick
setIsRenamable(bool Val)13709467b48Spatrick void MachineOperand::setIsRenamable(bool Val) {
13809467b48Spatrick assert(isReg() && "Wrong MachineOperand accessor");
139*d415bd75Srobert assert(getReg().isPhysical() &&
14009467b48Spatrick "setIsRenamable should only be called on physical registers");
14109467b48Spatrick IsRenamable = Val;
14209467b48Spatrick }
14309467b48Spatrick
14409467b48Spatrick // If this operand is currently a register operand, and if this is in a
14509467b48Spatrick // function, deregister the operand from the register's use/def list.
removeRegFromUses()14609467b48Spatrick void MachineOperand::removeRegFromUses() {
14709467b48Spatrick if (!isReg() || !isOnRegUseList())
14809467b48Spatrick return;
14909467b48Spatrick
15009467b48Spatrick if (MachineFunction *MF = getMFIfAvailable(*this))
15109467b48Spatrick MF->getRegInfo().removeRegOperandFromUseList(this);
15209467b48Spatrick }
15309467b48Spatrick
15409467b48Spatrick /// ChangeToImmediate - Replace this operand with a new immediate operand of
15509467b48Spatrick /// the specified value. If an operand is known to be an immediate already,
15609467b48Spatrick /// the setImm method should be used.
ChangeToImmediate(int64_t ImmVal,unsigned TargetFlags)15773471bf0Spatrick void MachineOperand::ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags) {
15809467b48Spatrick assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
15909467b48Spatrick
16009467b48Spatrick removeRegFromUses();
16109467b48Spatrick
16209467b48Spatrick OpKind = MO_Immediate;
16309467b48Spatrick Contents.ImmVal = ImmVal;
16473471bf0Spatrick setTargetFlags(TargetFlags);
16509467b48Spatrick }
16609467b48Spatrick
ChangeToFPImmediate(const ConstantFP * FPImm,unsigned TargetFlags)16773471bf0Spatrick void MachineOperand::ChangeToFPImmediate(const ConstantFP *FPImm,
16873471bf0Spatrick unsigned TargetFlags) {
16909467b48Spatrick assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
17009467b48Spatrick
17109467b48Spatrick removeRegFromUses();
17209467b48Spatrick
17309467b48Spatrick OpKind = MO_FPImmediate;
17409467b48Spatrick Contents.CFP = FPImm;
17573471bf0Spatrick setTargetFlags(TargetFlags);
17609467b48Spatrick }
17709467b48Spatrick
ChangeToES(const char * SymName,unsigned TargetFlags)17809467b48Spatrick void MachineOperand::ChangeToES(const char *SymName,
17909467b48Spatrick unsigned TargetFlags) {
18009467b48Spatrick assert((!isReg() || !isTied()) &&
18109467b48Spatrick "Cannot change a tied operand into an external symbol");
18209467b48Spatrick
18309467b48Spatrick removeRegFromUses();
18409467b48Spatrick
18509467b48Spatrick OpKind = MO_ExternalSymbol;
18609467b48Spatrick Contents.OffsetedInfo.Val.SymbolName = SymName;
18709467b48Spatrick setOffset(0); // Offset is always 0.
18809467b48Spatrick setTargetFlags(TargetFlags);
18909467b48Spatrick }
19009467b48Spatrick
ChangeToGA(const GlobalValue * GV,int64_t Offset,unsigned TargetFlags)19109467b48Spatrick void MachineOperand::ChangeToGA(const GlobalValue *GV, int64_t Offset,
19209467b48Spatrick unsigned TargetFlags) {
19309467b48Spatrick assert((!isReg() || !isTied()) &&
19409467b48Spatrick "Cannot change a tied operand into a global address");
19509467b48Spatrick
19609467b48Spatrick removeRegFromUses();
19709467b48Spatrick
19809467b48Spatrick OpKind = MO_GlobalAddress;
19909467b48Spatrick Contents.OffsetedInfo.Val.GV = GV;
20009467b48Spatrick setOffset(Offset);
20109467b48Spatrick setTargetFlags(TargetFlags);
20209467b48Spatrick }
20309467b48Spatrick
ChangeToMCSymbol(MCSymbol * Sym,unsigned TargetFlags)20473471bf0Spatrick void MachineOperand::ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags) {
20509467b48Spatrick assert((!isReg() || !isTied()) &&
20609467b48Spatrick "Cannot change a tied operand into an MCSymbol");
20709467b48Spatrick
20809467b48Spatrick removeRegFromUses();
20909467b48Spatrick
21009467b48Spatrick OpKind = MO_MCSymbol;
21109467b48Spatrick Contents.Sym = Sym;
21273471bf0Spatrick setTargetFlags(TargetFlags);
21309467b48Spatrick }
21409467b48Spatrick
ChangeToFrameIndex(int Idx,unsigned TargetFlags)21573471bf0Spatrick void MachineOperand::ChangeToFrameIndex(int Idx, unsigned TargetFlags) {
21609467b48Spatrick assert((!isReg() || !isTied()) &&
21709467b48Spatrick "Cannot change a tied operand into a FrameIndex");
21809467b48Spatrick
21909467b48Spatrick removeRegFromUses();
22009467b48Spatrick
22109467b48Spatrick OpKind = MO_FrameIndex;
22209467b48Spatrick setIndex(Idx);
22373471bf0Spatrick setTargetFlags(TargetFlags);
22409467b48Spatrick }
22509467b48Spatrick
ChangeToTargetIndex(unsigned Idx,int64_t Offset,unsigned TargetFlags)22609467b48Spatrick void MachineOperand::ChangeToTargetIndex(unsigned Idx, int64_t Offset,
22709467b48Spatrick unsigned TargetFlags) {
22809467b48Spatrick assert((!isReg() || !isTied()) &&
22909467b48Spatrick "Cannot change a tied operand into a FrameIndex");
23009467b48Spatrick
23109467b48Spatrick removeRegFromUses();
23209467b48Spatrick
23309467b48Spatrick OpKind = MO_TargetIndex;
23409467b48Spatrick setIndex(Idx);
23509467b48Spatrick setOffset(Offset);
23609467b48Spatrick setTargetFlags(TargetFlags);
23709467b48Spatrick }
23809467b48Spatrick
ChangeToDbgInstrRef(unsigned InstrIdx,unsigned OpIdx,unsigned TargetFlags)239*d415bd75Srobert void MachineOperand::ChangeToDbgInstrRef(unsigned InstrIdx, unsigned OpIdx,
240*d415bd75Srobert unsigned TargetFlags) {
241*d415bd75Srobert assert((!isReg() || !isTied()) &&
242*d415bd75Srobert "Cannot change a tied operand into a DbgInstrRef");
243*d415bd75Srobert
244*d415bd75Srobert removeRegFromUses();
245*d415bd75Srobert
246*d415bd75Srobert OpKind = MO_DbgInstrRef;
247*d415bd75Srobert setInstrRefInstrIndex(InstrIdx);
248*d415bd75Srobert setInstrRefOpIndex(OpIdx);
249*d415bd75Srobert setTargetFlags(TargetFlags);
250*d415bd75Srobert }
251*d415bd75Srobert
25209467b48Spatrick /// ChangeToRegister - Replace this operand with a new register operand of
25309467b48Spatrick /// the specified value. If an operand is known to be an register already,
25409467b48Spatrick /// the setReg method should be used.
ChangeToRegister(Register Reg,bool isDef,bool isImp,bool isKill,bool isDead,bool isUndef,bool isDebug)25509467b48Spatrick void MachineOperand::ChangeToRegister(Register Reg, bool isDef, bool isImp,
25609467b48Spatrick bool isKill, bool isDead, bool isUndef,
25709467b48Spatrick bool isDebug) {
25809467b48Spatrick MachineRegisterInfo *RegInfo = nullptr;
25909467b48Spatrick if (MachineFunction *MF = getMFIfAvailable(*this))
26009467b48Spatrick RegInfo = &MF->getRegInfo();
26109467b48Spatrick // If this operand is already a register operand, remove it from the
26209467b48Spatrick // register's use/def lists.
26309467b48Spatrick bool WasReg = isReg();
26409467b48Spatrick if (RegInfo && WasReg)
26509467b48Spatrick RegInfo->removeRegOperandFromUseList(this);
26609467b48Spatrick
267*d415bd75Srobert // Ensure debug instructions set debug flag on register uses.
268*d415bd75Srobert const MachineInstr *MI = getParent();
269*d415bd75Srobert if (!isDef && MI && MI->isDebugInstr())
270*d415bd75Srobert isDebug = true;
271*d415bd75Srobert
27209467b48Spatrick // Change this to a register and set the reg#.
27309467b48Spatrick assert(!(isDead && !isDef) && "Dead flag on non-def");
27409467b48Spatrick assert(!(isKill && isDef) && "Kill flag on def");
27509467b48Spatrick OpKind = MO_Register;
27609467b48Spatrick SmallContents.RegNo = Reg;
27709467b48Spatrick SubReg_TargetFlags = 0;
27809467b48Spatrick IsDef = isDef;
27909467b48Spatrick IsImp = isImp;
28009467b48Spatrick IsDeadOrKill = isKill | isDead;
28109467b48Spatrick IsRenamable = false;
28209467b48Spatrick IsUndef = isUndef;
28309467b48Spatrick IsInternalRead = false;
28409467b48Spatrick IsEarlyClobber = false;
28509467b48Spatrick IsDebug = isDebug;
28609467b48Spatrick // Ensure isOnRegUseList() returns false.
28709467b48Spatrick Contents.Reg.Prev = nullptr;
28809467b48Spatrick // Preserve the tie when the operand was already a register.
28909467b48Spatrick if (!WasReg)
29009467b48Spatrick TiedTo = 0;
29109467b48Spatrick
29209467b48Spatrick // If this operand is embedded in a function, add the operand to the
29309467b48Spatrick // register's use/def list.
29409467b48Spatrick if (RegInfo)
29509467b48Spatrick RegInfo->addRegOperandToUseList(this);
29609467b48Spatrick }
29709467b48Spatrick
29809467b48Spatrick /// isIdenticalTo - Return true if this operand is identical to the specified
29909467b48Spatrick /// operand. Note that this should stay in sync with the hash_value overload
30009467b48Spatrick /// below.
isIdenticalTo(const MachineOperand & Other) const30109467b48Spatrick bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
30209467b48Spatrick if (getType() != Other.getType() ||
30309467b48Spatrick getTargetFlags() != Other.getTargetFlags())
30409467b48Spatrick return false;
30509467b48Spatrick
30609467b48Spatrick switch (getType()) {
30709467b48Spatrick case MachineOperand::MO_Register:
30809467b48Spatrick return getReg() == Other.getReg() && isDef() == Other.isDef() &&
30909467b48Spatrick getSubReg() == Other.getSubReg();
31009467b48Spatrick case MachineOperand::MO_Immediate:
31109467b48Spatrick return getImm() == Other.getImm();
31209467b48Spatrick case MachineOperand::MO_CImmediate:
31309467b48Spatrick return getCImm() == Other.getCImm();
31409467b48Spatrick case MachineOperand::MO_FPImmediate:
31509467b48Spatrick return getFPImm() == Other.getFPImm();
31609467b48Spatrick case MachineOperand::MO_MachineBasicBlock:
31709467b48Spatrick return getMBB() == Other.getMBB();
31809467b48Spatrick case MachineOperand::MO_FrameIndex:
31909467b48Spatrick return getIndex() == Other.getIndex();
32009467b48Spatrick case MachineOperand::MO_ConstantPoolIndex:
32109467b48Spatrick case MachineOperand::MO_TargetIndex:
32209467b48Spatrick return getIndex() == Other.getIndex() && getOffset() == Other.getOffset();
32309467b48Spatrick case MachineOperand::MO_JumpTableIndex:
32409467b48Spatrick return getIndex() == Other.getIndex();
32509467b48Spatrick case MachineOperand::MO_GlobalAddress:
32609467b48Spatrick return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
32709467b48Spatrick case MachineOperand::MO_ExternalSymbol:
32809467b48Spatrick return strcmp(getSymbolName(), Other.getSymbolName()) == 0 &&
32909467b48Spatrick getOffset() == Other.getOffset();
33009467b48Spatrick case MachineOperand::MO_BlockAddress:
33109467b48Spatrick return getBlockAddress() == Other.getBlockAddress() &&
33209467b48Spatrick getOffset() == Other.getOffset();
33309467b48Spatrick case MachineOperand::MO_RegisterMask:
33409467b48Spatrick case MachineOperand::MO_RegisterLiveOut: {
33509467b48Spatrick // Shallow compare of the two RegMasks
33609467b48Spatrick const uint32_t *RegMask = getRegMask();
33709467b48Spatrick const uint32_t *OtherRegMask = Other.getRegMask();
33809467b48Spatrick if (RegMask == OtherRegMask)
33909467b48Spatrick return true;
34009467b48Spatrick
34109467b48Spatrick if (const MachineFunction *MF = getMFIfAvailable(*this)) {
34209467b48Spatrick const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
343*d415bd75Srobert unsigned RegMaskSize = MachineOperand::getRegMaskSize(TRI->getNumRegs());
34409467b48Spatrick // Deep compare of the two RegMasks
34509467b48Spatrick return std::equal(RegMask, RegMask + RegMaskSize, OtherRegMask);
34609467b48Spatrick }
34709467b48Spatrick // We don't know the size of the RegMask, so we can't deep compare the two
34809467b48Spatrick // reg masks.
34909467b48Spatrick return false;
35009467b48Spatrick }
35109467b48Spatrick case MachineOperand::MO_MCSymbol:
35209467b48Spatrick return getMCSymbol() == Other.getMCSymbol();
353*d415bd75Srobert case MachineOperand::MO_DbgInstrRef:
354*d415bd75Srobert return getInstrRefInstrIndex() == Other.getInstrRefInstrIndex() &&
355*d415bd75Srobert getInstrRefOpIndex() == Other.getInstrRefOpIndex();
35609467b48Spatrick case MachineOperand::MO_CFIIndex:
35709467b48Spatrick return getCFIIndex() == Other.getCFIIndex();
35809467b48Spatrick case MachineOperand::MO_Metadata:
35909467b48Spatrick return getMetadata() == Other.getMetadata();
36009467b48Spatrick case MachineOperand::MO_IntrinsicID:
36109467b48Spatrick return getIntrinsicID() == Other.getIntrinsicID();
36209467b48Spatrick case MachineOperand::MO_Predicate:
36309467b48Spatrick return getPredicate() == Other.getPredicate();
36409467b48Spatrick case MachineOperand::MO_ShuffleMask:
36509467b48Spatrick return getShuffleMask() == Other.getShuffleMask();
36609467b48Spatrick }
36709467b48Spatrick llvm_unreachable("Invalid machine operand type");
36809467b48Spatrick }
36909467b48Spatrick
37009467b48Spatrick // Note: this must stay exactly in sync with isIdenticalTo above.
hash_value(const MachineOperand & MO)37109467b48Spatrick hash_code llvm::hash_value(const MachineOperand &MO) {
37209467b48Spatrick switch (MO.getType()) {
37309467b48Spatrick case MachineOperand::MO_Register:
37409467b48Spatrick // Register operands don't have target flags.
37509467b48Spatrick return hash_combine(MO.getType(), (unsigned)MO.getReg(), MO.getSubReg(), MO.isDef());
37609467b48Spatrick case MachineOperand::MO_Immediate:
37709467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getImm());
37809467b48Spatrick case MachineOperand::MO_CImmediate:
37909467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCImm());
38009467b48Spatrick case MachineOperand::MO_FPImmediate:
38109467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getFPImm());
38209467b48Spatrick case MachineOperand::MO_MachineBasicBlock:
38309467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMBB());
38409467b48Spatrick case MachineOperand::MO_FrameIndex:
38509467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIndex());
38609467b48Spatrick case MachineOperand::MO_ConstantPoolIndex:
38709467b48Spatrick case MachineOperand::MO_TargetIndex:
38809467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIndex(),
38909467b48Spatrick MO.getOffset());
39009467b48Spatrick case MachineOperand::MO_JumpTableIndex:
39109467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIndex());
39209467b48Spatrick case MachineOperand::MO_ExternalSymbol:
39309467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getOffset(),
39409467b48Spatrick StringRef(MO.getSymbolName()));
39509467b48Spatrick case MachineOperand::MO_GlobalAddress:
39609467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getGlobal(),
39709467b48Spatrick MO.getOffset());
39809467b48Spatrick case MachineOperand::MO_BlockAddress:
39909467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getBlockAddress(),
40009467b48Spatrick MO.getOffset());
40109467b48Spatrick case MachineOperand::MO_RegisterMask:
402*d415bd75Srobert case MachineOperand::MO_RegisterLiveOut: {
403*d415bd75Srobert if (const MachineFunction *MF = getMFIfAvailable(MO)) {
404*d415bd75Srobert const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
405*d415bd75Srobert unsigned RegMaskSize = MachineOperand::getRegMaskSize(TRI->getNumRegs());
406*d415bd75Srobert const uint32_t *RegMask = MO.getRegMask();
407*d415bd75Srobert std::vector<stable_hash> RegMaskHashes(RegMask, RegMask + RegMaskSize);
408*d415bd75Srobert return hash_combine(MO.getType(), MO.getTargetFlags(),
409*d415bd75Srobert stable_hash_combine_array(RegMaskHashes.data(),
410*d415bd75Srobert RegMaskHashes.size()));
411*d415bd75Srobert }
412*d415bd75Srobert
413*d415bd75Srobert assert(0 && "MachineOperand not associated with any MachineFunction");
414*d415bd75Srobert return hash_combine(MO.getType(), MO.getTargetFlags());
415*d415bd75Srobert }
41609467b48Spatrick case MachineOperand::MO_Metadata:
41709467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMetadata());
41809467b48Spatrick case MachineOperand::MO_MCSymbol:
41909467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMCSymbol());
420*d415bd75Srobert case MachineOperand::MO_DbgInstrRef:
421*d415bd75Srobert return hash_combine(MO.getType(), MO.getTargetFlags(),
422*d415bd75Srobert MO.getInstrRefInstrIndex(), MO.getInstrRefOpIndex());
42309467b48Spatrick case MachineOperand::MO_CFIIndex:
42409467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCFIIndex());
42509467b48Spatrick case MachineOperand::MO_IntrinsicID:
42609467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIntrinsicID());
42709467b48Spatrick case MachineOperand::MO_Predicate:
42809467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getPredicate());
42909467b48Spatrick case MachineOperand::MO_ShuffleMask:
43009467b48Spatrick return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getShuffleMask());
43109467b48Spatrick }
43209467b48Spatrick llvm_unreachable("Invalid machine operand type");
43309467b48Spatrick }
43409467b48Spatrick
43509467b48Spatrick // Try to crawl up to the machine function and get TRI and IntrinsicInfo from
43609467b48Spatrick // it.
tryToGetTargetInfo(const MachineOperand & MO,const TargetRegisterInfo * & TRI,const TargetIntrinsicInfo * & IntrinsicInfo)43709467b48Spatrick static void tryToGetTargetInfo(const MachineOperand &MO,
43809467b48Spatrick const TargetRegisterInfo *&TRI,
43909467b48Spatrick const TargetIntrinsicInfo *&IntrinsicInfo) {
44009467b48Spatrick if (const MachineFunction *MF = getMFIfAvailable(MO)) {
44109467b48Spatrick TRI = MF->getSubtarget().getRegisterInfo();
44209467b48Spatrick IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
44309467b48Spatrick }
44409467b48Spatrick }
44509467b48Spatrick
getTargetIndexName(const MachineFunction & MF,int Index)44609467b48Spatrick static const char *getTargetIndexName(const MachineFunction &MF, int Index) {
44709467b48Spatrick const auto *TII = MF.getSubtarget().getInstrInfo();
44809467b48Spatrick assert(TII && "expected instruction info");
44909467b48Spatrick auto Indices = TII->getSerializableTargetIndices();
45009467b48Spatrick auto Found = find_if(Indices, [&](const std::pair<int, const char *> &I) {
45109467b48Spatrick return I.first == Index;
45209467b48Spatrick });
45309467b48Spatrick if (Found != Indices.end())
45409467b48Spatrick return Found->second;
45509467b48Spatrick return nullptr;
45609467b48Spatrick }
45709467b48Spatrick
getTargetIndexName() const45873471bf0Spatrick const char *MachineOperand::getTargetIndexName() const {
45973471bf0Spatrick const MachineFunction *MF = getMFIfAvailable(*this);
46073471bf0Spatrick return MF ? ::getTargetIndexName(*MF, this->getIndex()) : nullptr;
46173471bf0Spatrick }
46273471bf0Spatrick
getTargetFlagName(const TargetInstrInfo * TII,unsigned TF)46309467b48Spatrick static const char *getTargetFlagName(const TargetInstrInfo *TII, unsigned TF) {
46409467b48Spatrick auto Flags = TII->getSerializableDirectMachineOperandTargetFlags();
46509467b48Spatrick for (const auto &I : Flags) {
46609467b48Spatrick if (I.first == TF) {
46709467b48Spatrick return I.second;
46809467b48Spatrick }
46909467b48Spatrick }
47009467b48Spatrick return nullptr;
47109467b48Spatrick }
47209467b48Spatrick
printCFIRegister(unsigned DwarfReg,raw_ostream & OS,const TargetRegisterInfo * TRI)47309467b48Spatrick static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS,
47409467b48Spatrick const TargetRegisterInfo *TRI) {
47509467b48Spatrick if (!TRI) {
47609467b48Spatrick OS << "%dwarfreg." << DwarfReg;
47709467b48Spatrick return;
47809467b48Spatrick }
47909467b48Spatrick
480*d415bd75Srobert if (std::optional<unsigned> Reg = TRI->getLLVMRegNum(DwarfReg, true))
48109467b48Spatrick OS << printReg(*Reg, TRI);
48209467b48Spatrick else
48309467b48Spatrick OS << "<badreg>";
48409467b48Spatrick }
48509467b48Spatrick
printIRBlockReference(raw_ostream & OS,const BasicBlock & BB,ModuleSlotTracker & MST)48609467b48Spatrick static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB,
48709467b48Spatrick ModuleSlotTracker &MST) {
48809467b48Spatrick OS << "%ir-block.";
48909467b48Spatrick if (BB.hasName()) {
49009467b48Spatrick printLLVMNameWithoutPrefix(OS, BB.getName());
49109467b48Spatrick return;
49209467b48Spatrick }
493*d415bd75Srobert std::optional<int> Slot;
49409467b48Spatrick if (const Function *F = BB.getParent()) {
49509467b48Spatrick if (F == MST.getCurrentFunction()) {
49609467b48Spatrick Slot = MST.getLocalSlot(&BB);
49709467b48Spatrick } else if (const Module *M = F->getParent()) {
49809467b48Spatrick ModuleSlotTracker CustomMST(M, /*ShouldInitializeAllMetadata=*/false);
49909467b48Spatrick CustomMST.incorporateFunction(*F);
50009467b48Spatrick Slot = CustomMST.getLocalSlot(&BB);
50109467b48Spatrick }
50209467b48Spatrick }
50309467b48Spatrick if (Slot)
50409467b48Spatrick MachineOperand::printIRSlotNumber(OS, *Slot);
50509467b48Spatrick else
50609467b48Spatrick OS << "<unknown>";
50709467b48Spatrick }
50809467b48Spatrick
printSyncScope(raw_ostream & OS,const LLVMContext & Context,SyncScope::ID SSID,SmallVectorImpl<StringRef> & SSNs)50909467b48Spatrick static void printSyncScope(raw_ostream &OS, const LLVMContext &Context,
51009467b48Spatrick SyncScope::ID SSID,
51109467b48Spatrick SmallVectorImpl<StringRef> &SSNs) {
51209467b48Spatrick switch (SSID) {
51309467b48Spatrick case SyncScope::System:
51409467b48Spatrick break;
51509467b48Spatrick default:
51609467b48Spatrick if (SSNs.empty())
51709467b48Spatrick Context.getSyncScopeNames(SSNs);
51809467b48Spatrick
51909467b48Spatrick OS << "syncscope(\"";
52009467b48Spatrick printEscapedString(SSNs[SSID], OS);
52109467b48Spatrick OS << "\") ";
52209467b48Spatrick break;
52309467b48Spatrick }
52409467b48Spatrick }
52509467b48Spatrick
getTargetMMOFlagName(const TargetInstrInfo & TII,unsigned TMMOFlag)52609467b48Spatrick static const char *getTargetMMOFlagName(const TargetInstrInfo &TII,
52709467b48Spatrick unsigned TMMOFlag) {
52809467b48Spatrick auto Flags = TII.getSerializableMachineMemOperandTargetFlags();
52909467b48Spatrick for (const auto &I : Flags) {
53009467b48Spatrick if (I.first == TMMOFlag) {
53109467b48Spatrick return I.second;
53209467b48Spatrick }
53309467b48Spatrick }
53409467b48Spatrick return nullptr;
53509467b48Spatrick }
53609467b48Spatrick
printFrameIndex(raw_ostream & OS,int FrameIndex,bool IsFixed,const MachineFrameInfo * MFI)53709467b48Spatrick static void printFrameIndex(raw_ostream& OS, int FrameIndex, bool IsFixed,
53809467b48Spatrick const MachineFrameInfo *MFI) {
53909467b48Spatrick StringRef Name;
54009467b48Spatrick if (MFI) {
54109467b48Spatrick IsFixed = MFI->isFixedObjectIndex(FrameIndex);
54209467b48Spatrick if (const AllocaInst *Alloca = MFI->getObjectAllocation(FrameIndex))
54309467b48Spatrick if (Alloca->hasName())
54409467b48Spatrick Name = Alloca->getName();
54509467b48Spatrick if (IsFixed)
54609467b48Spatrick FrameIndex -= MFI->getObjectIndexBegin();
54709467b48Spatrick }
54809467b48Spatrick MachineOperand::printStackObjectReference(OS, FrameIndex, IsFixed, Name);
54909467b48Spatrick }
55009467b48Spatrick
printSubRegIdx(raw_ostream & OS,uint64_t Index,const TargetRegisterInfo * TRI)55109467b48Spatrick void MachineOperand::printSubRegIdx(raw_ostream &OS, uint64_t Index,
55209467b48Spatrick const TargetRegisterInfo *TRI) {
55309467b48Spatrick OS << "%subreg.";
554*d415bd75Srobert if (TRI && Index != 0 && Index < TRI->getNumSubRegIndices())
55509467b48Spatrick OS << TRI->getSubRegIndexName(Index);
55609467b48Spatrick else
55709467b48Spatrick OS << Index;
55809467b48Spatrick }
55909467b48Spatrick
printTargetFlags(raw_ostream & OS,const MachineOperand & Op)56009467b48Spatrick void MachineOperand::printTargetFlags(raw_ostream &OS,
56109467b48Spatrick const MachineOperand &Op) {
56209467b48Spatrick if (!Op.getTargetFlags())
56309467b48Spatrick return;
56409467b48Spatrick const MachineFunction *MF = getMFIfAvailable(Op);
56509467b48Spatrick if (!MF)
56609467b48Spatrick return;
56709467b48Spatrick
56809467b48Spatrick const auto *TII = MF->getSubtarget().getInstrInfo();
56909467b48Spatrick assert(TII && "expected instruction info");
57009467b48Spatrick auto Flags = TII->decomposeMachineOperandsTargetFlags(Op.getTargetFlags());
57109467b48Spatrick OS << "target-flags(";
57209467b48Spatrick const bool HasDirectFlags = Flags.first;
57309467b48Spatrick const bool HasBitmaskFlags = Flags.second;
57409467b48Spatrick if (!HasDirectFlags && !HasBitmaskFlags) {
57509467b48Spatrick OS << "<unknown>) ";
57609467b48Spatrick return;
57709467b48Spatrick }
57809467b48Spatrick if (HasDirectFlags) {
57909467b48Spatrick if (const auto *Name = getTargetFlagName(TII, Flags.first))
58009467b48Spatrick OS << Name;
58109467b48Spatrick else
58209467b48Spatrick OS << "<unknown target flag>";
58309467b48Spatrick }
58409467b48Spatrick if (!HasBitmaskFlags) {
58509467b48Spatrick OS << ") ";
58609467b48Spatrick return;
58709467b48Spatrick }
58809467b48Spatrick bool IsCommaNeeded = HasDirectFlags;
58909467b48Spatrick unsigned BitMask = Flags.second;
59009467b48Spatrick auto BitMasks = TII->getSerializableBitmaskMachineOperandTargetFlags();
59109467b48Spatrick for (const auto &Mask : BitMasks) {
59209467b48Spatrick // Check if the flag's bitmask has the bits of the current mask set.
59309467b48Spatrick if ((BitMask & Mask.first) == Mask.first) {
59409467b48Spatrick if (IsCommaNeeded)
59509467b48Spatrick OS << ", ";
59609467b48Spatrick IsCommaNeeded = true;
59709467b48Spatrick OS << Mask.second;
59809467b48Spatrick // Clear the bits which were serialized from the flag's bitmask.
59909467b48Spatrick BitMask &= ~(Mask.first);
60009467b48Spatrick }
60109467b48Spatrick }
60209467b48Spatrick if (BitMask) {
60309467b48Spatrick // When the resulting flag's bitmask isn't zero, we know that we didn't
60409467b48Spatrick // serialize all of the bit flags.
60509467b48Spatrick if (IsCommaNeeded)
60609467b48Spatrick OS << ", ";
60709467b48Spatrick OS << "<unknown bitmask target flag>";
60809467b48Spatrick }
60909467b48Spatrick OS << ") ";
61009467b48Spatrick }
61109467b48Spatrick
printSymbol(raw_ostream & OS,MCSymbol & Sym)61209467b48Spatrick void MachineOperand::printSymbol(raw_ostream &OS, MCSymbol &Sym) {
61309467b48Spatrick OS << "<mcsymbol " << Sym << ">";
61409467b48Spatrick }
61509467b48Spatrick
printStackObjectReference(raw_ostream & OS,unsigned FrameIndex,bool IsFixed,StringRef Name)61609467b48Spatrick void MachineOperand::printStackObjectReference(raw_ostream &OS,
61709467b48Spatrick unsigned FrameIndex,
61809467b48Spatrick bool IsFixed, StringRef Name) {
61909467b48Spatrick if (IsFixed) {
62009467b48Spatrick OS << "%fixed-stack." << FrameIndex;
62109467b48Spatrick return;
62209467b48Spatrick }
62309467b48Spatrick
62409467b48Spatrick OS << "%stack." << FrameIndex;
62509467b48Spatrick if (!Name.empty())
62609467b48Spatrick OS << '.' << Name;
62709467b48Spatrick }
62809467b48Spatrick
printOperandOffset(raw_ostream & OS,int64_t Offset)62909467b48Spatrick void MachineOperand::printOperandOffset(raw_ostream &OS, int64_t Offset) {
63009467b48Spatrick if (Offset == 0)
63109467b48Spatrick return;
63209467b48Spatrick if (Offset < 0) {
63309467b48Spatrick OS << " - " << -Offset;
63409467b48Spatrick return;
63509467b48Spatrick }
63609467b48Spatrick OS << " + " << Offset;
63709467b48Spatrick }
63809467b48Spatrick
printIRSlotNumber(raw_ostream & OS,int Slot)63909467b48Spatrick void MachineOperand::printIRSlotNumber(raw_ostream &OS, int Slot) {
64009467b48Spatrick if (Slot == -1)
64109467b48Spatrick OS << "<badref>";
64209467b48Spatrick else
64309467b48Spatrick OS << Slot;
64409467b48Spatrick }
64509467b48Spatrick
printCFI(raw_ostream & OS,const MCCFIInstruction & CFI,const TargetRegisterInfo * TRI)64609467b48Spatrick static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI,
64709467b48Spatrick const TargetRegisterInfo *TRI) {
64809467b48Spatrick switch (CFI.getOperation()) {
64909467b48Spatrick case MCCFIInstruction::OpSameValue:
65009467b48Spatrick OS << "same_value ";
65109467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
65209467b48Spatrick MachineOperand::printSymbol(OS, *Label);
65309467b48Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
65409467b48Spatrick break;
65509467b48Spatrick case MCCFIInstruction::OpRememberState:
65609467b48Spatrick OS << "remember_state ";
65709467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
65809467b48Spatrick MachineOperand::printSymbol(OS, *Label);
65909467b48Spatrick break;
66009467b48Spatrick case MCCFIInstruction::OpRestoreState:
66109467b48Spatrick OS << "restore_state ";
66209467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
66309467b48Spatrick MachineOperand::printSymbol(OS, *Label);
66409467b48Spatrick break;
66509467b48Spatrick case MCCFIInstruction::OpOffset:
66609467b48Spatrick OS << "offset ";
66709467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
66809467b48Spatrick MachineOperand::printSymbol(OS, *Label);
66909467b48Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
67009467b48Spatrick OS << ", " << CFI.getOffset();
67109467b48Spatrick break;
67209467b48Spatrick case MCCFIInstruction::OpDefCfaRegister:
67309467b48Spatrick OS << "def_cfa_register ";
67409467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
67509467b48Spatrick MachineOperand::printSymbol(OS, *Label);
67609467b48Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
67709467b48Spatrick break;
67809467b48Spatrick case MCCFIInstruction::OpDefCfaOffset:
67909467b48Spatrick OS << "def_cfa_offset ";
68009467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
68109467b48Spatrick MachineOperand::printSymbol(OS, *Label);
68209467b48Spatrick OS << CFI.getOffset();
68309467b48Spatrick break;
68409467b48Spatrick case MCCFIInstruction::OpDefCfa:
68509467b48Spatrick OS << "def_cfa ";
68609467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
68709467b48Spatrick MachineOperand::printSymbol(OS, *Label);
68809467b48Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
68909467b48Spatrick OS << ", " << CFI.getOffset();
69009467b48Spatrick break;
69173471bf0Spatrick case MCCFIInstruction::OpLLVMDefAspaceCfa:
69273471bf0Spatrick OS << "llvm_def_aspace_cfa ";
69373471bf0Spatrick if (MCSymbol *Label = CFI.getLabel())
69473471bf0Spatrick MachineOperand::printSymbol(OS, *Label);
69573471bf0Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
69673471bf0Spatrick OS << ", " << CFI.getOffset();
69773471bf0Spatrick OS << ", " << CFI.getAddressSpace();
69873471bf0Spatrick break;
69909467b48Spatrick case MCCFIInstruction::OpRelOffset:
70009467b48Spatrick OS << "rel_offset ";
70109467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
70209467b48Spatrick MachineOperand::printSymbol(OS, *Label);
70309467b48Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
70409467b48Spatrick OS << ", " << CFI.getOffset();
70509467b48Spatrick break;
70609467b48Spatrick case MCCFIInstruction::OpAdjustCfaOffset:
70709467b48Spatrick OS << "adjust_cfa_offset ";
70809467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
70909467b48Spatrick MachineOperand::printSymbol(OS, *Label);
71009467b48Spatrick OS << CFI.getOffset();
71109467b48Spatrick break;
71209467b48Spatrick case MCCFIInstruction::OpRestore:
71309467b48Spatrick OS << "restore ";
71409467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
71509467b48Spatrick MachineOperand::printSymbol(OS, *Label);
71609467b48Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
71709467b48Spatrick break;
71809467b48Spatrick case MCCFIInstruction::OpEscape: {
71909467b48Spatrick OS << "escape ";
72009467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
72109467b48Spatrick MachineOperand::printSymbol(OS, *Label);
72209467b48Spatrick if (!CFI.getValues().empty()) {
72309467b48Spatrick size_t e = CFI.getValues().size() - 1;
72409467b48Spatrick for (size_t i = 0; i < e; ++i)
72509467b48Spatrick OS << format("0x%02x", uint8_t(CFI.getValues()[i])) << ", ";
726097a140dSpatrick OS << format("0x%02x", uint8_t(CFI.getValues()[e]));
72709467b48Spatrick }
72809467b48Spatrick break;
72909467b48Spatrick }
73009467b48Spatrick case MCCFIInstruction::OpUndefined:
73109467b48Spatrick OS << "undefined ";
73209467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
73309467b48Spatrick MachineOperand::printSymbol(OS, *Label);
73409467b48Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
73509467b48Spatrick break;
73609467b48Spatrick case MCCFIInstruction::OpRegister:
73709467b48Spatrick OS << "register ";
73809467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
73909467b48Spatrick MachineOperand::printSymbol(OS, *Label);
74009467b48Spatrick printCFIRegister(CFI.getRegister(), OS, TRI);
74109467b48Spatrick OS << ", ";
74209467b48Spatrick printCFIRegister(CFI.getRegister2(), OS, TRI);
74309467b48Spatrick break;
74409467b48Spatrick case MCCFIInstruction::OpWindowSave:
74509467b48Spatrick OS << "window_save ";
74609467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
74709467b48Spatrick MachineOperand::printSymbol(OS, *Label);
74809467b48Spatrick break;
74909467b48Spatrick case MCCFIInstruction::OpNegateRAState:
75009467b48Spatrick OS << "negate_ra_sign_state ";
75109467b48Spatrick if (MCSymbol *Label = CFI.getLabel())
75209467b48Spatrick MachineOperand::printSymbol(OS, *Label);
75309467b48Spatrick break;
75409467b48Spatrick default:
75509467b48Spatrick // TODO: Print the other CFI Operations.
75609467b48Spatrick OS << "<unserializable cfi directive>";
75709467b48Spatrick break;
75809467b48Spatrick }
75909467b48Spatrick }
76009467b48Spatrick
print(raw_ostream & OS,const TargetRegisterInfo * TRI,const TargetIntrinsicInfo * IntrinsicInfo) const76109467b48Spatrick void MachineOperand::print(raw_ostream &OS, const TargetRegisterInfo *TRI,
76209467b48Spatrick const TargetIntrinsicInfo *IntrinsicInfo) const {
76309467b48Spatrick print(OS, LLT{}, TRI, IntrinsicInfo);
76409467b48Spatrick }
76509467b48Spatrick
print(raw_ostream & OS,LLT TypeToPrint,const TargetRegisterInfo * TRI,const TargetIntrinsicInfo * IntrinsicInfo) const76609467b48Spatrick void MachineOperand::print(raw_ostream &OS, LLT TypeToPrint,
76709467b48Spatrick const TargetRegisterInfo *TRI,
76809467b48Spatrick const TargetIntrinsicInfo *IntrinsicInfo) const {
76909467b48Spatrick tryToGetTargetInfo(*this, TRI, IntrinsicInfo);
77009467b48Spatrick ModuleSlotTracker DummyMST(nullptr);
771*d415bd75Srobert print(OS, DummyMST, TypeToPrint, std::nullopt, /*PrintDef=*/false,
77209467b48Spatrick /*IsStandalone=*/true,
77309467b48Spatrick /*ShouldPrintRegisterTies=*/true,
77409467b48Spatrick /*TiedOperandIdx=*/0, TRI, IntrinsicInfo);
77509467b48Spatrick }
77609467b48Spatrick
print(raw_ostream & OS,ModuleSlotTracker & MST,LLT TypeToPrint,std::optional<unsigned> OpIdx,bool PrintDef,bool IsStandalone,bool ShouldPrintRegisterTies,unsigned TiedOperandIdx,const TargetRegisterInfo * TRI,const TargetIntrinsicInfo * IntrinsicInfo) const77709467b48Spatrick void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
778*d415bd75Srobert LLT TypeToPrint, std::optional<unsigned> OpIdx,
779*d415bd75Srobert bool PrintDef, bool IsStandalone,
780*d415bd75Srobert bool ShouldPrintRegisterTies,
78109467b48Spatrick unsigned TiedOperandIdx,
78209467b48Spatrick const TargetRegisterInfo *TRI,
78309467b48Spatrick const TargetIntrinsicInfo *IntrinsicInfo) const {
78409467b48Spatrick printTargetFlags(OS, *this);
78509467b48Spatrick switch (getType()) {
78609467b48Spatrick case MachineOperand::MO_Register: {
78709467b48Spatrick Register Reg = getReg();
78809467b48Spatrick if (isImplicit())
78909467b48Spatrick OS << (isDef() ? "implicit-def " : "implicit ");
79009467b48Spatrick else if (PrintDef && isDef())
79109467b48Spatrick // Print the 'def' flag only when the operand is defined after '='.
79209467b48Spatrick OS << "def ";
79309467b48Spatrick if (isInternalRead())
79409467b48Spatrick OS << "internal ";
79509467b48Spatrick if (isDead())
79609467b48Spatrick OS << "dead ";
79709467b48Spatrick if (isKill())
79809467b48Spatrick OS << "killed ";
79909467b48Spatrick if (isUndef())
80009467b48Spatrick OS << "undef ";
80109467b48Spatrick if (isEarlyClobber())
80209467b48Spatrick OS << "early-clobber ";
803*d415bd75Srobert if (getReg().isPhysical() && isRenamable())
80409467b48Spatrick OS << "renamable ";
80509467b48Spatrick // isDebug() is exactly true for register operands of a DBG_VALUE. So we
80609467b48Spatrick // simply infer it when parsing and do not need to print it.
80709467b48Spatrick
80809467b48Spatrick const MachineRegisterInfo *MRI = nullptr;
809*d415bd75Srobert if (Reg.isVirtual()) {
81009467b48Spatrick if (const MachineFunction *MF = getMFIfAvailable(*this)) {
81109467b48Spatrick MRI = &MF->getRegInfo();
81209467b48Spatrick }
81309467b48Spatrick }
81409467b48Spatrick
81509467b48Spatrick OS << printReg(Reg, TRI, 0, MRI);
81609467b48Spatrick // Print the sub register.
81709467b48Spatrick if (unsigned SubReg = getSubReg()) {
81809467b48Spatrick if (TRI)
81909467b48Spatrick OS << '.' << TRI->getSubRegIndexName(SubReg);
82009467b48Spatrick else
82109467b48Spatrick OS << ".subreg" << SubReg;
82209467b48Spatrick }
82309467b48Spatrick // Print the register class / bank.
824*d415bd75Srobert if (Reg.isVirtual()) {
82509467b48Spatrick if (const MachineFunction *MF = getMFIfAvailable(*this)) {
82609467b48Spatrick const MachineRegisterInfo &MRI = MF->getRegInfo();
82709467b48Spatrick if (IsStandalone || !PrintDef || MRI.def_empty(Reg)) {
82809467b48Spatrick OS << ':';
82909467b48Spatrick OS << printRegClassOrBank(Reg, MRI, TRI);
83009467b48Spatrick }
83109467b48Spatrick }
83209467b48Spatrick }
83309467b48Spatrick // Print ties.
83409467b48Spatrick if (ShouldPrintRegisterTies && isTied() && !isDef())
83509467b48Spatrick OS << "(tied-def " << TiedOperandIdx << ")";
83609467b48Spatrick // Print types.
83709467b48Spatrick if (TypeToPrint.isValid())
83809467b48Spatrick OS << '(' << TypeToPrint << ')';
83909467b48Spatrick break;
84009467b48Spatrick }
84109467b48Spatrick case MachineOperand::MO_Immediate: {
84209467b48Spatrick const MIRFormatter *Formatter = nullptr;
84309467b48Spatrick if (const MachineFunction *MF = getMFIfAvailable(*this)) {
84409467b48Spatrick const auto *TII = MF->getSubtarget().getInstrInfo();
84509467b48Spatrick assert(TII && "expected instruction info");
84609467b48Spatrick Formatter = TII->getMIRFormatter();
84709467b48Spatrick }
84809467b48Spatrick if (Formatter)
84909467b48Spatrick Formatter->printImm(OS, *getParent(), OpIdx, getImm());
85009467b48Spatrick else
85109467b48Spatrick OS << getImm();
85209467b48Spatrick break;
85309467b48Spatrick }
85409467b48Spatrick case MachineOperand::MO_CImmediate:
85509467b48Spatrick getCImm()->printAsOperand(OS, /*PrintType=*/true, MST);
85609467b48Spatrick break;
85709467b48Spatrick case MachineOperand::MO_FPImmediate:
85809467b48Spatrick getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST);
85909467b48Spatrick break;
86009467b48Spatrick case MachineOperand::MO_MachineBasicBlock:
86109467b48Spatrick OS << printMBBReference(*getMBB());
86209467b48Spatrick break;
86309467b48Spatrick case MachineOperand::MO_FrameIndex: {
86409467b48Spatrick int FrameIndex = getIndex();
86509467b48Spatrick bool IsFixed = false;
86609467b48Spatrick const MachineFrameInfo *MFI = nullptr;
86709467b48Spatrick if (const MachineFunction *MF = getMFIfAvailable(*this))
86809467b48Spatrick MFI = &MF->getFrameInfo();
86909467b48Spatrick printFrameIndex(OS, FrameIndex, IsFixed, MFI);
87009467b48Spatrick break;
87109467b48Spatrick }
87209467b48Spatrick case MachineOperand::MO_ConstantPoolIndex:
87309467b48Spatrick OS << "%const." << getIndex();
87409467b48Spatrick printOperandOffset(OS, getOffset());
87509467b48Spatrick break;
87609467b48Spatrick case MachineOperand::MO_TargetIndex: {
87709467b48Spatrick OS << "target-index(";
87809467b48Spatrick const char *Name = "<unknown>";
87909467b48Spatrick if (const MachineFunction *MF = getMFIfAvailable(*this))
88073471bf0Spatrick if (const auto *TargetIndexName = ::getTargetIndexName(*MF, getIndex()))
88109467b48Spatrick Name = TargetIndexName;
88209467b48Spatrick OS << Name << ')';
88309467b48Spatrick printOperandOffset(OS, getOffset());
88409467b48Spatrick break;
88509467b48Spatrick }
88609467b48Spatrick case MachineOperand::MO_JumpTableIndex:
88709467b48Spatrick OS << printJumpTableEntryReference(getIndex());
88809467b48Spatrick break;
88909467b48Spatrick case MachineOperand::MO_GlobalAddress:
89009467b48Spatrick getGlobal()->printAsOperand(OS, /*PrintType=*/false, MST);
89109467b48Spatrick printOperandOffset(OS, getOffset());
89209467b48Spatrick break;
89309467b48Spatrick case MachineOperand::MO_ExternalSymbol: {
89409467b48Spatrick StringRef Name = getSymbolName();
89509467b48Spatrick OS << '&';
89609467b48Spatrick if (Name.empty()) {
89709467b48Spatrick OS << "\"\"";
89809467b48Spatrick } else {
89909467b48Spatrick printLLVMNameWithoutPrefix(OS, Name);
90009467b48Spatrick }
90109467b48Spatrick printOperandOffset(OS, getOffset());
90209467b48Spatrick break;
90309467b48Spatrick }
90409467b48Spatrick case MachineOperand::MO_BlockAddress: {
90509467b48Spatrick OS << "blockaddress(";
90609467b48Spatrick getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false,
90709467b48Spatrick MST);
90809467b48Spatrick OS << ", ";
90909467b48Spatrick printIRBlockReference(OS, *getBlockAddress()->getBasicBlock(), MST);
91009467b48Spatrick OS << ')';
91109467b48Spatrick MachineOperand::printOperandOffset(OS, getOffset());
91209467b48Spatrick break;
91309467b48Spatrick }
91409467b48Spatrick case MachineOperand::MO_RegisterMask: {
91509467b48Spatrick OS << "<regmask";
91609467b48Spatrick if (TRI) {
91709467b48Spatrick unsigned NumRegsInMask = 0;
91809467b48Spatrick unsigned NumRegsEmitted = 0;
91909467b48Spatrick for (unsigned i = 0; i < TRI->getNumRegs(); ++i) {
92009467b48Spatrick unsigned MaskWord = i / 32;
92109467b48Spatrick unsigned MaskBit = i % 32;
92209467b48Spatrick if (getRegMask()[MaskWord] & (1 << MaskBit)) {
92309467b48Spatrick if (PrintRegMaskNumRegs < 0 ||
92409467b48Spatrick NumRegsEmitted <= static_cast<unsigned>(PrintRegMaskNumRegs)) {
92509467b48Spatrick OS << " " << printReg(i, TRI);
92609467b48Spatrick NumRegsEmitted++;
92709467b48Spatrick }
92809467b48Spatrick NumRegsInMask++;
92909467b48Spatrick }
93009467b48Spatrick }
93109467b48Spatrick if (NumRegsEmitted != NumRegsInMask)
93209467b48Spatrick OS << " and " << (NumRegsInMask - NumRegsEmitted) << " more...";
93309467b48Spatrick } else {
93409467b48Spatrick OS << " ...";
93509467b48Spatrick }
93609467b48Spatrick OS << ">";
93709467b48Spatrick break;
93809467b48Spatrick }
93909467b48Spatrick case MachineOperand::MO_RegisterLiveOut: {
94009467b48Spatrick const uint32_t *RegMask = getRegLiveOut();
94109467b48Spatrick OS << "liveout(";
94209467b48Spatrick if (!TRI) {
94309467b48Spatrick OS << "<unknown>";
94409467b48Spatrick } else {
94509467b48Spatrick bool IsCommaNeeded = false;
94609467b48Spatrick for (unsigned Reg = 0, E = TRI->getNumRegs(); Reg < E; ++Reg) {
94709467b48Spatrick if (RegMask[Reg / 32] & (1U << (Reg % 32))) {
94809467b48Spatrick if (IsCommaNeeded)
94909467b48Spatrick OS << ", ";
95009467b48Spatrick OS << printReg(Reg, TRI);
95109467b48Spatrick IsCommaNeeded = true;
95209467b48Spatrick }
95309467b48Spatrick }
95409467b48Spatrick }
95509467b48Spatrick OS << ")";
95609467b48Spatrick break;
95709467b48Spatrick }
95809467b48Spatrick case MachineOperand::MO_Metadata:
95909467b48Spatrick getMetadata()->printAsOperand(OS, MST);
96009467b48Spatrick break;
96109467b48Spatrick case MachineOperand::MO_MCSymbol:
96209467b48Spatrick printSymbol(OS, *getMCSymbol());
96309467b48Spatrick break;
964*d415bd75Srobert case MachineOperand::MO_DbgInstrRef: {
965*d415bd75Srobert OS << "dbg-instr-ref(" << getInstrRefInstrIndex() << ", "
966*d415bd75Srobert << getInstrRefOpIndex() << ')';
967*d415bd75Srobert break;
968*d415bd75Srobert }
96909467b48Spatrick case MachineOperand::MO_CFIIndex: {
97009467b48Spatrick if (const MachineFunction *MF = getMFIfAvailable(*this))
97109467b48Spatrick printCFI(OS, MF->getFrameInstructions()[getCFIIndex()], TRI);
97209467b48Spatrick else
97309467b48Spatrick OS << "<cfi directive>";
97409467b48Spatrick break;
97509467b48Spatrick }
97609467b48Spatrick case MachineOperand::MO_IntrinsicID: {
97709467b48Spatrick Intrinsic::ID ID = getIntrinsicID();
97809467b48Spatrick if (ID < Intrinsic::num_intrinsics)
97973471bf0Spatrick OS << "intrinsic(@" << Intrinsic::getBaseName(ID) << ')';
98009467b48Spatrick else if (IntrinsicInfo)
98109467b48Spatrick OS << "intrinsic(@" << IntrinsicInfo->getName(ID) << ')';
98209467b48Spatrick else
98309467b48Spatrick OS << "intrinsic(" << ID << ')';
98409467b48Spatrick break;
98509467b48Spatrick }
98609467b48Spatrick case MachineOperand::MO_Predicate: {
98709467b48Spatrick auto Pred = static_cast<CmpInst::Predicate>(getPredicate());
98809467b48Spatrick OS << (CmpInst::isIntPredicate(Pred) ? "int" : "float") << "pred("
98909467b48Spatrick << CmpInst::getPredicateName(Pred) << ')';
99009467b48Spatrick break;
99109467b48Spatrick }
99209467b48Spatrick case MachineOperand::MO_ShuffleMask:
99309467b48Spatrick OS << "shufflemask(";
99409467b48Spatrick ArrayRef<int> Mask = getShuffleMask();
99509467b48Spatrick StringRef Separator;
99609467b48Spatrick for (int Elt : Mask) {
99709467b48Spatrick if (Elt == -1)
99809467b48Spatrick OS << Separator << "undef";
99909467b48Spatrick else
100009467b48Spatrick OS << Separator << Elt;
100109467b48Spatrick Separator = ", ";
100209467b48Spatrick }
100309467b48Spatrick
100409467b48Spatrick OS << ')';
100509467b48Spatrick break;
100609467b48Spatrick }
100709467b48Spatrick }
100809467b48Spatrick
100909467b48Spatrick #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
dump() const101009467b48Spatrick LLVM_DUMP_METHOD void MachineOperand::dump() const { dbgs() << *this << '\n'; }
101109467b48Spatrick #endif
101209467b48Spatrick
101309467b48Spatrick //===----------------------------------------------------------------------===//
101409467b48Spatrick // MachineMemOperand Implementation
101509467b48Spatrick //===----------------------------------------------------------------------===//
101609467b48Spatrick
101709467b48Spatrick /// getAddrSpace - Return the LLVM IR address space number that this pointer
101809467b48Spatrick /// points into.
getAddrSpace() const101909467b48Spatrick unsigned MachinePointerInfo::getAddrSpace() const { return AddrSpace; }
102009467b48Spatrick
102109467b48Spatrick /// isDereferenceable - Return true if V is always dereferenceable for
102209467b48Spatrick /// Offset + Size byte.
isDereferenceable(unsigned Size,LLVMContext & C,const DataLayout & DL) const102309467b48Spatrick bool MachinePointerInfo::isDereferenceable(unsigned Size, LLVMContext &C,
102409467b48Spatrick const DataLayout &DL) const {
102509467b48Spatrick if (!V.is<const Value *>())
102609467b48Spatrick return false;
102709467b48Spatrick
102809467b48Spatrick const Value *BasePtr = V.get<const Value *>();
102909467b48Spatrick if (BasePtr == nullptr)
103009467b48Spatrick return false;
103109467b48Spatrick
103209467b48Spatrick return isDereferenceableAndAlignedPointer(
1033097a140dSpatrick BasePtr, Align(1), APInt(DL.getPointerSizeInBits(), Offset + Size), DL);
103409467b48Spatrick }
103509467b48Spatrick
103609467b48Spatrick /// getConstantPool - Return a MachinePointerInfo record that refers to the
103709467b48Spatrick /// constant pool.
getConstantPool(MachineFunction & MF)103809467b48Spatrick MachinePointerInfo MachinePointerInfo::getConstantPool(MachineFunction &MF) {
103909467b48Spatrick return MachinePointerInfo(MF.getPSVManager().getConstantPool());
104009467b48Spatrick }
104109467b48Spatrick
104209467b48Spatrick /// getFixedStack - Return a MachinePointerInfo record that refers to the
104309467b48Spatrick /// the specified FrameIndex.
getFixedStack(MachineFunction & MF,int FI,int64_t Offset)104409467b48Spatrick MachinePointerInfo MachinePointerInfo::getFixedStack(MachineFunction &MF,
104509467b48Spatrick int FI, int64_t Offset) {
104609467b48Spatrick return MachinePointerInfo(MF.getPSVManager().getFixedStack(FI), Offset);
104709467b48Spatrick }
104809467b48Spatrick
getJumpTable(MachineFunction & MF)104909467b48Spatrick MachinePointerInfo MachinePointerInfo::getJumpTable(MachineFunction &MF) {
105009467b48Spatrick return MachinePointerInfo(MF.getPSVManager().getJumpTable());
105109467b48Spatrick }
105209467b48Spatrick
getGOT(MachineFunction & MF)105309467b48Spatrick MachinePointerInfo MachinePointerInfo::getGOT(MachineFunction &MF) {
105409467b48Spatrick return MachinePointerInfo(MF.getPSVManager().getGOT());
105509467b48Spatrick }
105609467b48Spatrick
getStack(MachineFunction & MF,int64_t Offset,uint8_t ID)105709467b48Spatrick MachinePointerInfo MachinePointerInfo::getStack(MachineFunction &MF,
105809467b48Spatrick int64_t Offset, uint8_t ID) {
105909467b48Spatrick return MachinePointerInfo(MF.getPSVManager().getStack(), Offset, ID);
106009467b48Spatrick }
106109467b48Spatrick
getUnknownStack(MachineFunction & MF)106209467b48Spatrick MachinePointerInfo MachinePointerInfo::getUnknownStack(MachineFunction &MF) {
106309467b48Spatrick return MachinePointerInfo(MF.getDataLayout().getAllocaAddrSpace());
106409467b48Spatrick }
106509467b48Spatrick
MachineMemOperand(MachinePointerInfo ptrinfo,Flags f,LLT type,Align a,const AAMDNodes & AAInfo,const MDNode * Ranges,SyncScope::ID SSID,AtomicOrdering Ordering,AtomicOrdering FailureOrdering)106609467b48Spatrick MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f,
106773471bf0Spatrick LLT type, Align a, const AAMDNodes &AAInfo,
106809467b48Spatrick const MDNode *Ranges, SyncScope::ID SSID,
106909467b48Spatrick AtomicOrdering Ordering,
107009467b48Spatrick AtomicOrdering FailureOrdering)
107173471bf0Spatrick : PtrInfo(ptrinfo), MemoryType(type), FlagVals(f), BaseAlign(a),
107273471bf0Spatrick AAInfo(AAInfo), Ranges(Ranges) {
107309467b48Spatrick assert((PtrInfo.V.isNull() || PtrInfo.V.is<const PseudoSourceValue *>() ||
107409467b48Spatrick isa<PointerType>(PtrInfo.V.get<const Value *>()->getType())) &&
107509467b48Spatrick "invalid pointer value");
107609467b48Spatrick assert((isLoad() || isStore()) && "Not a load/store!");
107709467b48Spatrick
107809467b48Spatrick AtomicInfo.SSID = static_cast<unsigned>(SSID);
107909467b48Spatrick assert(getSyncScopeID() == SSID && "Value truncated");
108009467b48Spatrick AtomicInfo.Ordering = static_cast<unsigned>(Ordering);
108173471bf0Spatrick assert(getSuccessOrdering() == Ordering && "Value truncated");
108209467b48Spatrick AtomicInfo.FailureOrdering = static_cast<unsigned>(FailureOrdering);
108309467b48Spatrick assert(getFailureOrdering() == FailureOrdering && "Value truncated");
108409467b48Spatrick }
108509467b48Spatrick
MachineMemOperand(MachinePointerInfo ptrinfo,Flags f,uint64_t s,Align a,const AAMDNodes & AAInfo,const MDNode * Ranges,SyncScope::ID SSID,AtomicOrdering Ordering,AtomicOrdering FailureOrdering)108673471bf0Spatrick MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f,
108773471bf0Spatrick uint64_t s, Align a,
108873471bf0Spatrick const AAMDNodes &AAInfo,
108973471bf0Spatrick const MDNode *Ranges, SyncScope::ID SSID,
109073471bf0Spatrick AtomicOrdering Ordering,
109173471bf0Spatrick AtomicOrdering FailureOrdering)
109273471bf0Spatrick : MachineMemOperand(ptrinfo, f,
109373471bf0Spatrick s == ~UINT64_C(0) ? LLT() : LLT::scalar(8 * s), a,
109473471bf0Spatrick AAInfo, Ranges, SSID, Ordering, FailureOrdering) {}
109573471bf0Spatrick
109609467b48Spatrick /// Profile - Gather unique data for the object.
109709467b48Spatrick ///
Profile(FoldingSetNodeID & ID) const109809467b48Spatrick void MachineMemOperand::Profile(FoldingSetNodeID &ID) const {
109909467b48Spatrick ID.AddInteger(getOffset());
110073471bf0Spatrick ID.AddInteger(getMemoryType().getUniqueRAWLLTData());
110109467b48Spatrick ID.AddPointer(getOpaqueValue());
110209467b48Spatrick ID.AddInteger(getFlags());
1103097a140dSpatrick ID.AddInteger(getBaseAlign().value());
110409467b48Spatrick }
110509467b48Spatrick
refineAlignment(const MachineMemOperand * MMO)110609467b48Spatrick void MachineMemOperand::refineAlignment(const MachineMemOperand *MMO) {
110709467b48Spatrick // The Value and Offset may differ due to CSE. But the flags and size
110809467b48Spatrick // should be the same.
110909467b48Spatrick assert(MMO->getFlags() == getFlags() && "Flags mismatch!");
1110*d415bd75Srobert assert((MMO->getSize() == ~UINT64_C(0) || getSize() == ~UINT64_C(0) ||
1111*d415bd75Srobert MMO->getSize() == getSize()) &&
1112*d415bd75Srobert "Size mismatch!");
111309467b48Spatrick
1114097a140dSpatrick if (MMO->getBaseAlign() >= getBaseAlign()) {
111509467b48Spatrick // Update the alignment value.
1116097a140dSpatrick BaseAlign = MMO->getBaseAlign();
111709467b48Spatrick // Also update the base and offset, because the new alignment may
111809467b48Spatrick // not be applicable with the old ones.
111909467b48Spatrick PtrInfo = MMO->PtrInfo;
112009467b48Spatrick }
112109467b48Spatrick }
112209467b48Spatrick
1123097a140dSpatrick /// getAlign - Return the minimum known alignment in bytes of the
1124097a140dSpatrick /// actual memory reference.
getAlign() const1125097a140dSpatrick Align MachineMemOperand::getAlign() const {
1126097a140dSpatrick return commonAlignment(getBaseAlign(), getOffset());
112709467b48Spatrick }
112809467b48Spatrick
print(raw_ostream & OS,ModuleSlotTracker & MST,SmallVectorImpl<StringRef> & SSNs,const LLVMContext & Context,const MachineFrameInfo * MFI,const TargetInstrInfo * TII) const112909467b48Spatrick void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
113009467b48Spatrick SmallVectorImpl<StringRef> &SSNs,
113109467b48Spatrick const LLVMContext &Context,
113209467b48Spatrick const MachineFrameInfo *MFI,
113309467b48Spatrick const TargetInstrInfo *TII) const {
113409467b48Spatrick OS << '(';
113509467b48Spatrick if (isVolatile())
113609467b48Spatrick OS << "volatile ";
113709467b48Spatrick if (isNonTemporal())
113809467b48Spatrick OS << "non-temporal ";
113909467b48Spatrick if (isDereferenceable())
114009467b48Spatrick OS << "dereferenceable ";
114109467b48Spatrick if (isInvariant())
114209467b48Spatrick OS << "invariant ";
1143*d415bd75Srobert if (TII) {
114409467b48Spatrick if (getFlags() & MachineMemOperand::MOTargetFlag1)
114509467b48Spatrick OS << '"' << getTargetMMOFlagName(*TII, MachineMemOperand::MOTargetFlag1)
114609467b48Spatrick << "\" ";
114709467b48Spatrick if (getFlags() & MachineMemOperand::MOTargetFlag2)
114809467b48Spatrick OS << '"' << getTargetMMOFlagName(*TII, MachineMemOperand::MOTargetFlag2)
114909467b48Spatrick << "\" ";
115009467b48Spatrick if (getFlags() & MachineMemOperand::MOTargetFlag3)
115109467b48Spatrick OS << '"' << getTargetMMOFlagName(*TII, MachineMemOperand::MOTargetFlag3)
115209467b48Spatrick << "\" ";
1153*d415bd75Srobert } else {
1154*d415bd75Srobert if (getFlags() & MachineMemOperand::MOTargetFlag1)
1155*d415bd75Srobert OS << "\"MOTargetFlag1\" ";
1156*d415bd75Srobert if (getFlags() & MachineMemOperand::MOTargetFlag2)
1157*d415bd75Srobert OS << "\"MOTargetFlag2\" ";
1158*d415bd75Srobert if (getFlags() & MachineMemOperand::MOTargetFlag3)
1159*d415bd75Srobert OS << "\"MOTargetFlag3\" ";
1160*d415bd75Srobert }
116109467b48Spatrick
116209467b48Spatrick assert((isLoad() || isStore()) &&
116309467b48Spatrick "machine memory operand must be a load or store (or both)");
116409467b48Spatrick if (isLoad())
116509467b48Spatrick OS << "load ";
116609467b48Spatrick if (isStore())
116709467b48Spatrick OS << "store ";
116809467b48Spatrick
116909467b48Spatrick printSyncScope(OS, Context, getSyncScopeID(), SSNs);
117009467b48Spatrick
117173471bf0Spatrick if (getSuccessOrdering() != AtomicOrdering::NotAtomic)
117273471bf0Spatrick OS << toIRString(getSuccessOrdering()) << ' ';
117309467b48Spatrick if (getFailureOrdering() != AtomicOrdering::NotAtomic)
117409467b48Spatrick OS << toIRString(getFailureOrdering()) << ' ';
117509467b48Spatrick
117673471bf0Spatrick if (getMemoryType().isValid())
117773471bf0Spatrick OS << '(' << getMemoryType() << ')';
117809467b48Spatrick else
117973471bf0Spatrick OS << "unknown-size";
118009467b48Spatrick
118109467b48Spatrick if (const Value *Val = getValue()) {
118209467b48Spatrick OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into ");
118309467b48Spatrick MIRFormatter::printIRValue(OS, *Val, MST);
118409467b48Spatrick } else if (const PseudoSourceValue *PVal = getPseudoValue()) {
118509467b48Spatrick OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into ");
118609467b48Spatrick assert(PVal && "Expected a pseudo source value");
118709467b48Spatrick switch (PVal->kind()) {
118809467b48Spatrick case PseudoSourceValue::Stack:
118909467b48Spatrick OS << "stack";
119009467b48Spatrick break;
119109467b48Spatrick case PseudoSourceValue::GOT:
119209467b48Spatrick OS << "got";
119309467b48Spatrick break;
119409467b48Spatrick case PseudoSourceValue::JumpTable:
119509467b48Spatrick OS << "jump-table";
119609467b48Spatrick break;
119709467b48Spatrick case PseudoSourceValue::ConstantPool:
119809467b48Spatrick OS << "constant-pool";
119909467b48Spatrick break;
120009467b48Spatrick case PseudoSourceValue::FixedStack: {
120109467b48Spatrick int FrameIndex = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex();
120209467b48Spatrick bool IsFixed = true;
120309467b48Spatrick printFrameIndex(OS, FrameIndex, IsFixed, MFI);
120409467b48Spatrick break;
120509467b48Spatrick }
120609467b48Spatrick case PseudoSourceValue::GlobalValueCallEntry:
120709467b48Spatrick OS << "call-entry ";
120809467b48Spatrick cast<GlobalValuePseudoSourceValue>(PVal)->getValue()->printAsOperand(
120909467b48Spatrick OS, /*PrintType=*/false, MST);
121009467b48Spatrick break;
121109467b48Spatrick case PseudoSourceValue::ExternalSymbolCallEntry:
121209467b48Spatrick OS << "call-entry &";
121309467b48Spatrick printLLVMNameWithoutPrefix(
121409467b48Spatrick OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());
121509467b48Spatrick break;
121609467b48Spatrick default: {
121709467b48Spatrick const MIRFormatter *Formatter = TII->getMIRFormatter();
121809467b48Spatrick // FIXME: This is not necessarily the correct MIR serialization format for
121909467b48Spatrick // a custom pseudo source value, but at least it allows
122073471bf0Spatrick // MIR printing to work on a target with custom pseudo source
122109467b48Spatrick // values.
122209467b48Spatrick OS << "custom \"";
122309467b48Spatrick Formatter->printCustomPseudoSourceValue(OS, MST, *PVal);
122409467b48Spatrick OS << '\"';
122509467b48Spatrick break;
122609467b48Spatrick }
122709467b48Spatrick }
122873471bf0Spatrick } else if (getOpaqueValue() == nullptr && getOffset() != 0) {
122973471bf0Spatrick OS << ((isLoad() && isStore()) ? " on "
123073471bf0Spatrick : isLoad() ? " from "
123173471bf0Spatrick : " into ")
123273471bf0Spatrick << "unknown-address";
123309467b48Spatrick }
123409467b48Spatrick MachineOperand::printOperandOffset(OS, getOffset());
123573471bf0Spatrick if (getSize() > 0 && getAlign() != getSize())
123673471bf0Spatrick OS << ", align " << getAlign().value();
123773471bf0Spatrick if (getAlign() != getBaseAlign())
123873471bf0Spatrick OS << ", basealign " << getBaseAlign().value();
123909467b48Spatrick auto AAInfo = getAAInfo();
124009467b48Spatrick if (AAInfo.TBAA) {
124109467b48Spatrick OS << ", !tbaa ";
124209467b48Spatrick AAInfo.TBAA->printAsOperand(OS, MST);
124309467b48Spatrick }
124409467b48Spatrick if (AAInfo.Scope) {
124509467b48Spatrick OS << ", !alias.scope ";
124609467b48Spatrick AAInfo.Scope->printAsOperand(OS, MST);
124709467b48Spatrick }
124809467b48Spatrick if (AAInfo.NoAlias) {
124909467b48Spatrick OS << ", !noalias ";
125009467b48Spatrick AAInfo.NoAlias->printAsOperand(OS, MST);
125109467b48Spatrick }
125209467b48Spatrick if (getRanges()) {
125309467b48Spatrick OS << ", !range ";
125409467b48Spatrick getRanges()->printAsOperand(OS, MST);
125509467b48Spatrick }
125609467b48Spatrick // FIXME: Implement addrspace printing/parsing in MIR.
125709467b48Spatrick // For now, print this even though parsing it is not available in MIR.
125809467b48Spatrick if (unsigned AS = getAddrSpace())
125909467b48Spatrick OS << ", addrspace " << AS;
126009467b48Spatrick
126109467b48Spatrick OS << ')';
126209467b48Spatrick }
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