109467b48Spatrick //===- RegisterUsageInfo.cpp - Register Usage Information Storage ---------===//
209467b48Spatrick //
309467b48Spatrick // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
409467b48Spatrick // See https://llvm.org/LICENSE.txt for license information.
509467b48Spatrick // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
609467b48Spatrick //
709467b48Spatrick //===----------------------------------------------------------------------===//
809467b48Spatrick ///
909467b48Spatrick /// This pass is required to take advantage of the interprocedural register
1009467b48Spatrick /// allocation infrastructure.
1109467b48Spatrick ///
1209467b48Spatrick //===----------------------------------------------------------------------===//
1309467b48Spatrick
1409467b48Spatrick #include "llvm/CodeGen/RegisterUsageInfo.h"
1509467b48Spatrick #include "llvm/ADT/SmallVector.h"
1609467b48Spatrick #include "llvm/CodeGen/MachineOperand.h"
1709467b48Spatrick #include "llvm/CodeGen/TargetRegisterInfo.h"
1809467b48Spatrick #include "llvm/CodeGen/TargetSubtargetInfo.h"
1909467b48Spatrick #include "llvm/IR/Function.h"
2009467b48Spatrick #include "llvm/IR/Module.h"
2109467b48Spatrick #include "llvm/Pass.h"
2209467b48Spatrick #include "llvm/Support/CommandLine.h"
2309467b48Spatrick #include "llvm/Support/raw_ostream.h"
2409467b48Spatrick #include "llvm/Target/TargetMachine.h"
2509467b48Spatrick #include <cstdint>
2609467b48Spatrick #include <utility>
2709467b48Spatrick #include <vector>
2809467b48Spatrick
2909467b48Spatrick using namespace llvm;
3009467b48Spatrick
3109467b48Spatrick static cl::opt<bool> DumpRegUsage(
3209467b48Spatrick "print-regusage", cl::init(false), cl::Hidden,
3309467b48Spatrick cl::desc("print register usage details collected for analysis."));
3409467b48Spatrick
3509467b48Spatrick INITIALIZE_PASS(PhysicalRegisterUsageInfo, "reg-usage-info",
3609467b48Spatrick "Register Usage Information Storage", false, true)
3709467b48Spatrick
3809467b48Spatrick char PhysicalRegisterUsageInfo::ID = 0;
3909467b48Spatrick
setTargetMachine(const LLVMTargetMachine & TM)4009467b48Spatrick void PhysicalRegisterUsageInfo::setTargetMachine(const LLVMTargetMachine &TM) {
4109467b48Spatrick this->TM = &TM;
4209467b48Spatrick }
4309467b48Spatrick
doInitialization(Module & M)4409467b48Spatrick bool PhysicalRegisterUsageInfo::doInitialization(Module &M) {
4509467b48Spatrick RegMasks.grow(M.size());
4609467b48Spatrick return false;
4709467b48Spatrick }
4809467b48Spatrick
doFinalization(Module & M)4909467b48Spatrick bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
5009467b48Spatrick if (DumpRegUsage)
5109467b48Spatrick print(errs());
5209467b48Spatrick
5309467b48Spatrick RegMasks.shrink_and_clear();
5409467b48Spatrick return false;
5509467b48Spatrick }
5609467b48Spatrick
storeUpdateRegUsageInfo(const Function & FP,ArrayRef<uint32_t> RegMask)5709467b48Spatrick void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(
5809467b48Spatrick const Function &FP, ArrayRef<uint32_t> RegMask) {
5909467b48Spatrick RegMasks[&FP] = RegMask;
6009467b48Spatrick }
6109467b48Spatrick
6209467b48Spatrick ArrayRef<uint32_t>
getRegUsageInfo(const Function & FP)6309467b48Spatrick PhysicalRegisterUsageInfo::getRegUsageInfo(const Function &FP) {
6409467b48Spatrick auto It = RegMasks.find(&FP);
6509467b48Spatrick if (It != RegMasks.end())
66*d415bd75Srobert return ArrayRef<uint32_t>(It->second);
6709467b48Spatrick return ArrayRef<uint32_t>();
6809467b48Spatrick }
6909467b48Spatrick
print(raw_ostream & OS,const Module * M) const7009467b48Spatrick void PhysicalRegisterUsageInfo::print(raw_ostream &OS, const Module *M) const {
7109467b48Spatrick using FuncPtrRegMaskPair = std::pair<const Function *, std::vector<uint32_t>>;
7209467b48Spatrick
7309467b48Spatrick SmallVector<const FuncPtrRegMaskPair *, 64> FPRMPairVector;
7409467b48Spatrick
7509467b48Spatrick // Create a vector of pointer to RegMasks entries
7609467b48Spatrick for (const auto &RegMask : RegMasks)
7709467b48Spatrick FPRMPairVector.push_back(&RegMask);
7809467b48Spatrick
7909467b48Spatrick // sort the vector to print analysis in alphabatic order of function name.
8009467b48Spatrick llvm::sort(
8109467b48Spatrick FPRMPairVector,
8209467b48Spatrick [](const FuncPtrRegMaskPair *A, const FuncPtrRegMaskPair *B) -> bool {
8309467b48Spatrick return A->first->getName() < B->first->getName();
8409467b48Spatrick });
8509467b48Spatrick
8609467b48Spatrick for (const FuncPtrRegMaskPair *FPRMPair : FPRMPairVector) {
8709467b48Spatrick OS << FPRMPair->first->getName() << " "
8809467b48Spatrick << "Clobbered Registers: ";
8909467b48Spatrick const TargetRegisterInfo *TRI
9009467b48Spatrick = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first))
9109467b48Spatrick .getRegisterInfo();
9209467b48Spatrick
9309467b48Spatrick for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
9409467b48Spatrick if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg))
9509467b48Spatrick OS << printReg(PReg, TRI) << " ";
9609467b48Spatrick }
9709467b48Spatrick OS << "\n";
9809467b48Spatrick }
9909467b48Spatrick }
100