109467b48Spatrick//===-- Mips.td - Describe the Mips Target Machine ---------*- tablegen -*-===// 209467b48Spatrick// 309467b48Spatrick// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 409467b48Spatrick// See https://llvm.org/LICENSE.txt for license information. 509467b48Spatrick// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 609467b48Spatrick// 709467b48Spatrick//===----------------------------------------------------------------------===// 809467b48Spatrick// This is the top level entry point for the Mips target. 909467b48Spatrick//===----------------------------------------------------------------------===// 1009467b48Spatrick 1109467b48Spatrick//===----------------------------------------------------------------------===// 1209467b48Spatrick// Target-independent interfaces 1309467b48Spatrick//===----------------------------------------------------------------------===// 1409467b48Spatrick 1509467b48Spatrickinclude "llvm/Target/Target.td" 1609467b48Spatrick 1709467b48Spatrick// The overall idea of the PredicateControl class is to chop the Predicates list 1809467b48Spatrick// into subsets that are usually overridden independently. This allows 1909467b48Spatrick// subclasses to partially override the predicates of their superclasses without 2009467b48Spatrick// having to re-add all the existing predicates. 2109467b48Spatrickclass PredicateControl { 2209467b48Spatrick // Predicates for the encoding scheme in use such as HasStdEnc 2309467b48Spatrick list<Predicate> EncodingPredicates = []; 2409467b48Spatrick // Predicates for the GPR size such as IsGP64bit 2509467b48Spatrick list<Predicate> GPRPredicates = []; 2609467b48Spatrick // Predicates for the PTR size such as IsPTR64bit 2709467b48Spatrick list<Predicate> PTRPredicates = []; 2809467b48Spatrick // Predicates for a symbol's size such as hasSym32. 2909467b48Spatrick list<Predicate> SYMPredicates = []; 3009467b48Spatrick // Predicates for the FGR size and layout such as IsFP64bit 3109467b48Spatrick list<Predicate> FGRPredicates = []; 3209467b48Spatrick // Predicates for the instruction group membership such as ISA's. 3309467b48Spatrick list<Predicate> InsnPredicates = []; 3409467b48Spatrick // Predicate for the ASE that an instruction belongs to. 3509467b48Spatrick list<Predicate> ASEPredicate = []; 3609467b48Spatrick // Predicate for marking the instruction as usable in hard-float mode only. 3709467b48Spatrick list<Predicate> HardFloatPredicate = []; 3809467b48Spatrick // Predicates for anything else 3909467b48Spatrick list<Predicate> AdditionalPredicates = []; 4009467b48Spatrick list<Predicate> Predicates = !listconcat(EncodingPredicates, 4109467b48Spatrick GPRPredicates, 4209467b48Spatrick PTRPredicates, 4309467b48Spatrick SYMPredicates, 4409467b48Spatrick FGRPredicates, 4509467b48Spatrick InsnPredicates, 4609467b48Spatrick HardFloatPredicate, 4709467b48Spatrick ASEPredicate, 4809467b48Spatrick AdditionalPredicates); 4909467b48Spatrick} 5009467b48Spatrick 5109467b48Spatrick// Like Requires<> but for the AdditionalPredicates list 5209467b48Spatrickclass AdditionalRequires<list<Predicate> preds> { 5309467b48Spatrick list<Predicate> AdditionalPredicates = preds; 5409467b48Spatrick} 5509467b48Spatrick 5609467b48Spatrick//===----------------------------------------------------------------------===// 5709467b48Spatrick// Mips Subtarget features // 5809467b48Spatrick//===----------------------------------------------------------------------===// 5909467b48Spatrick 6009467b48Spatrickdef FeatureNoABICalls : SubtargetFeature<"noabicalls", "NoABICalls", "true", 6109467b48Spatrick "Disable SVR4-style position-independent code">; 6209467b48Spatrickdef FeaturePTR64Bit : SubtargetFeature<"ptr64", "IsPTR64bit", "true", 6309467b48Spatrick "Pointers are 64-bit wide">; 6409467b48Spatrickdef FeatureGP64Bit : SubtargetFeature<"gp64", "IsGP64bit", "true", 6509467b48Spatrick "General Purpose Registers are 64-bit wide">; 6609467b48Spatrickdef FeatureFP64Bit : SubtargetFeature<"fp64", "IsFP64bit", "true", 6709467b48Spatrick "Support 64-bit FP registers">; 6809467b48Spatrickdef FeatureFPXX : SubtargetFeature<"fpxx", "IsFPXX", "true", 6909467b48Spatrick "Support for FPXX">; 7009467b48Spatrickdef FeatureNaN2008 : SubtargetFeature<"nan2008", "IsNaN2008bit", "true", 7109467b48Spatrick "IEEE 754-2008 NaN encoding">; 7209467b48Spatrickdef FeatureAbs2008 : SubtargetFeature<"abs2008", "Abs2008", "true", 7309467b48Spatrick "Disable IEEE 754-2008 abs.fmt mode">; 7409467b48Spatrickdef FeatureSingleFloat : SubtargetFeature<"single-float", "IsSingleFloat", 7509467b48Spatrick "true", "Only supports single precision float">; 7609467b48Spatrickdef FeatureSoftFloat : SubtargetFeature<"soft-float", "IsSoftFloat", "true", 7709467b48Spatrick "Does not support floating point instructions">; 7809467b48Spatrickdef FeatureNoOddSPReg : SubtargetFeature<"nooddspreg", "UseOddSPReg", "false", 7909467b48Spatrick "Disable odd numbered single-precision " 8009467b48Spatrick "registers">; 8109467b48Spatrickdef FeatureVFPU : SubtargetFeature<"vfpu", "HasVFPU", 8209467b48Spatrick "true", "Enable vector FPU instructions">; 8309467b48Spatrickdef FeatureMips1 : SubtargetFeature<"mips1", "MipsArchVersion", "Mips1", 8409467b48Spatrick "Mips I ISA Support [highly experimental]">; 8509467b48Spatrickdef FeatureMips2 : SubtargetFeature<"mips2", "MipsArchVersion", "Mips2", 8609467b48Spatrick "Mips II ISA Support [highly experimental]", 8709467b48Spatrick [FeatureMips1]>; 8809467b48Spatrickdef FeatureMips3_32 : SubtargetFeature<"mips3_32", "HasMips3_32", "true", 8909467b48Spatrick "Subset of MIPS-III that is also in MIPS32 " 9009467b48Spatrick "[highly experimental]">; 9109467b48Spatrickdef FeatureMips3_32r2 : SubtargetFeature<"mips3_32r2", "HasMips3_32r2", "true", 9209467b48Spatrick "Subset of MIPS-III that is also in MIPS32r2 " 9309467b48Spatrick "[highly experimental]">; 9409467b48Spatrickdef FeatureMips3 : SubtargetFeature<"mips3", "MipsArchVersion", "Mips3", 9509467b48Spatrick "MIPS III ISA Support [highly experimental]", 9609467b48Spatrick [FeatureMips2, FeatureMips3_32, 9709467b48Spatrick FeatureMips3_32r2, FeatureGP64Bit, 9809467b48Spatrick FeatureFP64Bit]>; 9909467b48Spatrickdef FeatureMips4_32 : SubtargetFeature<"mips4_32", "HasMips4_32", "true", 10009467b48Spatrick "Subset of MIPS-IV that is also in MIPS32 " 10109467b48Spatrick "[highly experimental]">; 10209467b48Spatrickdef FeatureMips4_32r2 : SubtargetFeature<"mips4_32r2", "HasMips4_32r2", "true", 10309467b48Spatrick "Subset of MIPS-IV that is also in MIPS32r2 " 10409467b48Spatrick "[highly experimental]">; 10509467b48Spatrickdef FeatureMips4 : SubtargetFeature<"mips4", "MipsArchVersion", 10609467b48Spatrick "Mips4", "MIPS IV ISA Support", 10709467b48Spatrick [FeatureMips3, FeatureMips4_32, 10809467b48Spatrick FeatureMips4_32r2]>; 10909467b48Spatrickdef FeatureMips5_32r2 : SubtargetFeature<"mips5_32r2", "HasMips5_32r2", "true", 11009467b48Spatrick "Subset of MIPS-V that is also in MIPS32r2 " 11109467b48Spatrick "[highly experimental]">; 11209467b48Spatrickdef FeatureMips5 : SubtargetFeature<"mips5", "MipsArchVersion", "Mips5", 11309467b48Spatrick "MIPS V ISA Support [highly experimental]", 11409467b48Spatrick [FeatureMips4, FeatureMips5_32r2]>; 11509467b48Spatrickdef FeatureMips32 : SubtargetFeature<"mips32", "MipsArchVersion", "Mips32", 11609467b48Spatrick "Mips32 ISA Support", 11709467b48Spatrick [FeatureMips2, FeatureMips3_32, 11809467b48Spatrick FeatureMips4_32]>; 11909467b48Spatrickdef FeatureMips32r2 : SubtargetFeature<"mips32r2", "MipsArchVersion", 12009467b48Spatrick "Mips32r2", "Mips32r2 ISA Support", 12109467b48Spatrick [FeatureMips3_32r2, FeatureMips4_32r2, 12209467b48Spatrick FeatureMips5_32r2, FeatureMips32]>; 12309467b48Spatrickdef FeatureMips32r3 : SubtargetFeature<"mips32r3", "MipsArchVersion", 12409467b48Spatrick "Mips32r3", "Mips32r3 ISA Support", 12509467b48Spatrick [FeatureMips32r2]>; 12609467b48Spatrickdef FeatureMips32r5 : SubtargetFeature<"mips32r5", "MipsArchVersion", 12709467b48Spatrick "Mips32r5", "Mips32r5 ISA Support", 12809467b48Spatrick [FeatureMips32r3]>; 12909467b48Spatrickdef FeatureMips32r6 : SubtargetFeature<"mips32r6", "MipsArchVersion", 13009467b48Spatrick "Mips32r6", 13109467b48Spatrick "Mips32r6 ISA Support [experimental]", 13209467b48Spatrick [FeatureMips32r5, FeatureFP64Bit, 13309467b48Spatrick FeatureNaN2008, FeatureAbs2008]>; 13409467b48Spatrickdef FeatureMips64 : SubtargetFeature<"mips64", "MipsArchVersion", 13509467b48Spatrick "Mips64", "Mips64 ISA Support", 13609467b48Spatrick [FeatureMips5, FeatureMips32]>; 13709467b48Spatrickdef FeatureMips64r2 : SubtargetFeature<"mips64r2", "MipsArchVersion", 13809467b48Spatrick "Mips64r2", "Mips64r2 ISA Support", 13909467b48Spatrick [FeatureMips64, FeatureMips32r2]>; 14009467b48Spatrickdef FeatureMips64r3 : SubtargetFeature<"mips64r3", "MipsArchVersion", 14109467b48Spatrick "Mips64r3", "Mips64r3 ISA Support", 14209467b48Spatrick [FeatureMips64r2, FeatureMips32r3]>; 14309467b48Spatrickdef FeatureMips64r5 : SubtargetFeature<"mips64r5", "MipsArchVersion", 14409467b48Spatrick "Mips64r5", "Mips64r5 ISA Support", 14509467b48Spatrick [FeatureMips64r3, FeatureMips32r5]>; 14609467b48Spatrickdef FeatureMips64r6 : SubtargetFeature<"mips64r6", "MipsArchVersion", 14709467b48Spatrick "Mips64r6", 14809467b48Spatrick "Mips64r6 ISA Support [experimental]", 14909467b48Spatrick [FeatureMips32r6, FeatureMips64r5, 15009467b48Spatrick FeatureNaN2008, FeatureAbs2008]>; 15109467b48Spatrickdef FeatureSym32 : SubtargetFeature<"sym32", "HasSym32", "true", 15209467b48Spatrick "Symbols are 32 bit on Mips64">; 15309467b48Spatrick 15409467b48Spatrickdef FeatureMips16 : SubtargetFeature<"mips16", "InMips16Mode", "true", 15509467b48Spatrick "Mips16 mode">; 15609467b48Spatrick 15709467b48Spatrickdef FeatureDSP : SubtargetFeature<"dsp", "HasDSP", "true", "Mips DSP ASE">; 15809467b48Spatrickdef FeatureDSPR2 : SubtargetFeature<"dspr2", "HasDSPR2", "true", 15909467b48Spatrick "Mips DSP-R2 ASE", [FeatureDSP]>; 16009467b48Spatrickdef FeatureDSPR3 16109467b48Spatrick : SubtargetFeature<"dspr3", "HasDSPR3", "true", "Mips DSP-R3 ASE", 16209467b48Spatrick [ FeatureDSP, FeatureDSPR2 ]>; 16309467b48Spatrick 164097a140dSpatrickdef FeatureMips3D : SubtargetFeature<"mips3d", "Has3D", "true", "Mips 3D ASE">; 165097a140dSpatrick 16609467b48Spatrickdef FeatureMSA : SubtargetFeature<"msa", "HasMSA", "true", "Mips MSA ASE">; 16709467b48Spatrick 16809467b48Spatrickdef FeatureEVA : SubtargetFeature<"eva", "HasEVA", "true", "Mips EVA ASE">; 16909467b48Spatrick 17009467b48Spatrickdef FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true", "Mips R6 CRC ASE">; 17109467b48Spatrick 17209467b48Spatrickdef FeatureVirt : SubtargetFeature<"virt", "HasVirt", "true", 17309467b48Spatrick "Mips Virtualization ASE">; 17409467b48Spatrick 17509467b48Spatrickdef FeatureGINV : SubtargetFeature<"ginv", "HasGINV", "true", 17609467b48Spatrick "Mips Global Invalidate ASE">; 17709467b48Spatrick 17809467b48Spatrickdef FeatureMicroMips : SubtargetFeature<"micromips", "InMicroMipsMode", "true", 17909467b48Spatrick "microMips mode">; 18009467b48Spatrick 18109467b48Spatrickdef FeatureCnMips : SubtargetFeature<"cnmips", "HasCnMips", 18209467b48Spatrick "true", "Octeon cnMIPS Support", 18309467b48Spatrick [FeatureMips64r2]>; 18409467b48Spatrick 18509467b48Spatrickdef FeatureCnMipsP : SubtargetFeature<"cnmipsp", "HasCnMipsP", 18609467b48Spatrick "true", "Octeon+ cnMIPS Support", 18709467b48Spatrick [FeatureCnMips]>; 18809467b48Spatrick 18909467b48Spatrickdef FeatureUseTCCInDIV : SubtargetFeature< 19009467b48Spatrick "use-tcc-in-div", 19109467b48Spatrick "UseTCCInDIV", "false", 19209467b48Spatrick "Force the assembler to use trapping">; 19309467b48Spatrick 19473471bf0Spatrickdef FeatureNoMadd4 19509467b48Spatrick : SubtargetFeature<"nomadd4", "DisableMadd4", "true", 19609467b48Spatrick "Disable 4-operand madd.fmt and related instructions">; 19709467b48Spatrick 19809467b48Spatrickdef FeatureMT : SubtargetFeature<"mt", "HasMT", "true", "Mips MT ASE">; 19909467b48Spatrick 20009467b48Spatrickdef FeatureLongCalls : SubtargetFeature<"long-calls", "UseLongCalls", "true", 20109467b48Spatrick "Disable use of the jal instruction">; 20209467b48Spatrick 20309467b48Spatrickdef FeatureXGOT 20409467b48Spatrick : SubtargetFeature<"xgot", "UseXGOT", "true", "Assume 32-bit GOT">; 20509467b48Spatrick 20609467b48Spatrickdef FeatureUseIndirectJumpsHazard : SubtargetFeature<"use-indirect-jump-hazard", 20709467b48Spatrick "UseIndirectJumpsHazard", 20809467b48Spatrick "true", "Use indirect jump" 20909467b48Spatrick " guards to prevent certain speculation based attacks">; 210097a140dSpatrick 211097a140dSpatrick//===----------------------------------------------------------------------===// 212097a140dSpatrick// Register File, Calling Conv, Instruction Descriptions 213097a140dSpatrick//===----------------------------------------------------------------------===// 214097a140dSpatrick 215097a140dSpatrickinclude "MipsRegisterInfo.td" 216097a140dSpatrickinclude "MipsSchedule.td" 217097a140dSpatrickinclude "MipsInstrInfo.td" 218097a140dSpatrickinclude "MipsCallingConv.td" 219097a140dSpatrickinclude "MipsRegisterBanks.td" 220*d415bd75Srobertinclude "MipsCombine.td" 221097a140dSpatrick 222097a140dSpatrick// Avoid forward declaration issues. 223097a140dSpatrickinclude "MipsScheduleP5600.td" 224097a140dSpatrickinclude "MipsScheduleGeneric.td" 225097a140dSpatrick 226*d415bd75Srobertdef MipsInstrInfo : InstrInfo { 227*d415bd75Srobert} 228097a140dSpatrick 22909467b48Spatrick//===----------------------------------------------------------------------===// 23009467b48Spatrick// Mips processors supported. 23109467b48Spatrick//===----------------------------------------------------------------------===// 23209467b48Spatrick 23309467b48Spatrickdef ImplP5600 : SubtargetFeature<"p5600", "ProcImpl", 23409467b48Spatrick "MipsSubtarget::CPU::P5600", 23509467b48Spatrick "The P5600 Processor", [FeatureMips32r5]>; 23609467b48Spatrick 23709467b48Spatrickclass Proc<string Name, list<SubtargetFeature> Features> 23809467b48Spatrick : ProcessorModel<Name, MipsGenericModel, Features>; 23909467b48Spatrick 24009467b48Spatrickdef : Proc<"generic", [FeatureMips32]>; 24109467b48Spatrickdef : Proc<"mips1", [FeatureMips1]>; 24209467b48Spatrickdef : Proc<"mips2", [FeatureMips2]>; 24309467b48Spatrickdef : Proc<"mips32", [FeatureMips32]>; 24409467b48Spatrickdef : Proc<"mips32r2", [FeatureMips32r2]>; 24509467b48Spatrickdef : Proc<"mips32r3", [FeatureMips32r3]>; 24609467b48Spatrickdef : Proc<"mips32r5", [FeatureMips32r5]>; 24709467b48Spatrickdef : Proc<"mips32r6", [FeatureMips32r6]>; 24809467b48Spatrick 24909467b48Spatrickdef : Proc<"mips3", [FeatureMips3]>; 25009467b48Spatrickdef : Proc<"mips4", [FeatureMips4]>; 25109467b48Spatrickdef : Proc<"mips5", [FeatureMips5]>; 25209467b48Spatrickdef : Proc<"mips64", [FeatureMips64]>; 25309467b48Spatrickdef : Proc<"mips64r2", [FeatureMips64r2]>; 25409467b48Spatrickdef : Proc<"mips64r3", [FeatureMips64r3]>; 25509467b48Spatrickdef : Proc<"mips64r5", [FeatureMips64r5]>; 25609467b48Spatrickdef : Proc<"mips64r6", [FeatureMips64r6]>; 25709467b48Spatrickdef : Proc<"octeon", [FeatureMips64r2, FeatureCnMips]>; 25809467b48Spatrickdef : Proc<"octeon+", [FeatureMips64r2, FeatureCnMips, FeatureCnMipsP]>; 25909467b48Spatrickdef : ProcessorModel<"p5600", MipsP5600Model, [ImplP5600]>; 26009467b48Spatrick 26109467b48Spatrickdef MipsAsmParser : AsmParser { 26209467b48Spatrick let ShouldEmitMatchRegisterName = 0; 26309467b48Spatrick} 26409467b48Spatrick 26509467b48Spatrickdef MipsAsmParserVariant : AsmParserVariant { 26609467b48Spatrick int Variant = 0; 26709467b48Spatrick 26809467b48Spatrick // Recognize hard coded registers. 26909467b48Spatrick string RegisterPrefix = "$"; 27009467b48Spatrick} 27109467b48Spatrick 272*d415bd75Srobertdef MipsAsmWriter : AsmWriter { 273*d415bd75Srobert int PassSubtarget = 1; 274*d415bd75Srobert} 275*d415bd75Srobert 27609467b48Spatrickdef Mips : Target { 27709467b48Spatrick let InstructionSet = MipsInstrInfo; 278*d415bd75Srobert let AssemblyWriters = [MipsAsmWriter]; 27909467b48Spatrick let AssemblyParsers = [MipsAsmParser]; 28009467b48Spatrick let AssemblyParserVariants = [MipsAsmParserVariant]; 28109467b48Spatrick let AllowRegisterRenaming = 1; 28209467b48Spatrick} 28309467b48Spatrick 28409467b48Spatrick//===----------------------------------------------------------------------===// 28509467b48Spatrick// Pfm Counters 28609467b48Spatrick//===----------------------------------------------------------------------===// 28709467b48Spatrick 28809467b48Spatrickinclude "MipsPfmCounters.td" 289