109467b48Spatrick//===- MipsEVAInstrInfo.td - EVA ASE instructions -*- tablegen ------------*-=// 209467b48Spatrick// 309467b48Spatrick// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 409467b48Spatrick// See https://llvm.org/LICENSE.txt for license information. 509467b48Spatrick// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 609467b48Spatrick// 709467b48Spatrick//===----------------------------------------------------------------------===// 809467b48Spatrick// 909467b48Spatrick// This file describes Mips EVA ASE instructions. 1009467b48Spatrick// 1109467b48Spatrick//===----------------------------------------------------------------------===// 1209467b48Spatrick 1309467b48Spatrick//===----------------------------------------------------------------------===// 1409467b48Spatrick// 1509467b48Spatrick// Instruction encodings 1609467b48Spatrick// 1709467b48Spatrick//===----------------------------------------------------------------------===// 1809467b48Spatrick 1909467b48Spatrick// Memory Load/Store EVA encodings 2009467b48Spatrickclass LBE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LBE>; 2109467b48Spatrickclass LBuE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LBuE>; 2209467b48Spatrickclass LHE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LHE>; 2309467b48Spatrickclass LHuE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LHuE>; 2409467b48Spatrickclass LWE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LWE>; 2509467b48Spatrick 2609467b48Spatrickclass SBE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SBE>; 2709467b48Spatrickclass SHE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SHE>; 2809467b48Spatrickclass SWE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SWE>; 2909467b48Spatrick 3009467b48Spatrick// load/store left/right EVA encodings 3109467b48Spatrickclass LWLE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LWLE>; 3209467b48Spatrickclass LWRE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LWRE>; 3309467b48Spatrickclass SWLE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SWLE>; 3409467b48Spatrickclass SWRE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SWRE>; 3509467b48Spatrick 3609467b48Spatrick// Load-linked EVA, Store-conditional EVA encodings 3709467b48Spatrickclass LLE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_LLE>; 3809467b48Spatrickclass SCE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_SCE>; 3909467b48Spatrick 4009467b48Spatrickclass TLBINV_ENC : TLB_FM<OPCODE6_TLBINV>; 4109467b48Spatrickclass TLBINVF_ENC : TLB_FM<OPCODE6_TLBINVF>; 4209467b48Spatrick 4309467b48Spatrickclass CACHEE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_CACHEE>; 4409467b48Spatrickclass PREFE_ENC : SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6_PREFE>; 4509467b48Spatrick 4609467b48Spatrick//===----------------------------------------------------------------------===// 4709467b48Spatrick// 4809467b48Spatrick// Instruction descriptions 4909467b48Spatrick// 5009467b48Spatrick//===----------------------------------------------------------------------===// 5109467b48Spatrick 5209467b48Spatrick// Memory Load/Store EVA descriptions 5309467b48Spatrickclass LOAD_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd, 5409467b48Spatrick InstrItinClass itin = NoItinerary> { 5509467b48Spatrick dag OutOperandList = (outs GPROpnd:$rt); 5609467b48Spatrick dag InOperandList = (ins mem_simm9:$addr); 5709467b48Spatrick string AsmString = !strconcat(instr_asm, "\t$rt, $addr"); 5809467b48Spatrick list<dag> Pattern = []; 5909467b48Spatrick string DecoderMethod = "DecodeMemEVA"; 6009467b48Spatrick bit canFoldAsLoad = 1; 6109467b48Spatrick string BaseOpcode = instr_asm; 6209467b48Spatrick bit mayLoad = 1; 6309467b48Spatrick InstrItinClass Itinerary = itin; 6409467b48Spatrick} 6509467b48Spatrick 6609467b48Spatrickclass LBE_DESC : LOAD_EVA_DESC_BASE<"lbe", GPR32Opnd, II_LBE>; 6709467b48Spatrickclass LBuE_DESC : LOAD_EVA_DESC_BASE<"lbue", GPR32Opnd, II_LBUE>; 6809467b48Spatrickclass LHE_DESC : LOAD_EVA_DESC_BASE<"lhe", GPR32Opnd, II_LHE>; 6909467b48Spatrickclass LHuE_DESC : LOAD_EVA_DESC_BASE<"lhue", GPR32Opnd, II_LHUE>; 7009467b48Spatrickclass LWE_DESC : LOAD_EVA_DESC_BASE<"lwe", GPR32Opnd, II_LWE>; 7109467b48Spatrick 7209467b48Spatrickclass STORE_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd, 73*d415bd75Srobert InstrItinClass itin> { 7409467b48Spatrick dag OutOperandList = (outs); 7509467b48Spatrick dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr); 7609467b48Spatrick string AsmString = !strconcat(instr_asm, "\t$rt, $addr"); 7709467b48Spatrick list<dag> Pattern = []; 7809467b48Spatrick string DecoderMethod = "DecodeMemEVA"; 7909467b48Spatrick string BaseOpcode = instr_asm; 8009467b48Spatrick bit mayStore = 1; 8109467b48Spatrick InstrItinClass Itinerary = itin; 8209467b48Spatrick} 8309467b48Spatrick 84*d415bd75Srobertclass SBE_DESC : STORE_EVA_DESC_BASE<"sbe", GPR32Opnd, II_SBE>; 85*d415bd75Srobertclass SHE_DESC : STORE_EVA_DESC_BASE<"she", GPR32Opnd, II_SHE>; 86*d415bd75Srobertclass SWE_DESC : STORE_EVA_DESC_BASE<"swe", GPR32Opnd, II_SWE>; 8709467b48Spatrick 8809467b48Spatrick// Load/Store Left/Right EVA descriptions 8909467b48Spatrickclass LOAD_LEFT_RIGHT_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd, 9009467b48Spatrick InstrItinClass itin = NoItinerary> { 9109467b48Spatrick dag OutOperandList = (outs GPROpnd:$rt); 9209467b48Spatrick dag InOperandList = (ins mem_simm9:$addr, GPROpnd:$src); 9309467b48Spatrick string AsmString = !strconcat(instr_asm, "\t$rt, $addr"); 9409467b48Spatrick list<dag> Pattern = []; 9509467b48Spatrick string DecoderMethod = "DecodeMemEVA"; 9609467b48Spatrick string BaseOpcode = instr_asm; 9709467b48Spatrick string Constraints = "$src = $rt"; 9809467b48Spatrick bit canFoldAsLoad = 1; 9909467b48Spatrick InstrItinClass Itinerary = itin; 10009467b48Spatrick bit mayLoad = 1; 10109467b48Spatrick bit mayStore = 0; 10209467b48Spatrick} 10309467b48Spatrick 10409467b48Spatrickclass LWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwle", GPR32Opnd, II_LWLE>; 10509467b48Spatrickclass LWRE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwre", GPR32Opnd, II_LWRE>; 10609467b48Spatrick 10709467b48Spatrickclass STORE_LEFT_RIGHT_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd, 10809467b48Spatrick InstrItinClass itin = NoItinerary> { 10909467b48Spatrick dag OutOperandList = (outs); 11009467b48Spatrick dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr); 11109467b48Spatrick string AsmString = !strconcat(instr_asm, "\t$rt, $addr"); 11209467b48Spatrick list<dag> Pattern = []; 11309467b48Spatrick string DecoderMethod = "DecodeMemEVA"; 11409467b48Spatrick string BaseOpcode = instr_asm; 11509467b48Spatrick InstrItinClass Itinerary = itin; 11609467b48Spatrick bit mayLoad = 0; 11709467b48Spatrick bit mayStore = 1; 11809467b48Spatrick} 11909467b48Spatrick 12009467b48Spatrickclass SWLE_DESC : STORE_LEFT_RIGHT_EVA_DESC_BASE<"swle", GPR32Opnd, II_SWLE>; 12109467b48Spatrickclass SWRE_DESC : STORE_LEFT_RIGHT_EVA_DESC_BASE<"swre", GPR32Opnd, II_SWRE>; 12209467b48Spatrick 12309467b48Spatrick// Load-linked EVA, Store-conditional EVA descriptions 12409467b48Spatrickclass LLE_DESC_BASE<string instr_asm, RegisterOperand GPROpnd, 12509467b48Spatrick InstrItinClass itin = NoItinerary> { 12609467b48Spatrick dag OutOperandList = (outs GPROpnd:$rt); 12709467b48Spatrick dag InOperandList = (ins mem_simm9:$addr); 12809467b48Spatrick string AsmString = !strconcat(instr_asm, "\t$rt, $addr"); 12909467b48Spatrick list<dag> Pattern = []; 13009467b48Spatrick string BaseOpcode = instr_asm; 13109467b48Spatrick bit mayLoad = 1; 13209467b48Spatrick string DecoderMethod = "DecodeMemEVA"; 13309467b48Spatrick InstrItinClass Itinerary = itin; 13409467b48Spatrick} 13509467b48Spatrick 13609467b48Spatrickclass LLE_DESC : LLE_DESC_BASE<"lle", GPR32Opnd, II_LLE>; 13709467b48Spatrick 13809467b48Spatrickclass SCE_DESC_BASE<string instr_asm, RegisterOperand GPROpnd, 13909467b48Spatrick InstrItinClass itin = NoItinerary> { 14009467b48Spatrick dag OutOperandList = (outs GPROpnd:$dst); 14109467b48Spatrick dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr); 14209467b48Spatrick string AsmString = !strconcat(instr_asm, "\t$rt, $addr"); 14309467b48Spatrick list<dag> Pattern = []; 14409467b48Spatrick string BaseOpcode = instr_asm; 14509467b48Spatrick bit mayStore = 1; 14609467b48Spatrick string Constraints = "$rt = $dst"; 14709467b48Spatrick string DecoderMethod = "DecodeMemEVA"; 14809467b48Spatrick InstrItinClass Itinerary = itin; 14909467b48Spatrick} 15009467b48Spatrick 15109467b48Spatrickclass SCE_DESC : SCE_DESC_BASE<"sce", GPR32Opnd, II_SCE>; 15209467b48Spatrick 15309467b48Spatrickclass TLB_DESC_BASE<string instr_asm, InstrItinClass itin = NoItinerary> { 15409467b48Spatrick dag OutOperandList = (outs); 15509467b48Spatrick dag InOperandList = (ins); 15609467b48Spatrick string AsmString = instr_asm; 15709467b48Spatrick list<dag> Pattern = []; 15809467b48Spatrick InstrItinClass Itinerary = itin; 15909467b48Spatrick} 16009467b48Spatrick 16109467b48Spatrickclass TLBINV_DESC : TLB_DESC_BASE<"tlbinv", II_TLBINV>; 16209467b48Spatrickclass TLBINVF_DESC : TLB_DESC_BASE<"tlbinvf", II_TLBINVF>; 16309467b48Spatrick 16409467b48Spatrickclass CACHEE_DESC_BASE<string instr_asm, Operand MemOpnd, 16509467b48Spatrick InstrItinClass itin = NoItinerary> { 166*d415bd75Srobert // CACHEE puts the "hint" immediate where the encoding would otherwise have "rt" 167*d415bd75Srobert bits<5> hint; 168*d415bd75Srobert bits<5> rt = hint; 169*d415bd75Srobert 17009467b48Spatrick dag OutOperandList = (outs); 17109467b48Spatrick dag InOperandList = (ins MemOpnd:$addr, uimm5:$hint); 17209467b48Spatrick string AsmString = !strconcat(instr_asm, "\t$hint, $addr"); 17309467b48Spatrick list<dag> Pattern = []; 17409467b48Spatrick string BaseOpcode = instr_asm; 17509467b48Spatrick string DecoderMethod = "DecodeCacheeOp_CacheOpR6"; 17609467b48Spatrick InstrItinClass Itinerary = itin; 17709467b48Spatrick} 17809467b48Spatrick 17909467b48Spatrickclass CACHEE_DESC : CACHEE_DESC_BASE<"cachee", mem_simm9, II_CACHEE>; 18009467b48Spatrickclass PREFE_DESC : CACHEE_DESC_BASE<"prefe", mem_simm9, II_PREFE>; 18109467b48Spatrick 18209467b48Spatrick//===----------------------------------------------------------------------===// 18309467b48Spatrick// 18409467b48Spatrick// Instruction definitions 18509467b48Spatrick// 18609467b48Spatrick//===----------------------------------------------------------------------===// 18709467b48Spatrick 18809467b48Spatricklet AdditionalPredicates = [NotInMicroMips] in { 18909467b48Spatrick /// Load and Store EVA Instructions 19009467b48Spatrick def LBE : MMRel, LBE_ENC, LBE_DESC, ISA_MIPS32R2, ASE_EVA; 19109467b48Spatrick def LBuE : MMRel, LBuE_ENC, LBuE_DESC, ISA_MIPS32R2, ASE_EVA; 19209467b48Spatrick def LHE : MMRel, LHE_ENC, LHE_DESC, ISA_MIPS32R2, ASE_EVA; 19309467b48Spatrick def LHuE : MMRel, LHuE_ENC, LHuE_DESC, ISA_MIPS32R2, ASE_EVA; 19409467b48Spatrick def LWE : MMRel, LWE_ENC, LWE_DESC, ISA_MIPS32R2, ASE_EVA; 19509467b48Spatrick def SBE : MMRel, SBE_ENC, SBE_DESC, ISA_MIPS32R2, ASE_EVA; 19609467b48Spatrick def SHE : MMRel, SHE_ENC, SHE_DESC, ISA_MIPS32R2, ASE_EVA; 19709467b48Spatrick def SWE : MMRel, SWE_ENC, SWE_DESC, ISA_MIPS32R2, ASE_EVA; 19809467b48Spatrick 19909467b48Spatrick /// load/store left/right EVA 20009467b48Spatrick def LWLE : MMRel, LWLE_ENC, LWLE_DESC, ISA_MIPS32R2_NOT_32R6_64R6, ASE_EVA; 20109467b48Spatrick def LWRE : MMRel, LWRE_ENC, LWRE_DESC, ISA_MIPS32R2_NOT_32R6_64R6, ASE_EVA; 20209467b48Spatrick def SWLE : MMRel, SWLE_ENC, SWLE_DESC, ISA_MIPS32R2_NOT_32R6_64R6, ASE_EVA; 20309467b48Spatrick def SWRE : MMRel, SWRE_ENC, SWRE_DESC, ISA_MIPS32R2_NOT_32R6_64R6, ASE_EVA; 20409467b48Spatrick 20509467b48Spatrick /// Load-linked EVA, Store-conditional EVA 20609467b48Spatrick def LLE : MMRel, LLE_ENC, LLE_DESC, ISA_MIPS32R2, ASE_EVA; 20709467b48Spatrick def SCE : MMRel, SCE_ENC, SCE_DESC, ISA_MIPS32R2, ASE_EVA; 20809467b48Spatrick 20909467b48Spatrick /// TLB invalidate instructions 21009467b48Spatrick def TLBINV : TLBINV_ENC, TLBINV_DESC, ISA_MIPS32R2, ASE_EVA; 21109467b48Spatrick def TLBINVF : TLBINVF_ENC, TLBINVF_DESC, ISA_MIPS32R2, ASE_EVA; 21209467b48Spatrick 21309467b48Spatrick /// EVA versions of cache and pref 21409467b48Spatrick def CACHEE : MMRel, CACHEE_ENC, CACHEE_DESC, ISA_MIPS32R2, ASE_EVA; 21509467b48Spatrick def PREFE : MMRel, PREFE_ENC, PREFE_DESC, ISA_MIPS32R2, ASE_EVA; 21609467b48Spatrick} 217