1; Fujitsu FRV opcode support, for GNU Binutils. -*- Scheme -*- 2; 3; Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc. 4; 5; Contributed by Red Hat Inc; developed under contract from Fujitsu. 6; 7; This file is part of the GNU Binutils. 8; 9; This program is free software; you can redistribute it and/or modify 10; it under the terms of the GNU General Public License as published by 11; the Free Software Foundation; either version 2 of the License, or 12; (at your option) any later version. 13; 14; This program is distributed in the hope that it will be useful, 15; but WITHOUT ANY WARRANTY; without even the implied warranty of 16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17; GNU General Public License for more details. 18; 19; You should have received a copy of the GNU General Public License 20; along with this program; if not, write to the Free Software 21; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. 22 23(include "simplify.inc") 24 25; define-arch must appear first 26 27(define-arch 28 (name frv) ; name of cpu architecture 29 (comment "Fujitsu FRV") 30 (insn-lsb0? #t) 31 (machs frv fr550 fr500 fr450 fr400 tomcat simple) 32 (isas frv) 33) 34 35(define-isa 36 (name frv) 37 (base-insn-bitsize 32) 38 ; Initial bitnumbers to decode insns by. 39 (decode-assist (24 23 22 21 20 19 18)) 40 (liw-insns 1) ; The frv fetches up to 1 insns at a time. 41 (parallel-insns 8) ; The frv executes up to 8 insns at a time. 42) 43 44; Cpu family definitions. 45; 46(define-cpu 47 ; cpu names must be distinct from the architecture name and machine names. 48 ; The "b" suffix stands for "base" and is the convention. 49 ; The "f" suffix stands for "family" and is the convention. 50 (name frvbf) 51 (comment "Fujitsu FRV base family") 52 (endian big) 53 (word-bitsize 32) 54) 55 56; Generic FR-V machine. Supports the entire architecture 57(define-mach 58 (name frv) 59 (comment "Generic FRV cpu") 60 (cpu frvbf) 61) 62(define-model 63 (name frv) (comment "Generic FRV model") (attrs) 64 (mach frv) 65 66 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 67 68 ; `state' is a list of variables for recording model state 69 ; (state) 70 71 (unit u-exec "Execution Unit" () 72 1 1 ; issue done 73 () ; state 74 () ; inputs 75 () ; outputs 76 () ; profile action (default) 77 ) 78) 79 80; FR550 machine 81(define-mach 82 (name fr550) 83 (comment "FR550 cpu") 84 (cpu frvbf) 85) 86(define-model 87 (name fr550) (comment "FR550 model") (attrs) 88 (mach fr550) 89 90 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 91 92 ; `state' is a list of variables for recording model state 93 (state 94 ; State items 95 ; These are all masks with each bit representing one register. 96 (prev-fr-load DI) ; Previous use of FR register was target of a load 97 (prev-fr-complex-1 DI) ; Previous use of FR register has variable latency 98 (prev-fr-complex-2 DI) ; Previous use of FR register has variable latency 99 (prev-ccr-complex DI) ; Previous use of CCR register has variable latency 100 (prev-acc-mmac DI) ; Previous use of ACC register was a MMAC category 101 (cur-fr-load DI) ; Current use of FR register was target of a load 102 (cur-fr-complex-1 DI) ; Current use of FR register has variable latency 103 (cur-fr-complex-2 DI) ; Current use of FR register has variable latency 104 (cur-ccr-complex SI) ; Current use of CCR register has variable latency 105 (cur-acc-mmac DI) ; Current use of ACC register was a MMAC category 106 ) 107 ; Basic unit for instructions with no latency penalties 108 (unit u-exec "Execution Unit" () 109 1 1 ; issue done 110 () ; state 111 () ; inputs 112 () ; outputs 113 () ; profile action (default) 114 ) 115 ; Basic integer insn unit 116 (unit u-integer "Integer Unit" () 117 1 1 ; issue done 118 () ; state 119 ((GRi INT -1) (GRj INT -1)) ; inputs 120 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 121 () ; profile action (default) 122 ) 123 ; Integer multiplication unit 124 (unit u-imul "Integer Multiplication Unit" () 125 1 1 ; issue done 126 () ; state 127 ((GRi INT -1) (GRj INT -1)) ; inputs 128 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs 129 () ; profile action (default) 130 ) 131 ; Integer division unit 132 (unit u-idiv "Integer Division Unit" () 133 1 1 ; issue done 134 () ; state 135 ((GRi INT -1) (GRj INT -1)) ; inputs 136 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 137 () ; profile action (default) 138 ) 139 ; Branch unit 140 (unit u-branch "Branch Unit" () 141 1 1 ; issue done 142 () ; state 143 ((GRi INT -1) (GRj INT -1) 144 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 145 ((pc)) ; outputs 146 () ; profile action (default) 147 ) 148 ; Trap unit 149 (unit u-trap "Trap Unit" () 150 1 1 ; issue done 151 () ; state 152 ((GRi INT -1) (GRj INT -1) 153 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 154 () ; outputs 155 () ; profile action (default) 156 ) 157 ; Condition code check unit 158 (unit u-check "Check Unit" () 159 1 1 ; issue done 160 () ; state 161 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs 162 () ; outputs 163 () ; profile action (default) 164 ) 165 ; Float Arithmetic unit 166 (unit u-float-arith "Float Arithmetic unit" () 167 1 1 ; issue done 168 () ; state 169 ((FRi INT -1) (FRj INT -1) ; inputs 170 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 171 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 172 () ; profile action (default) 173 ) 174 ; Float Dual Arithmetic unit 175 (unit u-float-dual-arith "Float Arithmetic unit" () 176 ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI 177 1 3 ; issue done 178 () ; state 179 ((FRi INT -1) (FRj INT -1) ; inputs 180 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 181 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 182 () ; profile action (default) 183 ) 184 ; Float Div unit 185 (unit u-float-div "Float Div unit" () 186 1 1 ; issue done 187 () ; state 188 ((FRi INT -1) (FRj INT -1)) ; inputs 189 ((FRk INT -1)) ; outputs 190 () ; profile action (default) 191 ) 192 ; Float Square Root unit 193 (unit u-float-sqrt "Float Square Root unit" () 194 1 1 ; issue done 195 () ; state 196 ((FRj INT -1) (FRdoublej INT -1)) ; inputs 197 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 198 () ; profile action (default) 199 ) 200 ; Float Compare unit 201 (unit u-float-compare "Float Compare unit" () 202 1 1 ; issue done 203 () ; state 204 ((FRi INT -1) (FRj INT -1) 205 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 206 ((FCCi_2 INT -1)) ; outputs 207 () ; profile action (default) 208 ) 209 ; Dual Float Compare unit 210 (unit u-float-dual-compare "Float Dual Compare unit" () 211 ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI 212 1 3 ; issue done 213 () ; state 214 ((FRi INT -1) (FRj INT -1)) ; inputs 215 ((FCCi_2 INT -1)) ; outputs 216 () ; profile action (default) 217 ) 218 ; FR Move to GR unit 219 (unit u-fr2gr "FR Move to GR Unit" () 220 1 1 ; issue done 221 () ; state 222 ((FRintk INT -1)) ; inputs 223 ((GRj INT -1)) ; outputs 224 () ; profile action (default) 225 ) 226 ; GR Move to FR unit 227 (unit u-gr2fr "GR Move to FR Unit" () 228 1 1 ; issue done 229 () ; state 230 ((GRj INT -1)) ; inputs 231 ((FRintk INT -1)) ; outputs 232 () ; profile action (default) 233 ) 234 ; SPR Move to GR unit 235 (unit u-spr2gr "SPR Move to GR Unit" () 236 1 1 ; issue done 237 () ; state 238 ((spr INT -1)) ; inputs 239 ((GRj INT -1)) ; outputs 240 () ; profile action (default) 241 ) 242 ; GR Move to SPR unit 243 (unit u-gr2spr "GR Move to SPR Unit" () 244 1 1 ; issue done 245 () ; state 246 ((GRj INT -1)) ; inputs 247 ((spr INT -1)) ; outputs 248 () ; profile action (default) 249 ) 250 ; GR set half unit 251 (unit u-set-hilo "GR Set Half" () 252 1 1 ; issue done 253 () ; state 254 () ; inputs 255 ((GRkhi INT -1) (GRklo INT -1)) ; outputs 256 () ; profile action (default) 257 ) 258 ; GR load unit 259 (unit u-gr-load "GR Load Unit" () 260 1 1 ; issue done 261 () ; state 262 ((GRi INT -1) (GRj INT -1)) ; inputs 263 ((GRk INT -1) (GRdoublek INT -1)) ; outputs 264 () ; profile action (default) 265 ) 266 ; GR store unit 267 (unit u-gr-store "GR Store Unit" () 268 1 1 ; issue done 269 () ; state 270 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 271 () ; outputs 272 () ; profile action (default) 273 ) 274 ; FR load unit 275 (unit u-fr-load "FR Load Unit" () 276 1 1 ; issue done 277 () ; state 278 ((GRi INT -1) (GRj INT -1)) ; inputs 279 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs 280 () ; profile action (default) 281 ) 282 ; FR store unit 283 (unit u-fr-store "FR Store Unit" () 284 1 1 ; issue done 285 () ; state 286 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 287 () ; outputs 288 () ; profile action (default) 289 ) 290 ; Swap unit 291 (unit u-swap "Swap Unit" () 292 1 1 ; issue done 293 () ; state 294 ((GRi INT -1) (GRj INT -1)) ; inputs 295 ((GRk INT -1)) ; outputs 296 () ; profile action (default) 297 ) 298 ; FR Move to FR unit 299 (unit u-fr2fr "FR Move to FR Unit" () 300 1 1 ; issue done 301 () ; state 302 ((FRi INT -1)) ; inputs 303 ((FRk INT -1)) ; outputs 304 () ; profile action (default) 305 ) 306 ; Clrgr unit 307 (unit u-clrgr "Clrgr Unit" () 308 1 1 ; issue done 309 () ; state 310 ((GRk INT -1)) ; inputs 311 () ; outputs 312 () ; profile action (default) 313 ) 314 ; Clrfr unit 315 (unit u-clrfr "Clrfr Unit" () 316 1 1 ; issue done 317 () ; state 318 ((FRk INT -1)) ; inputs 319 () ; outputs 320 () ; profile action (default) 321 ) 322 ; Insn cache invalidate unit 323 (unit u-ici "Insn cache invalidate unit" () 324 1 1 ; issue done 325 () ; state 326 ((GRi INT -1) (GRj INT -1)) ; inputs 327 () ; outputs 328 () ; profile action (default) 329 ) 330 ; Data cache invalidate unit 331 (unit u-dci "Data cache invalidate unit" () 332 1 1 ; issue done 333 () ; state 334 ((GRi INT -1) (GRj INT -1)) ; inputs 335 () ; outputs 336 () ; profile action (default) 337 ) 338 ; Data cache flush unit 339 (unit u-dcf "Data cache flush unit" () 340 1 1 ; issue done 341 () ; state 342 ((GRi INT -1) (GRj INT -1)) ; inputs 343 () ; outputs 344 () ; profile action (default) 345 ) 346 ; Insn cache preload unit 347 (unit u-icpl "Insn cache preload unit" () 348 1 1 ; issue done 349 () ; state 350 ((GRi INT -1) (GRj INT -1)) ; inputs 351 () ; outputs 352 () ; profile action (default) 353 ) 354 ; Data cache preload unit 355 (unit u-dcpl "Data cache preload unit" () 356 1 1 ; issue done 357 () ; state 358 ((GRi INT -1) (GRj INT -1)) ; inputs 359 () ; outputs 360 () ; profile action (default) 361 ) 362 ; Insn cache unlock unit 363 (unit u-icul "Insn cache unlock unit" () 364 1 1 ; issue done 365 () ; state 366 ((GRi INT -1) (GRj INT -1)) ; inputs 367 () ; outputs 368 () ; profile action (default) 369 ) 370 ; Data cache unlock unit 371 (unit u-dcul "Data cache unlock unit" () 372 1 1 ; issue done 373 () ; state 374 ((GRi INT -1) (GRj INT -1)) ; inputs 375 () ; outputs 376 () ; profile action (default) 377 ) 378 ; commit unit 379 (unit u-commit "Commit Unit" () 380 1 1 ; issue done 381 () ; state 382 ((GRk INT -1) (FRk INT -1)) ; inputs 383 () ; outputs 384 () ; profile action (default) 385 ) 386 ; Float Conversion unit 387 (unit u-float-convert "Float Conversion unit" () 388 1 1 ; issue done 389 () ; state 390 ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs 391 ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs 392 () ; profile action (default) 393 ) 394 ; Media units 395 (unit u-media "Media unit" () 396 1 1 ; issue done 397 () ; state 398 ((FRinti INT -1) (FRintj INT -1)) ; inputs 399 ((FRintk INT -1)) ; outputs 400 () ; profile action (default) 401 ) 402 (unit u-media-quad "Media-quad unit" () 403 1 1 ; issue done 404 () ; state 405 ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs 406 ((FRintkeven INT -1)) ; outputs 407 () ; profile action (default) 408 ) 409 (unit u-media-dual-expand "Media Dual Expand unit" () 410 1 1 ; issue done 411 () ; state 412 ((FRinti INT -1)) ; inputs 413 ((FRintkeven INT -1)) ; outputs 414 () ; profile action (default) 415 ) 416 (unit u-media-3-dual "Media-3-dual unit" () 417 1 1 ; issue done 418 () ; state 419 ((FRinti INT -1)) ; inputs 420 ((FRintk INT -1)) ; outputs 421 () ; profile action (default) 422 ) 423 (unit u-media-3-acc "Media unit for M-3 using ACC" () 424 1 1 ; issue done 425 () ; state 426 ((FRintj INT -1) (ACC40Si INT -1)) ; inputs 427 ((FRintk INT -1)) ; outputs 428 () ; profile action (default) 429 ) 430 (unit u-media-3-acc-dual "Media-3-acc-dual unit" () 431 1 1 ; issue done 432 () ; state 433 ((ACC40Si INT -1)) ; inputs 434 ((FRintkeven INT -1)) ; outputs 435 () ; profile action (default) 436 ) 437 (unit u-media-3-wtacc "Media-3-wtacc unit" () 438 1 1 ; issue done 439 () ; state 440 ((FRinti INT -1) (ACC40Sk INT -1)) ; inputs 441 () ; outputs 442 () ; profile action (default) 443 ) 444 (unit u-media-3-mclracc "Media-3-mclracc unit" () 445 1 1 ; issue done 446 () ; state 447 () ; inputs 448 () ; outputs 449 () ; profile action (default) 450 ) 451 (unit u-media-set "Media set" () 452 1 1 ; issue done 453 () ; state 454 () ; inputs 455 ((FRintk INT -1)) ; outputs 456 () ; profile action (default) 457 ) 458 (unit u-media-4 "Media-4 unit" () 459 1 1 ; issue done 460 () ; state 461 ((FRinti INT -1) (FRintj INT -1)) ; inputs 462 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 463 () ; profile action (default) 464 ) 465 (unit u-media-4-acc "Media-4-acc unit" () 466 1 1 ; issue done 467 () ; state 468 ((ACC40Si INT -1)) ; inputs 469 ((ACC40Sk INT -1)) ; outputs 470 () ; profile action (default) 471 ) 472 (unit u-media-4-acc-dual "Media-4-acc-dual unit" () 473 1 1 ; issue done 474 () ; state 475 ((ACC40Si INT -1)) ; inputs 476 ((ACC40Sk INT -1)) ; outputs 477 () ; profile action (default) 478 ) 479 (unit u-media-4-add-sub "Media-4-add-sub unit" () 480 1 1 ; issue done 481 () ; state 482 ((ACC40Si INT -1)) ; inputs 483 ((ACC40Sk INT -1)) ; outputs 484 () ; profile action (default) 485 ) 486 (unit u-media-4-add-sub-dual "Media-4-add-sub-dual unit" () 487 1 1 ; issue done 488 () ; state 489 ((ACC40Si INT -1)) ; inputs 490 ((ACC40Sk INT -1)) ; outputs 491 () ; profile action (default) 492 ) 493 (unit u-media-4-quad "Media-4-quad unit" () 494 1 1 ; issue done 495 () ; state 496 ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs 497 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 498 () ; profile action (default) 499 ) 500) 501 502; FR500 machine. 503(define-mach 504 (name fr500) 505 (comment "FR500 cpu") 506 (cpu frvbf) 507) 508(define-model 509 (name fr500) (comment "FR500 model") (attrs) 510 (mach fr500) 511 512 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 513 514 ; `state' is a list of variables for recording model state 515 (state 516 ; State items 517 ; These are all masks with each bit representing one register. 518 (prev-fpop DI) ; Previous use of FR register was floating point insn 519 (prev-media DI) ; Previous use of FR register was a media insn 520 (prev-cc-complex DI) ; Previous use of ICC register was not simple 521 (cur-fpop DI) ; Current use of FR register was floating point insn 522 (cur-media DI) ; Current use of FR register was a media insn 523 (cur-cc-complex DI) ; Current use of ICC register was not simple 524 ) 525 ; Basic unit for instructions with no latency penalties 526 (unit u-exec "Execution Unit" () 527 1 1 ; issue done 528 () ; state 529 () ; inputs 530 () ; outputs 531 () ; profile action (default) 532 ) 533 ; Basic integer insn unit 534 (unit u-integer "Integer Unit" () 535 1 1 ; issue done 536 () ; state 537 ((GRi INT -1) (GRj INT -1)) ; inputs 538 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 539 () ; profile action (default) 540 ) 541 ; Integer multiplication unit 542 (unit u-imul "Integer Multiplication Unit" () 543 1 1 ; issue done 544 () ; state 545 ((GRi INT -1) (GRj INT -1)) ; inputs 546 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs 547 () ; profile action (default) 548 ) 549 ; Integer division unit 550 (unit u-idiv "Integer Division Unit" () 551 1 1 ; issue done 552 () ; state 553 ((GRi INT -1) (GRj INT -1)) ; inputs 554 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 555 () ; profile action (default) 556 ) 557 ; Branch unit 558 (unit u-branch "Branch Unit" () 559 1 1 ; issue done 560 () ; state 561 ((GRi INT -1) (GRj INT -1) 562 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 563 ((pc)) ; outputs 564 () ; profile action (default) 565 ) 566 ; Trap unit 567 (unit u-trap "Trap Unit" () 568 1 1 ; issue done 569 () ; state 570 ((GRi INT -1) (GRj INT -1) 571 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 572 () ; outputs 573 () ; profile action (default) 574 ) 575 ; Condition code check unit 576 (unit u-check "Check Unit" () 577 1 1 ; issue done 578 () ; state 579 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs 580 () ; outputs 581 () ; profile action (default) 582 ) 583 ; Clrgr unit 584 (unit u-clrgr "Clrgr Unit" () 585 1 1 ; issue done 586 () ; state 587 ((GRk INT -1)) ; inputs 588 () ; outputs 589 () ; profile action (default) 590 ) 591 ; Clrfr unit 592 (unit u-clrfr "Clrfr Unit" () 593 1 1 ; issue done 594 () ; state 595 ((FRk INT -1)) ; inputs 596 () ; outputs 597 () ; profile action (default) 598 ) 599 ; GR set half unit 600 (unit u-set-hilo "GR Set Half" () 601 1 1 ; issue done 602 () ; state 603 () ; inputs 604 ((GRkhi INT -1) (GRklo INT -1)) ; outputs 605 () ; profile action (default) 606 ) 607 ; GR load unit -- TODO doesn't handle quad 608 (unit u-gr-load "GR Load Unit" () 609 1 1 ; issue done 610 () ; state 611 ((GRi INT -1) (GRj INT -1)) ; inputs 612 ((GRk INT -1) (GRdoublek INT -1)) ; outputs 613 () ; profile action (default) 614 ) 615 ; GR store unit -- TODO doesn't handle quad 616 (unit u-gr-store "GR Store Unit" () 617 1 1 ; issue done 618 () ; state 619 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 620 () ; outputs 621 () ; profile action (default) 622 ) 623 ; GR recovering store unit -- TODO doesn't handle quad 624 (unit u-gr-r-store "GR Recovering Store Unit" () 625 1 1 ; issue done 626 () ; state 627 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 628 () ; outputs 629 () ; profile action (default) 630 ) 631 ; FR load unit -- TODO doesn't handle quad 632 (unit u-fr-load "FR Load Unit" () 633 1 1 ; issue done 634 () ; state 635 ((GRi INT -1) (GRj INT -1)) ; inputs 636 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs 637 () ; profile action (default) 638 ) 639 ; FR store unit -- TODO doesn't handle quad 640 (unit u-fr-store "FR Store Unit" () 641 1 1 ; issue done 642 () ; state 643 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 644 () ; outputs 645 () ; profile action (default) 646 ) 647 ; FR recovering store unit -- TODO doesn't handle quad 648 (unit u-fr-r-store "FR Recovering Store Unit" () 649 1 1 ; issue done 650 () ; state 651 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 652 () ; outputs 653 () ; profile action (default) 654 ) 655 ; Swap unit 656 (unit u-swap "Swap Unit" () 657 1 1 ; issue done 658 () ; state 659 ((GRi INT -1) (GRj INT -1)) ; inputs 660 ((GRk INT -1)) ; outputs 661 () ; profile action (default) 662 ) 663 ; FR Move to FR unit 664 (unit u-fr2fr "FR Move to FR Unit" () 665 1 1 ; issue done 666 () ; state 667 ((FRi INT -1)) ; inputs 668 ((FRk INT -1)) ; outputs 669 () ; profile action (default) 670 ) 671 ; FR Move to GR unit 672 (unit u-fr2gr "FR Move to GR Unit" () 673 1 1 ; issue done 674 () ; state 675 ((FRintk INT -1)) ; inputs 676 ((GRj INT -1)) ; outputs 677 () ; profile action (default) 678 ) 679 ; SPR Move to GR unit 680 (unit u-spr2gr "SPR Move to GR Unit" () 681 1 1 ; issue done 682 () ; state 683 ((spr INT -1)) ; inputs 684 ((GRj INT -1)) ; outputs 685 () ; profile action (default) 686 ) 687 ; GR Move to FR unit 688 (unit u-gr2fr "GR Move to FR Unit" () 689 1 1 ; issue done 690 () ; state 691 ((GRj INT -1)) ; inputs 692 ((FRintk INT -1)) ; outputs 693 () ; profile action (default) 694 ) 695 ; GR Move to SPR unit 696 (unit u-gr2spr "GR Move to SPR Unit" () 697 1 1 ; issue done 698 () ; state 699 ((GRj INT -1)) ; inputs 700 ((spr INT -1)) ; outputs 701 () ; profile action (default) 702 ) 703 ; Float Arithmetic unit 704 (unit u-float-arith "Float Arithmetic unit" () 705 1 1 ; issue done 706 () ; state 707 ((FRi INT -1) (FRj INT -1) ; inputs 708 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 709 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 710 () ; profile action (default) 711 ) 712 ; Float Dual Arithmetic unit 713 (unit u-float-dual-arith "Float Arithmetic unit" () 714 1 1 ; issue done 715 () ; state 716 ((FRi INT -1) (FRj INT -1) ; inputs 717 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 718 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 719 () ; profile action (default) 720 ) 721 ; Float Div unit 722 (unit u-float-div "Float Div unit" () 723 1 1 ; issue done 724 () ; state 725 ((FRi INT -1) (FRj INT -1)) ; inputs 726 ((FRk INT -1)) ; outputs 727 () ; profile action (default) 728 ) 729 ; Float Square Root unit 730 (unit u-float-sqrt "Float Square Root unit" () 731 1 1 ; issue done 732 () ; state 733 ((FRj INT -1) (FRdoublej INT -1)) ; inputs 734 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 735 () ; profile action (default) 736 ) 737 ; Float Dual Square Root unit 738 (unit u-float-dual-sqrt "Float Dual Square Root unit" () 739 1 1 ; issue done 740 () ; state 741 ((FRj INT -1)) ; inputs 742 ((FRk INT -1)) ; outputs 743 () ; profile action (default) 744 ) 745 ; Float Compare unit 746 (unit u-float-compare "Float Compare unit" () 747 1 1 ; issue done 748 () ; state 749 ((FRi INT -1) (FRj INT -1) 750 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 751 ((FCCi_2 INT -1)) ; outputs 752 () ; profile action (default) 753 ) 754 ; Dual Float Compare unit 755 (unit u-float-dual-compare "Float Dual Compare unit" () 756 1 1 ; issue done 757 () ; state 758 ((FRi INT -1) (FRj INT -1)) ; inputs 759 ((FCCi_2 INT -1)) ; outputs 760 () ; profile action (default) 761 ) 762 ; Float Conversion unit 763 (unit u-float-convert "Float Conversion unit" () 764 1 1 ; issue done 765 () ; state 766 ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs 767 ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs 768 () ; profile action (default) 769 ) 770 ; Dual Float Conversion unit 771 (unit u-float-dual-convert "Float Dual Conversion unit" () 772 1 1 ; issue done 773 () ; state 774 ((FRj INT -1) (FRintj INT -1)) ; inputs 775 ((FRk INT -1) (FRintk INT -1)) ; outputs 776 () ; profile action (default) 777 ) 778 ; Media unit 779 (unit u-media "Media unit" () 780 1 1 ; issue done 781 () ; state 782 ((FRinti INT -1) (FRintj INT -1) (ACC40Si INT -1) (ACCGi INT -1)) ; inputs 783 ((FRintk INT -1) (ACC40Sk INT -1) (ACC40Uk INT -1) (ACCGk INT -1)) ; outputs 784 () ; profile action (default) 785 ) 786 ; Media Quad Arithmetic unit 787 (unit u-media-quad-arith "Media Quad Arithmetic unit" () 788 1 1 ; issue done 789 () ; state 790 ((FRinti INT -1) (FRintj INT -1)) ; inputs 791 ((FRintk INT -1)) ; outputs 792 () ; profile action (default) 793 ) 794 ; Media Dual Multiplication unit 795 (unit u-media-dual-mul "Media Dual Multiplication unit" () 796 1 1 ; issue done 797 () ; state 798 ((FRinti INT -1) (FRintj INT -1)) ; inputs 799 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 800 () ; profile action (default) 801 ) 802 ; Media Quad Multiplication unit 803 (unit u-media-quad-mul "Media Quad Multiplication unit" () 804 1 1 ; issue done 805 () ; state 806 ((FRinti INT -1) (FRintj INT -1)) ; inputs 807 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 808 () ; profile action (default) 809 ) 810 ; Media Quad Complex unit 811 (unit u-media-quad-complex "Media Quad Complex unit" () 812 1 1 ; issue done 813 () ; state 814 ((FRinti INT -1) (FRintj INT -1)) ; inputs 815 ((ACC40Sk INT -1)) ; outputs 816 () ; profile action (default) 817 ) 818 ; Media Dual Expand unit 819 (unit u-media-dual-expand "Media Dual Expand unit" () 820 1 1 ; issue done 821 () ; state 822 ((FRinti INT -1)) ; inputs 823 ((FRintk INT -1)) ; outputs 824 () ; profile action (default) 825 ) 826 ; Media Dual Unpack unit 827 (unit u-media-dual-unpack "Media Dual Unpack unit" () 828 1 1 ; issue done 829 () ; state 830 ((FRinti INT -1)) ; inputs 831 ((FRintk INT -1)) ; outputs 832 () ; profile action (default) 833 ) 834 ; Media Dual byte to half unit 835 (unit u-media-dual-btoh "Media Byte to byte" () 836 1 1 ; issue done 837 () ; state 838 ((FRintj INT -1)) ; inputs 839 ((FRintk INT -1)) ; outputs 840 () ; profile action (default) 841 ) 842 ; Media Dual half to byte unit 843 (unit u-media-dual-htob "Media Half to byte" () 844 1 1 ; issue done 845 () ; state 846 ((FRintj INT -1)) ; inputs 847 ((FRintk INT -1)) ; outputs 848 () ; profile action (default) 849 ) 850 ; Media Dual byte to half unit extended 851 (unit u-media-dual-btohe "Media Byte to byte extended" () 852 1 1 ; issue done 853 () ; state 854 ((FRintj INT -1)) ; inputs 855 ((FRintk INT -1)) ; outputs 856 () ; profile action (default) 857 ) 858 ; Barrier unit 859 (unit u-barrier "Barrier unit" () 860 1 1 ; issue done 861 () ; state 862 () ; inputs 863 () ; outputs 864 () ; profile action (default) 865 ) 866 ; Memory Barrier unit 867 (unit u-membar "Memory Barrier unit" () 868 1 1 ; issue done 869 () ; state 870 () ; inputs 871 () ; outputs 872 () ; profile action (default) 873 ) 874 ; Insn cache invalidate unit 875 (unit u-ici "Insn cache invalidate unit" () 876 1 1 ; issue done 877 () ; state 878 ((GRi INT -1) (GRj INT -1)) ; inputs 879 () ; outputs 880 () ; profile action (default) 881 ) 882 ; Data cache invalidate unit 883 (unit u-dci "Data cache invalidate unit" () 884 1 1 ; issue done 885 () ; state 886 ((GRi INT -1) (GRj INT -1)) ; inputs 887 () ; outputs 888 () ; profile action (default) 889 ) 890 ; Data cache flush unit 891 (unit u-dcf "Data cache flush unit" () 892 1 1 ; issue done 893 () ; state 894 ((GRi INT -1) (GRj INT -1)) ; inputs 895 () ; outputs 896 () ; profile action (default) 897 ) 898 ; Insn cache preload unit 899 (unit u-icpl "Insn cache preload unit" () 900 1 1 ; issue done 901 () ; state 902 ((GRi INT -1) (GRj INT -1)) ; inputs 903 () ; outputs 904 () ; profile action (default) 905 ) 906 ; Data cache preload unit 907 (unit u-dcpl "Data cache preload unit" () 908 1 1 ; issue done 909 () ; state 910 ((GRi INT -1) (GRj INT -1)) ; inputs 911 () ; outputs 912 () ; profile action (default) 913 ) 914 ; Insn cache unlock unit 915 (unit u-icul "Insn cache unlock unit" () 916 1 1 ; issue done 917 () ; state 918 ((GRi INT -1) (GRj INT -1)) ; inputs 919 () ; outputs 920 () ; profile action (default) 921 ) 922 ; Data cache unlock unit 923 (unit u-dcul "Data cache unlock unit" () 924 1 1 ; issue done 925 () ; state 926 ((GRi INT -1) (GRj INT -1)) ; inputs 927 () ; outputs 928 () ; profile action (default) 929 ) 930 ; commit unit 931 (unit u-commit "Commit Unit" () 932 1 1 ; issue done 933 () ; state 934 ((GRk INT -1) (FRk INT -1)) ; inputs 935 () ; outputs 936 () ; profile action (default) 937 ) 938) 939 940; Tomcat machine. Early version of fr500 machine 941(define-mach 942 (name tomcat) 943 (comment "Tomcat -- early version of fr500") 944 (cpu frvbf) 945) 946(define-model 947 (name tomcat) (comment "Tomcat model") (attrs) 948 (mach tomcat) 949 950 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 951 952 ; `state' is a list of variables for recording model state 953 ; (state) 954 955 (unit u-exec "Execution Unit" () 956 1 1 ; issue done 957 () ; state 958 () ; inputs 959 () ; outputs 960 () ; profile action (default) 961 ) 962) 963 964; FR400 machine 965(define-mach 966 (name fr400) 967 (comment "FR400 cpu") 968 (cpu frvbf) 969) 970(define-model 971 (name fr400) (comment "FR400 model") (attrs) 972 (mach fr400) 973 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 974 ; `state' is a list of variables for recording model state 975 (state 976 ; State items 977 ; These are all masks with each bit representing one register. 978 (prev-fp-load DI) ; Previous use of FR register was floating point load 979 (prev-fr-p4 DI) ; Previous use of FR register was media unit 4 980 (prev-fr-p6 DI) ; Previous use of FR register was media unit 6 981 (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2 982 (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4 983 (cur-fp-load DI) ; Current use of FR register is floating point load 984 (cur-fr-p4 DI) ; Current use of FR register is media unit 4 985 (cur-fr-p6 DI) ; Current use of FR register is media unit 6 986 (cur-acc-p2 DI) ; Current use of ACC register is media unit 2 987 (cur-acc-p4 DI) ; Current use of ACC register is media unit 4 988 ) 989 (unit u-exec "Execution Unit" () 990 1 1 ; issue done 991 () ; state 992 () ; inputs 993 () ; outputs 994 () ; profile action (default) 995 ) 996 ; Basic integer insn unit 997 (unit u-integer "Integer Unit" () 998 1 1 ; issue done 999 () ; state 1000 ((GRi INT -1) (GRj INT -1)) ; inputs 1001 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 1002 () ; profile action (default) 1003 ) 1004 ; Integer multiplication unit 1005 (unit u-imul "Integer Multiplication Unit" () 1006 1 1 ; issue done 1007 () ; state 1008 ((GRi INT -1) (GRj INT -1)) ; inputs 1009 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs 1010 () ; profile action (default) 1011 ) 1012 ; Integer division unit 1013 (unit u-idiv "Integer Division Unit" () 1014 1 1 ; issue done 1015 () ; state 1016 ((GRi INT -1) (GRj INT -1)) ; inputs 1017 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 1018 () ; profile action (default) 1019 ) 1020 ; Branch unit 1021 (unit u-branch "Branch Unit" () 1022 1 1 ; issue done 1023 () ; state 1024 ((GRi INT -1) (GRj INT -1) 1025 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 1026 ((pc)) ; outputs 1027 () ; profile action (default) 1028 ) 1029 ; Trap unit 1030 (unit u-trap "Trap Unit" () 1031 1 1 ; issue done 1032 () ; state 1033 ((GRi INT -1) (GRj INT -1) 1034 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 1035 () ; outputs 1036 () ; profile action (default) 1037 ) 1038 ; Condition code check unit 1039 (unit u-check "Check Unit" () 1040 1 1 ; issue done 1041 () ; state 1042 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs 1043 () ; outputs 1044 () ; profile action (default) 1045 ) 1046 ; GR set half unit 1047 (unit u-set-hilo "GR Set Half" () 1048 1 1 ; issue done 1049 () ; state 1050 () ; inputs 1051 ((GRkhi INT -1) (GRklo INT -1)) ; outputs 1052 () ; profile action (default) 1053 ) 1054 ; GR load unit -- TODO doesn't handle quad 1055 (unit u-gr-load "GR Load Unit" () 1056 1 1 ; issue done 1057 () ; state 1058 ((GRi INT -1) (GRj INT -1)) ; inputs 1059 ((GRk INT -1) (GRdoublek INT -1)) ; outputs 1060 () ; profile action (default) 1061 ) 1062 ; GR store unit -- TODO doesn't handle quad 1063 (unit u-gr-store "GR Store Unit" () 1064 1 1 ; issue done 1065 () ; state 1066 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 1067 () ; outputs 1068 () ; profile action (default) 1069 ) 1070 ; FR load unit -- TODO doesn't handle quad 1071 (unit u-fr-load "FR Load Unit" () 1072 1 1 ; issue done 1073 () ; state 1074 ((GRi INT -1) (GRj INT -1)) ; inputs 1075 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs 1076 () ; profile action (default) 1077 ) 1078 ; FR store unit -- TODO doesn't handle quad 1079 (unit u-fr-store "FR Store Unit" () 1080 1 1 ; issue done 1081 () ; state 1082 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 1083 () ; outputs 1084 () ; profile action (default) 1085 ) 1086 ; Swap unit 1087 (unit u-swap "Swap Unit" () 1088 1 1 ; issue done 1089 () ; state 1090 ((GRi INT -1) (GRj INT -1)) ; inputs 1091 ((GRk INT -1)) ; outputs 1092 () ; profile action (default) 1093 ) 1094 ; FR Move to GR unit 1095 (unit u-fr2gr "FR Move to GR Unit" () 1096 1 1 ; issue done 1097 () ; state 1098 ((FRintk INT -1)) ; inputs 1099 ((GRj INT -1)) ; outputs 1100 () ; profile action (default) 1101 ) 1102 ; SPR Move to GR unit 1103 (unit u-spr2gr "SPR Move to GR Unit" () 1104 1 1 ; issue done 1105 () ; state 1106 ((spr INT -1)) ; inputs 1107 ((GRj INT -1)) ; outputs 1108 () ; profile action (default) 1109 ) 1110 ; GR Move to FR unit 1111 (unit u-gr2fr "GR Move to FR Unit" () 1112 1 1 ; issue done 1113 () ; state 1114 ((GRj INT -1)) ; inputs 1115 ((FRintk INT -1)) ; outputs 1116 () ; profile action (default) 1117 ) 1118 ; GR Move to SPR unit 1119 (unit u-gr2spr "GR Move to SPR Unit" () 1120 1 1 ; issue done 1121 () ; state 1122 ((GRj INT -1)) ; inputs 1123 ((spr INT -1)) ; outputs 1124 () ; profile action (default) 1125 ) 1126 ; Media unit M1 -- see table 13-8 in the fr400 LSI 1127 (unit u-media-1 "Media-1 unit" () 1128 1 1 ; issue done 1129 () ; state 1130 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1131 ((FRintk INT -1)) ; outputs 1132 () ; profile action (default) 1133 ) 1134 (unit u-media-1-quad "Media-1-quad unit" () 1135 1 1 ; issue done 1136 () ; state 1137 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1138 ((FRintk INT -1)) ; outputs 1139 () ; profile action (default) 1140 ) 1141 (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" () 1142 1 1 ; issue done 1143 () ; state 1144 () ; inputs 1145 ((FRkhi INT -1) (FRklo INT -1)) ; outputs 1146 () ; profile action (default) 1147 ) 1148 ; Media unit M2 -- see table 13-8 in the fr400 LSI 1149 (unit u-media-2 "Media-2 unit" () 1150 1 1 ; issue done 1151 () ; state 1152 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1153 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 1154 () ; profile action (default) 1155 ) 1156 (unit u-media-2-quad "Media-2-quad unit" () 1157 1 1 ; issue done 1158 () ; state 1159 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1160 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 1161 () ; profile action (default) 1162 ) 1163 (unit u-media-2-acc "Media-2-acc unit" () 1164 1 1 ; issue done 1165 () ; state 1166 ((ACC40Si INT -1)) ; inputs 1167 ((ACC40Sk INT -1)) ; outputs 1168 () ; profile action (default) 1169 ) 1170 (unit u-media-2-acc-dual "Media-2-acc-dual unit" () 1171 1 1 ; issue done 1172 () ; state 1173 ((ACC40Si INT -1)) ; inputs 1174 ((ACC40Sk INT -1)) ; outputs 1175 () ; profile action (default) 1176 ) 1177 (unit u-media-2-add-sub "Media-2-add-sub unit" () 1178 1 1 ; issue done 1179 () ; state 1180 ((ACC40Si INT -1)) ; inputs 1181 ((ACC40Sk INT -1)) ; outputs 1182 () ; profile action (default) 1183 ) 1184 (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" () 1185 1 1 ; issue done 1186 () ; state 1187 ((ACC40Si INT -1)) ; inputs 1188 ((ACC40Sk INT -1)) ; outputs 1189 () ; profile action (default) 1190 ) 1191 ; Media unit M3 -- see table 13-8 in the fr400 LSI 1192 (unit u-media-3 "Media-3 unit" () 1193 1 1 ; issue done 1194 () ; state 1195 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1196 ((FRintk INT -1)) ; outputs 1197 () ; profile action (default) 1198 ) 1199 (unit u-media-3-dual "Media-3-dual unit" () 1200 1 1 ; issue done 1201 () ; state 1202 ((FRinti INT -1)) ; inputs 1203 ((FRintk INT -1)) ; outputs 1204 () ; profile action (default) 1205 ) 1206 (unit u-media-3-quad "Media-3-quad unit" () 1207 1 1 ; issue done 1208 () ; state 1209 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1210 ((FRintk INT -1)) ; outputs 1211 () ; profile action (default) 1212 ) 1213 ; Media unit M4 -- see table 13-8 in the fr400 LSI 1214 (unit u-media-4 "Media-4 unit" () 1215 1 1 ; issue done 1216 () ; state 1217 ((ACC40Si INT -1) (FRintj INT -1)) ; inputs 1218 ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs 1219 () ; profile action (default) 1220 ) 1221 (unit u-media-4-accg "Media-4-accg unit" () 1222 1 1 ; issue done 1223 () ; state 1224 ((ACCGi INT -1) (FRinti INT -1)) ; inputs 1225 ((ACCGk INT -1) (FRintk INT -1)) ; outputs 1226 () ; profile action (default) 1227 ) 1228 (unit u-media-4-acc-dual "Media-4-acc-dual unit" () 1229 1 1 ; issue done 1230 () ; state 1231 ((ACC40Si INT -1)) ; inputs 1232 ((FRintk INT -1)) ; outputs 1233 () ; profile action (default) 1234 ) 1235 ; Media unit M6 -- see table 13-8 in the fr400 LSI 1236 (unit u-media-6 "Media-6 unit" () 1237 1 1 ; issue done 1238 () ; state 1239 ((FRinti INT -1)) ; inputs 1240 ((FRintk INT -1)) ; outputs 1241 () ; profile action (default) 1242 ) 1243 ; Media unit M7 -- see table 13-8 in the fr400 LSI 1244 (unit u-media-7 "Media-1 unit" () 1245 1 1 ; issue done 1246 () ; state 1247 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1248 ((FCCk INT -1)) ; outputs 1249 () ; profile action (default) 1250 ) 1251 ; Media Dual Expand unit 1252 (unit u-media-dual-expand "Media Dual Expand unit" () 1253 1 1 ; issue done 1254 () ; state 1255 ((FRinti INT -1)) ; inputs 1256 ((FRintk INT -1)) ; outputs 1257 () ; profile action (default) 1258 ) 1259 ; Media Dual half to byte unit 1260 (unit u-media-dual-htob "Media Half to byte" () 1261 1 1 ; issue done 1262 () ; state 1263 ((FRintj INT -1)) ; inputs 1264 ((FRintk INT -1)) ; outputs 1265 () ; profile action (default) 1266 ) 1267 ; Barrier unit 1268 (unit u-barrier "Barrier unit" () 1269 1 1 ; issue done 1270 () ; state 1271 () ; inputs 1272 () ; outputs 1273 () ; profile action (default) 1274 ) 1275 ; Memory Barrier unit 1276 (unit u-membar "Memory Barrier unit" () 1277 1 1 ; issue done 1278 () ; state 1279 () ; inputs 1280 () ; outputs 1281 () ; profile action (default) 1282 ) 1283 ; Insn cache invalidate unit 1284 (unit u-ici "Insn cache invalidate unit" () 1285 1 1 ; issue done 1286 () ; state 1287 ((GRi INT -1) (GRj INT -1)) ; inputs 1288 () ; outputs 1289 () ; profile action (default) 1290 ) 1291 ; Data cache invalidate unit 1292 (unit u-dci "Data cache invalidate unit" () 1293 1 1 ; issue done 1294 () ; state 1295 ((GRi INT -1) (GRj INT -1)) ; inputs 1296 () ; outputs 1297 () ; profile action (default) 1298 ) 1299 ; Data cache flush unit 1300 (unit u-dcf "Data cache flush unit" () 1301 1 1 ; issue done 1302 () ; state 1303 ((GRi INT -1) (GRj INT -1)) ; inputs 1304 () ; outputs 1305 () ; profile action (default) 1306 ) 1307 ; Insn cache preload unit 1308 (unit u-icpl "Insn cache preload unit" () 1309 1 1 ; issue done 1310 () ; state 1311 ((GRi INT -1) (GRj INT -1)) ; inputs 1312 () ; outputs 1313 () ; profile action (default) 1314 ) 1315 ; Data cache preload unit 1316 (unit u-dcpl "Data cache preload unit" () 1317 1 1 ; issue done 1318 () ; state 1319 ((GRi INT -1) (GRj INT -1)) ; inputs 1320 () ; outputs 1321 () ; profile action (default) 1322 ) 1323 ; Insn cache unlock unit 1324 (unit u-icul "Insn cache unlock unit" () 1325 1 1 ; issue done 1326 () ; state 1327 ((GRi INT -1) (GRj INT -1)) ; inputs 1328 () ; outputs 1329 () ; profile action (default) 1330 ) 1331 ; Data cache unlock unit 1332 (unit u-dcul "Data cache unlock unit" () 1333 1 1 ; issue done 1334 () ; state 1335 ((GRi INT -1) (GRj INT -1)) ; inputs 1336 () ; outputs 1337 () ; profile action (default) 1338 ) 1339) 1340 1341; FR450 machine 1342(define-mach 1343 (name fr450) 1344 (comment "FR450 cpu") 1345 (cpu frvbf) 1346) 1347(define-model 1348 (name fr450) (comment "FR450 model") (attrs) 1349 (mach fr450) 1350 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 1351 ; `state' is a list of variables for recording model state 1352 (state 1353 ; State items 1354 ; These are all masks with each bit representing one register. 1355 (prev-fp-load DI) ; Previous use of FR register was floating point load 1356 (prev-fr-p4 DI) ; Previous use of FR register was media unit 4 1357 (prev-fr-p6 DI) ; Previous use of FR register was media unit 6 1358 (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2 1359 (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4 1360 (cur-fp-load DI) ; Current use of FR register is floating point load 1361 (cur-fr-p4 DI) ; Current use of FR register is media unit 4 1362 (cur-fr-p6 DI) ; Current use of FR register is media unit 6 1363 (cur-acc-p2 DI) ; Current use of ACC register is media unit 2 1364 (cur-acc-p4 DI) ; Current use of ACC register is media unit 4 1365 ) 1366 (unit u-exec "Execution Unit" () 1367 1 1 ; issue done 1368 () ; state 1369 () ; inputs 1370 () ; outputs 1371 () ; profile action (default) 1372 ) 1373 ; Basic integer insn unit 1374 (unit u-integer "Integer Unit" () 1375 1 1 ; issue done 1376 () ; state 1377 ((GRi INT -1) (GRj INT -1)) ; inputs 1378 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 1379 () ; profile action (default) 1380 ) 1381 ; Integer multiplication unit 1382 (unit u-imul "Integer Multiplication Unit" () 1383 1 1 ; issue done 1384 () ; state 1385 ((GRi INT -1) (GRj INT -1)) ; inputs 1386 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs 1387 () ; profile action (default) 1388 ) 1389 ; Integer division unit 1390 (unit u-idiv "Integer Division Unit" () 1391 1 1 ; issue done 1392 () ; state 1393 ((GRi INT -1) (GRj INT -1)) ; inputs 1394 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 1395 () ; profile action (default) 1396 ) 1397 ; Branch unit 1398 (unit u-branch "Branch Unit" () 1399 1 1 ; issue done 1400 () ; state 1401 ((GRi INT -1) (GRj INT -1) 1402 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 1403 ((pc)) ; outputs 1404 () ; profile action (default) 1405 ) 1406 ; Trap unit 1407 (unit u-trap "Trap Unit" () 1408 1 1 ; issue done 1409 () ; state 1410 ((GRi INT -1) (GRj INT -1) 1411 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 1412 () ; outputs 1413 () ; profile action (default) 1414 ) 1415 ; Condition code check unit 1416 (unit u-check "Check Unit" () 1417 1 1 ; issue done 1418 () ; state 1419 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs 1420 () ; outputs 1421 () ; profile action (default) 1422 ) 1423 ; GR set half unit 1424 (unit u-set-hilo "GR Set Half" () 1425 1 1 ; issue done 1426 () ; state 1427 () ; inputs 1428 ((GRkhi INT -1) (GRklo INT -1)) ; outputs 1429 () ; profile action (default) 1430 ) 1431 ; GR load unit -- TODO doesn't handle quad 1432 (unit u-gr-load "GR Load Unit" () 1433 1 1 ; issue done 1434 () ; state 1435 ((GRi INT -1) (GRj INT -1)) ; inputs 1436 ((GRk INT -1) (GRdoublek INT -1)) ; outputs 1437 () ; profile action (default) 1438 ) 1439 ; GR store unit -- TODO doesn't handle quad 1440 (unit u-gr-store "GR Store Unit" () 1441 1 1 ; issue done 1442 () ; state 1443 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 1444 () ; outputs 1445 () ; profile action (default) 1446 ) 1447 ; FR load unit -- TODO doesn't handle quad 1448 (unit u-fr-load "FR Load Unit" () 1449 1 1 ; issue done 1450 () ; state 1451 ((GRi INT -1) (GRj INT -1)) ; inputs 1452 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs 1453 () ; profile action (default) 1454 ) 1455 ; FR store unit -- TODO doesn't handle quad 1456 (unit u-fr-store "FR Store Unit" () 1457 1 1 ; issue done 1458 () ; state 1459 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 1460 () ; outputs 1461 () ; profile action (default) 1462 ) 1463 ; Swap unit 1464 (unit u-swap "Swap Unit" () 1465 1 1 ; issue done 1466 () ; state 1467 ((GRi INT -1) (GRj INT -1)) ; inputs 1468 ((GRk INT -1)) ; outputs 1469 () ; profile action (default) 1470 ) 1471 ; FR Move to GR unit 1472 (unit u-fr2gr "FR Move to GR Unit" () 1473 1 1 ; issue done 1474 () ; state 1475 ((FRintk INT -1)) ; inputs 1476 ((GRj INT -1)) ; outputs 1477 () ; profile action (default) 1478 ) 1479 ; SPR Move to GR unit 1480 (unit u-spr2gr "SPR Move to GR Unit" () 1481 1 1 ; issue done 1482 () ; state 1483 ((spr INT -1)) ; inputs 1484 ((GRj INT -1)) ; outputs 1485 () ; profile action (default) 1486 ) 1487 ; GR Move to FR unit 1488 (unit u-gr2fr "GR Move to FR Unit" () 1489 1 1 ; issue done 1490 () ; state 1491 ((GRj INT -1)) ; inputs 1492 ((FRintk INT -1)) ; outputs 1493 () ; profile action (default) 1494 ) 1495 ; GR Move to SPR unit 1496 (unit u-gr2spr "GR Move to SPR Unit" () 1497 1 1 ; issue done 1498 () ; state 1499 ((GRj INT -1)) ; inputs 1500 ((spr INT -1)) ; outputs 1501 () ; profile action (default) 1502 ) 1503 ; Media unit M1 -- see table 14-8 in the fr450 LSI 1504 (unit u-media-1 "Media-1 unit" () 1505 1 1 ; issue done 1506 () ; state 1507 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1508 ((FRintk INT -1)) ; outputs 1509 () ; profile action (default) 1510 ) 1511 (unit u-media-1-quad "Media-1-quad unit" () 1512 1 1 ; issue done 1513 () ; state 1514 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1515 ((FRintk INT -1)) ; outputs 1516 () ; profile action (default) 1517 ) 1518 (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" () 1519 1 1 ; issue done 1520 () ; state 1521 () ; inputs 1522 ((FRkhi INT -1) (FRklo INT -1)) ; outputs 1523 () ; profile action (default) 1524 ) 1525 ; Media unit M2 -- see table 14-8 in the fr450 LSI 1526 (unit u-media-2 "Media-2 unit" () 1527 1 1 ; issue done 1528 () ; state 1529 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1530 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 1531 () ; profile action (default) 1532 ) 1533 (unit u-media-2-quad "Media-2-quad unit" () 1534 1 1 ; issue done 1535 () ; state 1536 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1537 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 1538 () ; profile action (default) 1539 ) 1540 (unit u-media-2-acc "Media-2-acc unit" () 1541 1 1 ; issue done 1542 () ; state 1543 ((ACC40Si INT -1)) ; inputs 1544 ((ACC40Sk INT -1)) ; outputs 1545 () ; profile action (default) 1546 ) 1547 (unit u-media-2-acc-dual "Media-2-acc-dual unit" () 1548 1 1 ; issue done 1549 () ; state 1550 ((ACC40Si INT -1)) ; inputs 1551 ((ACC40Sk INT -1)) ; outputs 1552 () ; profile action (default) 1553 ) 1554 (unit u-media-2-add-sub "Media-2-add-sub unit" () 1555 1 1 ; issue done 1556 () ; state 1557 ((ACC40Si INT -1)) ; inputs 1558 ((ACC40Sk INT -1)) ; outputs 1559 () ; profile action (default) 1560 ) 1561 (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" () 1562 1 1 ; issue done 1563 () ; state 1564 ((ACC40Si INT -1)) ; inputs 1565 ((ACC40Sk INT -1)) ; outputs 1566 () ; profile action (default) 1567 ) 1568 ; Media unit M3 -- see table 14-8 in the fr450 LSI 1569 (unit u-media-3 "Media-3 unit" () 1570 1 1 ; issue done 1571 () ; state 1572 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1573 ((FRintk INT -1)) ; outputs 1574 () ; profile action (default) 1575 ) 1576 (unit u-media-3-dual "Media-3-dual unit" () 1577 1 1 ; issue done 1578 () ; state 1579 ((FRinti INT -1)) ; inputs 1580 ((FRintk INT -1)) ; outputs 1581 () ; profile action (default) 1582 ) 1583 (unit u-media-3-quad "Media-3-quad unit" () 1584 1 1 ; issue done 1585 () ; state 1586 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1587 ((FRintk INT -1)) ; outputs 1588 () ; profile action (default) 1589 ) 1590 ; Media unit M4 -- see table 14-8 in the fr450 LSI 1591 (unit u-media-4 "Media-4 unit" () 1592 1 1 ; issue done 1593 () ; state 1594 ((ACC40Si INT -1) (FRintj INT -1)) ; inputs 1595 ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs 1596 () ; profile action (default) 1597 ) 1598 (unit u-media-4-accg "Media-4-accg unit" () 1599 1 1 ; issue done 1600 () ; state 1601 ((ACCGi INT -1) (FRinti INT -1)) ; inputs 1602 ((ACCGk INT -1) (FRintk INT -1)) ; outputs 1603 () ; profile action (default) 1604 ) 1605 (unit u-media-4-acc-dual "Media-4-acc-dual unit" () 1606 1 1 ; issue done 1607 () ; state 1608 ((ACC40Si INT -1)) ; inputs 1609 ((FRintk INT -1)) ; outputs 1610 () ; profile action (default) 1611 ) 1612 (unit u-media-4-mclracca "Media-4 unit for MCLRACC with #A=1" () 1613 1 1 ; issue done 1614 () ; state 1615 () ; inputs 1616 () ; outputs 1617 () ; profile action (default) 1618 ) 1619 ; Media unit M6 -- see table 14-8 in the fr450 LSI 1620 (unit u-media-6 "Media-6 unit" () 1621 1 1 ; issue done 1622 () ; state 1623 ((FRinti INT -1)) ; inputs 1624 ((FRintk INT -1)) ; outputs 1625 () ; profile action (default) 1626 ) 1627 ; Media unit M7 -- see table 14-8 in the fr450 LSI 1628 (unit u-media-7 "Media-1 unit" () 1629 1 1 ; issue done 1630 () ; state 1631 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1632 ((FCCk INT -1)) ; outputs 1633 () ; profile action (default) 1634 ) 1635 ; Media Dual Expand unit 1636 (unit u-media-dual-expand "Media Dual Expand unit" () 1637 1 1 ; issue done 1638 () ; state 1639 ((FRinti INT -1)) ; inputs 1640 ((FRintk INT -1)) ; outputs 1641 () ; profile action (default) 1642 ) 1643 ; Media Dual half to byte unit 1644 (unit u-media-dual-htob "Media Half to byte" () 1645 1 1 ; issue done 1646 () ; state 1647 ((FRintj INT -1)) ; inputs 1648 ((FRintk INT -1)) ; outputs 1649 () ; profile action (default) 1650 ) 1651 ; Barrier unit 1652 (unit u-barrier "Barrier unit" () 1653 1 1 ; issue done 1654 () ; state 1655 () ; inputs 1656 () ; outputs 1657 () ; profile action (default) 1658 ) 1659 ; Memory Barrier unit 1660 (unit u-membar "Memory Barrier unit" () 1661 1 1 ; issue done 1662 () ; state 1663 () ; inputs 1664 () ; outputs 1665 () ; profile action (default) 1666 ) 1667 ; Insn cache invalidate unit 1668 (unit u-ici "Insn cache invalidate unit" () 1669 1 1 ; issue done 1670 () ; state 1671 ((GRi INT -1) (GRj INT -1)) ; inputs 1672 () ; outputs 1673 () ; profile action (default) 1674 ) 1675 ; Data cache invalidate unit 1676 (unit u-dci "Data cache invalidate unit" () 1677 1 1 ; issue done 1678 () ; state 1679 ((GRi INT -1) (GRj INT -1)) ; inputs 1680 () ; outputs 1681 () ; profile action (default) 1682 ) 1683 ; Data cache flush unit 1684 (unit u-dcf "Data cache flush unit" () 1685 1 1 ; issue done 1686 () ; state 1687 ((GRi INT -1) (GRj INT -1)) ; inputs 1688 () ; outputs 1689 () ; profile action (default) 1690 ) 1691 ; Insn cache preload unit 1692 (unit u-icpl "Insn cache preload unit" () 1693 1 1 ; issue done 1694 () ; state 1695 ((GRi INT -1) (GRj INT -1)) ; inputs 1696 () ; outputs 1697 () ; profile action (default) 1698 ) 1699 ; Data cache preload unit 1700 (unit u-dcpl "Data cache preload unit" () 1701 1 1 ; issue done 1702 () ; state 1703 ((GRi INT -1) (GRj INT -1)) ; inputs 1704 () ; outputs 1705 () ; profile action (default) 1706 ) 1707 ; Insn cache unlock unit 1708 (unit u-icul "Insn cache unlock unit" () 1709 1 1 ; issue done 1710 () ; state 1711 ((GRi INT -1) (GRj INT -1)) ; inputs 1712 () ; outputs 1713 () ; profile action (default) 1714 ) 1715 ; Data cache unlock unit 1716 (unit u-dcul "Data cache unlock unit" () 1717 1 1 ; issue done 1718 () ; state 1719 ((GRi INT -1) (GRj INT -1)) ; inputs 1720 () ; outputs 1721 () ; profile action (default) 1722 ) 1723) 1724 1725; Simple machine - single issue integer machine 1726(define-mach 1727 (name simple) 1728 (comment "Simple single issue integer cpu") 1729 (cpu frvbf) 1730) 1731(define-model 1732 (name simple) (comment "Simple model") (attrs) 1733 (mach simple) 1734 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 1735 ; `state' is a list of variables for recording model state 1736 (state) 1737 (unit u-exec "Execution Unit" () 1738 1 1 ; issue done 1739 () ; state 1740 () ; inputs 1741 () ; outputs 1742 () ; profile action (default) 1743 ) 1744) 1745 1746; The instruction fetch/execute cycle. 1747; 1748; This is how to fetch and decode an instruction. 1749; Leave it out for now 1750 1751; (define-extract (const SI 0)) 1752 1753; This is how to execute a decoded instruction. 1754; Leave it out for now 1755 1756; (define-execute (const SI 0)) 1757 1758; An attribute to describe which unit an insn runs in. 1759(define-attr 1760 (for insn) 1761 (type enum) 1762 (name UNIT) 1763 (comment "parallel execution pipeline selection") 1764 ; The order of declaration is significant. 1765 ; See the *_unit_mapping tables in frv.opc 1766 ; Keep variations on the same unit together. 1767 ; Keep the '01' variant immediately after the '1' variant in each unit. 1768 ; Keep the 'ALL' variations immediately after the last numbered variant in each unit. 1769 (values NIL 1770 I0 I1 I01 I2 I3 IALL 1771 FM0 FM1 FM01 FM2 FM3 FMALL FMLOW 1772 B0 B1 B01 1773 C 1774 MULT-DIV ; multiply/division slotted differently on different machines 1775 IACC ; iacc multiply slotted differently on different machines 1776 LOAD ; loads slotted differently on different machines 1777 STORE ; store slotted differently on different machines 1778 SCAN ; scan, scani slotted differently on different machines 1779 DCPL ; dcpl slotted differently on different machines 1780 MDUALACC ; media dual acc slotted differently on different machines 1781 MDCUTSSI ; mdcutssi insn slotted differently on different machines 1782 MCLRACC-1; mclracc A==1 slotted differently on different machines 1783 NUM_UNITS 1784 ) 1785) 1786; Attributes to describe major categories of insns 1787(define-attr 1788 (for insn) 1789 (type enum) 1790 (name FR400-MAJOR) 1791 (comment "fr400 major insn categories") 1792 ; The order of declaration is significant. Keep variations on the same major 1793 ; together. 1794 (values NONE 1795 I-1 I-2 I-3 I-4 I-5 1796 B-1 B-2 B-3 B-4 B-5 B-6 1797 C-1 C-2 1798 M-1 M-2 1799 ) 1800) 1801(define-attr 1802 (for insn) 1803 (type enum) 1804 (name FR450-MAJOR) 1805 (comment "fr450 major insn categories") 1806 ; The order of declaration is significant. Keep variations on the same major 1807 ; together. 1808 (values NONE 1809 I-1 I-2 I-3 I-4 I-5 1810 B-1 B-2 B-3 B-4 B-5 B-6 1811 C-1 C-2 1812 M-1 M-2 M-3 M-4 M-5 M-6 1813 ) 1814) 1815(define-attr 1816 (for insn) 1817 (type enum) 1818 (name FR500-MAJOR) 1819 (comment "fr500 major insn categories") 1820 ; The order of declaration is significant. Keep variations on the same major 1821 ; together. 1822 (values NONE 1823 I-1 I-2 I-3 I-4 I-5 I-6 1824 B-1 B-2 B-3 B-4 B-5 B-6 1825 C-1 C-2 1826 F-1 F-2 F-3 F-4 F-5 F-6 F-7 F-8 1827 M-1 M-2 M-3 M-4 M-5 M-6 M-7 M-8 1828 ) 1829) 1830(define-attr 1831 (for insn) 1832 (type enum) 1833 (name FR550-MAJOR) 1834 (comment "fr550 major insn categories") 1835 ; The order of declaration is significant. Keep variations on the same major 1836 ; together. 1837 (values NONE 1838 I-1 I-2 I-3 I-4 I-5 I-6 I-7 I-8 1839 B-1 B-2 B-3 B-4 B-5 B-6 1840 C-1 C-2 1841 F-1 F-2 F-3 F-4 1842 M-1 M-2 M-3 M-4 M-5 1843 ) 1844) 1845; Privileged insn 1846(define-attr 1847 (for insn) 1848 (type boolean) 1849 (name PRIVILEGED) 1850 (comment "insn only allowed in supervisor mode") 1851) 1852; Non-Excepting insn 1853(define-attr 1854 (for insn) 1855 (type boolean) 1856 (name NON-EXCEPTING) 1857 (comment "non-excepting insn") 1858) 1859; Conditional insn 1860(define-attr 1861 (for insn) 1862 (type boolean) 1863 (name CONDITIONAL) 1864 (comment "conditional insn") 1865) 1866; insn accesses FR registers 1867(define-attr 1868 (for insn) 1869 (type boolean) 1870 (name FR-ACCESS) 1871 (comment "insn accesses FR registers") 1872) 1873; insn preserves MSR.OVF 1874(define-attr 1875 (for insn) 1876 (type boolean) 1877 (name PRESERVE-OVF) 1878 (comment "Preserve value of MSR.OVF") 1879) 1880; "Audio" instruction provided by the fr405 but not the original fr400 core. 1881(define-attr 1882 (for insn) 1883 (type boolean) 1884 (name AUDIO) 1885 (comment "Audio instruction added with FR405") 1886) 1887; null attribute -- used as a place holder for where an attribue is required. 1888(define-attr 1889 (for insn) 1890 (type boolean) 1891 (name NA) 1892 (comment "placeholder attribute") 1893 (attrs META) ; do not define in any generated file for now 1894) 1895 1896; IDOC attribute for instruction documentation. 1897 1898(define-attr 1899 (for insn) 1900 (type enum) 1901 (name IDOC) 1902 (comment "insn kind for documentation") 1903 (attrs META) 1904 (values 1905 (MEM - () "Memory") 1906 (ALU - () "ALU") 1907 (FPU - () "FPU") 1908 (BR - () "Branch") 1909 (PRIV - () "Priviledged") 1910 (MISC - () "Miscellaneous") 1911 ) 1912) 1913 1914; Instruction fields. 1915; 1916; Attributes: 1917; PCREL-ADDR: pc relative value (for reloc and disassembly purposes) 1918; ABS-ADDR: absolute address (for reloc and disassembly purposes?) 1919; RESERVED: bits are not used to decode insn, must be all 0 1920(dnf f-pack "packing bit" () 31 1) 1921(dnf f-op "primary opcode" () 24 7) 1922(dnf f-ope1 "extended opcode" () 11 6) 1923(dnf f-ope2 "extended opcode" () 9 4) 1924(dnf f-ope3 "extended opcode" () 15 3) 1925(dnf f-ope4 "extended opcode" () 7 2) 1926 1927(dnf f-GRi "source register 1" () 17 6) 1928(dnf f-GRj "source register 2" () 5 6) 1929(dnf f-GRk "destination register" () 30 6) 1930 1931(dnf f-FRi "source register 1" () 17 6) 1932(dnf f-FRj "source register 2" () 5 6) 1933(dnf f-FRk "destination register" () 30 6) 1934 1935(dnf f-CPRi "source register 1" () 17 6) 1936(dnf f-CPRj "source register 2" () 5 6) 1937(dnf f-CPRk "destination register" () 30 6) 1938 1939(dnf f-ACCGi "source register" () 17 6) 1940(dnf f-ACCGk "destination register" () 30 6) 1941 1942(dnf f-ACC40Si "40 bit signed accumulator" () 17 6) 1943(dnf f-ACC40Ui "40 bit unsigned accumulator" () 17 6) 1944(dnf f-ACC40Sk "40 bit accumulator" () 30 6) 1945(dnf f-ACC40Uk "40 bit accumulator" () 30 6) 1946 1947(dnf f-CRi "source register" () 14 3) 1948(dnf f-CRj "source register" () 2 3) 1949(dnf f-CRk "destination register" () 27 3) 1950(dnf f-CCi "condition register" () 11 3) 1951 1952(df f-CRj_int "target cr for ck insns" () 26 2 UINT 1953 ((value pc) (sub WI value 4)) 1954 ((value pc) (add WI value 4)) 1955) 1956(dnf f-CRj_float "target cr for fck insns" () 26 2) 1957 1958(dnf f-ICCi_1 "condition register" () 11 2) 1959(dnf f-ICCi_2 "condition register" () 26 2) 1960(dnf f-ICCi_3 "condition register" () 1 2) 1961(dnf f-FCCi_1 "condition register" () 11 2) 1962(dnf f-FCCi_2 "condition register" () 26 2) 1963(dnf f-FCCi_3 "condition register" () 1 2) 1964(dnf f-FCCk "condition register" () 26 2) 1965(dnf f-eir "exception insn register" () 17 6) 1966 1967(df f-s10 "10 bit sign extended" () 9 10 INT #f #f) 1968(df f-s12 "12 bit sign extended" () 11 12 INT #f #f) 1969(df f-d12 "12 bit sign extended" () 11 12 INT #f #f) 1970(df f-u16 "16 bit unsigned" () 15 16 UINT #f #f) 1971(df f-s16 "16 bit sign extended" () 15 16 INT #f #f) 1972(df f-s6 "6 bit signed" () 5 6 INT #f #f) 1973(df f-s6_1 "6 bit signed" () 11 6 INT #f #f) 1974(df f-u6 "6 bit unsigned" () 5 6 UINT #f #f) 1975(df f-s5 "5 bit signed" () 4 5 INT #f #f) 1976 1977(df f-u12-h "upper 6 bits of u12" () 17 6 INT #f #f) 1978(df f-u12-l "lower 6 bits of u12" () 5 6 UINT #f #f) 1979(dnmf f-u12 "12 bit signed immediate" () INT 1980 (f-u12-h f-u12-l) 1981 (sequence () ; insert 1982 (set (ifield f-u12-h) (sra SI (ifield f-u12) 6)) 1983 (set (ifield f-u12-l) (and (ifield f-u12) #x3f)) 1984 ) 1985 (sequence () ; extract 1986 (set (ifield f-u12) (or (sll (ifield f-u12-h) 6) 1987 (ifield f-u12-l))) 1988 ) 1989) 1990 1991(dnf f-int-cc "integer branch conditions" () 30 4) 1992(dnf f-flt-cc "floating branch conditions" () 30 4) 1993(df f-cond "conditional arithmetic" () 8 1 UINT #f #f) 1994(df f-ccond "lr branch condition" () 12 1 UINT #f #f) 1995(df f-hint "2 bit branch prediction hint" () 17 2 UINT #f #f) 1996(df f-LI "link indicator" () 25 1 UINT #f #f) 1997(df f-lock "cache lock indicator" () 25 1 UINT #f #f) 1998(df f-debug "debug mode indicator" () 25 1 UINT #f #f) 1999(df f-A "all accumulator bit" () 17 1 UINT #f #f) 2000(df f-ae "cache all entries indicator" () 25 1 UINT #f #f) 2001 2002(dnf f-spr-h "upper 6 bits of spr" () 30 6) 2003(dnf f-spr-l "lower 6 bits of spr" () 17 6) 2004(dnmf f-spr "special purpose register" () UINT 2005 (f-spr-h f-spr-l) 2006 (sequence () ; insert 2007 (set (ifield f-spr-h) (srl (ifield f-spr) (const 6))) 2008 (set (ifield f-spr-l) (and (ifield f-spr) (const #x3f))) 2009 ) 2010 (sequence () ; extract 2011 (set (ifield f-spr) (or (sll (ifield f-spr-h) (const 6)) 2012 (ifield f-spr-l))) 2013 ) 2014) 2015 2016(df f-label16 "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT 2017 ((value pc) (sra WI (sub WI value pc) (const 2))) 2018 ((value pc) (add WI (sll WI value (const 2)) pc)) 2019) 2020 2021(df f-labelH6 "upper 6 bits of label24" () 30 6 INT #f #f) 2022(dnf f-labelL18 "lower 18 bits of label24" () 17 18) 2023(dnmf f-label24 "26 bit signed offset" (PCREL-ADDR) INT 2024 (f-labelH6 f-labelL18) 2025 ; insert 2026 (sequence () 2027 (set (ifield f-labelH6) 2028 (sra WI (sub (ifield f-label24) pc) (const 20))) 2029 (set (ifield f-labelL18) 2030 (and (srl (sub (ifield f-label24) pc) (const 2)) 2031 (const #x3ffff))) 2032 ) 2033 ; extract 2034 (sequence () 2035 (set (ifield f-label24) 2036 (add (sll (or (sll (ifield f-labelH6) (const 18)) 2037 (ifield f-labelL18)) 2038 (const 2)) 2039 pc))) 2040) 2041 2042(dnf f-LRAE "Load Real Address E flag" () 5 1) 2043(dnf f-LRAD "Load Real Address D flag" () 4 1) 2044(dnf f-LRAS "Load Real Address S flag" () 3 1) 2045 2046(dnf f-TLBPRopx "TLB Probe operation number" () 28 3) 2047(dnf f-TLBPRL "TLB Probe L flag" () 25 1) 2048 2049(dnf f-ICCi_1-null "null field" (RESERVED) 11 2) 2050(dnf f-ICCi_2-null "null field" (RESERVED) 26 2) 2051(dnf f-ICCi_3-null "null field" (RESERVED) 1 2) 2052(dnf f-FCCi_1-null "null field" (RESERVED) 11 2) 2053(dnf f-FCCi_2-null "null field" (RESERVED) 26 2) 2054(dnf f-FCCi_3-null "null field" (RESERVED) 1 2) 2055(dnf f-rs-null "null field" (RESERVED) 17 6) 2056(dnf f-GRi-null "null field" (RESERVED) 17 6) 2057(dnf f-GRj-null "null field" (RESERVED) 5 6) 2058(dnf f-GRk-null "null field" (RESERVED) 30 6) 2059(dnf f-FRi-null "null field" (RESERVED) 17 6) 2060(dnf f-FRj-null "null field" (RESERVED) 5 6) 2061(dnf f-ACCj-null "null field" (RESERVED) 5 6) 2062(dnf f-rd-null "null field" (RESERVED) 30 6) 2063(dnf f-cond-null "null field" (RESERVED) 30 4) 2064(dnf f-ccond-null "null field" (RESERVED) 12 1) 2065(dnf f-s12-null "null field" (RESERVED) 11 12) 2066(dnf f-label16-null "null field" (RESERVED) 15 16) 2067(dnf f-misc-null-1 "null field" (RESERVED) 30 5) 2068(dnf f-misc-null-2 "null field" (RESERVED) 11 6) 2069(dnf f-misc-null-3 "null field" (RESERVED) 11 4) 2070(dnf f-misc-null-4 "null field" (RESERVED) 17 2) 2071(dnf f-misc-null-5 "null field" (RESERVED) 17 16) 2072(dnf f-misc-null-6 "null field" (RESERVED) 30 3) 2073(dnf f-misc-null-7 "null field" (RESERVED) 17 3) 2074(dnf f-misc-null-8 "null field" (RESERVED) 5 3) 2075(dnf f-misc-null-9 "null field" (RESERVED) 5 4) 2076(dnf f-misc-null-10 "null field" (RESERVED) 16 5) 2077(dnf f-misc-null-11 "null field" (RESERVED) 5 1) 2078 2079(dnf f-LRA-null "null field" (RESERVED) 2 3) 2080(dnf f-TLBPR-null "null field" (RESERVED) 30 2) 2081 2082(dnf f-LI-off "null field" (RESERVED) 25 1) 2083(dnf f-LI-on "null field" (RESERVED) 25 1) 2084 2085; Relocation annotations. 2086(dsh h-reloc-ann "relocation annotation" () (register BI)) 2087(dnf f-reloc-ann "relocation annotation" () 0 0) 2088 2089(define-pmacro (dann xname xcomment xmode xparse xprint) 2090 (define-operand 2091 (name xname) 2092 (comment xcomment) 2093 (type h-reloc-ann) 2094 (index f-reloc-ann) 2095 (mode xmode) 2096 (handlers (parse xparse) (print xprint)) 2097 ) 2098 ) 2099 2100 2101; Enums. 2102 2103; insn-op: 2104; FIXME: should use die macro or some such 2105(define-normal-insn-enum insn-op "insn op enums" () OP_ f-op 2106 ( 2107 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" 2108 "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F" 2109 "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F" 2110 "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F" 2111 "40" "41" "42" "43" "44" "45" "46" "47" "48" "49" "4A" "4B" "4C" "4D" "4E" "4F" 2112 "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "5A" "5B" "5C" "5D" "5E" "5F" 2113 "60" "61" "62" "63" "64" "65" "66" "67" "68" "69" "6A" "6B" "6C" "6D" "6E" "6F" 2114 "70" "71" "72" "73" "74" "75" "76" "77" "78" "79" "7A" "7B" "7C" "7D" "7E" "7F" 2115 ) 2116) 2117 2118(define-normal-insn-enum insn-ope1 "insn ope enums" () OPE1_ f-ope1 2119 ( 2120 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" 2121 "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F" 2122 "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F" 2123 "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F" 2124 ) 2125) 2126 2127(define-normal-insn-enum insn-ope2 "insn ope enums" () OPE2_ f-ope2 2128 ( 2129 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" 2130 ) 2131) 2132 2133(define-normal-insn-enum insn-ope3 "insn ope enums" () OPE3_ f-ope3 2134 ( 2135 "00" "01" "02" "03" "04" "05" "06" "07" 2136 ) 2137) 2138 2139(define-normal-insn-enum insn-ope4 "insn ope enums" () OPE4_ f-ope4 2140 ( 2141 "0" "1" "2" "3" 2142 ) 2143) 2144 2145; int-cc: integer branch conditions 2146; FIXME: should use die macro or some such 2147(define-normal-insn-enum int-cc "integer branch cond enums" () ICC_ f-int-cc 2148 ( 2149 "nev" "c" "v" "lt" "eq" "ls" "n" "le" 2150 "ra" "nc" "nv" "ge" "ne" "hi" "p" "gt" 2151 ) 2152) 2153 2154; flt-cc: floating-point/media branch conditions 2155; FIXME: should use die macro or some such 2156(define-normal-insn-enum flt-cc "float branch cond enums" () FCC_ f-flt-cc 2157 ("nev" "u" "gt" "ug" "lt" "ul" "lg" "ne" 2158 "eq" "ue" "ge" "uge" "le" "ule" "o" "ra") 2159) 2160 2161; Hardware pieces. 2162; These entries list the elements of the raw hardware. 2163; They're also used to provide tables and other elements of the assembly 2164; language. 2165(dnh h-pc "program counter" (PC PROFILE) (pc) () () ()) 2166 2167; The PSR. The individual fields are referenced more than the entire 2168; register, so reference them directly. We can assemble the 2169; entire register contents when necessary. 2170; 2171(dsh h-psr_imple "PSR.IMPLE" () (register UQI)) 2172(dsh h-psr_ver "PSR.VER" () (register UQI)) 2173(dsh h-psr_ice "PSR.ICE bit" () (register BI)) 2174(dsh h-psr_nem "PSR.NEM bit" () (register BI)) 2175(dsh h-psr_cm "PSR.CM bit" () (register BI)) 2176(dsh h-psr_be "PSR.BE bit" () (register BI)) 2177(dsh h-psr_esr "PSR.ESR bit" () (register BI)) 2178(dsh h-psr_ef "PSR.EF bit" () (register BI)) 2179(dsh h-psr_em "PSR.EM bit" () (register BI)) 2180(dsh h-psr_pil "PSR.PIL " () (register UQI)) 2181(dsh h-psr_ps "PSR.PS bit" () (register BI)) 2182(dsh h-psr_et "PSR.ET bit" () (register BI)) 2183 2184; PSR.S requires special handling because the shadow registers (SR0-SR4) must 2185; be switched with GR4-GR7 when changing from user to supervisor mode or 2186; vice-versa. 2187(define-hardware 2188 (name h-psr_s) 2189 (comment "PSR.S bit") 2190 (attrs) 2191 (type register BI) 2192 (get) 2193 (set (newval) (c-call VOID "@cpu@_h_psr_s_set_handler" newval)) 2194) 2195 2196; The TBR. The individual bits are referenced more than the entire 2197; register, so reference them directly. We can assemble the 2198; entire register contents when necessary. 2199; 2200(dsh h-tbr_tba "TBR.TBA" () (register UWI)) 2201(dsh h-tbr_tt "TBR.TT" () (register UQI)) 2202 2203; The BPSR. The individual bits are referenced more than the entire 2204; register, so reference them directly. We can assemble the 2205; entire register contents when necessary. 2206; 2207(dsh h-bpsr_bs "PSR.S bit" () (register BI)) 2208(dsh h-bpsr_bet "PSR.ET bit" () (register BI)) 2209 2210; General registers 2211; 2212(define-keyword 2213 (name gr-names) 2214 (print-name h-gr) 2215 (prefix "") 2216 (values 2217 (sp 1) (fp 2) 2218 (gr0 0)(gr1 1)(gr2 2)(gr3 3)(gr4 4)(gr5 5)(gr6 6)(gr7 7) 2219 (gr8 8)(gr9 9)(gr10 10)(gr11 11)(gr12 12)(gr13 13)(gr14 14)(gr15 15) 2220 (gr16 16)(gr17 17)(gr18 18)(gr19 19)(gr20 20)(gr21 21)(gr22 22)(gr23 23) 2221 (gr24 24)(gr25 25)(gr26 26)(gr27 27)(gr28 28)(gr29 29)(gr30 30)(gr31 31) 2222 (gr32 32)(gr33 33)(gr34 34)(gr35 35)(gr36 36)(gr37 37)(gr38 38)(gr39 39) 2223 (gr40 40)(gr41 41)(gr42 42)(gr43 43)(gr44 44)(gr45 45)(gr46 46)(gr47 47) 2224 (gr48 48)(gr49 49)(gr50 50)(gr51 51)(gr52 52)(gr53 53)(gr54 54)(gr55 55) 2225 (gr56 56)(gr57 57)(gr58 58)(gr59 59)(gr60 60)(gr61 61)(gr62 62)(gr63 63) 2226 ) 2227) 2228 2229(define-hardware 2230 (name h-gr) 2231 (comment "general registers") 2232 (attrs PROFILE) 2233 (type register USI (64)) 2234 (indices extern-keyword gr-names) 2235 (get (index) (c-call WI "@cpu@_h_gr_get_handler" index)) 2236 (set (index newval) (c-call VOID "@cpu@_h_gr_set_handler" index newval)) 2237) 2238 2239; General Registers as double words 2240; These registers are shadowed onto h-gr 2241(define-hardware 2242 (name h-gr_double) 2243 (comment "general registers as double words") 2244 (attrs PROFILE VIRTUAL) 2245 (type register DI (32)) 2246 ; FIXME: Need constraint to prohibit odd numbers. 2247 (indices extern-keyword gr-names) 2248 (get (index) 2249 (c-call DI "@cpu@_h_gr_double_get_handler" index)) 2250 (set (index newval) 2251 (c-call VOID "@cpu@_h_gr_double_set_handler" index newval)) 2252) 2253 2254; General Registers as high and low half words 2255; These registers are shadowed onto h-gr 2256(define-hardware 2257 (name h-gr_hi) 2258 (comment "general registers as high half word") 2259 (attrs PROFILE VIRTUAL) 2260 (type register UHI (64)) 2261 (indices extern-keyword gr-names) 2262 (get (index) (c-call UHI "@cpu@_h_gr_hi_get_handler" index)) 2263 (set (index newval) (c-call VOID "@cpu@_h_gr_hi_set_handler" index newval)) 2264) 2265(define-hardware 2266 (name h-gr_lo) 2267 (comment "general registers as low half word") 2268 (attrs PROFILE VIRTUAL) 2269 (type register UHI (64)) 2270 (indices extern-keyword gr-names) 2271 (get (index) (c-call UHI "@cpu@_h_gr_lo_get_handler" index)) 2272 (set (index newval) (c-call VOID "@cpu@_h_gr_lo_set_handler" index newval)) 2273) 2274 2275; Floating Point Registers 2276(define-keyword 2277 (name fr-names) 2278 (print-name h-fr) 2279 (prefix "") 2280 (values 2281 (fr0 0)(fr1 1)(fr2 2)(fr3 3)(fr4 4)(fr5 5)(fr6 6)(fr7 7) 2282 (fr8 8)(fr9 9)(fr10 10)(fr11 11)(fr12 12)(fr13 13)(fr14 14)(fr15 15) 2283 (fr16 16)(fr17 17)(fr18 18)(fr19 19)(fr20 20)(fr21 21)(fr22 22)(fr23 23) 2284 (fr24 24)(fr25 25)(fr26 26)(fr27 27)(fr28 28)(fr29 29)(fr30 30)(fr31 31) 2285 (fr32 32)(fr33 33)(fr34 34)(fr35 35)(fr36 36)(fr37 37)(fr38 38)(fr39 39) 2286 (fr40 40)(fr41 41)(fr42 42)(fr43 43)(fr44 44)(fr45 45)(fr46 46)(fr47 47) 2287 (fr48 48)(fr49 49)(fr50 50)(fr51 51)(fr52 52)(fr53 53)(fr54 54)(fr55 55) 2288 (fr56 56)(fr57 57)(fr58 58)(fr59 59)(fr60 60)(fr61 61)(fr62 62)(fr63 63) 2289 ) 2290) 2291 2292(define-hardware 2293 (name h-fr) 2294 (comment "floating point registers") 2295 (attrs PROFILE) 2296 (type register SF (64)) 2297 (indices extern-keyword fr-names) 2298 (get (index) (c-call SF "@cpu@_h_fr_get_handler" index)) 2299 (set (index newval) (c-call VOID "@cpu@_h_fr_set_handler" index newval)) 2300) 2301 2302; Floating Point Registers as double precision 2303; These registers are shadowed onto h-fr 2304 2305(define-hardware 2306 (name h-fr_double) 2307 (comment "floating point registers as double precision") 2308 (attrs PROFILE VIRTUAL) 2309 (type register DF (32)) 2310 ; FIXME: Need constraint to prohibit odd numbers. 2311 (indices extern-keyword fr-names) 2312 (get (index) 2313 (c-call DF "@cpu@_h_fr_double_get_handler" index)) 2314 (set (index newval) 2315 (c-call VOID "@cpu@_h_fr_double_set_handler" index newval)) 2316) 2317 2318; Floating Point Registers as integer words. 2319; These registers are shadowed onto h-fr 2320 2321(define-hardware 2322 (name h-fr_int) 2323 (comment "floating point registers as integers") 2324 (attrs PROFILE VIRTUAL) 2325 (type register USI (64)) 2326 (indices extern-keyword fr-names) 2327 (get (index) 2328 (c-call USI "@cpu@_h_fr_int_get_handler" index)) 2329 (set (index newval) 2330 (c-call VOID "@cpu@_h_fr_int_set_handler" index newval)) 2331) 2332 2333; Floating Point Registers as high and low half words 2334; These registers are shadowed onto h-fr 2335(define-hardware 2336 (name h-fr_hi) 2337 (comment "floating point registers as unsigned high half word") 2338 (attrs PROFILE VIRTUAL) 2339 (type register UHI (64)) 2340 (indices extern-keyword fr-names) 2341 (get (regno) (srl (reg h-fr_int regno) 16)) 2342 (set (regno newval) (set (reg h-fr_int regno) 2343 (or (and (reg h-fr_int regno) #xffff) 2344 (sll newval 16)))) 2345) 2346(define-hardware 2347 (name h-fr_lo) 2348 (comment "floating point registers as unsigned low half word") 2349 (attrs PROFILE VIRTUAL) 2350 (type register UHI (64)) 2351 (indices extern-keyword fr-names) 2352 (get (regno) (and (reg h-fr_int regno) #xffff)) 2353 (set (regno newval) (set (reg h-fr_int regno) 2354 (or (and (reg h-fr_int regno) #xffff0000) 2355 (and newval #xffff)))) 2356) 2357 2358; Floating Point Registers as unsigned bytes 2359; These registers are shadowed onto h-fr 2360(define-hardware 2361 (name h-fr_0) 2362 (comment "floating point registers as unsigned byte 0") 2363 (attrs PROFILE VIRTUAL) 2364 (type register UHI (64)) 2365 (indices extern-keyword fr-names) 2366 (get (regno) (and (reg h-fr_int regno) #xff)) 2367 (set (regno newval) 2368 (sequence () 2369 (if (gt USI newval #xff) 2370 (set newval #xff)) 2371 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffffff00) 2372 newval)))) 2373) 2374(define-hardware 2375 (name h-fr_1) 2376 (comment "floating point registers as unsigned byte 1") 2377 (attrs PROFILE VIRTUAL) 2378 (type register UHI (64)) 2379 (indices extern-keyword fr-names) 2380 (get (regno) (and (srl (reg h-fr_int regno) 8) #xff)) 2381 (set (regno newval) 2382 (sequence () 2383 (if (gt USI newval #xff) 2384 (set newval #xff)) 2385 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffff00ff) 2386 (sll newval 8))))) 2387) 2388(define-hardware 2389 (name h-fr_2) 2390 (comment "floating point registers as unsigned byte 2") 2391 (attrs PROFILE VIRTUAL) 2392 (type register UHI (64)) 2393 (indices extern-keyword fr-names) 2394 (get (regno) (and (srl (reg h-fr_int regno) 16) #xff)) 2395 (set (regno newval) 2396 (sequence () 2397 (if (gt USI newval #xff) 2398 (set newval #xff)) 2399 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xff00ffff) 2400 (sll newval 16))))) 2401) 2402(define-hardware 2403 (name h-fr_3) 2404 (comment "floating point registers as unsigned byte 3") 2405 (attrs PROFILE VIRTUAL) 2406 (type register UHI (64)) 2407 (indices extern-keyword fr-names) 2408 (get (regno) (and (srl (reg h-fr_int regno) 24) #xff)) 2409 (set (regno newval) 2410 (sequence () 2411 (if (gt USI newval #xff) 2412 (set newval #xff)) 2413 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #x00ffffff) 2414 (sll newval 24))))) 2415) 2416; Coprocessor Registers 2417; 2418(define-keyword 2419 (name cpr-names) 2420 (print-name h-cpr) 2421 (prefix "") 2422 (values 2423(cpr0 0)(cpr1 1)(cpr2 2)(cpr3 3)(cpr4 4)(cpr5 5)(cpr6 6)(cpr7 7) 2424(cpr8 8)(cpr9 9)(cpr10 10)(cpr11 11)(cpr12 12)(cpr13 13)(cpr14 14)(cpr15 15) 2425(cpr16 16)(cpr17 17)(cpr18 18)(cpr19 19)(cpr20 20)(cpr21 21)(cpr22 22)(cpr23 23) 2426(cpr24 24)(cpr25 25)(cpr26 26)(cpr27 27)(cpr28 28)(cpr29 29)(cpr30 30)(cpr31 31) 2427(cpr32 32)(cpr33 33)(cpr34 34)(cpr35 35)(cpr36 36)(cpr37 37)(cpr38 38)(cpr39 39) 2428(cpr40 40)(cpr41 41)(cpr42 42)(cpr43 43)(cpr44 44)(cpr45 45)(cpr46 46)(cpr47 47) 2429(cpr48 48)(cpr49 49)(cpr50 50)(cpr51 51)(cpr52 52)(cpr53 53)(cpr54 54)(cpr55 55) 2430(cpr56 56)(cpr57 57)(cpr58 58)(cpr59 59)(cpr60 60)(cpr61 61)(cpr62 62)(cpr63 63) 2431 ) 2432) 2433 2434(define-hardware 2435 (name h-cpr) 2436 (comment "coprocessor registers") 2437 (attrs PROFILE (MACH frv)) 2438 (type register WI (64)) 2439 (indices extern-keyword cpr-names) 2440) 2441 2442; Coprocessor Registers as double words 2443; These registers are shadowed onto h-cpr 2444(define-hardware 2445 (name h-cpr_double) 2446 (comment "coprocessor registers as double words") 2447 (attrs PROFILE VIRTUAL (MACH frv)) 2448 (type register DI (32)) 2449 ; FIXME: Need constraint to prohibit odd numbers. 2450 (indices extern-keyword cpr-names) 2451 (get (index) 2452 (c-call DI "@cpu@_h_cpr_double_get_handler" index)) 2453 (set (index newval) 2454 (c-call VOID "@cpu@_h_cpr_double_set_handler" index newval)) 2455) 2456 2457; Special Purpose Registers 2458; 2459(define-keyword 2460 (name spr-names) 2461 (print-name h-spr) 2462 (prefix "") 2463 (values 2464 (psr 0) (pcsr 1) (bpcsr 2) (tbr 3) (bpsr 4) 2465 2466 (hsr0 16) (hsr1 17) (hsr2 18) (hsr3 19) 2467 (hsr4 20) (hsr5 21) (hsr6 22) (hsr7 23) 2468 (hsr8 24) (hsr9 25) (hsr10 26) (hsr11 27) 2469 (hsr12 28) (hsr13 29) (hsr14 30) (hsr15 31) 2470 (hsr16 32) (hsr17 33) (hsr18 34) (hsr19 35) 2471 (hsr20 36) (hsr21 37) (hsr22 38) (hsr23 39) 2472 (hsr24 40) (hsr25 41) (hsr26 42) (hsr27 43) 2473 (hsr28 44) (hsr29 45) (hsr30 46) (hsr31 47) 2474 (hsr32 48) (hsr33 49) (hsr34 50) (hsr35 51) 2475 (hsr36 52) (hsr37 53) (hsr38 54) (hsr39 55) 2476 (hsr40 56) (hsr41 57) (hsr42 58) (hsr43 59) 2477 (hsr44 60) (hsr45 61) (hsr46 62) (hsr47 63) 2478 (hsr48 64) (hsr49 65) (hsr50 66) (hsr51 67) 2479 (hsr52 68) (hsr53 69) (hsr54 70) (hsr55 71) 2480 (hsr56 72) (hsr57 73) (hsr58 74) (hsr59 75) 2481 (hsr60 76) (hsr61 77) (hsr62 78) (hsr63 79) 2482 2483 (ccr 256) (cccr 263) (lr 272) (lcr 273) (iacc0h 280) (iacc0l 281) (isr 288) 2484 2485 (neear0 352) (neear1 353) (neear2 354) (neear3 355) 2486 (neear4 356) (neear5 357) (neear6 358) (neear7 359) 2487 (neear8 360) (neear9 361) (neear10 362) (neear11 363) 2488 (neear12 364) (neear13 365) (neear14 366) (neear15 367) 2489 (neear16 368) (neear17 369) (neear18 370) (neear19 371) 2490 (neear20 372) (neear21 373) (neear22 374) (neear23 375) 2491 (neear24 376) (neear25 377) (neear26 378) (neear27 379) 2492 (neear28 380) (neear29 381) (neear30 382) (neear31 383) 2493 2494 (nesr0 384) (nesr1 385) (nesr2 386) (nesr3 387) 2495 (nesr4 388) (nesr5 389) (nesr6 390) (nesr7 391) 2496 (nesr8 392) (nesr9 393) (nesr10 394) (nesr11 395) 2497 (nesr12 396) (nesr13 397) (nesr14 398) (nesr15 399) 2498 (nesr16 400) (nesr17 401) (nesr18 402) (nesr19 403) 2499 (nesr20 404) (nesr21 405) (nesr22 406) (nesr23 407) 2500 (nesr24 408) (nesr25 409) (nesr26 410) (nesr27 411) 2501 (nesr28 412) (nesr29 413) (nesr30 414) (nesr31 415) 2502 2503 (necr 416) 2504 2505 (gner0 432) (gner1 433) 2506 2507 (fner0 434) (fner1 435) 2508 2509 (epcr0 512) (epcr1 513) (epcr2 514) (epcr3 515) 2510 (epcr4 516) (epcr5 517) (epcr6 518) (epcr7 519) 2511 (epcr8 520) (epcr9 521) (epcr10 522) (epcr11 523) 2512 (epcr12 524) (epcr13 525) (epcr14 526) (epcr15 527) 2513 (epcr16 528) (epcr17 529) (epcr18 530) (epcr19 531) 2514 (epcr20 532) (epcr21 533) (epcr22 534) (epcr23 535) 2515 (epcr24 536) (epcr25 537) (epcr26 538) (epcr27 539) 2516 (epcr28 540) (epcr29 541) (epcr30 542) (epcr31 543) 2517 (epcr32 544) (epcr33 545) (epcr34 546) (epcr35 547) 2518 (epcr36 548) (epcr37 549) (epcr38 550) (epcr39 551) 2519 (epcr40 552) (epcr41 553) (epcr42 554) (epcr43 555) 2520 (epcr44 556) (epcr45 557) (epcr46 558) (epcr47 559) 2521 (epcr48 560) (epcr49 561) (epcr50 562) (epcr51 563) 2522 (epcr52 564) (epcr53 565) (epcr54 566) (epcr55 567) 2523 (epcr56 568) (epcr57 569) (epcr58 570) (epcr59 571) 2524 (epcr60 572) (epcr61 573) (epcr62 574) (epcr63 575) 2525 2526 (esr0 576) (esr1 577) (esr2 578) (esr3 579) 2527 (esr4 580) (esr5 581) (esr6 582) (esr7 583) 2528 (esr8 584) (esr9 585) (esr10 586) (esr11 587) 2529 (esr12 588) (esr13 589) (esr14 590) (esr15 591) 2530 (esr16 592) (esr17 593) (esr18 594) (esr19 595) 2531 (esr20 596) (esr21 597) (esr22 598) (esr23 599) 2532 (esr24 600) (esr25 601) (esr26 602) (esr27 603) 2533 (esr28 604) (esr29 605) (esr30 606) (esr31 607) 2534 (esr32 608) (esr33 609) (esr34 610) (esr35 611) 2535 (esr36 612) (esr37 613) (esr38 614) (esr39 615) 2536 (esr40 616) (esr41 617) (esr42 618) (esr43 619) 2537 (esr44 620) (esr45 621) (esr46 622) (esr47 623) 2538 (esr48 624) (esr49 625) (esr50 626) (esr51 627) 2539 (esr52 628) (esr53 629) (esr54 630) (esr55 631) 2540 (esr56 632) (esr57 633) (esr58 634) (esr59 635) 2541 (esr60 636) (esr61 637) (esr62 638) (esr63 639) 2542 2543 (eir0 640) (eir1 641) (eir2 642) (eir3 643) 2544 (eir4 644) (eir5 645) (eir6 646) (eir7 647) 2545 (eir8 648) (eir9 649) (eir10 650) (eir11 651) 2546 (eir12 652) (eir13 653) (eir14 654) (eir15 655) 2547 (eir16 656) (eir17 657) (eir18 658) (eir19 659) 2548 (eir20 660) (eir21 661) (eir22 662) (eir23 663) 2549 (eir24 664) (eir25 665) (eir26 666) (eir27 667) 2550 (eir28 668) (eir29 669) (eir30 670) (eir31 671) 2551 2552 (esfr0 672) (esfr1 673) 2553 2554 (sr0 768) (sr1 769) (sr2 770) (sr3 771) 2555 2556 (scr0 832) (scr1 833) (scr2 834) (scr3 835) 2557 2558 (fsr0 1024) (fsr1 1025) (fsr2 1026) (fsr3 1027) 2559 (fsr4 1028) (fsr5 1029) (fsr6 1030) (fsr7 1031) 2560 (fsr8 1032) (fsr9 1033) (fsr10 1034) (fsr11 1035) 2561 (fsr12 1036) (fsr13 1037) (fsr14 1038) (fsr15 1039) 2562 (fsr16 1040) (fsr17 1041) (fsr18 1042) (fsr19 1043) 2563 (fsr20 1044) (fsr21 1045) (fsr22 1046) (fsr23 1047) 2564 (fsr24 1048) (fsr25 1049) (fsr26 1050) (fsr27 1051) 2565 (fsr28 1052) (fsr29 1053) (fsr30 1054) (fsr31 1055) 2566 (fsr32 1056) (fsr33 1057) (fsr34 1058) (fsr35 1059) 2567 (fsr36 1060) (fsr37 1061) (fsr38 1062) (fsr39 1063) 2568 (fsr40 1064) (fsr41 1065) (fsr42 1066) (fsr43 1067) 2569 (fsr44 1068) (fsr45 1069) (fsr46 1070) (fsr47 1071) 2570 (fsr48 1072) (fsr49 1073) (fsr50 1074) (fsr51 1075) 2571 (fsr52 1076) (fsr53 1077) (fsr54 1078) (fsr55 1079) 2572 (fsr56 1080) (fsr57 1081) (fsr58 1082) (fsr59 1083) 2573 (fsr60 1084) (fsr61 1085) (fsr62 1086) (fsr63 1087) 2574 2575 ; FQ0-FQ31 are 64 bit registers. 2576 ; These names allow access to the upper 32 bits of the FQ registers. 2577 (fqop0 1088) (fqop1 1090) (fqop2 1092) (fqop3 1094) 2578 (fqop4 1096) (fqop5 1098) (fqop6 1100) (fqop7 1102) 2579 (fqop8 1104) (fqop9 1106) (fqop10 1108) (fqop11 1110) 2580 (fqop12 1112) (fqop13 1114) (fqop14 1116) (fqop15 1118) 2581 (fqop16 1120) (fqop17 1122) (fqop18 1124) (fqop19 1126) 2582 (fqop20 1128) (fqop21 1130) (fqop22 1132) (fqop23 1134) 2583 (fqop24 1136) (fqop25 1138) (fqop26 1140) (fqop27 1142) 2584 (fqop28 1144) (fqop29 1146) (fqop30 1148) (fqop31 1150) 2585 ; These names allow access to the lower 32 bits of the FQ registers. 2586 (fqst0 1089) (fqst1 1091) (fqst2 1093) (fqst3 1095) 2587 (fqst4 1097) (fqst5 1099) (fqst6 1101) (fqst7 1103) 2588 (fqst8 1105) (fqst9 1107) (fqst10 1109) (fqst11 1111) 2589 (fqst12 1113) (fqst13 1115) (fqst14 1117) (fqst15 1119) 2590 (fqst16 1121) (fqst17 1123) (fqst18 1125) (fqst19 1127) 2591 (fqst20 1129) (fqst21 1131) (fqst22 1133) (fqst23 1135) 2592 (fqst24 1137) (fqst25 1139) (fqst26 1141) (fqst27 1143) 2593 (fqst28 1145) (fqst29 1147) (fqst30 1149) (fqst31 1151) 2594 ; These also access the lower 32 bits of the FQ registers. 2595 ; These are not accessible as spr registers (see LSI appendix - section 13.4) 2596; (fq0 1089) (fq1 1091) (fq2 1093) (fq3 1095) 2597; (fq4 1097) (fq5 1099) (fq6 1101) (fq7 1103) 2598; (fq8 1105) (fq9 1107) (fq10 1109) (fq11 1111) 2599; (fq12 1113) (fq13 1115) (fq14 1117) (fq15 1119) 2600; (fq16 1121) (fq17 1123) (fq18 1125) (fq19 1127) 2601; (fq20 1129) (fq21 1131) (fq22 1133) (fq23 1135) 2602; (fq24 1137) (fq25 1139) (fq26 1141) (fq27 1143) 2603; (fq28 1145) (fq29 1147) (fq30 1149) (fq31 1151) 2604 2605 (mcilr0 1272) (mcilr1 1273) 2606 2607 (msr0 1280) (msr1 1281) (msr2 1282) (msr3 1283) 2608 (msr4 1284) (msr5 1285) (msr6 1286) (msr7 1287) 2609 (msr8 1288) (msr9 1289) (msr10 1290) (msr11 1291) 2610 (msr12 1292) (msr13 1293) (msr14 1294) (msr15 1295) 2611 (msr16 1296) (msr17 1297) (msr18 1298) (msr19 1299) 2612 (msr20 1300) (msr21 1301) (msr22 1302) (msr23 1303) 2613 (msr24 1304) (msr25 1305) (msr26 1306) (msr27 1307) 2614 (msr28 1308) (msr29 1309) (msr30 1310) (msr31 1311) 2615 (msr32 1312) (msr33 1313) (msr34 1314) (msr35 1315) 2616 (msr36 1316) (msr37 1317) (msr38 1318) (msr39 1319) 2617 (msr40 1320) (msr41 1321) (msr42 1322) (msr43 1323) 2618 (msr44 1324) (msr45 1325) (msr46 1326) (msr47 1327) 2619 (msr48 1328) (msr49 1329) (msr50 1330) (msr51 1331) 2620 (msr52 1332) (msr53 1333) (msr54 1334) (msr55 1335) 2621 (msr56 1336) (msr57 1337) (msr58 1338) (msr59 1339) 2622 (msr60 1340) (msr61 1341) (msr62 1342) (msr63 1343) 2623 2624 ; MQ0-MQ31 are 64 bit registers. 2625 ; These names allow access to the upper 32 bits of the MQ registers. 2626 (mqop0 1344) (mqop1 1346) (mqop2 1348) (mqop3 1350) 2627 (mqop4 1352) (mqop5 1354) (mqop6 1356) (mqop7 1358) 2628 (mqop8 1360) (mqop9 1362) (mqop10 1364) (mqop11 1366) 2629 (mqop12 1368) (mqop13 1370) (mqop14 1372) (mqop15 1374) 2630 (mqop16 1376) (mqop17 1378) (mqop18 1380) (mqop19 1382) 2631 (mqop20 1384) (mqop21 1386) (mqop22 1388) (mqop23 1390) 2632 (mqop24 1392) (mqop25 1394) (mqop26 1396) (mqop27 1398) 2633 (mqop28 1400) (mqop29 1402) (mqop30 1404) (mqop31 1406) 2634 ; These names allow access to the lower 32 bits of the MQ registers. 2635 (mqst0 1345) (mqst1 1347) (mqst2 1349) (mqst3 1351) 2636 (mqst4 1353) (mqst5 1355) (mqst6 1357) (mqst7 1359) 2637 (mqst8 1361) (mqst9 1363) (mqst10 1365) (mqst11 1367) 2638 (mqst12 1369) (mqst13 1371) (mqst14 1373) (mqst15 1375) 2639 (mqst16 1377) (mqst17 1379) (mqst18 1381) (mqst19 1383) 2640 (mqst20 1385) (mqst21 1387) (mqst22 1389) (mqst23 1391) 2641 (mqst24 1393) (mqst25 1395) (mqst26 1397) (mqst27 1399) 2642 (mqst28 1401) (mqst29 1403) (mqst30 1405) (mqst31 1407) 2643 ; These also access the lower 32 bits of the MQ registers. 2644 ; These are not accessible as spr registers (see LSI appendix - section 13.4) 2645; (mq0 1345) (mq1 1347) (mq2 1349) (mq3 1351) 2646; (mq4 1353) (mq5 1355) (mq6 1357) (mq7 1359) 2647; (mq8 1361) (mq9 1363) (mq10 1365) (mq11 1367) 2648; (mq12 1369) (mq13 1371) (mq14 1373) (mq15 1375) 2649; (mq16 1377) (mq17 1379) (mq18 1381) (mq19 1383) 2650; (mq20 1385) (mq21 1387) (mq22 1389) (mq23 1391) 2651; (mq24 1393) (mq25 1395) (mq26 1397) (mq27 1399) 2652; (mq28 1401) (mq29 1403) (mq30 1405) (mq31 1407) 2653 2654 ; These are not accessible as spr registers (see LSI appendix - section 13.4) 2655; (acc0 1408) (acc1 1409) (acc2 1410) (acc3 1411) 2656; (acc4 1412) (acc5 1413) (acc6 1414) (acc7 1415) 2657; (acc8 1416) (acc9 1417) (acc10 1418) (acc11 1419) 2658; (acc12 1420) (acc13 1421) (acc14 1422) (acc15 1423) 2659; (acc16 1424) (acc17 1425) (acc18 1426) (acc19 1427) 2660; (acc20 1428) (acc21 1429) (acc22 1430) (acc23 1431) 2661; (acc24 1432) (acc25 1433) (acc26 1434) (acc27 1435) 2662; (acc28 1436) (acc29 1437) (acc30 1438) (acc31 1439) 2663; (acc32 1440) (acc33 1441) (acc34 1442) (acc35 1443) 2664; (acc36 1444) (acc37 1445) (acc38 1446) (acc39 1447) 2665; (acc40 1448) (acc41 1449) (acc42 1450) (acc43 1451) 2666; (acc44 1452) (acc45 1453) (acc46 1454) (acc47 1455) 2667; (acc48 1456) (acc49 1457) (acc50 1458) (acc51 1459) 2668; (acc52 1460) (acc53 1461) (acc54 1462) (acc55 1463) 2669; (acc56 1464) (acc57 1465) (acc58 1466) (acc59 1467) 2670; (acc60 1468) (acc61 1469) (acc62 1470) (acc63 1471) 2671 2672; (accg0 1472) (accg1 1473) (accg2 1474) (accg3 1475) 2673; (accg4 1476) (accg5 1477) (accg6 1478) (accg7 1479) 2674; (accg8 1480) (accg9 1481) (accg10 1482) (accg11 1483) 2675; (accg12 1484) (accg13 1485) (accg14 1486) (accg15 1487) 2676; (accg16 1488) (accg17 1489) (accg18 1490) (accg19 1491) 2677; (accg20 1492) (accg21 1493) (accg22 1494) (accg23 1495) 2678; (accg24 1496) (accg25 1497) (accg26 1498) (accg27 1499) 2679; (accg28 1500) (accg29 1501) (accg30 1502) (accg31 1503) 2680; (accg32 1504) (accg33 1505) (accg34 1506) (accg35 1507) 2681; (accg36 1508) (accg37 1509) (accg38 1510) (accg39 1511) 2682; (accg40 1512) (accg41 1513) (accg42 1514) (accg43 1515) 2683; (accg44 1516) (accg45 1517) (accg46 1518) (accg47 1519) 2684; (accg48 1520) (accg49 1521) (accg50 1522) (accg51 1523) 2685; (accg52 1524) (accg53 1525) (accg54 1526) (accg55 1527) 2686; (accg56 1528) (accg57 1529) (accg58 1530) (accg59 1531) 2687; (accg60 1532) (accg61 1533) (accg62 1534) (accg63 1535) 2688 2689 (ear0 1536) (ear1 1537) (ear2 1538) (ear3 1539) 2690 (ear4 1540) (ear5 1541) (ear6 1542) (ear7 1543) 2691 (ear8 1544) (ear9 1545) (ear10 1546) (ear11 1547) 2692 (ear12 1548) (ear13 1549) (ear14 1550) (ear15 1551) 2693 (ear16 1552) (ear17 1553) (ear18 1554) (ear19 1555) 2694 (ear20 1556) (ear21 1557) (ear22 1558) (ear23 1559) 2695 (ear24 1560) (ear25 1561) (ear26 1562) (ear27 1563) 2696 (ear28 1564) (ear29 1565) (ear30 1566) (ear31 1567) 2697 (ear32 1568) (ear33 1569) (ear34 1570) (ear35 1571) 2698 (ear36 1572) (ear37 1573) (ear38 1574) (ear39 1575) 2699 (ear40 1576) (ear41 1577) (ear42 1578) (ear43 1579) 2700 (ear44 1580) (ear45 1581) (ear46 1582) (ear47 1583) 2701 (ear48 1584) (ear49 1585) (ear50 1586) (ear51 1587) 2702 (ear52 1588) (ear53 1589) (ear54 1590) (ear55 1591) 2703 (ear56 1592) (ear57 1593) (ear58 1594) (ear59 1595) 2704 (ear60 1596) (ear61 1597) (ear62 1598) (ear63 1599) 2705 2706 (edr0 1600) (edr1 1601) (edr2 1602) (edr3 1603) 2707 (edr4 1604) (edr5 1605) (edr6 1606) (edr7 1607) 2708 (edr8 1608) (edr9 1609) (edr10 1610) (edr11 1611) 2709 (edr12 1612) (edr13 1613) (edr14 1614) (edr15 1615) 2710 (edr16 1616) (edr17 1617) (edr18 1618) (edr19 1619) 2711 (edr20 1620) (edr21 1621) (edr22 1622) (edr23 1623) 2712 (edr24 1624) (edr25 1625) (edr26 1626) (edr27 1627) 2713 (edr28 1628) (edr29 1629) (edr30 1630) (edr31 1631) 2714 (edr32 1632) (edr33 1636) (edr34 1634) (edr35 1635) 2715 (edr36 1636) (edr37 1637) (edr38 1638) (edr39 1639) 2716 (edr40 1640) (edr41 1641) (edr42 1642) (edr43 1643) 2717 (edr44 1644) (edr45 1645) (edr46 1646) (edr47 1647) 2718 (edr48 1648) (edr49 1649) (edr50 1650) (edr51 1651) 2719 (edr52 1652) (edr53 1653) (edr54 1654) (edr55 1655) 2720 (edr56 1656) (edr57 1657) (edr58 1658) (edr59 1659) 2721 (edr60 1660) (edr61 1661) (edr62 1662) (edr63 1663) 2722 2723 (iamlr0 1664) (iamlr1 1665) (iamlr2 1666) (iamlr3 1667) 2724 (iamlr4 1668) (iamlr5 1669) (iamlr6 1670) (iamlr7 1671) 2725 (iamlr8 1672) (iamlr9 1673) (iamlr10 1674) (iamlr11 1675) 2726 (iamlr12 1676) (iamlr13 1677) (iamlr14 1678) (iamlr15 1679) 2727 (iamlr16 1680) (iamlr17 1681) (iamlr18 1682) (iamlr19 1683) 2728 (iamlr20 1684) (iamlr21 1685) (iamlr22 1686) (iamlr23 1687) 2729 (iamlr24 1688) (iamlr25 1689) (iamlr26 1690) (iamlr27 1691) 2730 (iamlr28 1692) (iamlr29 1693) (iamlr30 1694) (iamlr31 1695) 2731 (iamlr32 1696) (iamlr33 1697) (iamlr34 1698) (iamlr35 1699) 2732 (iamlr36 1700) (iamlr37 1701) (iamlr38 1702) (iamlr39 1703) 2733 (iamlr40 1704) (iamlr41 1705) (iamlr42 1706) (iamlr43 1707) 2734 (iamlr44 1708) (iamlr45 1709) (iamlr46 1710) (iamlr47 1711) 2735 (iamlr48 1712) (iamlr49 1713) (iamlr50 1714) (iamlr51 1715) 2736 (iamlr52 1716) (iamlr53 1717) (iamlr54 1718) (iamlr55 1719) 2737 (iamlr56 1720) (iamlr57 1721) (iamlr58 1722) (iamlr59 1723) 2738 (iamlr60 1724) (iamlr61 1725) (iamlr62 1726) (iamlr63 1727) 2739 2740 (iampr0 1728) (iampr1 1729) (iampr2 1730) (iampr3 1731) 2741 (iampr4 1732) (iampr5 1733) (iampr6 1734) (iampr7 1735) 2742 (iampr8 1736) (iampr9 1737) (iampr10 1738) (iampr11 1739) 2743 (iampr12 1740) (iampr13 1741) (iampr14 1742) (iampr15 1743) 2744 (iampr16 1744) (iampr17 1745) (iampr18 1746) (iampr19 1747) 2745 (iampr20 1748) (iampr21 1749) (iampr22 1750) (iampr23 1751) 2746 (iampr24 1752) (iampr25 1753) (iampr26 1754) (iampr27 1755) 2747 (iampr28 1756) (iampr29 1757) (iampr30 1758) (iampr31 1759) 2748 (iampr32 1760) (iampr33 1761) (iampr34 1762) (iampr35 1763) 2749 (iampr36 1764) (iampr37 1765) (iampr38 1766) (iampr39 1767) 2750 (iampr40 1768) (iampr41 1769) (iampr42 1770) (iampr43 1771) 2751 (iampr44 1772) (iampr45 1773) (iampr46 1774) (iampr47 1775) 2752 (iampr48 1776) (iampr49 1777) (iampr50 1778) (iampr51 1779) 2753 (iampr52 1780) (iampr53 1781) (iampr54 1782) (iampr55 1783) 2754 (iampr56 1784) (iampr57 1785) (iampr58 1786) (iampr59 1787) 2755 (iampr60 1788) (iampr61 1789) (iampr62 1790) (iampr63 1791) 2756 2757 (damlr0 1792) (damlr1 1793) (damlr2 1794) (damlr3 1795) 2758 (damlr4 1796) (damlr5 1797) (damlr6 1798) (damlr7 1799) 2759 (damlr8 1800) (damlr9 1801) (damlr10 1802) (damlr11 1803) 2760 (damlr12 1804) (damlr13 1805) (damlr14 1806) (damlr15 1807) 2761 (damlr16 1808) (damlr17 1809) (damlr18 1810) (damlr19 1811) 2762 (damlr20 1812) (damlr21 1813) (damlr22 1814) (damlr23 1815) 2763 (damlr24 1816) (damlr25 1817) (damlr26 1818) (damlr27 1819) 2764 (damlr28 1820) (damlr29 1821) (damlr30 1822) (damlr31 1823) 2765 (damlr32 1824) (damlr33 1825) (damlr34 1826) (damlr35 1827) 2766 (damlr36 1828) (damlr37 1829) (damlr38 1830) (damlr39 1831) 2767 (damlr40 1832) (damlr41 1833) (damlr42 1834) (damlr43 1835) 2768 (damlr44 1836) (damlr45 1837) (damlr46 1838) (damlr47 1839) 2769 (damlr48 1840) (damlr49 1841) (damlr50 1842) (damlr51 1843) 2770 (damlr52 1844) (damlr53 1845) (damlr54 1846) (damlr55 1847) 2771 (damlr56 1848) (damlr57 1849) (damlr58 1850) (damlr59 1851) 2772 (damlr60 1852) (damlr61 1853) (damlr62 1854) (damlr63 1855) 2773 2774 (dampr0 1856) (dampr1 1857) (dampr2 1858) (dampr3 1859) 2775 (dampr4 1860) (dampr5 1861) (dampr6 1862) (dampr7 1863) 2776 (dampr8 1864) (dampr9 1865) (dampr10 1866) (dampr11 1867) 2777 (dampr12 1868) (dampr13 1869) (dampr14 1870) (dampr15 1871) 2778 (dampr16 1872) (dampr17 1873) (dampr18 1874) (dampr19 1875) 2779 (dampr20 1876) (dampr21 1877) (dampr22 1878) (dampr23 1879) 2780 (dampr24 1880) (dampr25 1881) (dampr26 1882) (dampr27 1883) 2781 (dampr28 1884) (dampr29 1885) (dampr30 1886) (dampr31 1887) 2782 (dampr32 1888) (dampr33 1889) (dampr34 1890) (dampr35 1891) 2783 (dampr36 1892) (dampr37 1893) (dampr38 1894) (dampr39 1895) 2784 (dampr40 1896) (dampr41 1897) (dampr42 1898) (dampr43 1899) 2785 (dampr44 1900) (dampr45 1901) (dampr46 1902) (dampr47 1903) 2786 (dampr48 1904) (dampr49 1905) (dampr50 1906) (dampr51 1907) 2787 (dampr52 1908) (dampr53 1909) (dampr54 1910) (dampr55 1911) 2788 (dampr56 1912) (dampr57 1913) (dampr58 1914) (dampr59 1915) 2789 (dampr60 1916) (dampr61 1917) (dampr62 1918) (dampr63 1919) 2790 2791 (amcr 1920) (stbar 1921) (mmcr 1922) 2792 (iamvr1 1925) (damvr1 1927) 2793 (cxnr 1936) (ttbr 1937) (tplr 1938) (tppr 1939) 2794 (tpxr 1940) 2795 (timerh 1952) (timerl 1953) (timerd 1954) 2796 (dcr 2048) (brr 2049) (nmar 2050) (btbr 2051) 2797 2798 (ibar0 2052) (ibar1 2053) (ibar2 2054) (ibar3 2055) 2799 (dbar0 2056) (dbar1 2057) (dbar2 2058) (dbar3 2059) 2800 2801 (dbdr00 2060) (dbdr01 2061) (dbdr02 2062) (dbdr03 2063) 2802 (dbdr10 2064) (dbdr11 2065) (dbdr12 2066) (dbdr13 2067) 2803 (dbdr20 2068) (dbdr21 2069) (dbdr22 2070) (dbdr23 2071) 2804 (dbdr30 2072) (dbdr31 2073) (dbdr32 2074) (dbdr33 2075) 2805 2806 (dbmr00 2076) (dbmr01 2077) (dbmr02 2078) (dbmr03 2079) 2807 (dbmr10 2080) (dbmr11 2081) (dbmr12 2082) (dbmr13 2083) 2808 (dbmr20 2084) (dbmr21 2085) (dbmr22 2086) (dbmr23 2087) 2809 (dbmr30 2088) (dbmr31 2089) (dbmr32 2090) (dbmr33 2091) 2810 2811 (cpcfr 2092) (cpcr 2093) (cpsr 2094) 2812 2813 (cpesr0 2096) (cpesr1 2097) 2814 (cpemr0 2098) (cpemr1 2099) 2815 2816 (ihsr8 3848) 2817 ) 2818) 2819 2820(define-hardware 2821 (name h-spr) 2822 (comment "special purpose registers") 2823 (attrs PROFILE) 2824 (type register UWI (4096)) 2825 (indices extern-keyword spr-names) 2826 (get (index) (c-call UWI "@cpu@_h_spr_get_handler" index)) 2827 (set (index newval) (c-call VOID "@cpu@_h_spr_set_handler" index newval)) 2828) 2829 2830(define-pmacro (spr-pcsr) (reg h-spr 1)) 2831(define-pmacro (spr-bpcsr) (reg h-spr 2)) 2832(define-pmacro (spr-lr) (reg h-spr 272)) 2833(define-pmacro (spr-lcr) (reg h-spr 273)) 2834(define-pmacro (spr-iacc0h) (reg h-spr 280)) 2835(define-pmacro (spr-iacc0l) (reg h-spr 281)) 2836(define-pmacro (spr-sr0) (reg h-spr 768)) 2837(define-pmacro (spr-sr1) (reg h-spr 769)) 2838(define-pmacro (spr-sr2) (reg h-spr 770)) 2839(define-pmacro (spr-sr3) (reg h-spr 771)) 2840 2841; Accumulator guard. Actually a subset of the SPR registers, but those SPRs 2842; are read-only in most insns. This hardware element is used by those insns 2843; which have direct access (mwtaccg, mrdaccg). 2844(define-keyword 2845 (name accg-names) 2846 (print-name h-accg) 2847 (prefix "") 2848 (values 2849 (accg0 0)(accg1 1)(accg2 2)(accg3 3) 2850 (accg4 4)(accg5 5)(accg6 6)(accg7 7) 2851 (accg8 8)(accg9 9)(accg10 10)(accg11 11) 2852 (accg12 12)(accg13 13)(accg14 14)(accg15 15) 2853 (accg16 16)(accg17 17)(accg18 18)(accg19 19) 2854 (accg20 20)(accg21 21)(accg22 22)(accg23 23) 2855 (accg24 24)(accg25 25)(accg26 26)(accg27 27) 2856 (accg28 28)(accg29 29)(accg30 30)(accg31 31) 2857 (accg32 32)(accg33 33)(accg34 34)(accg35 35) 2858 (accg36 36)(accg37 37)(accg38 38)(accg39 39) 2859 (accg40 40)(accg41 41)(accg42 42)(accg43 43) 2860 (accg44 44)(accg45 45)(accg46 46)(accg47 47) 2861 (accg48 48)(accg49 49)(accg50 50)(accg51 51) 2862 (accg52 52)(accg53 53)(accg54 54)(accg55 55) 2863 (accg56 56)(accg57 57)(accg58 58)(accg59 59) 2864 (accg60 60)(accg61 61)(accg62 62)(accg63 63) 2865 ) 2866) 2867 2868(define-hardware 2869 (name h-accg) 2870 (comment "accumulator guard") 2871 (attrs PROFILE VIRTUAL) 2872 (type register UWI (64)) 2873 (indices extern-keyword accg-names) 2874 (get (index) 2875 (and (reg h-spr (add index 1472)) #xff)) 2876 (set (index newval) 2877 (set (raw-reg UWI h-spr (add index 1472)) (and newval #xff))) 2878) 2879 2880; 40 bit accumulator. Composed of ACCG and ACC registers concatenated, but 2881; referenced more often as the composed 40 bits. 2882(define-keyword 2883 (name acc-names) 2884 (print-name h-acc40) 2885 (prefix "") 2886 (values 2887(acc0 0)(acc1 1)(acc2 2)(acc3 3)(acc4 4)(acc5 5)(acc6 6)(acc7 7) 2888(acc8 8)(acc9 9)(acc10 10)(acc11 11)(acc12 12)(acc13 13)(acc14 14)(acc15 15) 2889(acc16 16)(acc17 17)(acc18 18)(acc19 19)(acc20 20)(acc21 21)(acc22 22)(acc23 23) 2890(acc24 24)(acc25 25)(acc26 26)(acc27 27)(acc28 28)(acc29 29)(acc30 30)(acc31 31) 2891(acc32 32)(acc33 33)(acc34 34)(acc35 35)(acc36 36)(acc37 37)(acc38 38)(acc39 39) 2892(acc40 40)(acc41 41)(acc42 42)(acc43 43)(acc44 44)(acc45 45)(acc46 46)(acc47 47) 2893(acc48 48)(acc49 49)(acc50 50)(acc51 51)(acc52 52)(acc53 53)(acc54 54)(acc55 55) 2894(acc56 56)(acc57 57)(acc58 58)(acc59 59)(acc60 60)(acc61 61)(acc62 62)(acc63 63) 2895 ) 2896) 2897 2898(define-hardware 2899 (name h-acc40S) 2900 (comment "40 bit signed accumulator") 2901 (attrs PROFILE VIRTUAL) 2902 (type register DI (64)) 2903 (indices extern-keyword acc-names) 2904 ; The accumlator is made up of two 32 bit registers, accgi/acci. 2905 ; We want to extract this as a combined 40 signed bits 2906 (get (index) 2907 (or DI 2908 (sll DI (ext DI (trunc QI (reg h-spr (add index 1472)))) 2909 32) 2910 (zext DI (reg h-spr (add index 1408))))) 2911 ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions 2912 ; on ACC and ACCG registers 2913 (set (index newval) 2914 (sequence () 2915 (c-call VOID "frv_check_spr_write_access" (add index 1408)) 2916 (set (raw-reg UWI h-spr 2917 (add index 1472)) (and (srl newval 32) #xff)) 2918 (set (raw-reg UWI h-spr 2919 (add index 1408)) (trunc USI newval)))) 2920) 2921 2922(define-hardware 2923 (name h-acc40U) 2924 (comment "40 bit unsigned accumulator") 2925 (attrs PROFILE VIRTUAL) 2926 (type register UDI (64)) 2927 (indices extern-keyword acc-names) 2928 ; The accumlator is made up of two 32 bit registers, accgi/acci. 2929 ; We want to extract this as a combined 40 unsigned bits 2930 (get (index) 2931 (or DI 2932 (sll DI (zext DI (reg h-spr (add index 1472))) 32) 2933 (zext DI (reg h-spr (add index 1408))))) 2934 ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions 2935 ; on ACC and ACCG registers 2936 (set (index newval) 2937 (sequence () 2938 (c-call VOID "frv_check_spr_write_access" (add index 1408)) 2939 (set (raw-reg UWI h-spr 2940 (add index 1472)) (and (srl newval 32) #xff)) 2941 (set (raw-reg UWI h-spr 2942 (add index 1408)) (trunc USI newval)))) 2943) 2944; 64-bit signed accumulator. Composed of iacc0h and iacc0l registers 2945; concatenated, but referenced more often as the composed 64 bits. 2946(define-keyword 2947 ; This is totally hokey -- I have to have an index! 2948 (name iacc0-names) 2949 (print-name h-iacc0) 2950 (prefix "") 2951 (values (iacc0 0)) 2952) 2953 2954(define-hardware 2955 (name h-iacc0) 2956 (comment "64 bit signed accumulator") 2957 (attrs PROFILE VIRTUAL (MACH fr400,fr450)) 2958 (type register DI (1)) 2959 (indices extern-keyword iacc0-names) 2960 ; The single 64-bit integer accumulator is made up of two 32 bit 2961 ; registers, iacc0h and iacc0l. We want to extract this as a 2962 ; combined 64 signed bits. 2963 (get (idx) (or DI (sll DI (ext DI (spr-iacc0h)) 32) (zext DI (spr-iacc0l)))) 2964 (set (idx newval) 2965 (sequence () 2966 (set (spr-iacc0h) (trunc SI (srl newval 32))) 2967 (set (spr-iacc0l) (trunc SI newval)))) 2968) 2969 2970; Integer condition code registers (CCR) 2971; 2972; The individual sub registers bits of the CCR are referenced more often than 2973; the entire register so set them directly. We can assemble the 2974; entire register when necessary. 2975; 2976(define-keyword 2977 (name iccr-names) 2978 (print-name h-iccr) 2979 (prefix "") 2980 (values (icc0 0) (icc1 1) (icc2 2) (icc3 3)) 2981) 2982 2983(define-hardware 2984 (name h-iccr) 2985 (comment "Integer condition code registers") 2986 (attrs PROFILE) 2987 (type register UQI (4)) 2988 (indices extern-keyword iccr-names) 2989) 2990 2991; Floating point condition code registers (CCR) 2992; 2993; The individual sub registers bits of the CCR are referenced more often than 2994; the entire register so set them directly. We can assemble the 2995; entire register when necessary. 2996; 2997(define-keyword 2998 (name fccr-names) 2999 (print-name h-fccr) 3000 (prefix "") 3001 (values (fcc0 0) (fcc1 1) (fcc2 2) (fcc3 3)) 3002) 3003 3004(define-hardware 3005 (name h-fccr) 3006 (comment "Floating point condition code registers") 3007 (attrs PROFILE) 3008 (type register UQI (4)) 3009 (indices extern-keyword fccr-names) 3010) 3011 3012; C condition code registers (CCCR) 3013; 3014(define-keyword 3015 (name cccr-names) 3016 (print-name h-cccr) 3017 (prefix "") 3018 (values (cc0 0) (cc1 1) (cc2 2) (cc3 3) (cc4 4) (cc5 5) (cc6 6) (cc7 7)) 3019) 3020 3021(define-hardware 3022 (name h-cccr) 3023 (comment "Condition code registers") 3024 (attrs PROFILE) 3025 (type register UQI (8)) 3026 (indices extern-keyword cccr-names) 3027) 3028 3029; Dummy hardware used to define packing bit on insns 3030; 3031(define-hardware 3032 (name h-pack) 3033 (comment "Packing bit dummy hardware") 3034 (type immediate (UINT 1)) 3035 (values keyword "" (("" 1) (".p" 0) (".P" 0))) 3036) 3037; Dummy hardware used to define hint field for branches always taken 3038; 3039(define-hardware 3040 (name h-hint-taken) 3041 (comment "Branch taken hint dummy hardware") 3042 (type immediate (UINT 1)) 3043 ; The order of these is important. We want '2' to get written by default, 3044 ; but we also want the docoder/disassembler to allow the values '0', '1' and 3045 ; '3'. 3046 (values keyword "" (("" 2) ("" 0) ("" 1) ("" 3))) 3047) 3048; Dummy hardware used to define hint field for branches never taken 3049; 3050(define-hardware 3051 (name h-hint-not-taken) 3052 (comment "Branch not taken hint dummy hardware") 3053 (type immediate (UINT 1)) 3054 ; The order of these is important. We want '0' to get written by default, 3055 ; but we also want the docoder/disassembler to allow the values '1', '2' and 3056 ; '3'. 3057 (values keyword "" (("" 0) ("" 1) ("" 2) ("" 3))) 3058) 3059 3060; Instruction Operands. 3061; These entries provide a layer between the assembler and the raw hardware 3062; description, and are used to refer to hardware elements in the semantic 3063; code. Usually there's a bit of over-specification, but in more complicated 3064; instruction sets there isn't. 3065 3066; FRV specific operand attributes: 3067 3068(define-attr 3069 (for operand) 3070 (type boolean) 3071 (name HASH-PREFIX) 3072 (comment "immediates have an optional '#' prefix") 3073) 3074 3075; ??? Convention says this should be o-sr, but then the insn definitions 3076; should refer to o-sr which is clumsy. The "o-" could be implicit, but 3077; then it should be implicit for all the symbols here, but then there would 3078; be confusion between (f-)simm8 and (h-)simm8. 3079; So for now the rule is exactly as it appears here. 3080 3081; dnmop: define-normal-mode-operand: temporary, pending potential removal 3082; of modes from h/w. 3083(define-pmacro (dnmop xname xcomment xattrs xtype xindex xmode) 3084 (define-operand 3085 (name xname) 3086 (comment xcomment) 3087 (.splice attrs (.unsplice xattrs)) 3088 (type xtype) 3089 (index xindex) 3090 (mode xmode) 3091 ) 3092) 3093 3094; dnpmop: define-normal-parsed-mode-operand: Normal mode operand with parse handler 3095(define-pmacro (dnpmop xname xcomment xattrs xtype xindex xmode xparse) 3096 (define-operand 3097 (name xname) 3098 (comment xcomment) 3099 (.splice attrs (.unsplice xattrs)) 3100 (type xtype) 3101 (index xindex) 3102 (mode xmode) 3103 (handlers (parse xparse)) 3104 ) 3105) 3106 3107(dnop pack "packing bit" () h-pack f-pack) 3108 3109(dnmop GRi "source register 1" () h-gr f-GRi SI) 3110(dnmop GRj "source register 2" () h-gr f-GRj SI) 3111(dnmop GRk "destination register" () h-gr f-GRk SI) 3112(dnmop GRkhi "destination register" () h-gr_hi f-GRk UHI) 3113(dnmop GRklo "destination register" () h-gr_lo f-GRk UHI) 3114(dnpmop GRdoublek "destination register" () h-gr_double f-GRk DI "even_register") 3115(dnmop ACC40Si "signed accumulator" () h-acc40S f-ACC40Si DI) 3116(dnmop ACC40Ui "unsigned accumulator" () h-acc40U f-ACC40Ui UDI) 3117(dnmop ACC40Sk "target accumulator" () h-acc40S f-ACC40Sk DI) 3118(dnmop ACC40Uk "target accumulator" () h-acc40U f-ACC40Uk UDI) 3119(dnmop ACCGi "source register" () h-accg f-ACCGi UWI) 3120(dnmop ACCGk "target register" () h-accg f-ACCGk UWI) 3121 3122(dnmop CPRi "source register" ((MACH frv)) h-cpr f-CPRi SI) 3123(dnmop CPRj "source register" ((MACH frv)) h-cpr f-CPRj SI) 3124(dnmop CPRk "destination register" ((MACH frv)) h-cpr f-CPRk SI) 3125(dnpmop CPRdoublek "destination register" ((MACH frv)) h-cpr_double f-CPRk DI "even_register") 3126 3127; floating point operands 3128(dnmop FRinti "source register 1" () h-fr_int f-FRi SI) 3129(dnmop FRintj "source register 2" () h-fr_int f-FRj SI) 3130(dnmop FRintk "target register" () h-fr_int f-FRk SI) 3131(dnmop FRi "source register 1" () h-fr f-FRi SF) 3132(dnmop FRj "source register 2" () h-fr f-FRj SF) 3133(dnmop FRk "destination register" () h-fr f-FRk SF) 3134(dnmop FRkhi "destination register" () h-fr_hi f-FRk UHI) 3135(dnmop FRklo "destination register" () h-fr_lo f-FRk UHI) 3136(dnpmop FRdoublei "source register 1" () h-fr_double f-FRi DF "even_register") 3137(dnpmop FRdoublej "source register 2" () h-fr_double f-FRj DF "even_register") 3138(dnpmop FRdoublek "target register" () h-fr_double f-FRk DF "even_register") 3139 3140(dnop CRi "source register 1" () h-cccr f-CRi) 3141(dnop CRj "source register 2" () h-cccr f-CRj) 3142(dnop CRj_int "destination register" () h-cccr f-CRj_int) 3143(dnop CRj_float "destination register" () h-cccr f-CRj_float) 3144(dnop CRk "destination register" () h-cccr f-CRk) 3145(dnop CCi "condition register" () h-cccr f-CCi) 3146 3147(dnop ICCi_1 "condition register" () h-iccr f-ICCi_1) 3148(dnop ICCi_2 "condition register" () h-iccr f-ICCi_2) 3149(dnop ICCi_3 "condition register" () h-iccr f-ICCi_3) 3150(dnop FCCi_1 "condition register" () h-fccr f-FCCi_1) 3151(dnop FCCi_2 "condition register" () h-fccr f-FCCi_2) 3152(dnop FCCi_3 "condition register" () h-fccr f-FCCi_3) 3153(dnop FCCk "condition register" () h-fccr f-FCCk) 3154 3155(dnop eir "exception insn reg" () h-uint f-eir) 3156(dnop s10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-s10) 3157(dnop u16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-u16) 3158(dnop s16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-s16) 3159(dnop s6 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6) 3160(dnop s6_1 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6_1) 3161(dnop u6 "6 bit unsigned immediate" (HASH-PREFIX) h-uint f-u6) 3162(dnop s5 "5 bit signed immediate" (HASH-PREFIX) h-sint f-s5) 3163(dnop cond "conditional arithmetic" (HASH-PREFIX) h-uint f-cond) 3164(dnop ccond "lr branch condition" (HASH-PREFIX) h-uint f-ccond) 3165(dnop hint "2 bit branch predictor" (HASH-PREFIX) h-uint f-hint) 3166(dnop hint_taken "2 bit branch predictor" () h-hint-taken f-hint) 3167(dnop hint_not_taken "2 bit branch predictor" () h-hint-not-taken f-hint) 3168 3169(dnop LI "link indicator" () h-uint f-LI) 3170(dnop lock "cache lock indicator" (HASH-PREFIX) h-uint f-lock) 3171(dnop debug "debug mode indicator" (HASH-PREFIX) h-uint f-debug) 3172(dnop ae "all entries indicator" (HASH-PREFIX) h-uint f-ae) 3173 3174(dnop label16 "18 bit pc relative address" () h-iaddr f-label16) 3175 3176(dnop LRAE "Load Real Address E flag" () h-uint f-LRAE) 3177(dnop LRAD "Load Real Address D flag" () h-uint f-LRAD) 3178(dnop LRAS "Load Real Address S flag" () h-uint f-LRAS) 3179 3180(dnop TLBPRopx "TLB Probe operation number" () h-uint f-TLBPRopx) 3181(dnop TLBPRL "TLB Probe L flag" () h-uint f-TLBPRL) 3182 3183(define-operand 3184 (name A0) 3185 (comment "A==0 operand of mclracc") 3186 (attrs) 3187 (type h-uint) 3188 (index f-A) 3189 (mode USI) 3190 (handlers (parse "A0")) 3191) 3192 3193(define-operand 3194 (name A1) 3195 (comment "A==1 operand of mclracc") 3196 (attrs) 3197 (type h-uint) 3198 (index f-A) 3199 (mode USI) 3200 (handlers (parse "A1")) 3201) 3202 3203(define-operand 3204 (name FRintieven) 3205 (comment "(even) source register 1") 3206 (attrs) 3207 (type h-fr_int) 3208 (index f-FRi) 3209 (mode SI) 3210 (handlers (parse "even_register")) 3211) 3212 3213(define-operand 3214 (name FRintjeven) 3215 (comment "(even) source register 2") 3216 (attrs) 3217 (type h-fr_int) 3218 (index f-FRj) 3219 (mode SI) 3220 (handlers (parse "even_register")) 3221) 3222 3223(define-operand 3224 (name FRintkeven) 3225 (comment "(even) target register") 3226 (attrs) 3227 (type h-fr_int) 3228 (index f-FRk) 3229 (mode SI) 3230 (handlers (parse "even_register")) 3231) 3232 3233(define-operand 3234 (name d12) 3235 (comment "12 bit signed immediate") 3236 (attrs) 3237 (type h-sint) 3238 (index f-d12) 3239 (handlers (parse "d12")) 3240) 3241 3242(define-operand 3243 (name s12) 3244 (comment "12 bit signed immediate") 3245 (attrs HASH-PREFIX) 3246 (type h-sint) 3247 (index f-d12) 3248 (handlers (parse "s12")) 3249) 3250 3251(define-operand 3252 (name u12) 3253 (comment "12 bit signed immediate") 3254 (attrs HASH-PREFIX) 3255 (type h-sint) 3256 (index f-u12) 3257 (handlers (parse "u12")) 3258) 3259 3260(define-operand 3261 (name spr) 3262 (comment "special purpose register") 3263 (attrs) 3264 (type h-spr) 3265 (index f-spr) 3266 (handlers (parse "spr") (print "spr")) 3267) 3268 3269(define-operand 3270 (name ulo16) 3271 (comment "16 bit unsigned immediate, for #lo()") 3272 (attrs) 3273 (type h-uint) 3274 (index f-u16) 3275 (handlers (parse "ulo16") (print "lo")) 3276) 3277 3278(define-operand 3279 (name slo16) 3280 (comment "16 bit unsigned immediate, for #lo()") 3281 (attrs) 3282 (type h-sint) 3283 (index f-s16) 3284 (handlers (parse "uslo16") (print "lo")) 3285) 3286 3287(define-operand 3288 (name uhi16) 3289 (comment "16 bit unsigned immediate, for #hi()") 3290 (attrs) 3291 (type h-uint) 3292 (index f-u16) 3293 (handlers (parse "uhi16") (print "hi")) 3294) 3295 3296(define-operand 3297 (name label24) 3298 (comment "26 bit pc relative address") 3299 (attrs) 3300 (type h-iaddr) 3301 (index f-label24) 3302 (mode SI) 3303 (handlers (parse "call_label")) 3304) 3305 3306; operands representing hardware 3307; 3308(dnop psr_esr "PSR.ESR bit" (SEM-ONLY) h-psr_esr f-nil) 3309(dnop psr_s "PSR.S bit" (SEM-ONLY) h-psr_s f-nil) 3310(dnop psr_ps "PSR.PS bit" (SEM-ONLY) h-psr_ps f-nil) 3311(dnop psr_et "PSR.ET bit" (SEM-ONLY) h-psr_et f-nil) 3312 3313(dnop bpsr_bs "BPSR.BS bit" (SEM-ONLY) h-bpsr_bs f-nil) 3314(dnop bpsr_bet "BPSR.BET bit" (SEM-ONLY) h-bpsr_bet f-nil) 3315 3316(dnop tbr_tba "TBR.TBA" (SEM-ONLY) h-tbr_tba f-nil) 3317(dnop tbr_tt "TBR.TT" (SEM-ONLY) h-tbr_tt f-nil) 3318 3319; Null operands 3320; 3321(define-pmacro (ICCi_1-null) (f-ICCi_1-null 0)) 3322(define-pmacro (ICCi_2-null) (f-ICCi_2-null 0)) 3323(define-pmacro (ICCi_3-null) (f-ICCi_3-null 0)) 3324(define-pmacro (FCCi_1-null) (f-FCCi_1-null 0)) 3325(define-pmacro (FCCi_2-null) (f-FCCi_2-null 0)) 3326(define-pmacro (FCCi_3-null) (f-FCCi_3-null 0)) 3327(define-pmacro (rs-null) (f-rs-null 0)) 3328(define-pmacro (GRi-null) (f-GRi-null 0)) 3329(define-pmacro (GRj-null) (f-GRj-null 0)) 3330(define-pmacro (GRk-null) (f-GRk-null 0)) 3331(define-pmacro (FRi-null) (f-FRi-null 0)) 3332(define-pmacro (FRj-null) (f-FRj-null 0)) 3333(define-pmacro (ACCj-null) (f-ACCj-null 0)) 3334(define-pmacro (rd-null) (f-rd-null 0)) 3335(define-pmacro (cond-null) (f-cond-null 0)) 3336(define-pmacro (ccond-null) (f-ccond-null 0)) 3337(define-pmacro (s12-null) (f-s12-null 0)) 3338(define-pmacro (label16-null) (f-label16-null 0)) 3339(define-pmacro (misc-null-1) (f-misc-null-1 0)) 3340(define-pmacro (misc-null-2) (f-misc-null-2 0)) 3341(define-pmacro (misc-null-3) (f-misc-null-3 0)) 3342(define-pmacro (misc-null-4) (f-misc-null-4 0)) 3343(define-pmacro (misc-null-5) (f-misc-null-5 0)) 3344(define-pmacro (misc-null-6) (f-misc-null-6 0)) 3345(define-pmacro (misc-null-7) (f-misc-null-7 0)) 3346(define-pmacro (misc-null-8) (f-misc-null-8 0)) 3347(define-pmacro (misc-null-9) (f-misc-null-9 0)) 3348(define-pmacro (misc-null-10) (f-misc-null-10 0)) 3349(define-pmacro (misc-null-11) (f-misc-null-11 0)) 3350 3351(define-pmacro (LRA-null) (f-LRA-null 0)) 3352(define-pmacro (TLBPR-null) (f-TLBPR-null 0)) 3353 3354(define-pmacro (LI-on) (f-LI-on 1)) 3355(define-pmacro (LI-off) (f-LI-off 0)) 3356 3357; Instruction definitions. 3358; 3359; Notes: 3360; - dni is short for "define-normal-instruction" 3361; - Macros are used to represent each insn format. These should be used as much 3362; as possible unless an insn has exceptional behaviour 3363; 3364 3365; Commonly used Macros 3366; 3367; Specific registers 3368; 3369 3370; Integer condition code manipulation 3371; 3372(define-pmacro (set-z-and-n icc x) 3373 (if (eq x 0) 3374 (set icc (or (and icc #x7) #x4)) 3375 (if (lt x 0) 3376 (set icc (or (and icc #xb) #x8)) 3377 (set icc (and icc #x3)))) 3378) 3379 3380(define-pmacro (set-n icc val) 3381 (if (eq val 0) 3382 (set icc (and icc #x7)) 3383 (set icc (or icc #x8))) 3384) 3385 3386(define-pmacro (set-z icc val) 3387 (if (eq val 0) 3388 (set icc (and icc #xb)) 3389 (set icc (or icc #x4))) 3390) 3391 3392(define-pmacro (set-v icc val) 3393 (if (eq val 0) 3394 (set icc (and icc #xd)) 3395 (set icc (or icc #x2))) 3396) 3397 3398(define-pmacro (set-c icc val) 3399 (if (eq val 0) 3400 (set icc (and icc #xe)) 3401 (set icc (or icc #x1))) 3402) 3403 3404(define-pmacro (nbit icc) 3405 (trunc BI (srl (and icc #x8) 3)) 3406) 3407 3408(define-pmacro (zbit icc) 3409 (trunc BI (srl (and icc #x4) 2)) 3410) 3411 3412(define-pmacro (vbit icc) 3413 (trunc BI (srl (and icc #x2) 1)) 3414) 3415 3416(define-pmacro (cbit icc) 3417 (trunc BI (and icc #x1)) 3418) 3419 3420(define-pmacro (ebit icc) 3421 (trunc BI (srl (and icc #x8) 3)) 3422) 3423 3424(define-pmacro (lbit icc) 3425 (trunc BI (srl (and icc #x4) 2)) 3426) 3427 3428(define-pmacro (gbit icc) 3429 (trunc BI (srl (and icc #x2) 1)) 3430) 3431 3432(define-pmacro (ubit icc) 3433 (trunc BI (and icc #x1)) 3434) 3435 3436; FRV insns 3437; 3438; 3439; Format: INT, Logic, Shift r-r 3440; 3441(define-pmacro (int-logic-r-r name operation op ope comment) 3442 (dni name 3443 (comment) 3444 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3445 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3446 (.str name "$pack $GRi,$GRj,$GRk") 3447 (+ pack GRk op GRi (ICCi_1-null) ope GRj) 3448 (set GRk (operation GRi GRj)) 3449 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3450 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3451 ) 3452) 3453 3454(int-logic-r-r add add OP_00 OPE2_00 "add reg/reg") 3455(int-logic-r-r sub sub OP_00 OPE2_04 "sub reg/reg") 3456(int-logic-r-r and and OP_01 OPE2_00 "and reg/reg") 3457(int-logic-r-r or or OP_01 OPE2_02 "or reg/reg") 3458(int-logic-r-r xor xor OP_01 OPE2_04 "xor reg/reg") 3459 3460(dni not 3461 ("not") 3462 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3463 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3464 ("not$pack $GRj,$GRk") 3465 (+ pack GRk OP_01 (rs-null) (ICCi_1-null) OPE2_06 GRj) 3466 (set GRk (inv GRj)) 3467 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3468 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3469) 3470 3471(dni sdiv 3472 "signed division" 3473 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3474 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3475 "sdiv$pack $GRi,$GRj,$GRk" 3476 (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0E GRj) 3477 (sequence () 3478 (c-call VOID "@cpu@_signed_integer_divide" 3479 GRi GRj (index-of GRk) 0) 3480 (clobber GRk)) 3481 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 3482 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3483) 3484 3485(dni nsdiv 3486 "non excepting signed division" 3487 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING 3488 (MACH simple,tomcat,fr500,fr550,frv)) 3489 "nsdiv$pack $GRi,$GRj,$GRk" 3490 (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0E GRj) 3491 (sequence () 3492 (c-call VOID "@cpu@_signed_integer_divide" 3493 GRi GRj (index-of GRk) 1) 3494 (clobber GRk)) 3495 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3496) 3497 3498(dni udiv 3499 "unsigned division reg/reg" 3500 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3501 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3502 "udiv$pack $GRi,$GRj,$GRk" 3503 (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0F GRj) 3504 (sequence () 3505 (c-call VOID "@cpu@_unsigned_integer_divide" 3506 GRi GRj (index-of GRk) 0) 3507 (clobber GRk)) 3508 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 3509 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3510) 3511 3512(dni nudiv 3513 "non excepting unsigned division" 3514 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING 3515 (MACH simple,tomcat,fr500,fr550,frv)) 3516 "nudiv$pack $GRi,$GRj,$GRk" 3517 (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0F GRj) 3518 (sequence () 3519 (c-call VOID "@cpu@_unsigned_integer_divide" 3520 GRi GRj (index-of GRk) 1) 3521 (clobber GRk)) 3522 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3523) 3524 3525; Multiplication 3526; 3527(define-pmacro (multiply-r-r name signop op ope comment) 3528 (dni name 3529 (comment) 3530 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3531 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3532 (.str name "$pack $GRi,$GRj,$GRdoublek") 3533 (+ pack GRdoublek op GRi (ICCi_1-null) ope GRj) 3534 (set GRdoublek (mul DI (signop DI GRi) (signop DI GRj))) 3535 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 3536 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 3537 ) 3538) 3539 3540(multiply-r-r smul ext OP_00 OPE2_08 "signed multiply reg/reg") 3541(multiply-r-r umul zext OP_00 OPE2_0A "unsigned multiply reg/reg") 3542 3543; Multiplication with integer accumulator IACC 3544; 3545 3546(define-pmacro (iacc-set value) 3547 (set (reg h-iacc0 0) value)) 3548 3549(define-pmacro (iacc-add value) 3550 (set (reg h-iacc0 0) 3551 (cond DI 3552 ((andif (andif (gt value 0) (gt (reg h-iacc0 0) 0)) 3553 (lt (sub DI #x7fffffffffffffff value) (reg h-iacc0 0))) 3554 ; Positive overflow 3555 (const DI #x7fffffffffffffff)) 3556 ((andif (andif (lt value 0) (lt (reg h-iacc0 0) 0)) 3557 (gt (sub DI #x8000000000000000 value) (reg h-iacc0 0))) 3558 ; Negative overflow 3559 (const DI #x8000000000000000)) 3560 (else 3561 (add DI (reg h-iacc0 0) value)))) 3562) 3563 3564(define-pmacro (iacc-sub value) 3565 (set (reg h-iacc0 0) 3566 (cond DI 3567 ((andif (andif (lt value 0) (gt (reg h-iacc0 0) 0)) 3568 (lt (add DI #x7fffffffffffffff value) (reg h-iacc0 0))) 3569 ; Positive overflow 3570 (const DI #x7fffffffffffffff)) 3571 ((andif (andif (gt value 0) (lt (reg h-iacc0 0) 0)) 3572 (gt (add DI #x8000000000000000 value) (reg h-iacc0 0))) 3573 ; Negative overflow 3574 (const DI #x8000000000000000)) 3575 (else 3576 (sub DI (reg h-iacc0 0) value)))) 3577) 3578 3579(define-pmacro (iacc-multiply-r-r name operation op ope comment) 3580 (dni name 3581 (comment) 3582 ((UNIT IACC) (MACH fr400,fr450) 3583 (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) 3584 (.str name "$pack $GRi,$GRj") 3585 (+ pack (rd-null) op GRi ope GRj) 3586 ((.sym iacc- operation) (mul DI (ext DI GRi) (ext DI GRj))) 3587 ((fr400 (unit u-integer)) (fr450 (unit u-integer))) 3588 ) 3589) 3590 3591(iacc-multiply-r-r smu set OP_46 OPE1_05 "Signed multiply reg/reg/iacc") 3592(iacc-multiply-r-r smass add OP_46 OPE1_06 "Signed multiply/add reg/reg/iacc") 3593(iacc-multiply-r-r smsss sub OP_46 OPE1_07 "Signed multiply/sub reg/reg/iacc") 3594 3595(define-pmacro (int-shift-r-r name op ope comment) 3596 (dni name 3597 (comment) 3598 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3599 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3600 (.str name "$pack $GRi,$GRj,$GRk") 3601 (+ pack GRk op GRi (ICCi_1-null) ope GRj) 3602 (set GRk (name GRi (and GRj #x1f))) 3603 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3604 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3605 ) 3606) 3607 3608(int-shift-r-r sll OP_01 OPE2_08 "shift left logical reg/reg") 3609(int-shift-r-r srl OP_01 OPE2_0A "shift right logical reg/reg") 3610(int-shift-r-r sra OP_01 OPE2_0C "shift right arith reg/reg") 3611 3612(dni slass 3613 "shift left arith reg/reg with saturation" 3614 ((UNIT IALL) (MACH fr400,fr450) 3615 (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) 3616 "slass$pack $GRi,$GRj,$GRk" 3617 (+ pack GRk OP_46 GRi OPE1_02 GRj) 3618 (set GRk (c-call SI "@cpu@_shift_left_arith_saturate" GRi GRj)) 3619 () 3620) 3621 3622(dni scutss 3623 "Integer accumulator cut with saturation" 3624 ((UNIT I0) (MACH fr400,fr450) 3625 (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) 3626 "scutss$pack $GRj,$GRk" 3627 (+ pack GRk OP_46 (rs-null) OPE1_04 GRj) 3628 (set GRk (c-call SI "@cpu@_iacc_cut" (reg h-iacc0 0) GRj)) 3629 () 3630) 3631 3632(define-pmacro (scan-semantics arg1 arg2 targ) 3633 (sequence ((WI tmp1) (WI tmp2)) 3634 (set tmp1 arg1) 3635 (set tmp2 (sra arg2 1)) 3636 (set targ (c-call WI "@cpu@_scan_result" (xor tmp1 tmp2)))) 3637) 3638 3639(dni scan 3640 "scan" 3641 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3642 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3643 "scan$pack $GRi,$GRj,$GRk" 3644 (+ pack GRk OP_0B GRi (ICCi_1-null) OPE2_00 GRj) 3645 (scan-semantics GRi GRj GRk) 3646 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3647 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3648) 3649 3650; Format: conditional INT, Logic, Shift r-r 3651; 3652(define-pmacro (conditional-int-logic name operation op ope comment) 3653 (dni name 3654 (comment) 3655 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3656 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3657 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3658 (+ pack GRk op GRi CCi cond ope GRj) 3659 (if (eq CCi (or cond 2)) 3660 (set GRk (operation GRi GRj))) 3661 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3662 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3663 ) 3664) 3665 3666(conditional-int-logic cadd add OP_58 OPE4_0 "conditional add") 3667(conditional-int-logic csub sub OP_58 OPE4_1 "conditional sub") 3668(conditional-int-logic cand and OP_5A OPE4_0 "conditional and") 3669(conditional-int-logic cor or OP_5A OPE4_1 "conditional or") 3670(conditional-int-logic cxor xor OP_5A OPE4_2 "conditional xor") 3671 3672(dni cnot 3673 "conditional not" 3674 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3675 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3676 "cnot$pack $GRj,$GRk,$CCi,$cond" 3677 (+ pack GRk OP_5A (rs-null) CCi cond OPE4_3 GRj) 3678 (if (eq CCi (or cond 2)) 3679 (set GRk (inv GRj))) 3680 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3681 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3682) 3683 3684(dni csmul 3685 "conditional signed multiply" 3686 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3687 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3688 "csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond" 3689 (+ pack GRdoublek OP_58 GRi CCi cond OPE4_2 GRj) 3690 (if (eq CCi (or cond 2)) 3691 (set GRdoublek (mul DI (ext DI GRi) (ext DI GRj)))) 3692 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 3693 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 3694) 3695 3696(dni csdiv 3697 "conditional signed division" 3698 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3699 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3700 "csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond" 3701 (+ pack GRk OP_58 GRi CCi cond OPE4_3 GRj) 3702 (if (eq CCi (or cond 2)) 3703 (sequence () 3704 (c-call VOID "@cpu@_signed_integer_divide" 3705 GRi GRj (index-of GRk) 0) 3706 (clobber GRk))) 3707 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 3708 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3709) 3710 3711(dni cudiv 3712 "conditional unsigned division" 3713 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3714 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3715 "cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond" 3716 (+ pack GRk OP_59 GRi CCi cond OPE4_3 GRj) 3717 (if (eq CCi (or cond 2)) 3718 (sequence () 3719 (c-call VOID "@cpu@_unsigned_integer_divide" 3720 GRi GRj (index-of GRk) 0) 3721 (clobber GRk))) 3722 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 3723 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3724) 3725 3726(define-pmacro (conditional-shift name operation op ope comment) 3727 (dni name 3728 (comment) 3729 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3730 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3731 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3732 (+ pack GRk op GRi CCi cond ope GRj) 3733 (if (eq CCi (or cond 2)) 3734 (set GRk (operation GRi (and GRj #x1f)))) 3735 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3736 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3737 ) 3738) 3739 3740(conditional-shift csll sll OP_5C OPE4_0 "conditional shift left logical") 3741(conditional-shift csrl srl OP_5C OPE4_1 "conditional shift right logical") 3742(conditional-shift csra sra OP_5C OPE4_2 "conditional shift right arith") 3743 3744(dni cscan 3745 "conditional scan" 3746 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3747 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3748 "cscan$pack $GRi,$GRj,$GRk,$CCi,$cond" 3749 (+ pack GRk OP_65 GRi CCi cond OPE4_3 GRj) 3750 (if (eq CCi (or cond 2)) 3751 (scan-semantics GRi GRj GRk)) 3752 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3753 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3754) 3755 3756; Format: INT, Logic, Shift, cc r-r 3757; 3758(define-pmacro (int-arith-cc-semantics operation icc) 3759 (sequence ((BI tmp) (QI cc) (SI result)) 3760 (set cc icc) 3761 (set tmp ((.sym operation -oflag) GRi GRj (const 0))) 3762 (set-v cc tmp) 3763 (set tmp ((.sym operation -cflag) GRi GRj (const 0))) 3764 (set-c cc tmp) 3765 (set result (operation GRi GRj)) 3766 (set-z-and-n cc result) 3767 (set GRk result) 3768 (set icc cc)) 3769) 3770 3771(define-pmacro (int-arith-cc-r-r name operation op ope comment) 3772 (dni name 3773 (comment) 3774 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3775 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3776 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") 3777 (+ pack GRk op GRi ICCi_1 ope GRj) 3778 (int-arith-cc-semantics operation ICCi_1) 3779 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3780 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3781 ) 3782) 3783 3784(int-arith-cc-r-r addcc add OP_00 OPE2_01 "add reg/reg, set icc") 3785(int-arith-cc-r-r subcc sub OP_00 OPE2_05 "sub reg/reg, set icc") 3786 3787(define-pmacro (int-logic-cc-semantics op icc) 3788 (sequence ((SI tmp)) 3789 (set tmp (op GRi GRj)) 3790 (set GRk tmp) 3791 (set-z-and-n icc tmp)) 3792) 3793 3794(define-pmacro (int-logic-cc-r-r name op ope comment) 3795 (dni (.sym name cc) 3796 (comment) 3797 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3798 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3799 (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1") 3800 (+ pack GRk op GRi ICCi_1 ope GRj) 3801 (int-logic-cc-semantics name ICCi_1) 3802 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3803 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3804 ) 3805) 3806 3807(int-logic-cc-r-r and OP_01 OPE2_01 "and reg/reg, set icc") 3808(int-logic-cc-r-r or OP_01 OPE2_03 "or reg/reg, set icc") 3809(int-logic-cc-r-r xor OP_01 OPE2_05 "xor reg/reg, set icc") 3810 3811(define-pmacro (int-shift-cc-semantics op l-r icc) 3812 (sequence ((WI shift) (SI tmp) (QI cc)) 3813 (set shift (and GRj #x1f)) 3814 (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r) 3815 GRi shift icc)) 3816 (set tmp (op GRi shift)) 3817 (set GRk tmp) 3818 (set-z-and-n cc tmp) 3819 (set icc cc)) 3820) 3821 3822(define-pmacro (int-shift-cc-r-r name l-r op ope comment) 3823 (dni (.sym name cc) 3824 (comment) 3825 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3826 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3827 (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1") 3828 (+ pack GRk op GRi ICCi_1 ope GRj) 3829 (int-shift-cc-semantics name l-r ICCi_1) 3830 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3831 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3832 ) 3833) 3834 3835(int-shift-cc-r-r sll left OP_01 OPE2_09 "shift left logical reg/reg,set icc") 3836(int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc") 3837(int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith reg/reg,set icc") 3838 3839(define-pmacro (multiply-cc-semantics signop arg1 arg2 targ icc) 3840 (sequence ((DI tmp) (QI cc)) 3841 (set cc icc) 3842 (set tmp (mul DI (signop DI arg1) (signop DI arg2))) 3843 (set-n cc (srl DI tmp 63)) 3844 (set-z cc (eq tmp 0)) 3845 (set targ tmp) 3846 (set icc cc)) 3847) 3848 3849(define-pmacro (multiply-cc-r-r name signop op ope comment) 3850 (dni name 3851 (comment) 3852 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3853 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3854 (.str name "$pack $GRi,$GRj,$GRdoublek,$ICCi_1") 3855 (+ pack GRdoublek op GRi ICCi_1 ope GRj) 3856 (multiply-cc-semantics signop GRi GRj GRdoublek ICCi_1) 3857 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 3858 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 3859 ) 3860) 3861 3862(multiply-cc-r-r smulcc ext OP_00 OPE2_09 "signed multiply reg/reg") 3863(multiply-cc-r-r umulcc zext OP_00 OPE2_0B "unsigned multiply reg/reg") 3864 3865 3866; Format: conditional INT, Logic, Shift, cc r-r 3867; 3868(define-pmacro (conditional-int-arith-cc name operation op ope comment) 3869 (dni name 3870 (comment) 3871 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3872 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3873 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3874 (+ pack GRk op GRi CCi cond ope GRj) 3875 (if (eq CCi (or cond 2)) 3876 (int-arith-cc-semantics operation 3877 (reg h-iccr (and (index-of CCi) 3)))) 3878 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3879 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3880 ) 3881) 3882 3883(conditional-int-arith-cc caddcc add OP_59 OPE4_0 "add, set icc") 3884(conditional-int-arith-cc csubcc sub OP_59 OPE4_1 "sub, set icc") 3885 3886(dni csmulcc 3887 "conditional signed multiply and set condition code" 3888 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3889 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3890 "csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond" 3891 (+ pack GRdoublek OP_59 GRi CCi cond OPE4_2 GRj) 3892 (if (eq CCi (or cond 2)) 3893 (multiply-cc-semantics ext GRi GRj GRdoublek 3894 (reg h-iccr (and (index-of CCi) 3)))) 3895 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 3896 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 3897) 3898 3899(define-pmacro (conditional-int-logic-cc name operation op ope comment) 3900 (dni name 3901 (comment) 3902 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3903 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3904 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3905 (+ pack GRk op GRi CCi cond ope GRj) 3906 (if (eq CCi (or cond 2)) 3907 (int-logic-cc-semantics operation 3908 (reg h-iccr (and (index-of CCi) 3)))) 3909 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3910 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3911 ) 3912) 3913 3914(conditional-int-logic-cc candcc and OP_5B OPE4_0 "conditional and, set icc") 3915(conditional-int-logic-cc corcc or OP_5B OPE4_1 "conditional or , set icc") 3916(conditional-int-logic-cc cxorcc xor OP_5B OPE4_2 "conditional xor, set icc") 3917 3918(define-pmacro (conditional-int-shift-cc name l-r op ope comment) 3919 (dni (.sym c name cc) 3920 (comment) 3921 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3922 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3923 (.str (.sym c name cc) "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3924 (+ pack GRk op GRi CCi cond ope GRj) 3925 (if (eq CCi (or cond 2)) 3926 (int-shift-cc-semantics name l-r 3927 (reg h-iccr (and (index-of CCi) 3)))) 3928 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3929 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3930 ) 3931) 3932 3933(conditional-int-shift-cc sll left OP_5D OPE4_0 "shift left logical, set icc") 3934(conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc") 3935(conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith , set icc") 3936 3937; Add and subtract with carry 3938; 3939(define-pmacro (int-arith-x-r-r name operation op ope comment) 3940 (dni name 3941 (comment) 3942 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3943 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3944 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") 3945 (+ pack GRk op GRi ICCi_1 ope GRj) 3946 (set GRk ((.sym operation c) GRi GRj (cbit ICCi_1))) 3947 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3948 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3949 ) 3950) 3951 3952(int-arith-x-r-r addx add OP_00 OPE2_02 "Add reg/reg, with carry") 3953(int-arith-x-r-r subx sub OP_00 OPE2_06 "Sub reg/reg, with carry") 3954 3955(define-pmacro (int-arith-x-cc-r-r name operation op ope comment) 3956 (dni name 3957 (comment) 3958 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3959 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3960 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") 3961 (+ pack GRk op GRi ICCi_1 ope GRj) 3962 (sequence ((WI tmp) (QI cc)) 3963 (set cc ICCi_1) 3964 (set tmp ((.sym operation c) GRi GRj (cbit cc))) 3965 (set-v cc ((.sym operation -oflag) GRi GRj (cbit cc))) 3966 (set-c cc ((.sym operation -cflag) GRi GRj (cbit cc))) 3967 (set-z-and-n cc tmp) 3968 (set GRk tmp) 3969 (set ICCi_1 cc)) 3970 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3971 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3972 ) 3973) 3974 3975(int-arith-x-cc-r-r addxcc add OP_00 OPE2_03 "Add reg/reg, use/set carry") 3976(int-arith-x-cc-r-r subxcc sub OP_00 OPE2_07 "Sub reg/reg, use/set carry") 3977; Add and subtract with saturation 3978; 3979(define-pmacro (int-arith-ss-r-r name operation op ope comment) 3980 (dni name 3981 (comment) 3982 ((UNIT IALL) (MACH fr400,fr450) 3983 (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) 3984 (.str name "$pack $GRi,$GRj,$GRk") 3985 (+ pack GRk op GRi ope GRj) 3986 (sequence () 3987 (set GRk (operation GRi GRj)) 3988 (if ((.sym operation -oflag) GRi GRj (const 0)) 3989 ; Overflow, saturate. 3990 ; Sign of result will be 3991 ; same as sign of first operand. 3992 (set GRk 3993 (cond SI 3994 ((gt GRi 0) (const #x7fffffff)) 3995 ((lt GRi 0) (const #x80000000)) 3996 (else (const 0))))) 3997 ) 3998 ((fr400 (unit u-integer)) (fr450 (unit u-integer))) 3999 ) 4000) 4001 4002(int-arith-ss-r-r addss add OP_46 OPE1_00 "add reg/reg, with saturation") 4003(int-arith-ss-r-r subss sub OP_46 OPE1_01 "sub reg/reg, with saturation") 4004 4005; Format: INT, Logic, Shift r-simm 4006; 4007(define-pmacro (int-logic-r-simm name operation op comment) 4008 (dni name 4009 (comment) 4010 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4011 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4012 (.str name "$pack $GRi,$s12,$GRk") 4013 (+ pack GRk op GRi s12) 4014 (set GRk (operation GRi s12)) 4015 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4016 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4017 ) 4018) 4019 4020(int-logic-r-simm addi add OP_10 "add reg/immed") 4021(int-logic-r-simm subi sub OP_14 "sub reg/immed") 4022(int-logic-r-simm andi and OP_20 "and reg/immed") 4023(int-logic-r-simm ori or OP_22 "or reg/immed") 4024(int-logic-r-simm xori xor OP_24 "xor reg/immed") 4025 4026(dni sdivi 4027 "signed division reg/immed" 4028 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 4029 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4030 "sdivi$pack $GRi,$s12,$GRk" 4031 (+ pack GRk OP_1E GRi s12) 4032 (sequence () 4033 (c-call VOID "@cpu@_signed_integer_divide" 4034 GRi s12 (index-of GRk) 0) 4035 (clobber GRk)) 4036 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 4037 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 4038) 4039 4040(dni nsdivi 4041 "non excepting signed division reg/immed" 4042 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING 4043 (MACH simple,tomcat,fr500,fr550,frv)) 4044 "nsdivi$pack $GRi,$s12,$GRk" 4045 (+ pack GRk OP_2E GRi s12) 4046 (sequence () 4047 (c-call VOID "@cpu@_signed_integer_divide" 4048 GRi s12 (index-of GRk) 1) 4049 (clobber GRk)) 4050 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 4051) 4052 4053(dni udivi 4054 "unsigned division reg/immed" 4055 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 4056 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4057 "udivi$pack $GRi,$s12,$GRk" 4058 (+ pack GRk OP_1F GRi s12) 4059 (sequence () 4060 (c-call VOID "@cpu@_unsigned_integer_divide" 4061 GRi s12 (index-of GRk) 0) 4062 (clobber GRk)) 4063 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 4064 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 4065) 4066 4067(dni nudivi 4068 "non excepting unsigned division reg/immed" 4069 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING 4070 (MACH simple,tomcat,fr500,fr550,frv)) 4071 "nudivi$pack $GRi,$s12,$GRk" 4072 (+ pack GRk OP_2F GRi s12) 4073 (sequence () 4074 (c-call VOID "@cpu@_unsigned_integer_divide" 4075 GRi s12 (index-of GRk) 1) 4076 (clobber GRk)) 4077 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 4078) 4079 4080(define-pmacro (multiply-r-simm name signop op comment) 4081 (dni name 4082 (comment) 4083 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 4084 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4085 (.str name "$pack $GRi,$s12,$GRdoublek") 4086 (+ pack GRdoublek op GRi s12) 4087 (set GRdoublek (mul DI (signop DI GRi) (signop DI s12))) 4088 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 4089 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 4090 ) 4091) 4092 4093(multiply-r-simm smuli ext OP_18 "signed multiply reg/immed") 4094(multiply-r-simm umuli zext OP_1A "unsigned multiply reg/immed") 4095 4096(define-pmacro (int-shift-r-simm name op comment) 4097 (dni (.sym name i) 4098 (comment) 4099 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4100 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4101 (.str (.sym name i) "$pack $GRi,$s12,$GRk") 4102 (+ pack GRk op GRi s12) 4103 (set GRk (name GRi (and s12 #x1f))) 4104 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4105 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4106 ) 4107) 4108 4109(int-shift-r-simm sll OP_28 "shift left logical reg/immed") 4110(int-shift-r-simm srl OP_2A "shift right logical reg/immed") 4111(int-shift-r-simm sra OP_2C "shift right arith reg/immed") 4112 4113(dni scani 4114 "scan immediate" 4115 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4116 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4117 "scani$pack $GRi,$s12,$GRk" 4118 (+ pack GRk OP_47 GRi s12) 4119 (scan-semantics GRi s12 GRk) 4120 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4121 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4122) 4123 4124; Format: INT, Logic, Shift cc r-simm 4125; 4126(define-pmacro (int-arith-cc-r-simm name operation op comment) 4127 (dni name 4128 (comment) 4129 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4130 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4131 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") 4132 (+ pack GRk op GRi ICCi_1 s10) 4133 (sequence ((BI tmp) (QI cc) (SI result)) 4134 (set cc ICCi_1) 4135 (set tmp ((.sym operation -oflag) GRi s10 (const 0))) 4136 (set-v cc tmp) 4137 (set tmp ((.sym operation -cflag) GRi s10 (const 0))) 4138 (set-c cc tmp) 4139 (set result (operation GRi s10)) 4140 (set-z-and-n cc result) 4141 (set GRk result) 4142 (set ICCi_1 cc)) 4143 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4144 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4145 ) 4146) 4147 4148(int-arith-cc-r-simm addicc add OP_11 "add reg/immed, set icc") 4149(int-arith-cc-r-simm subicc sub OP_15 "sub reg/immed, set icc") 4150 4151(define-pmacro (int-logic-cc-r-simm name op comment) 4152 (dni (.sym name icc) 4153 (comment) 4154 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4155 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4156 (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1") 4157 (+ pack GRk op GRi ICCi_1 s10) 4158 (sequence ((SI tmp)) 4159 (set tmp (name GRi s10)) 4160 (set GRk tmp) 4161 (set-z-and-n ICCi_1 tmp)) 4162 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4163 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4164 ) 4165) 4166 4167(int-logic-cc-r-simm and OP_21 "and reg/immed, set icc") 4168(int-logic-cc-r-simm or OP_23 "or reg/immed, set icc") 4169(int-logic-cc-r-simm xor OP_25 "xor reg/immed, set icc") 4170 4171(define-pmacro (multiply-cc-r-simm name signop op comment) 4172 (dni name 4173 (comment) 4174 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 4175 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4176 (.str name "$pack $GRi,$s10,$GRdoublek,$ICCi_1") 4177 (+ pack GRdoublek op GRi ICCi_1 s10) 4178 (multiply-cc-semantics signop GRi s10 GRdoublek ICCi_1) 4179 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 4180 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 4181 ) 4182) 4183 4184(multiply-cc-r-simm smulicc ext OP_19 "signed multiply reg/immed") 4185(multiply-cc-r-simm umulicc zext OP_1B "unsigned multiply reg/immed") 4186 4187(define-pmacro (int-shift-cc-r-simm name l-r op comment) 4188 (dni (.sym name icc) 4189 (comment) 4190 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4191 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4192 (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1") 4193 (+ pack GRk op GRi ICCi_1 s10) 4194 (sequence ((WI shift) (SI tmp) (QI cc)) 4195 (set shift (and s10 #x1f)) 4196 (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r) 4197 GRi shift ICCi_1)) 4198 (set tmp (name GRi shift)) 4199 (set GRk tmp) 4200 (set-z-and-n cc tmp) 4201 (set ICCi_1 cc)) 4202 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4203 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4204 ) 4205) 4206 4207(int-shift-cc-r-simm sll left OP_29 "shift left logical reg/immed, set icc") 4208(int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc") 4209(int-shift-cc-r-simm sra right OP_2D "shift right arith reg/immed, set icc") 4210 4211(define-pmacro (int-arith-x-r-simm name operation op comment) 4212 (dni name 4213 (comment) 4214 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4215 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4216 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") 4217 (+ pack GRk op GRi ICCi_1 s10) 4218 (set GRk ((.sym operation c) GRi s10 (cbit ICCi_1))) 4219 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4220 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4221 ) 4222) 4223 4224(int-arith-x-r-simm addxi add OP_12 "Add reg/immed, with carry") 4225(int-arith-x-r-simm subxi sub OP_16 "Sub reg/immed, with carry") 4226 4227(define-pmacro (int-arith-x-cc-r-simm name operation op comment) 4228 (dni name 4229 (comment) 4230 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4231 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4232 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") 4233 (+ pack GRk op GRi ICCi_1 s10) 4234 (sequence ((WI tmp) (QI cc)) 4235 (set cc ICCi_1) 4236 (set tmp ((.sym operation c) GRi s10 (cbit cc))) 4237 (set-v cc ((.sym operation -oflag) GRi s10 (cbit cc))) 4238 (set-c cc ((.sym operation -cflag) GRi s10 (cbit cc))) 4239 (set-z-and-n cc tmp) 4240 (set GRk tmp) 4241 (set ICCi_1 cc)) 4242 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4243 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4244 ) 4245) 4246 4247(int-arith-x-cc-r-simm addxicc add OP_13 "Add reg/immed, with carry") 4248(int-arith-x-cc-r-simm subxicc sub OP_17 "Sub reg/immed, with carry") 4249 4250; Byte compare insns 4251 4252(dni cmpb 4253 "Compare bytes" 4254 ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1) 4255 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4256 "cmpb$pack $GRi,$GRj,$ICCi_1" 4257 (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj) 4258 (sequence ((QI cc)) 4259 (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000))) 4260 (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000))) 4261 (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00))) 4262 (set-c cc (eq (and GRi #x000000ff) (and GRj #x000000ff))) 4263 (set ICCi_1 cc)) 4264 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4265 (fr550 (unit u-integer))) 4266) 4267 4268(dni cmpba 4269 "OR of Compare bytes" 4270 ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1) 4271 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4272 "cmpba$pack $GRi,$GRj,$ICCi_1" 4273 (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0D GRj) 4274 (sequence ((QI cc)) 4275 (set cc 0) 4276 (set-c cc 4277 (orif (eq (and GRi #xff000000) (and GRj #xff000000)) 4278 (orif (eq (and GRi #x00ff0000) (and GRj #x00ff0000)) 4279 (orif (eq (and GRi #x0000ff00) 4280 (and GRj #x0000ff00)) 4281 (eq (and GRi #x000000ff) 4282 (and GRj #x000000ff)))))) 4283 (set ICCi_1 cc)) 4284 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4285 (fr550 (unit u-integer))) 4286) 4287 4288; Format: Load immediate 4289; 4290(dni setlo 4291 "set low order bits" 4292 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4293 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4294 "setlo$pack $ulo16,$GRklo" 4295 (+ pack GRk OP_3D (misc-null-4) u16) 4296 (set GRklo u16) 4297 ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo)) 4298 (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo))) 4299) 4300 4301(dni sethi 4302 "set high order bits" 4303 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4304 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4305 "sethi$pack $uhi16,$GRkhi" 4306 (+ pack GRkhi OP_3E (misc-null-4) u16) 4307 (set GRkhi u16) 4308 ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo)) 4309 (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo))) 4310) 4311 4312(dni setlos 4313 "set low order bits and extend sign" 4314 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4315 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4316 "setlos$pack $slo16,$GRk" 4317 (+ pack GRk OP_3F (misc-null-4) s16) 4318 (set GRk s16) 4319 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4320 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4321) 4322 4323(define-pmacro (load-gr-r name mode op ope comment ann) 4324 (dni name 4325 (comment) 4326 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4327 (FR400-MAJOR I-2) (FR450-MAJOR I-2)) 4328 (.str name "$pack " ann "($GRi,$GRj),$GRk") 4329 (+ pack GRk op GRi ope GRj) 4330 (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) 4331 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4332 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4333 ) 4334) 4335 4336(dann ldann "ld annotation" SI "ld_annotation" "at") 4337 4338(load-gr-r ldsb QI OP_02 OPE1_00 "Load signed byte" "@") 4339(load-gr-r ldub UQI OP_02 OPE1_01 "Load unsigned byte" "@") 4340(load-gr-r ldsh HI OP_02 OPE1_02 "Load signed half" "@") 4341(load-gr-r lduh UHI OP_02 OPE1_03 "Load unsigned half" "@") 4342(load-gr-r ld SI OP_02 OPE1_04 "Load word" "$ldann") 4343 4344(define-pmacro (load-fr-r name mode op ope comment) 4345 (dni name 4346 (comment) 4347 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4348 (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS) 4349 (.str name "$pack @($GRi,$GRj),$FRintk") 4350 (+ pack FRintk op GRi ope GRj) 4351 (set FRintk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) 4352 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4353 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4354 ) 4355) 4356 4357(load-fr-r ldbf UQI OP_02 OPE1_08 "Load byte float") 4358(load-fr-r ldhf UHI OP_02 OPE1_09 "Load half float") 4359(load-fr-r ldf SI OP_02 OPE1_0A "Load word float") 4360 4361(define-pmacro (load-cpr-r name mode op ope reg attr comment) 4362 (dni name 4363 (comment) 4364 ((UNIT LOAD) (FR500-MAJOR I-2) attr) 4365 (.str name "$pack @($GRi,$GRj),$" reg "k") 4366 (+ pack (.sym reg k) op GRi ope GRj) 4367 (set (.sym reg k) 4368 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) 4369 () 4370 ) 4371) 4372 4373(load-cpr-r ldc SI OP_02 OPE1_0D CPR (MACH frv) "Load coprocessor word") 4374 4375; These correspond to enumerators in frv-sim.h 4376(define-pmacro (ne-UQI-size) 0) 4377(define-pmacro (ne-QI-size) 1) 4378(define-pmacro (ne-UHI-size) 2) 4379(define-pmacro (ne-HI-size) 3) 4380(define-pmacro (ne-SI-size) 4) 4381(define-pmacro (ne-DI-size) 5) 4382(define-pmacro (ne-XI-size) 6) 4383 4384(define-pmacro (ne-load-semantics base dispix targ idisp size is_float action) 4385 (sequence ((BI do_op)) 4386 (set do_op 4387 (c-call BI "@cpu@_check_non_excepting_load" 4388 (index-of base) dispix (index-of targ) 4389 idisp size is_float)) 4390 (if do_op action)) 4391) 4392 4393(define-pmacro (ne-load-gr-r name mode op ope size comment) 4394 (dni name 4395 (comment) 4396 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING 4397 (MACH simple,tomcat,fr500,fr550,frv)) 4398 (.str name "$pack @($GRi,$GRj),$GRk") 4399 (+ pack GRk op GRi ope GRj) 4400 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 4401 (set GRk 4402 (c-call mode (.str "@cpu@_read_mem_" mode) 4403 pc (add GRi GRj)))) 4404 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4405 ) 4406) 4407 4408(ne-load-gr-r nldsb QI OP_02 OPE1_20 (ne-QI-size) "Load signed byte") 4409(ne-load-gr-r nldub UQI OP_02 OPE1_21 (ne-UQI-size) "Load unsigned byte") 4410(ne-load-gr-r nldsh HI OP_02 OPE1_22 (ne-HI-size) "Load signed half") 4411(ne-load-gr-r nlduh UHI OP_02 OPE1_23 (ne-UHI-size) "Load unsigned half") 4412(ne-load-gr-r nld SI OP_02 OPE1_24 (ne-SI-size) "Load word") 4413 4414(define-pmacro (ne-load-fr-r name mode op ope size comment) 4415 (dni name 4416 (comment) 4417 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS 4418 (MACH simple,tomcat,fr500,fr550,frv)) 4419 (.str name "$pack @($GRi,$GRj),$FRintk") 4420 (+ pack FRintk op GRi ope GRj) 4421 (ne-load-semantics GRi (index-of GRj) FRintk 0 size 1 4422 (set FRintk 4423 (c-call mode (.str "@cpu@_read_mem_" mode) 4424 pc (add GRi GRj)))) 4425 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4426 ) 4427) 4428 4429(ne-load-fr-r nldbf UQI OP_02 OPE1_28 (ne-UQI-size) "Load byte float") 4430(ne-load-fr-r nldhf UHI OP_02 OPE1_29 (ne-UHI-size) "Load half float") 4431(ne-load-fr-r nldf SI OP_02 OPE1_2A (ne-SI-size) "Load word float") 4432 4433; Semantics for a load-double insn 4434; 4435(define-pmacro (load-double-semantics not_gr mode regtype address arg) 4436 (if (orif not_gr (ne (index-of (.sym regtype doublek)) 0)) 4437 (sequence () 4438 (set address (add GRi arg)) 4439 (set (.sym regtype doublek) 4440 (c-call mode (.str "@cpu@_read_mem_" mode) pc address)))) 4441) 4442 4443(define-pmacro (load-double-r-r 4444 name not_gr mode op ope regtype attr profile comment ann) 4445 (dni name 4446 (comment) 4447 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4448 (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) 4449 (.str name "$pack " ann "($GRi,$GRj),$" regtype "doublek") 4450 (+ pack (.sym regtype doublek) op GRi ope GRj) 4451 (sequence ((WI address)) 4452 (load-double-semantics not_gr mode regtype address GRj)) 4453 profile 4454 ) 4455) 4456 4457(dann lddann "ldd annotation" SI "ldd_annotation" "at") 4458 4459(load-double-r-r ldd 0 DI OP_02 OPE1_05 GR NA 4460 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4461 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4462 "Load double word" "$lddann") 4463(load-double-r-r lddf 1 DF OP_02 OPE1_0B FR FR-ACCESS 4464 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4465 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4466 "Load double float" "@") 4467(load-double-r-r lddc 1 DI OP_02 OPE1_0E CPR (MACH frv) () 4468 "Load coprocessor double" "@") 4469 4470(define-pmacro (ne-load-double-r-r 4471 name not_gr mode op ope regtype size is_float attr profile 4472 comment) 4473 (dni name 4474 (comment) 4475 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr 4476 (MACH simple,tomcat,fr500,fr550,frv)) 4477 (.str name "$pack @($GRi,$GRj),$" regtype "doublek") 4478 (+ pack (.sym regtype doublek) op GRi ope GRj) 4479 (sequence ((WI address)) 4480 (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 4481 0 size is_float 4482 (load-double-semantics not_gr mode 4483 regtype 4484 address GRj))) 4485 profile 4486 ) 4487) 4488 4489(ne-load-double-r-r nldd 0 DI OP_02 OPE1_25 GR (ne-DI-size) 0 NA 4490 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word") 4491(ne-load-double-r-r nlddf 1 DF OP_02 OPE1_2B FR (ne-DI-size) 1 FR-ACCESS 4492 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float") 4493 4494; Semantics for a load-quad insn 4495; 4496(define-pmacro (load-quad-semantics regtype address arg) 4497 (sequence () 4498 (set address (add GRi arg)) 4499 (c-call VOID (.str "@cpu@_load_quad_" regtype) 4500 pc address (index-of (.sym regtype k)))) 4501) 4502 4503(define-pmacro (load-quad-r-r name op ope regtype attr profile comment) 4504 (dni name 4505 (comment) 4506 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) 4507 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4508 (+ pack (.sym regtype k) op GRi ope GRj) 4509 (sequence ((WI address)) 4510 (load-quad-semantics regtype address GRj)) 4511 ; TODO regtype-k not referenced for profiling 4512 profile 4513 ) 4514) 4515 4516(load-quad-r-r ldq OP_02 OPE1_06 GR NA ((fr500 (unit u-gr-load))) 4517 "Load quad word") 4518(load-quad-r-r ldqf OP_02 OPE1_0C FRint FR-ACCESS ((fr500 (unit u-fr-load))) 4519 "Load quad float") 4520(load-quad-r-r ldqc OP_02 OPE1_0F CPR NA () "Load coprocessor quad") 4521 4522(define-pmacro (ne-load-quad-r-r 4523 name op ope regtype size is_float attr profile comment) 4524 (dni name 4525 (comment) 4526 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr) 4527 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4528 (+ pack (.sym regtype k) op GRi ope GRj) 4529 (sequence ((WI address)) 4530 (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 4531 0 size is_float 4532 (load-quad-semantics regtype address GRj))) 4533 ; TODO regtype-k not referenced for profiling 4534 profile 4535 ) 4536) 4537 4538(ne-load-quad-r-r nldq OP_02 OPE1_26 GR (ne-XI-size) 0 NA 4539 ((fr500 (unit u-gr-load))) "Load quad word") 4540(ne-load-quad-r-r nldqf OP_02 OPE1_2C FRint (ne-XI-size) 1 FR-ACCESS 4541 ((fr500 (unit u-fr-load))) "Load quad float") 4542 4543(define-pmacro (load-gr-u-semantics mode) 4544 (sequence ((UWI address)) 4545 (set address (add GRi GRj)) 4546 (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc address)) 4547 (if (ne (index-of GRi) (index-of GRk)) 4548 (sequence () 4549 (set GRi address) 4550 (c-call VOID "@cpu@_force_update")))) 4551) 4552 4553(define-pmacro (load-gr-u name mode op ope comment) 4554 (dni name 4555 (comment) 4556 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4557 (FR400-MAJOR I-2) (FR450-MAJOR I-2)) 4558 (.str name "$pack @($GRi,$GRj),$GRk") 4559 (+ pack GRk op GRi ope GRj) 4560 (load-gr-u-semantics mode) 4561 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4562 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4563 ) 4564) 4565 4566(load-gr-u ldsbu QI OP_02 OPE1_10 "Load signed byte, update index") 4567(load-gr-u ldubu UQI OP_02 OPE1_11 "Load unsigned byte, update index") 4568(load-gr-u ldshu HI OP_02 OPE1_12 "Load signed half, update index") 4569(load-gr-u lduhu UHI OP_02 OPE1_13 "Load unsigned half, update index") 4570(load-gr-u ldu SI OP_02 OPE1_14 "Load word, update index") 4571 4572(define-pmacro (ne-load-gr-u name mode op ope size comment) 4573 (dni name 4574 (comment) 4575 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING 4576 (MACH simple,tomcat,fr500,fr550,frv)) 4577 (.str name "$pack @($GRi,$GRj),$GRk") 4578 (+ pack GRk op GRi ope GRj) 4579 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 (load-gr-u-semantics mode)) 4580 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4581 ) 4582) 4583 4584(ne-load-gr-u nldsbu QI OP_02 OPE1_30 (ne-QI-size) "Load signed byte, update index") 4585(ne-load-gr-u nldubu UQI OP_02 OPE1_31 (ne-UQI-size) "Load unsigned byte, update index") 4586(ne-load-gr-u nldshu HI OP_02 OPE1_32 (ne-HI-size) "Load signed half, update index") 4587(ne-load-gr-u nlduhu UHI OP_02 OPE1_33 (ne-UHI-size) "Load unsigned half, update index") 4588(ne-load-gr-u nldu SI OP_02 OPE1_34 (ne-SI-size) "Load word, update index") 4589 4590(define-pmacro (load-non-gr-u-semantics mode regtype) 4591 (sequence ((UWI address)) 4592 (set address (add GRi GRj)) 4593 (set (.sym regtype k) 4594 (c-call mode (.str "@cpu@_read_mem_" mode) pc address)) 4595 (set GRi address) 4596 (c-call VOID "@cpu@_force_update")) 4597) 4598 4599(define-pmacro (load-fr-u name mode op ope comment) 4600 (dni name 4601 (comment) 4602 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4603 (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS) 4604 (.str name "$pack @($GRi,$GRj),$FRintk") 4605 (+ pack FRintk op GRi ope GRj) 4606 (load-non-gr-u-semantics mode FRint) 4607 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4608 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4609 ) 4610) 4611 4612(load-fr-u ldbfu UQI OP_02 OPE1_18 "Load byte float, update index") 4613(load-fr-u ldhfu UHI OP_02 OPE1_19 "Load half float, update index") 4614(load-fr-u ldfu SI OP_02 OPE1_1A "Load word float, update index") 4615 4616(define-pmacro (load-cpr-u name mode op ope comment) 4617 (dni name 4618 (comment) 4619 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv)) 4620 (.str name "$pack @($GRi,$GRj),$CPRk") 4621 (+ pack CPRk op GRi ope GRj) 4622 (load-non-gr-u-semantics mode CPR) 4623 () 4624 ) 4625) 4626 4627(load-cpr-u ldcu SI OP_02 OPE1_1D "Load coprocessor word float,update index") 4628 4629(define-pmacro (ne-load-non-gr-u name mode op ope regtype size comment) 4630 (dni name 4631 (comment) 4632 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS 4633 (MACH simple,tomcat,fr500,fr550,frv)) 4634 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4635 (+ pack (.sym regtype k) op GRi ope GRj) 4636 (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1 4637 (load-non-gr-u-semantics mode regtype)) 4638 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4639 ) 4640) 4641 4642(ne-load-non-gr-u nldbfu UQI OP_02 OPE1_38 FRint (ne-UQI-size) "Load byte float, update index") 4643(ne-load-non-gr-u nldhfu UHI OP_02 OPE1_39 FRint (ne-UHI-size) "Load half float, update index") 4644(ne-load-non-gr-u nldfu SI OP_02 OPE1_3A FRint (ne-SI-size) "Load word float, update index") 4645 4646(define-pmacro (load-double-gr-u-semantics) 4647 (sequence ((WI address)) 4648 (load-double-semantics 0 DI GR address GRj) 4649 (if (ne (index-of GRi) (index-of GRdoublek)) 4650 (sequence () 4651 (set GRi address) 4652 (c-call VOID "@cpu@_force_update")))) 4653) 4654 4655(define-pmacro (load-double-gr-u name op ope comment) 4656 (dni name 4657 (comment) 4658 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4659 (FR400-MAJOR I-2) (FR450-MAJOR I-2)) 4660 (.str name "$pack @($GRi,$GRj),$GRdoublek") 4661 (+ pack GRdoublek op GRi ope GRj) 4662 (load-double-gr-u-semantics) 4663 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4664 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4665 ) 4666) 4667 4668(load-double-gr-u lddu OP_02 OPE1_15 "Load double word, update index") 4669 4670(define-pmacro (ne-load-double-gr-u name op ope size comment) 4671 (dni name 4672 (comment) 4673 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING 4674 (MACH simple,tomcat,fr500,fr550,frv)) 4675 (.str name "$pack @($GRi,$GRj),$GRdoublek") 4676 (+ pack GRdoublek op GRi ope GRj) 4677 (ne-load-semantics GRi (index-of GRj) GRdoublek 0 size 0 4678 (load-double-gr-u-semantics)) 4679 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4680 4681 ) 4682) 4683 4684(ne-load-double-gr-u nlddu OP_02 OPE1_35 (ne-DI-size) "Load double word, update index") 4685 4686(define-pmacro (load-double-non-gr-u-semantics mode regtype) 4687 (sequence ((WI address)) 4688 (load-double-semantics 1 mode regtype address GRj) 4689 (set GRi address) 4690 (c-call VOID "@cpu@_force_update")) 4691) 4692 4693(define-pmacro (load-double-non-gr-u 4694 name mode op ope regtype attr profile comment) 4695 (dni name 4696 (comment) 4697 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4698 (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) 4699 (.str name "$pack @($GRi,$GRj),$" regtype "doublek") 4700 (+ pack (.sym regtype doublek) op GRi ope GRj) 4701 (load-double-non-gr-u-semantics mode regtype) 4702 profile 4703 ) 4704) 4705 4706(load-double-non-gr-u lddfu DF OP_02 OPE1_1B FR FR-ACCESS 4707 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4708 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4709 "Load double float, update index") 4710(load-double-non-gr-u lddcu DI OP_02 OPE1_1E CPR (MACH frv) 4711 () "Load coprocessor double float, update index") 4712 4713(define-pmacro (ne-load-double-non-gr-u name mode op ope regtype size comment) 4714 (dni name 4715 (comment) 4716 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS 4717 (MACH simple,tomcat,fr500,fr550,frv)) 4718 (.str name "$pack @($GRi,$GRj),$" regtype "doublek") 4719 (+ pack (.sym regtype doublek) op GRi ope GRj) 4720 (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 0 size 1 4721 (load-double-non-gr-u-semantics mode regtype)) 4722 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4723 ) 4724) 4725 4726(ne-load-double-non-gr-u nlddfu DF OP_02 OPE1_3B FR (ne-DI-size) "Load double float, update index") 4727 4728(define-pmacro (load-quad-gr-u-semantics) 4729 (sequence ((WI address)) 4730 (load-quad-semantics GR address GRj) 4731 (if (ne (index-of GRi) (index-of GRk)) 4732 (sequence () 4733 (set GRi address) 4734 (c-call VOID "@cpu@_force_update")))) 4735) 4736 4737(define-pmacro (load-quad-gr-u name op ope comment) 4738 (dni name 4739 (comment) 4740 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv)) 4741 (.str name "$pack @($GRi,$GRj),$GRk") 4742 (+ pack GRk op GRi ope GRj) 4743 (load-quad-gr-u-semantics) 4744 ; TODO - GRk not referenced here for profiling 4745 ((fr500 (unit u-gr-load))) 4746 ) 4747) 4748 4749(load-quad-gr-u ldqu OP_02 OPE1_16 "Load quad word, update index") 4750 4751(define-pmacro (ne-load-quad-gr-u name op ope size comment) 4752 (dni name 4753 (comment) 4754 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING) 4755 (.str name "$pack @($GRi,$GRj),$GRk") 4756 (+ pack GRk op GRi ope GRj) 4757 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 4758 (load-quad-gr-u-semantics)) 4759 ; TODO - GRk not referenced here for profiling 4760 ((fr500 (unit u-gr-load))) 4761 ) 4762) 4763 4764(ne-load-quad-gr-u nldqu OP_02 OPE1_36 (ne-XI-size) "Load quad word, update index") 4765 4766(define-pmacro (load-quad-non-gr-u-semantics regtype) 4767 (sequence ((WI address)) 4768 (load-quad-semantics regtype address GRj) 4769 (set GRi address) 4770 (c-call VOID "@cpu@_force_update")) 4771) 4772 4773(define-pmacro (load-quad-non-gr-u name op ope regtype attr profile comment) 4774 (dni name 4775 (comment) 4776 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) 4777 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4778 (+ pack (.sym regtype k) op GRi ope GRj) 4779 (load-quad-non-gr-u-semantics regtype) 4780 profile 4781 ) 4782) 4783 4784(load-quad-non-gr-u ldqfu OP_02 OPE1_1C FRint FR-ACCESS 4785 ((fr500 (unit u-fr-load))) "Load quad float, update index") 4786(load-quad-non-gr-u ldqcu OP_02 OPE1_1F CPR NA 4787 () "Load coprocessor quad word, update index") 4788 4789(define-pmacro (ne-load-quad-non-gr-u name op ope regtype size comment) 4790 (dni name 4791 (comment) 4792 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING FR-ACCESS) 4793 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4794 (+ pack (.sym regtype k) op GRi ope GRj) 4795 (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1 4796 (load-quad-non-gr-u-semantics regtype)) 4797 ((fr500 (unit u-fr-load))) 4798 ) 4799) 4800 4801(ne-load-quad-non-gr-u nldqfu OP_02 OPE1_3C FRint (ne-XI-size) "Load quad float,update index") 4802 4803(define-pmacro (load-r-simm name mode op regtype attr profile comment) 4804 (dni name 4805 (comment) 4806 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4807 (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) 4808 (.str name "$pack @($GRi,$d12),$" regtype "k") 4809 (+ pack (.sym regtype k) op GRi d12) 4810 (set (.sym regtype k) 4811 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi d12))) 4812 profile 4813 ) 4814) 4815 4816(load-r-simm ldsbi QI OP_30 GR NA 4817 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4818 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4819 "Load signed byte") 4820(load-r-simm ldshi HI OP_31 GR NA 4821 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4822 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4823 "Load signed half") 4824(load-r-simm ldi SI OP_32 GR NA 4825 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4826 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4827 "Load word") 4828(load-r-simm ldubi UQI OP_35 GR NA 4829 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4830 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4831 "Load unsigned byte") 4832(load-r-simm lduhi UHI OP_36 GR NA 4833 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4834 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4835 "Load unsigned half") 4836 4837(load-r-simm ldbfi UQI OP_38 FRint FR-ACCESS 4838 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4839 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4840 "Load byte float") 4841(load-r-simm ldhfi UHI OP_39 FRint FR-ACCESS 4842 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4843 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4844 "Load half float") 4845(load-r-simm ldfi SI OP_3A FRint FR-ACCESS 4846 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4847 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4848 "Load word float") 4849 4850(define-pmacro (ne-load-r-simm 4851 name mode op regtype size is_float attr profile comment) 4852 (dni name 4853 (comment) 4854 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr 4855 (MACH simple,tomcat,fr500,fr550,frv)) 4856 (.str name "$pack @($GRi,$d12),$" regtype "k") 4857 (+ pack (.sym regtype k) op GRi d12) 4858 (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float 4859 (set (.sym regtype k) 4860 (c-call mode (.str "@cpu@_read_mem_" mode) 4861 pc (add GRi d12)))) 4862 profile 4863 ) 4864) 4865 4866(ne-load-r-simm nldsbi QI OP_40 GR (ne-QI-size) 0 NA 4867 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed byte") 4868(ne-load-r-simm nldubi UQI OP_41 GR (ne-UQI-size) 0 NA 4869 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned byte") 4870(ne-load-r-simm nldshi HI OP_42 GR (ne-HI-size) 0 NA 4871 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed half") 4872(ne-load-r-simm nlduhi UHI OP_43 GR (ne-UHI-size) 0 NA 4873 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned half") 4874(ne-load-r-simm nldi SI OP_44 GR (ne-SI-size) 0 NA 4875 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load word") 4876 4877(ne-load-r-simm nldbfi UQI OP_48 FRint (ne-UQI-size) 1 FR-ACCESS 4878 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load byte float") 4879(ne-load-r-simm nldhfi UHI OP_49 FRint (ne-UHI-size) 1 FR-ACCESS 4880 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load half float") 4881(ne-load-r-simm nldfi SI OP_4A FRint (ne-SI-size) 1 FR-ACCESS 4882 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load word float") 4883 4884(define-pmacro (load-double-r-simm 4885 name not_gr mode op regtype attr profile comment) 4886 (dni name 4887 (comment) 4888 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4889 (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) 4890 (.str name "$pack @($GRi,$d12),$" regtype "doublek") 4891 (+ pack (.sym regtype doublek) op GRi d12) 4892 (sequence ((WI address)) 4893 (load-double-semantics not_gr mode regtype address d12)) 4894 profile 4895 ) 4896) 4897 4898(load-double-r-simm lddi 0 DI OP_33 GR NA 4899 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4900 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4901 "Load double word") 4902(load-double-r-simm lddfi 1 DF OP_3B FR FR-ACCESS 4903 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4904 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4905 "Load double float") 4906 4907(define-pmacro (ne-load-double-r-simm 4908 name not_gr mode op regtype size is_float attr profile comment) 4909 (dni name 4910 (comment) 4911 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr 4912 (MACH simple,tomcat,fr500,fr550,frv)) 4913 (.str name "$pack @($GRi,$d12),$" regtype "doublek") 4914 (+ pack (.sym regtype doublek) op GRi d12) 4915 (sequence ((WI address)) 4916 (ne-load-semantics GRi -1 (.sym regtype doublek) 4917 d12 size is_float 4918 (load-double-semantics not_gr mode 4919 regtype 4920 address d12))) 4921 profile 4922 ) 4923) 4924 4925(ne-load-double-r-simm nlddi 0 DI OP_45 GR (ne-DI-size) 0 NA 4926 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word") 4927(ne-load-double-r-simm nlddfi 1 DF OP_4B FR (ne-DI-size) 1 FR-ACCESS 4928 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float") 4929 4930(define-pmacro (load-quad-r-simm name op regtype attr profile comment) 4931 (dni name 4932 (comment) 4933 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) 4934 (.str name "$pack @($GRi,$d12),$" regtype "k") 4935 (+ pack (.sym regtype k) op GRi d12) 4936 (sequence ((WI address)) 4937 (load-quad-semantics regtype address d12)) 4938 profile 4939 ) 4940) 4941 4942(load-quad-r-simm ldqi OP_34 GR NA 4943 ((fr500 (unit u-gr-load))) "Load quad word") 4944(load-quad-r-simm ldqfi OP_3C FRint FR-ACCESS 4945 ((fr500 (unit u-fr-load))) "Load quad float") 4946 4947(define-pmacro (ne-load-quad-r-simm 4948 name op regtype size is_float attr profile comment) 4949 (dni name 4950 (comment) 4951 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr) 4952 (.str name "$pack @($GRi,$d12),$" regtype "k") 4953 (+ pack (.sym regtype k) op GRi d12) 4954 (sequence ((WI address)) 4955 (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float 4956 (load-quad-semantics regtype address d12))) 4957 profile 4958 ) 4959) 4960 4961(ne-load-quad-r-simm nldqfi OP_4C FRint (ne-XI-size) 1 FR-ACCESS 4962 ((fr500 (unit u-fr-load))) "Load quad float") 4963 4964(define-pmacro (store-r-r name mode op ope reg attr profile comment) 4965 (dni name 4966 (comment) 4967 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 4968 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 4969 (.str name "$pack $" reg "k,@($GRi,$GRj)") 4970 (+ pack (.sym reg k) op GRi ope GRj) 4971 (c-call VOID (.str "@cpu@_write_mem_" mode) 4972 pc (add GRi GRj) (.sym reg k)) 4973 profile 4974 ) 4975) 4976 4977(store-r-r stb QI OP_03 OPE1_00 GR NA 4978 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 4979 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 4980 "Store unsigned byte") 4981(store-r-r sth HI OP_03 OPE1_01 GR NA 4982 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 4983 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 4984 "Store unsigned half") 4985(store-r-r st SI OP_03 OPE1_02 GR NA 4986 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 4987 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 4988 "Store word") 4989 4990(store-r-r stbf QI OP_03 OPE1_08 FRint FR-ACCESS 4991 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 4992 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 4993 "Store byte float") 4994(store-r-r sthf HI OP_03 OPE1_09 FRint FR-ACCESS 4995 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 4996 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 4997 "Store half float") 4998(store-r-r stf SI OP_03 OPE1_0A FRint FR-ACCESS 4999 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5000 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5001 "Store word float") 5002 5003(store-r-r stc SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word") 5004 5005; Semantics for a store-double insn 5006; 5007(define-pmacro (store-double-semantics mode regtype address arg) 5008 (sequence () 5009 (set address (add GRi arg)) 5010 (c-call VOID (.str "@cpu@_write_mem_" mode) 5011 pc address (.sym regtype doublek))) 5012) 5013 5014(define-pmacro (store-double-r-r name mode op ope regtype attr profile comment) 5015 (dni name 5016 (comment) 5017 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5018 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5019 (.str name "$pack $" regtype "doublek,@($GRi,$GRj)") 5020 (+ pack (.sym regtype doublek) op GRi ope GRj) 5021 (sequence ((WI address)) 5022 (store-double-semantics mode regtype address GRj)) 5023 profile 5024 ) 5025) 5026 5027(store-double-r-r std DI OP_03 OPE1_03 GR NA 5028 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5029 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5030 "Store double word") 5031(store-double-r-r stdf DF OP_03 OPE1_0B FR FR-ACCESS 5032 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5033 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5034 "Store double float") 5035 5036(store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv) 5037 () "Store coprocessor double word") 5038 5039; Semantics for a store-quad insn 5040; 5041(define-pmacro (store-quad-semantics regtype address arg) 5042 (sequence () 5043 (set address (add GRi arg)) 5044 (c-call VOID (.str "@cpu@_store_quad_" regtype) 5045 pc address (index-of (.sym regtype k)))) 5046) 5047 5048(define-pmacro (store-quad-r-r name op ope regtype attr profile comment) 5049 (dni name 5050 (comment) 5051 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) 5052 (.str name "$pack $" regtype "k,@($GRi,$GRj)") 5053 (+ pack (.sym regtype k) op GRi ope GRj) 5054 (sequence ((WI address)) 5055 (store-quad-semantics regtype address GRj)) 5056 profile 5057 ) 5058) 5059 5060(store-quad-r-r stq OP_03 OPE1_04 GR NA 5061 ((fr500 (unit u-gr-store))) "Store quad word") 5062(store-quad-r-r stqf OP_03 OPE1_0C FRint FR-ACCESS 5063 ((fr500 (unit u-fr-store))) 5064 "Store quad float") 5065(store-quad-r-r stqc OP_03 OPE1_27 CPR NA 5066 () "Store coprocessor quad word") 5067 5068(define-pmacro (store-r-r-u name mode op ope regtype attr profile comment) 5069 (dni name 5070 (comment) 5071 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5072 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5073 (.str name "$pack $" regtype "k,@($GRi,$GRj)") 5074 (+ pack (.sym regtype k) op GRi ope GRj) 5075 (sequence ((UWI address)) 5076 (set address (add GRi GRj)) 5077 (c-call VOID (.str "@cpu@_write_mem_" mode) 5078 pc address (.sym regtype k)) 5079 (set GRi address)) 5080 profile 5081 ) 5082) 5083 5084(store-r-r-u stbu QI OP_03 OPE1_10 GR NA 5085 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5086 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5087 "Store unsigned byte, update index") 5088(store-r-r-u sthu HI OP_03 OPE1_11 GR NA 5089 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5090 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5091 "Store unsigned half, update index") 5092(store-r-r-u stu WI OP_03 OPE1_12 GR NA 5093 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5094 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5095 "Store word, update index") 5096 5097(store-r-r-u stbfu QI OP_03 OPE1_18 FRint FR-ACCESS 5098 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5099 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5100 "Store byte float, update index") 5101(store-r-r-u sthfu HI OP_03 OPE1_19 FRint FR-ACCESS 5102 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5103 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5104 "Store half float, update index") 5105(store-r-r-u stfu SI OP_03 OPE1_1A FRint FR-ACCESS 5106 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5107 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5108 "Store word float, update index") 5109 5110(store-r-r-u stcu SI OP_03 OPE1_2D CPR (MACH frv) () 5111 "Store coprocessor word, update index") 5112 5113(define-pmacro (store-double-r-r-u 5114 name mode op ope regtype attr profile comment) 5115 (dni name 5116 (comment) 5117 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5118 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5119 (.str name "$pack $" regtype "doublek,@($GRi,$GRj)") 5120 (+ pack (.sym regtype doublek) op GRi ope GRj) 5121 (sequence ((WI address)) 5122 (store-double-semantics mode regtype address GRj) 5123 (set GRi address)) 5124 profile 5125 ) 5126) 5127 5128(store-double-r-r-u stdu DI OP_03 OPE1_13 GR NA 5129 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5130 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5131 "Store double word, update index") 5132(store-double-r-r-u stdfu DF OP_03 OPE1_1B FR FR-ACCESS 5133 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5134 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5135 "Store double float,update index") 5136(store-double-r-r-u stdcu DI OP_03 OPE1_2E CPR (MACH frv) () 5137 "Store coprocessor double word, update index") 5138 5139(define-pmacro (store-quad-r-r-u name op ope regtype attr profile comment) 5140 (dni name 5141 (comment) 5142 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) 5143 (.str name "$pack $" regtype "k,@($GRi,$GRj)") 5144 (+ pack (.sym regtype k) op GRi ope GRj) 5145 (sequence ((WI address)) 5146 (store-quad-semantics regtype address GRj) 5147 (set GRi address)) 5148 profile 5149 ) 5150) 5151 5152(store-quad-r-r-u stqu OP_03 OPE1_14 GR NA 5153 ((fr500 (unit u-gr-store))) 5154 "Store quad word, update index") 5155(store-quad-r-r-u stqfu OP_03 OPE1_1C FRint FR-ACCESS 5156 ((fr500 (unit u-fr-store))) 5157 "Store quad float, update index") 5158(store-quad-r-r-u stqcu OP_03 OPE1_2F CPR NA () 5159 "Store coprocessor quad word, update index") 5160 5161(define-pmacro (conditional-load name mode op ope regtype profile comment) 5162 (dni name 5163 (comment) 5164 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5165 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) 5166 (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond") 5167 (+ pack (.sym regtype k) op GRi CCi cond ope GRj) 5168 (if (eq CCi (or cond 2)) 5169 (set (.sym regtype k) 5170 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))) 5171 profile 5172 ) 5173) 5174 5175(conditional-load cldsb QI OP_5E OPE4_0 GR 5176 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5177 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5178 "Load signed byte") 5179(conditional-load cldub UQI OP_5E OPE4_1 GR 5180 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5181 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5182 "Load unsigned byte") 5183(conditional-load cldsh HI OP_5E OPE4_2 GR 5184 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5185 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5186 "Load signed half") 5187(conditional-load clduh UHI OP_5E OPE4_3 GR 5188 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5189 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5190 "Load unsigned half") 5191(conditional-load cld SI OP_5F OPE4_0 GR 5192 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5193 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5194 "Load word") 5195 5196(conditional-load cldbf UQI OP_60 OPE4_0 FRint 5197 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5198 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5199 "Load byte float") 5200(conditional-load cldhf UHI OP_60 OPE4_1 FRint 5201 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5202 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5203 "Load half float") 5204(conditional-load cldf SI OP_60 OPE4_2 FRint 5205 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5206 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5207 "Load word float") 5208 5209(define-pmacro (conditional-load-double 5210 name not_gr mode op ope regtype attr profile comment) 5211 (dni name 5212 (comment) 5213 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5214 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL attr) 5215 (.str name "$pack @($GRi,$GRj),$" regtype "doublek,$CCi,$cond") 5216 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) 5217 (if (eq CCi (or cond 2)) 5218 (sequence ((WI address)) 5219 (load-double-semantics not_gr mode regtype address GRj))) 5220 profile 5221 ) 5222) 5223 5224(conditional-load-double cldd 0 DI OP_5F OPE4_1 GR NA 5225 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5226 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5227 "Load double word") 5228(conditional-load-double clddf 1 DF OP_60 OPE4_3 FR FR-ACCESS 5229 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5230 (fr500 (unit u-gr-load)) (fr550 (unit u-fr-load))) 5231 "Load double float") 5232 5233(dni cldq 5234 "conditional load quad integer" 5235 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL) 5236 "cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond" 5237 (+ pack GRk OP_5F GRi CCi cond OPE4_2 GRj) 5238 (if (eq CCi (or cond 2)) 5239 (sequence ((WI address)) 5240 (load-quad-semantics GR address GRj))) 5241 ((fr500 (unit u-gr-load))) 5242) 5243 5244(define-pmacro (conditional-load-gr-u name mode op ope comment) 5245 (dni name 5246 (comment) 5247 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5248 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) 5249 (.str name "$pack @($GRi,$GRj),$GRk,$CCi,$cond") 5250 (+ pack GRk op GRi CCi cond ope GRj) 5251 (if (eq CCi (or cond 2)) 5252 (sequence ((WI address)) 5253 (set address (add GRi GRj)) 5254 (set GRk 5255 (c-call mode (.str "@cpu@_read_mem_" mode) 5256 pc address)) 5257 (if (ne (index-of GRi) (index-of GRk)) 5258 (set GRi address)))) 5259 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5260 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5261 ) 5262) 5263 5264(conditional-load-gr-u cldsbu QI OP_61 OPE4_0 "Load signed byte, update") 5265(conditional-load-gr-u cldubu UQI OP_61 OPE4_1 "Load unsigned byte, update") 5266(conditional-load-gr-u cldshu HI OP_61 OPE4_2 "Load signed half, update") 5267(conditional-load-gr-u clduhu UHI OP_61 OPE4_3 "Load unsigned half, update") 5268(conditional-load-gr-u cldu SI OP_62 OPE4_0 "Load word, update") 5269 5270(define-pmacro (conditional-load-non-gr-u name mode op ope regtype comment) 5271 (dni name 5272 (comment) 5273 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5274 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS) 5275 (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond") 5276 (+ pack (.sym regtype k) op GRi CCi cond ope GRj) 5277 (if (eq CCi (or cond 2)) 5278 (sequence ((WI address)) 5279 (set address (add GRi GRj)) 5280 (set (.sym regtype k) 5281 (c-call mode (.str "@cpu@_read_mem_" mode) 5282 pc address)) 5283 (set GRi address))) 5284 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5285 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5286 ) 5287) 5288 5289(conditional-load-non-gr-u cldbfu UQI OP_63 OPE4_0 FRint "Load byte float, update") 5290(conditional-load-non-gr-u cldhfu UHI OP_63 OPE4_1 FRint "Load half float, update") 5291(conditional-load-non-gr-u cldfu SI OP_63 OPE4_2 FRint "Load word float, update") 5292 5293 5294(dni clddu 5295 "Load double word, update" 5296 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5297 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) 5298 "clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond" 5299 (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj) 5300 (if (eq CCi (or cond 2)) 5301 (sequence ((WI address)) 5302 (load-double-semantics 0 DI GR address GRj) 5303 (if (ne (index-of GRi) (index-of GRdoublek)) 5304 (set GRi address)))) 5305 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5306 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5307) 5308 5309(dni clddfu 5310 "Load double float, update" 5311 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5312 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS) 5313 "clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond" 5314 (+ pack FRdoublek OP_63 GRi CCi cond OPE4_3 GRj) 5315 (if (eq CCi (or cond 2)) 5316 (sequence ((WI address)) 5317 (load-double-semantics 1 DF FR address GRj) 5318 (set GRi address))) 5319 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5320 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5321) 5322 5323(dni cldqu 5324 "conditional load quad integer and update index" 5325 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL) 5326 "cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond" 5327 (+ pack GRk OP_62 GRi CCi cond OPE4_2 GRj) 5328 (if (eq CCi (or cond 2)) 5329 (sequence ((WI address)) 5330 (load-quad-semantics GR address GRj) 5331 (if (ne (index-of GRi) (index-of GRk)) 5332 (set GRi address)))) 5333 ((fr500 (unit u-gr-load))) 5334) 5335 5336(define-pmacro (conditional-store name mode op ope regtype profile comment) 5337 (dni name 5338 (comment) 5339 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5340 (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL) 5341 (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") 5342 (+ pack (.sym regtype k) op GRi CCi cond ope GRj) 5343 (if (eq CCi (or cond 2)) 5344 (c-call VOID (.str "@cpu@_write_mem_" mode) 5345 pc (add GRi GRj) (.sym regtype k))) 5346 profile 5347 ) 5348) 5349 5350(conditional-store cstb QI OP_64 OPE4_0 GR 5351 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5352 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5353 "Store unsigned byte") 5354(conditional-store csth HI OP_64 OPE4_1 GR 5355 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5356 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5357 "Store unsigned half") 5358(conditional-store cst SI OP_64 OPE4_2 GR 5359 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5360 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5361 "Store word") 5362 5363(conditional-store cstbf QI OP_66 OPE4_0 FRint 5364 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5365 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5366 "Store byte float") 5367(conditional-store csthf HI OP_66 OPE4_1 FRint 5368 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5369 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5370 "Store half float") 5371(conditional-store cstf SI OP_66 OPE4_2 FRint 5372 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5373 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5374 "Store word float") 5375 5376(define-pmacro (conditional-store-double 5377 name mode op ope regtype attr profile comment) 5378 (dni name 5379 (comment) 5380 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5381 (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) 5382 (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond") 5383 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) 5384 (if (eq CCi (or cond 2)) 5385 (sequence ((WI address)) 5386 (store-double-semantics mode regtype address GRj))) 5387 profile 5388 ) 5389) 5390 5391(conditional-store-double cstd DI OP_64 OPE4_3 GR NA 5392 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5393 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5394 "Store double word") 5395(conditional-store-double cstdf DF OP_66 OPE4_3 FR FR-ACCESS 5396 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5397 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5398 "Store double float") 5399 5400(dni cstq 5401 "conditionally store quad word" 5402 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) CONDITIONAL) 5403 "cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond" 5404 (+ pack GRk OP_65 GRi CCi cond OPE4_0 GRj) 5405 (if (eq CCi (or cond 2)) 5406 (sequence ((WI address)) 5407 (store-quad-semantics GR address GRj))) 5408 ((fr500 (unit u-gr-store))) 5409) 5410 5411(define-pmacro (conditional-store-u 5412 name mode op ope regtype attr profile comment) 5413 (dni name 5414 (comment) 5415 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5416 (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) 5417 (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") 5418 (+ pack (.sym regtype k) op GRi CCi cond ope GRj) 5419 (if (eq CCi (or cond 2)) 5420 (sequence ((WI address)) 5421 (set address (add GRi GRj)) 5422 (c-call VOID (.str "@cpu@_write_mem_" mode) 5423 pc address (.sym regtype k)) 5424 (set GRi address))) 5425 profile 5426 ) 5427) 5428 5429(conditional-store-u cstbu QI OP_67 OPE4_0 GR NA 5430 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5431 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5432 "Store unsigned byte, update index") 5433(conditional-store-u csthu HI OP_67 OPE4_1 GR NA 5434 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5435 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5436 "Store unsigned half, update index") 5437(conditional-store-u cstu SI OP_67 OPE4_2 GR NA 5438 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5439 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5440 "Store word, update index") 5441 5442(conditional-store-u cstbfu QI OP_68 OPE4_0 FRint FR-ACCESS 5443 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5444 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5445 "Store byte float, update index") 5446(conditional-store-u csthfu HI OP_68 OPE4_1 FRint FR-ACCESS 5447 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5448 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5449 "Store half float, update index") 5450(conditional-store-u cstfu SI OP_68 OPE4_2 FRint FR-ACCESS 5451 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5452 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5453 "Store word float, update index") 5454 5455(define-pmacro (conditional-store-double-u 5456 name mode op ope regtype attr profile comment) 5457 (dni name 5458 (comment) 5459 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5460 (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) 5461 (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond") 5462 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) 5463 (if (eq CCi (or cond 2)) 5464 (sequence ((WI address)) 5465 (store-double-semantics mode regtype address GRj) 5466 (set GRi address))) 5467 profile 5468 ) 5469) 5470 5471(conditional-store-double-u cstdu DI OP_67 OPE4_3 GR NA 5472 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5473 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5474 "Store double word, update index") 5475(conditional-store-double-u cstdfu DF OP_68 OPE4_3 FR FR-ACCESS 5476 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5477 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5478 "Store double float, update index") 5479 5480(define-pmacro (store-r-simm name mode op regtype attr profile comment) 5481 (dni name 5482 (comment) 5483 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5484 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5485 (.str name "$pack $" regtype "k,@($GRi,$d12)") 5486 (+ pack (.sym regtype k) op GRi d12) 5487 (c-call VOID (.str "@cpu@_write_mem_" mode) 5488 pc (add GRi d12) (.sym regtype k)) 5489 profile 5490 ) 5491) 5492 5493(store-r-simm stbi QI OP_50 GR NA 5494 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5495 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5496 "Store unsigned byte") 5497(store-r-simm sthi HI OP_51 GR NA 5498 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5499 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5500 "Store unsigned half") 5501(store-r-simm sti SI OP_52 GR NA 5502 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5503 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5504 "Store word") 5505 5506(store-r-simm stbfi QI OP_4E FRint FR-ACCESS 5507 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5508 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5509 "Store byte float") 5510(store-r-simm sthfi HI OP_4F FRint FR-ACCESS 5511 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5512 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5513 "Store half float") 5514(store-r-simm stfi SI OP_55 FRint FR-ACCESS 5515 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5516 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5517 "Store word float") 5518 5519(define-pmacro (store-double-r-simm name mode op regtype attr profile comment) 5520 (dni name 5521 (comment) 5522 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5523 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5524 (.str name "$pack $" regtype "doublek,@($GRi,$d12)") 5525 (+ pack (.sym regtype doublek) op GRi d12) 5526 (sequence ((WI address)) 5527 (store-double-semantics mode regtype address d12)) 5528 profile 5529 ) 5530) 5531 5532(store-double-r-simm stdi DI OP_53 GR NA 5533 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5534 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5535 "Store double word") 5536(store-double-r-simm stdfi DF OP_56 FR FR-ACCESS 5537 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5538 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5539 "Store double float") 5540 5541(define-pmacro (store-quad-r-simm name op regtype attr profile comment) 5542 (dni name 5543 (comment) 5544 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) 5545 (.str name "$pack $" regtype "k,@($GRi,$d12)") 5546 (+ pack (.sym regtype k) op GRi d12) 5547 (sequence ((WI address)) 5548 (store-quad-semantics regtype address d12)) 5549 profile 5550 ) 5551) 5552 5553(store-quad-r-simm stqi OP_54 GR NA ((fr500 (unit u-gr-store))) 5554 "Store quad word") 5555(store-quad-r-simm stqfi OP_57 FRint FR-ACCESS () 5556 "Store quad float") 5557 5558(define-pmacro (swap-semantics base offset arg) 5559 (sequence ((WI tmp) (WI address)) 5560 (set tmp arg) 5561 (set address (add base offset)) 5562 (c-call VOID "@cpu@_check_swap_address" address) 5563 (set arg (c-call WI "@cpu@_read_mem_WI" pc address)) 5564 (c-call VOID "@cpu@_write_mem_WI" pc address tmp)) 5565) 5566 5567(dni swap 5568 "Swap contents of memory with GR" 5569 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 5570 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 5571 "swap$pack @($GRi,$GRj),$GRk" 5572 (+ pack GRk OP_03 GRi OPE1_05 GRj) 5573 (swap-semantics GRi GRj GRk) 5574 ((fr400 (unit u-swap)) (fr450 (unit u-swap)) 5575 (fr500 (unit u-swap)) (fr550 (unit u-swap))) 5576) 5577 5578(dni "swapi" 5579 "Swap contents of memory with GR" 5580 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 5581 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 5582 ("swapi$pack @($GRi,$d12),$GRk") 5583 (+ pack GRk OP_4D GRi d12) 5584 (swap-semantics GRi d12 GRk) 5585 ((fr400 (unit u-swap)) (fr450 (unit u-swap)) 5586 (fr500 (unit u-swap)) (fr550 (unit u-swap))) 5587) 5588 5589(dni cswap 5590 "Conditionally swap contents of memory with GR" 5591 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 5592 (FR400-MAJOR C-2) (FR450-MAJOR C-2) CONDITIONAL) 5593 "cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond" 5594 (+ pack GRk OP_65 GRi CCi cond OPE4_2 GRj) 5595 (if (eq CCi (or cond 2)) 5596 (swap-semantics GRi GRj GRk)) 5597 ((fr400 (unit u-swap)) (fr450 (unit u-swap)) 5598 (fr500 (unit u-swap)) (fr550 (unit u-swap))) 5599) 5600 5601(define-pmacro (register-transfer 5602 name op ope reg_src reg_targ pipe attrs profile comment) 5603 (dni name 5604 (comment) 5605 (.splice (UNIT pipe) (.unsplice attrs)) 5606 (.str name "$pack $" reg_src ",$" reg_targ) 5607 (+ pack reg_targ op (rs-null) ope reg_src) 5608 (set reg_targ reg_src) 5609 profile 5610 ) 5611) 5612 5613(register-transfer movgf OP_03 OPE1_15 5614 GRj FRintk I0 5615 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) 5616 (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) 5617 ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) 5618 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) 5619 "transfer gr to fr") 5620(register-transfer movfg OP_03 OPE1_0D 5621 FRintk GRj I0 5622 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) 5623 (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) 5624 ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) 5625 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) 5626 "transfer fr to gr") 5627 5628(define-pmacro (nextreg hw r offset) (reg hw (add (index-of r) offset))) 5629 5630(define-pmacro (register-transfer-double-from-gr-semantics cond) 5631 (if cond 5632 (if (eq (index-of GRj) 0) 5633 (sequence () 5634 (set FRintk 0) 5635 (set (nextreg h-fr_int FRintk 1) 0)) 5636 (sequence () 5637 (set FRintk GRj) 5638 (set (nextreg h-fr_int FRintk 1) (nextreg h-gr GRj 1))))) 5639) 5640 5641(dni movgfd 5642 "move GR for FR double" 5643 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) 5644 (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) 5645 "movgfd$pack $GRj,$FRintk" 5646 (+ pack FRintk OP_03 (rs-null) OPE1_16 GRj) 5647 (register-transfer-double-from-gr-semantics 1) 5648 ; TODO -- doesn't handle second register in the pair 5649 ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) 5650 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) 5651) 5652 5653(define-pmacro (register-transfer-double-to-gr-semantics cond) 5654 (if (andif (ne (index-of GRj) 0) cond) 5655 (sequence () 5656 (set GRj FRintk) 5657 (set (nextreg h-gr GRj 1) (nextreg h-fr_int FRintk 1)))) 5658) 5659 5660(dni movfgd 5661 "move FR for GR double" 5662 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) 5663 (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) 5664 "movfgd$pack $FRintk,$GRj" 5665 (+ pack FRintk OP_03 (rs-null) OPE1_0E GRj) 5666 (register-transfer-double-to-gr-semantics 1) 5667 ; TODO -- doesn't handle second register in the pair 5668 ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) 5669 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) 5670) 5671 5672(dni movgfq 5673 "move GR for FR quad" 5674 ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS) 5675 "movgfq$pack $GRj,$FRintk" 5676 (+ pack FRintk OP_03 (rs-null) OPE1_17 GRj) 5677 (if (eq (index-of GRj) 0) 5678 (sequence () 5679 (set FRintk 0) 5680 (set (reg h-fr_int (add (index-of FRintk) 1)) 0) 5681 (set (reg h-fr_int (add (index-of FRintk) 2)) 0) 5682 (set (reg h-fr_int (add (index-of FRintk) 3)) 0)) 5683 (sequence () 5684 (set FRintk GRj) 5685 (set (reg h-fr_int (add (index-of FRintk) 1)) 5686 (reg h-gr (add (index-of GRj) 1))) 5687 (set (reg h-fr_int (add (index-of FRintk) 2)) 5688 (reg h-gr (add (index-of GRj) 2))) 5689 (set (reg h-fr_int (add (index-of FRintk) 3)) 5690 (reg h-gr (add (index-of GRj) 3))))) 5691 () 5692) 5693 5694(dni movfgq 5695 "move FR for GR quad" 5696 ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS) 5697 "movfgq$pack $FRintk,$GRj" 5698 (+ pack FRintk OP_03 (rs-null) OPE1_0F GRj) 5699 (if (ne (index-of GRj) 0) 5700 (sequence () 5701 (set GRj FRintk) 5702 (set (reg h-gr (add (index-of GRj) 1)) 5703 (reg h-fr_int (add (index-of FRintk) 1))) 5704 (set (reg h-gr (add (index-of GRj) 2)) 5705 (reg h-fr_int (add (index-of FRintk) 2))) 5706 (set (reg h-gr (add (index-of GRj) 3)) 5707 (reg h-fr_int (add (index-of FRintk) 3))))) 5708 () 5709) 5710 5711(define-pmacro (conditional-register-transfer 5712 name op ope reg_src reg_targ pipe attrs profile comment) 5713 (dni name 5714 (comment) 5715 (.splice (UNIT pipe) CONDITIONAL FR-ACCESS (.unsplice attrs)) 5716 (.str name "$pack $" reg_src ",$" reg_targ ",$CCi,$cond") 5717 (+ pack reg_targ op (rs-null) CCi cond ope reg_src) 5718 (if (eq CCi (or cond 2)) 5719 (set reg_targ reg_src)) 5720 profile 5721 ) 5722) 5723 5724(conditional-register-transfer cmovgf OP_69 OPE4_0 GRj FRintk I0 5725 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) 5726 (FR400-MAJOR I-4) (FR450-MAJOR I-4)) 5727 ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) 5728 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) 5729 "transfer gr to fr") 5730(conditional-register-transfer cmovfg OP_69 OPE4_2 FRintk GRj I0 5731 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) 5732 (FR400-MAJOR I-4) (FR450-MAJOR I-4)) 5733 ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) 5734 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) 5735 "transfer fr to gr") 5736 5737 5738(dni cmovgfd 5739 "Conditional move GR to FR double" 5740 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) 5741 (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS) 5742 "cmovgfd$pack $GRj,$FRintk,$CCi,$cond" 5743 (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_1 GRj) 5744 (register-transfer-double-from-gr-semantics (eq CCi (or cond 2))) 5745 ; TODO -- doesn't handle extra registers in double 5746 ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) 5747 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) 5748) 5749 5750(dni cmovfgd 5751 "Conditional move FR to GR double" 5752 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) 5753 (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS) 5754 "cmovfgd$pack $FRintk,$GRj,$CCi,$cond" 5755 (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_3 GRj) 5756 (register-transfer-double-to-gr-semantics (eq CCi (or cond 2))) 5757 ; TODO -- doesn't handle second register in the pair 5758 ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) 5759 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) 5760) 5761 5762(define-pmacro (register-transfer-spr 5763 name op ope reg_src reg_targ unitname comment) 5764 (dni name 5765 (comment) 5766 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 5767 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 5768 (.str name "$pack $" reg_src ",$" reg_targ) 5769 (+ pack reg_targ op ope reg_src) 5770 (set reg_targ reg_src) 5771 ((fr400 (unit unitname)) (fr450 (unit unitname)) 5772 (fr500 (unit unitname)) (fr550 (unit unitname))) 5773 ) 5774) 5775 5776(register-transfer-spr movgs OP_03 OPE1_06 GRj spr u-gr2spr "transfer gr->spr") 5777(register-transfer-spr movsg OP_03 OPE1_07 spr GRj u-spr2gr "transfer spr->gr") 5778 5779; Integer Branch Conditions 5780(define-pmacro (Inev cc) (const BI 0)) 5781(define-pmacro (Ira cc) (const BI 1)) 5782(define-pmacro (Ieq cc) ( zbit cc)) 5783(define-pmacro (Ine cc) (not (zbit cc))) 5784(define-pmacro (Ile cc) ( orif (zbit cc) (xor (nbit cc) (vbit cc)))) 5785(define-pmacro (Igt cc) (not (orif (zbit cc) (xor (nbit cc) (vbit cc))))) 5786(define-pmacro (Ilt cc) ( xor (nbit cc) (vbit cc))) 5787(define-pmacro (Ige cc) (not (xor (nbit cc) (vbit cc)))) 5788(define-pmacro (Ils cc) ( orif (cbit cc) (zbit cc))) 5789(define-pmacro (Ihi cc) (not (orif (cbit cc) (zbit cc)))) 5790(define-pmacro (Ic cc) ( cbit cc)) 5791(define-pmacro (Inc cc) (not (cbit cc))) 5792(define-pmacro (In cc) ( nbit cc)) 5793(define-pmacro (Ip cc) (not (nbit cc))) 5794(define-pmacro (Iv cc) ( vbit cc)) 5795(define-pmacro (Inv cc) (not (vbit cc))) 5796 5797; Float Branch Conditions 5798(define-pmacro (Fnev cc) (const BI 0)) 5799(define-pmacro (Fra cc) (const BI 1)) 5800(define-pmacro (Fne cc) (orif (lbit cc) (orif (gbit cc) (ubit cc)))) 5801(define-pmacro (Feq cc) (ebit cc)) 5802(define-pmacro (Flg cc) (orif (lbit cc) (gbit cc))) 5803(define-pmacro (Fue cc) (orif (ebit cc) (ubit cc))) 5804(define-pmacro (Ful cc) (orif (lbit cc) (ubit cc))) 5805(define-pmacro (Fge cc) (orif (ebit cc) (gbit cc))) 5806(define-pmacro (Flt cc) (lbit cc)) 5807(define-pmacro (Fuge cc) (orif (ebit cc) (orif (gbit cc) (ubit cc)))) 5808(define-pmacro (Fug cc) (orif (gbit cc) (ubit cc))) 5809(define-pmacro (Fle cc) (orif (ebit cc) (lbit cc))) 5810(define-pmacro (Fgt cc) (gbit cc)) 5811(define-pmacro (Fule cc) (orif (ebit cc) (orif (lbit cc) (ubit cc)))) 5812(define-pmacro (Fu cc) (ubit cc)) 5813(define-pmacro (Fo cc) (orif (ebit cc) (orif (lbit cc) (gbit cc)))) 5814 5815(define-pmacro (conditional-branch-i prefix cc op cond comment) 5816 (dni (.sym prefix cc) 5817 (comment) 5818 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5819 (FR400-MAJOR B-1) (FR450-MAJOR B-1)) 5820 (.str (.sym prefix cc) "$pack $ICCi_2,$hint,$label16") 5821 (+ pack (.sym ICC_ cc) ICCi_2 op hint label16) 5822 (sequence () 5823 (c-call VOID "@cpu@_model_branch" label16 hint) 5824 (if (cond ICCi_2) 5825 (set pc label16))) 5826 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5827 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5828 ) 5829) 5830 5831(dni bra 5832 "integer branch equal" 5833 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5834 (FR400-MAJOR B-1) (FR450-MAJOR B-1)) 5835 "bra$pack $hint_taken$label16" 5836 (+ pack ICC_ra (ICCi_2-null) OP_06 hint_taken label16) 5837 (sequence () 5838 (c-call VOID "@cpu@_model_branch" label16 hint_taken) 5839 (set pc label16)) 5840 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5841 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5842) 5843 5844(dni bno 5845 "integer branch never" 5846 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5847 (FR400-MAJOR B-1) (FR450-MAJOR B-1)) 5848 "bno$pack$hint_not_taken" 5849 (+ pack ICC_nev (ICCi_2-null) OP_06 hint_not_taken (label16-null)) 5850 (c-call VOID "@cpu@_model_branch" label16 hint_not_taken) 5851 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5852 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5853) 5854 5855(conditional-branch-i b eq OP_06 Ieq "integer branch equal") 5856(conditional-branch-i b ne OP_06 Ine "integer branch not equal") 5857(conditional-branch-i b le OP_06 Ile "integer branch less or equal") 5858(conditional-branch-i b gt OP_06 Igt "integer branch greater") 5859(conditional-branch-i b lt OP_06 Ilt "integer branch less") 5860(conditional-branch-i b ge OP_06 Ige "integer branch greater or equal") 5861(conditional-branch-i b ls OP_06 Ils "integer branch less or equal unsigned") 5862(conditional-branch-i b hi OP_06 Ihi "integer branch greater unsigned") 5863(conditional-branch-i b c OP_06 Ic "integer branch carry set") 5864(conditional-branch-i b nc OP_06 Inc "integer branch carry clear") 5865(conditional-branch-i b n OP_06 In "integer branch negative") 5866(conditional-branch-i b p OP_06 Ip "integer branch positive") 5867(conditional-branch-i b v OP_06 Iv "integer branch overflow set") 5868(conditional-branch-i b nv OP_06 Inv "integer branch overflow clear") 5869 5870(define-pmacro (conditional-branch-f prefix cc op cond comment) 5871 (dni (.sym prefix cc) 5872 (comment) 5873 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5874 (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) 5875 (.str (.sym prefix cc) "$pack $FCCi_2,$hint,$label16") 5876 (+ pack (.sym FCC_ cc) FCCi_2 op hint label16) 5877 (sequence () 5878 (c-call VOID "@cpu@_model_branch" label16 hint) 5879 (if (cond FCCi_2) (set pc label16))) 5880 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5881 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5882 ) 5883) 5884 5885(dni fbra 5886 "float branch equal" 5887 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5888 (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) 5889 "fbra$pack $hint_taken$label16" 5890 (+ pack FCC_ra (FCCi_2-null) OP_07 hint_taken label16) 5891 (sequence () 5892 (c-call VOID "@cpu@_model_branch" label16 hint_taken) 5893 (set pc label16)) 5894 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5895 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5896) 5897 5898(dni fbno 5899 "float branch never" 5900 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5901 (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) 5902 "fbno$pack$hint_not_taken" 5903 (+ pack FCC_nev (FCCi_2-null) OP_07 hint_not_taken (label16-null)) 5904 (c-call VOID "@cpu@_model_branch" label16 hint_not_taken) 5905 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5906 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5907) 5908 5909(conditional-branch-f fb ne OP_07 Fne "float branch not equal") 5910(conditional-branch-f fb eq OP_07 Feq "float branch equal") 5911(conditional-branch-f fb lg OP_07 Flg "float branch less or greater") 5912(conditional-branch-f fb ue OP_07 Fue "float branch unordered or equal") 5913(conditional-branch-f fb ul OP_07 Ful "float branch unordered or less") 5914(conditional-branch-f fb ge OP_07 Fge "float branch greater or equal") 5915(conditional-branch-f fb lt OP_07 Flt "float branch less") 5916(conditional-branch-f fb uge OP_07 Fuge "float branch unordered, greater,equal") 5917(conditional-branch-f fb ug OP_07 Fug "float branch unordered or greater") 5918(conditional-branch-f fb le OP_07 Fle "float branch less or equal") 5919(conditional-branch-f fb gt OP_07 Fgt "float branch greater") 5920(conditional-branch-f fb ule OP_07 Fule "float branch unordered, less or equal") 5921(conditional-branch-f fb u OP_07 Fu "float branch unordered") 5922(conditional-branch-f fb o OP_07 Fo "float branch ordered") 5923 5924(define-pmacro (ctrlr-branch-semantics cond ccond) 5925 (sequence ((SI tmp)) 5926 (set tmp (sub (spr-lcr) 1)) 5927 (set (spr-lcr) tmp) 5928 (if cond 5929 (if (eq ccond 0) 5930 (if (ne tmp 0) 5931 (set pc (spr-lr))) 5932 (if (eq tmp 0) 5933 (set pc (spr-lr)))))) 5934) 5935 5936(dni bctrlr 5937 "LCR conditional branch to lr" 5938 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 5939 (FR400-MAJOR B-2) (FR450-MAJOR B-2)) 5940 ("bctrlr$pack $ccond,$hint") 5941 (+ pack (cond-null) (ICCi_2-null) OP_0E hint OPE3_01 ccond (s12-null)) 5942 (sequence () 5943 (c-call VOID "@cpu@_model_branch" (spr-lr) hint) 5944 (ctrlr-branch-semantics (const BI 1) ccond)) 5945 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5946 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5947) 5948 5949(define-pmacro (conditional-branch-cclr prefix cc i-f op ope cond attr comment) 5950 (dni (.sym prefix cc lr) 5951 (comment) 5952 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 5953 (FR400-MAJOR B-3) (FR450-MAJOR B-3) attr) 5954 (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$hint") 5955 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope 5956 (ccond-null) (s12-null)) 5957 (sequence () 5958 (c-call VOID "@cpu@_model_branch" (spr-lr) hint) 5959 (if (cond (.sym i-f CCi_2)) (set pc (spr-lr)))) 5960 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5961 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5962 ) 5963) 5964 5965(dni bralr 5966 "integer cclr branch always" 5967 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 5968 (FR400-MAJOR B-3) (FR450-MAJOR B-3)) 5969 "bralr$pack$hint_taken" 5970 (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_02 (ccond-null) (s12-null)) 5971 (sequence () 5972 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) 5973 (set pc (spr-lr))) 5974 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5975 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5976) 5977 5978(dni bnolr 5979 "integer cclr branch never" 5980 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 5981 (FR400-MAJOR B-3) (FR450-MAJOR B-3)) 5982 "bnolr$pack$hint_not_taken" 5983 (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_02 (ccond-null) (s12-null)) 5984 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) 5985 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5986 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5987) 5988 5989(conditional-branch-cclr b eq I OP_0E OPE3_02 Ieq NA "integer cclr branch equal") 5990(conditional-branch-cclr b ne I OP_0E OPE3_02 Ine NA "integer cclr branch not equal") 5991(conditional-branch-cclr b le I OP_0E OPE3_02 Ile NA "integer cclr branch less or equal") 5992(conditional-branch-cclr b gt I OP_0E OPE3_02 Igt NA "integer cclr branch greater") 5993(conditional-branch-cclr b lt I OP_0E OPE3_02 Ilt NA "integer cclr branch less") 5994(conditional-branch-cclr b ge I OP_0E OPE3_02 Ige NA "integer cclr branch greater or equal") 5995(conditional-branch-cclr b ls I OP_0E OPE3_02 Ils NA "integer cclr branch less or equal unsigned") 5996(conditional-branch-cclr b hi I OP_0E OPE3_02 Ihi NA "integer cclr branch greater unsigned") 5997(conditional-branch-cclr b c I OP_0E OPE3_02 Ic NA "integer cclr branch carry set") 5998(conditional-branch-cclr b nc I OP_0E OPE3_02 Inc NA "integer cclr branch carry clear") 5999(conditional-branch-cclr b n I OP_0E OPE3_02 In NA "integer cclr branch negative") 6000(conditional-branch-cclr b p I OP_0E OPE3_02 Ip NA "integer cclr branch positive") 6001(conditional-branch-cclr b v I OP_0E OPE3_02 Iv NA "integer cclr branch overflow set") 6002(conditional-branch-cclr b nv I OP_0E OPE3_02 Inv NA "integer cclr branch overflow clear") 6003 6004(dni fbralr 6005 "float cclr branch always" 6006 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 6007 (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS) 6008 "fbralr$pack$hint_taken" 6009 (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_06 (ccond-null) (s12-null)) 6010 (sequence () 6011 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) 6012 (set pc (spr-lr))) 6013 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6014 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6015) 6016 6017(dni fbnolr 6018 "float cclr branch never" 6019 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 6020 (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS) 6021 "fbnolr$pack$hint_not_taken" 6022 (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_06 (ccond-null) (s12-null)) 6023 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) 6024 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6025 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6026) 6027 6028(conditional-branch-cclr fb eq F OP_0E OPE3_06 Feq FR-ACCESS "float cclr branch equal") 6029(conditional-branch-cclr fb ne F OP_0E OPE3_06 Fne FR-ACCESS "float cclr branch not equal") 6030(conditional-branch-cclr fb lg F OP_0E OPE3_06 Flg FR-ACCESS "float branch less or greater") 6031(conditional-branch-cclr fb ue F OP_0E OPE3_06 Fue FR-ACCESS "float branch unordered or equal") 6032(conditional-branch-cclr fb ul F OP_0E OPE3_06 Ful FR-ACCESS "float branch unordered or less") 6033(conditional-branch-cclr fb ge F OP_0E OPE3_06 Fge FR-ACCESS "float branch greater or equal") 6034(conditional-branch-cclr fb lt F OP_0E OPE3_06 Flt FR-ACCESS "float branch less") 6035(conditional-branch-cclr fb uge F OP_0E OPE3_06 Fuge FR-ACCESS "float branch unordered, greater, equal") 6036(conditional-branch-cclr fb ug F OP_0E OPE3_06 Fug FR-ACCESS "float branch unordered or greater") 6037(conditional-branch-cclr fb le F OP_0E OPE3_06 Fle FR-ACCESS "float branch less or equal") 6038(conditional-branch-cclr fb gt F OP_0E OPE3_06 Fgt FR-ACCESS "float branch greater") 6039(conditional-branch-cclr fb ule F OP_0E OPE3_06 Fule FR-ACCESS "float branch unordered, less or equal") 6040(conditional-branch-cclr fb u F OP_0E OPE3_06 Fu FR-ACCESS "float branch unordered") 6041(conditional-branch-cclr fb o F OP_0E OPE3_06 Fo FR-ACCESS "float branch ordered") 6042 6043(define-pmacro (conditional-branch-ctrlr prefix cc i-f op ope cond attr comment) 6044 (dni (.sym prefix cc lr) 6045 (comment) 6046 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6047 (FR400-MAJOR B-2) (FR450-MAJOR B-2) attr) 6048 (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$ccond,$hint") 6049 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope ccond (s12-null)) 6050 (sequence () 6051 (c-call VOID "@cpu@_model_branch" (spr-lr) hint) 6052 (ctrlr-branch-semantics (cond (.sym i-f CCi_2)) ccond)) 6053 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6054 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6055 ) 6056) 6057 6058(dni bcralr 6059 "integer ctrlr branch always" 6060 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6061 (FR400-MAJOR B-2) (FR450-MAJOR B-2)) 6062 "bcralr$pack $ccond$hint_taken" 6063 (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_03 ccond (s12-null)) 6064 (sequence () 6065 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) 6066 (ctrlr-branch-semantics (const BI 1) ccond)) 6067 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6068 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6069) 6070 6071(dni bcnolr 6072 "integer ctrlr branch never" 6073 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6074 (FR400-MAJOR B-2) (FR450-MAJOR B-2)) 6075 "bcnolr$pack$hint_not_taken" 6076 (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_03 (ccond-null) (s12-null)) 6077 (sequence () 6078 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) 6079 (ctrlr-branch-semantics (const BI 0) ccond)) 6080 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6081 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6082) 6083 6084(conditional-branch-ctrlr bc eq I OP_0E OPE3_03 Ieq NA "integer ctrlr branch equal") 6085(conditional-branch-ctrlr bc ne I OP_0E OPE3_03 Ine NA "integer ctrlr branch not equal") 6086(conditional-branch-ctrlr bc le I OP_0E OPE3_03 Ile NA "integer ctrlr branch less equal") 6087(conditional-branch-ctrlr bc gt I OP_0E OPE3_03 Igt NA "integer ctrlr branch greater") 6088(conditional-branch-ctrlr bc lt I OP_0E OPE3_03 Ilt NA "integer ctrlr branch less") 6089(conditional-branch-ctrlr bc ge I OP_0E OPE3_03 Ige NA "integer ctrlr branch greater equal") 6090(conditional-branch-ctrlr bc ls I OP_0E OPE3_03 Ils NA "integer ctrlr branch less equal unsigned") 6091(conditional-branch-ctrlr bc hi I OP_0E OPE3_03 Ihi NA "integer ctrlr branch greater unsigned") 6092(conditional-branch-ctrlr bc c I OP_0E OPE3_03 Ic NA "integer ctrlr branch carry set") 6093(conditional-branch-ctrlr bc nc I OP_0E OPE3_03 Inc NA "integer ctrlr branch carry clear") 6094(conditional-branch-ctrlr bc n I OP_0E OPE3_03 In NA "integer ctrlr branch negative") 6095(conditional-branch-ctrlr bc p I OP_0E OPE3_03 Ip NA "integer ctrlr branch positive") 6096(conditional-branch-ctrlr bc v I OP_0E OPE3_03 Iv NA "integer ctrlr branch overflow set") 6097(conditional-branch-ctrlr bc nv I OP_0E OPE3_03 Inv NA "integer ctrlr branch overflow clear") 6098 6099(dni fcbralr 6100 "float ctrlr branch always" 6101 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6102 (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS) 6103 "fcbralr$pack $ccond$hint_taken" 6104 (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_07 ccond (s12-null)) 6105 (sequence () 6106 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) 6107 (ctrlr-branch-semantics (const BI 1) ccond)) 6108 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6109 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6110) 6111 6112(dni fcbnolr 6113 "float ctrlr branch never" 6114 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6115 (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS) 6116 "fcbnolr$pack$hint_not_taken" 6117 (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_07 (ccond-null) (s12-null)) 6118 (sequence () 6119 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) 6120 (ctrlr-branch-semantics (const BI 0) ccond)) 6121 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6122 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6123) 6124 6125(conditional-branch-ctrlr fcb eq F OP_0E OPE3_07 Feq FR-ACCESS "float cclr branch equal") 6126(conditional-branch-ctrlr fcb ne F OP_0E OPE3_07 Fne FR-ACCESS "float cclr branch not equal") 6127(conditional-branch-ctrlr fcb lg F OP_0E OPE3_07 Flg FR-ACCESS "float branch less or greater") 6128(conditional-branch-ctrlr fcb ue F OP_0E OPE3_07 Fue FR-ACCESS "float branch unordered or equal") 6129(conditional-branch-ctrlr fcb ul F OP_0E OPE3_07 Ful FR-ACCESS "float branch unordered or less") 6130(conditional-branch-ctrlr fcb ge F OP_0E OPE3_07 Fge FR-ACCESS "float branch greater or equal") 6131(conditional-branch-ctrlr fcb lt F OP_0E OPE3_07 Flt FR-ACCESS "float branch less") 6132(conditional-branch-ctrlr fcb uge F OP_0E OPE3_07 Fuge FR-ACCESS "float branch unordered, greater, equal") 6133(conditional-branch-ctrlr fcb ug F OP_0E OPE3_07 Fug FR-ACCESS "float branch unordered or greater") 6134(conditional-branch-ctrlr fcb le F OP_0E OPE3_07 Fle FR-ACCESS "float branch less or equal") 6135(conditional-branch-ctrlr fcb gt F OP_0E OPE3_07 Fgt FR-ACCESS "float branch greater") 6136(conditional-branch-ctrlr fcb ule F OP_0E OPE3_07 Fule FR-ACCESS "float branch unordered, less or equal") 6137(conditional-branch-ctrlr fcb u F OP_0E OPE3_07 Fu FR-ACCESS "float branch unordered") 6138(conditional-branch-ctrlr fcb o F OP_0E OPE3_07 Fo FR-ACCESS "float branch ordered") 6139 6140(define-pmacro (jump-and-link-semantics base offset LI) 6141 (sequence () 6142 (if (eq LI 1) 6143 (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1)) 6144 ; Target address gets aligned here 6145 (set pc (and (add base offset) #xfffffffc)) 6146 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken 6147) 6148 6149(dni jmpl 6150 "jump and link" 6151 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6152 (FR400-MAJOR I-5) (FR450-MAJOR I-5)) 6153 "jmpl$pack @($GRi,$GRj)" 6154 (+ pack (misc-null-1) (LI-off) OP_0C GRi (misc-null-2) GRj) 6155 (jump-and-link-semantics GRi GRj LI) 6156 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6157 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6158) 6159 6160(dann callann "call annotation" SI "call_annotation" "at") 6161 6162(dni calll 6163 "call and link" 6164 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6165 (FR400-MAJOR I-5) (FR450-MAJOR I-5)) 6166 "calll$pack $callann($GRi,$GRj)" 6167 (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj) 6168 (jump-and-link-semantics GRi GRj LI) 6169 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6170 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6171) 6172 6173(dni jmpil 6174 "jump immediate and link" 6175 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6176 (FR400-MAJOR I-5) (FR450-MAJOR I-5)) 6177 "jmpil$pack @($GRi,$s12)" 6178 (+ pack (misc-null-1) (LI-off) OP_0D GRi s12) 6179 (jump-and-link-semantics GRi s12 LI) 6180 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6181 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6182) 6183 6184(dni callil 6185 "call immediate and link" 6186 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6187 (FR400-MAJOR I-5) (FR450-MAJOR I-5)) 6188 "callil$pack @($GRi,$s12)" 6189 (+ pack (misc-null-1) (LI-on) OP_0D GRi s12) 6190 (jump-and-link-semantics GRi s12 LI) 6191 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6192 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6193) 6194 6195(dni call 6196 "call and link" 6197 ((UNIT B0) (FR500-MAJOR B-4) (FR550-MAJOR B-4) 6198 (FR400-MAJOR B-4) (FR450-MAJOR B-4)) 6199 "call$pack $label24" 6200 (+ pack OP_0F label24) 6201 (sequence () 6202 (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1) 6203 (set pc label24) 6204 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken 6205 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6206 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6207) 6208 6209(dni rett 6210 "return from trap" 6211 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6212 (FR400-MAJOR C-2) (FR450-MAJOR C-2) PRIVILEGED) 6213 "rett$pack $debug" 6214 (+ pack (misc-null-1) debug OP_05 (rs-null) (s12-null)) 6215 ; frv_rett handles operating vs user mode 6216 (sequence () 6217 (set pc (c-call UWI "frv_rett" pc debug)) 6218 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken 6219 () 6220) 6221 6222(dni rei 6223 "run exception instruction" 6224 ((UNIT C) (FR500-MAJOR C-1) (MACH frv) PRIVILEGED) 6225 "rei$pack $eir" 6226 (+ pack (rd-null) OP_37 eir (s12-null)) 6227 (nop) ; for now 6228 () 6229) 6230 6231(define-pmacro (trap-semantics cond base offset) 6232 (if cond 6233 (sequence () 6234 ; This is defered to frv_itrap because for the breakpoint 6235 ; case we want to change as little of the machine state as 6236 ; possible. 6237 ; 6238 ; PCSR=PC 6239 ; PSR.PS=PSR.S 6240 ; PSR.ET=0 6241 ; if PSR.ESR==1 6242 ; SR0 through SR3=GR4 through GR7 6243 ; TBR.TT=0x80 + ((GRi + s12) & 0x7f) 6244 ; PC=TBR 6245 ; We still should indicate what is modified by this insn. 6246 (clobber (spr-pcsr)) 6247 (clobber psr_ps) 6248 (clobber psr_et) 6249 (clobber tbr_tt) 6250 (if (ne psr_esr (const 0)) 6251 (sequence () 6252 (clobber (spr-sr0)) 6253 (clobber (spr-sr1)) 6254 (clobber (spr-sr2)) 6255 (clobber (spr-sr3)))) 6256 ; frv_itrap handles operating vs user mode 6257 (c-call VOID "frv_itrap" pc base offset))) 6258) 6259 6260(define-pmacro (trap-r prefix cc i-f op ope cond attr comment) 6261 (dni (.sym prefix cc) 6262 (comment) 6263 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6264 (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr) 6265 (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$GRj") 6266 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi (misc-null-3) ope GRj) 6267 (trap-semantics (cond (.sym i-f CCi_2)) GRi GRj) 6268 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6269 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6270 ) 6271) 6272 6273(dni tra 6274 "integer trap always" 6275 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6276 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6277 "tra$pack $GRi,$GRj" 6278 (+ pack ICC_ra (ICCi_2-null) OP_04 GRi (misc-null-3) OPE4_0 GRj) 6279 (trap-semantics (const BI 1) GRi GRj) 6280 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6281 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6282) 6283 6284(dni tno 6285 "integer trap never" 6286 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6287 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6288 "tno$pack" 6289 (+ pack ICC_nev (ICCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_0 (GRj-null)) 6290 (trap-semantics (const BI 0) GRi GRj) 6291 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6292 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6293) 6294 6295(trap-r t eq I OP_04 OPE4_0 Ieq NA "integer trap equal") 6296(trap-r t ne I OP_04 OPE4_0 Ine NA "integer trap not equal") 6297(trap-r t le I OP_04 OPE4_0 Ile NA "integer trap less or equal") 6298(trap-r t gt I OP_04 OPE4_0 Igt NA "integer trap greater") 6299(trap-r t lt I OP_04 OPE4_0 Ilt NA "integer trap less") 6300(trap-r t ge I OP_04 OPE4_0 Ige NA "integer trap greater or equal") 6301(trap-r t ls I OP_04 OPE4_0 Ils NA "integer trap less or equal unsigned") 6302(trap-r t hi I OP_04 OPE4_0 Ihi NA "integer trap greater unsigned") 6303(trap-r t c I OP_04 OPE4_0 Ic NA "integer trap carry set") 6304(trap-r t nc I OP_04 OPE4_0 Inc NA "integer trap carry clear") 6305(trap-r t n I OP_04 OPE4_0 In NA "integer trap negative") 6306(trap-r t p I OP_04 OPE4_0 Ip NA "integer trap positive") 6307(trap-r t v I OP_04 OPE4_0 Iv NA "integer trap overflow set") 6308(trap-r t nv I OP_04 OPE4_0 Inv NA "integer trap overflow clear") 6309 6310(dni ftra 6311 "float trap always" 6312 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6313 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6314 "ftra$pack $GRi,$GRj" 6315 (+ pack FCC_ra (FCCi_2-null) OP_04 GRi (misc-null-3) OPE4_1 GRj) 6316 (trap-semantics (const BI 1) GRi GRj) 6317 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6318 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6319) 6320 6321(dni ftno 6322 "flost trap never" 6323 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6324 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6325 "ftno$pack" 6326 (+ pack FCC_nev (FCCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_1 (GRj-null)) 6327 (trap-semantics (const BI 0) GRi GRj) 6328 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6329 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6330) 6331 6332(trap-r ft ne F OP_04 OPE4_1 Fne FR-ACCESS "float trap not equal") 6333(trap-r ft eq F OP_04 OPE4_1 Feq FR-ACCESS "float trap equal") 6334(trap-r ft lg F OP_04 OPE4_1 Flg FR-ACCESS "float trap greater or less") 6335(trap-r ft ue F OP_04 OPE4_1 Fue FR-ACCESS "float trap unordered or equal") 6336(trap-r ft ul F OP_04 OPE4_1 Ful FR-ACCESS "float trap unordered or less") 6337(trap-r ft ge F OP_04 OPE4_1 Fge FR-ACCESS "float trap greater or equal") 6338(trap-r ft lt F OP_04 OPE4_1 Flt FR-ACCESS "float trap less") 6339(trap-r ft uge F OP_04 OPE4_1 Fuge FR-ACCESS "float trap unordered greater or equal") 6340(trap-r ft ug F OP_04 OPE4_1 Fug FR-ACCESS "float trap unordered or greater") 6341(trap-r ft le F OP_04 OPE4_1 Fle FR-ACCESS "float trap less or equal") 6342(trap-r ft gt F OP_04 OPE4_1 Fgt FR-ACCESS "float trap greater") 6343(trap-r ft ule F OP_04 OPE4_1 Fule FR-ACCESS "float trap unordered less or equal") 6344(trap-r ft u F OP_04 OPE4_1 Fu FR-ACCESS "float trap unordered") 6345(trap-r ft o F OP_04 OPE4_1 Fo FR-ACCESS "float trap ordered") 6346 6347(define-pmacro (trap-immed prefix cc i-f op cond attr comment) 6348 (dni (.sym prefix cc) 6349 (comment) 6350 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6351 (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr) 6352 (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$s12") 6353 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi s12) 6354 (trap-semantics (cond (.sym i-f CCi_2)) GRi s12) 6355 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6356 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6357 ) 6358) 6359 6360(dni tira 6361 "integer trap always" 6362 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6363 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6364 "tira$pack $GRi,$s12" 6365 (+ pack ICC_ra (ICCi_2-null) OP_1C GRi s12) 6366 (trap-semantics (const BI 1) GRi s12) 6367 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6368 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6369) 6370 6371(dni tino 6372 "integer trap never" 6373 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6374 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6375 "tino$pack" 6376 (+ pack ICC_nev (ICCi_2-null) OP_1C (GRi-null) (s12-null)) 6377 (trap-semantics (const BI 0) GRi s12) 6378 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6379 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6380) 6381 6382(trap-immed ti eq I OP_1C Ieq NA "integer trap equal") 6383(trap-immed ti ne I OP_1C Ine NA "integer trap not equal") 6384(trap-immed ti le I OP_1C Ile NA "integer trap less or equal") 6385(trap-immed ti gt I OP_1C Igt NA "integer trap greater") 6386(trap-immed ti lt I OP_1C Ilt NA "integer trap less") 6387(trap-immed ti ge I OP_1C Ige NA "integer trap greater or equal") 6388(trap-immed ti ls I OP_1C Ils NA "integer trap less or equal unsigned") 6389(trap-immed ti hi I OP_1C Ihi NA "integer trap greater unsigned") 6390(trap-immed ti c I OP_1C Ic NA "integer trap carry set") 6391(trap-immed ti nc I OP_1C Inc NA "integer trap carry clear") 6392(trap-immed ti n I OP_1C In NA "integer trap negative") 6393(trap-immed ti p I OP_1C Ip NA "integer trap positive") 6394(trap-immed ti v I OP_1C Iv NA "integer trap overflow set") 6395(trap-immed ti nv I OP_1C Inv NA "integer trap overflow clear") 6396 6397(dni ftira 6398 "float trap always" 6399 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6400 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6401 "ftira$pack $GRi,$s12" 6402 (+ pack FCC_ra (ICCi_2-null) OP_1D GRi s12) 6403 (trap-semantics (const BI 1) GRi s12) 6404 ((fr400 (unit u-trap)) 6405 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6406) 6407 6408(dni ftino 6409 "float trap never" 6410 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6411 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6412 "ftino$pack" 6413 (+ pack FCC_nev (FCCi_2-null) OP_1D (GRi-null) (s12-null)) 6414 (trap-semantics (const BI 0) GRi s12) 6415 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6416 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6417) 6418 6419(trap-immed fti ne F OP_1D Fne FR-ACCESS "float trap not equal") 6420(trap-immed fti eq F OP_1D Feq FR-ACCESS "float trap equal") 6421(trap-immed fti lg F OP_1D Flg FR-ACCESS "float trap greater or less") 6422(trap-immed fti ue F OP_1D Fue FR-ACCESS "float trap unordered or equal") 6423(trap-immed fti ul F OP_1D Ful FR-ACCESS "float trap unordered or less") 6424(trap-immed fti ge F OP_1D Fge FR-ACCESS "float trap greater or equal") 6425(trap-immed fti lt F OP_1D Flt FR-ACCESS "float trap less") 6426(trap-immed fti uge F OP_1D Fuge FR-ACCESS "float trap unordered greater or equal") 6427(trap-immed fti ug F OP_1D Fug FR-ACCESS "float trap unordered or greater") 6428(trap-immed fti le F OP_1D Fle FR-ACCESS "float trap less or equal") 6429(trap-immed fti gt F OP_1D Fgt FR-ACCESS "float trap greater") 6430(trap-immed fti ule F OP_1D Fule FR-ACCESS "float trap unordered less or equal") 6431(trap-immed fti u F OP_1D Fu FR-ACCESS "float trap unordered") 6432(trap-immed fti o F OP_1D Fo FR-ACCESS "float trap ordered") 6433 6434(dni break 6435 "break trap" 6436 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6437 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6438 "break$pack" 6439 (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_3 (GRj-null)) 6440 (sequence () 6441 ; This is defered to frv_break because for the breakpoint 6442 ; case we want to change as little of the machine state as 6443 ; possible. 6444 ; 6445 ; BPCSR=PC 6446 ; BPSR.BS=PSR.S 6447 ; BPSR.BET=PSR.ET 6448 ; PSR.S=1 6449 ; PSR.ET=0 6450 ; TBR.TT=0xff 6451 ; PC=TBR 6452 ; We still should indicate what is modified by this insn. 6453 (clobber (spr-bpcsr)) 6454 (clobber bpsr_bs) 6455 (clobber bpsr_bet) 6456 (clobber psr_s) 6457 (clobber psr_et) 6458 (clobber tbr_tt) 6459 (c-call VOID "frv_break")) 6460 () 6461) 6462 6463(dni mtrap 6464 "media trap" 6465 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6466 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6467 "mtrap$pack" 6468 (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_2 (GRj-null)) 6469 (c-call VOID "frv_mtrap") 6470 () 6471) 6472 6473(define-pmacro (condition-code-logic name operation ope comment) 6474 (dni name 6475 (comment) 6476 ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) 6477 (FR400-MAJOR B-6) (FR450-MAJOR B-6)) 6478 (.str name "$pack $CRi,$CRj,$CRk") 6479 (+ pack (misc-null-6) CRk OP_0A (misc-null-7) CRi ope (misc-null-8) CRj) 6480 (set CRk (c-call UQI "@cpu@_cr_logic" operation CRi CRj)) 6481 () 6482 ) 6483) 6484(define-pmacro (op-andcr) 0) 6485(define-pmacro (op-orcr) 1) 6486(define-pmacro (op-xorcr) 2) 6487(define-pmacro (op-nandcr) 3) 6488(define-pmacro (op-norcr) 4) 6489(define-pmacro (op-andncr) 5) 6490(define-pmacro (op-orncr) 6) 6491(define-pmacro (op-nandncr) 7) 6492(define-pmacro (op-norncr) 8) 6493 6494(define-pmacro (cr-true) 3) 6495(define-pmacro (cr-false) 2) 6496(define-pmacro (cr-undefined) 0) 6497 6498(condition-code-logic andcr (op-andcr) OPE1_08 "and condition code regs") 6499(condition-code-logic orcr (op-orcr) OPE1_09 "or condition code regs") 6500(condition-code-logic xorcr (op-xorcr) OPE1_0A "xor condition code regs") 6501(condition-code-logic nandcr (op-nandcr) OPE1_0C "nand condition code regs") 6502(condition-code-logic norcr (op-norcr) OPE1_0D "nor condition code regs") 6503(condition-code-logic andncr (op-andncr) OPE1_10 "andn condition code regs") 6504(condition-code-logic orncr (op-orncr) OPE1_11 "orn condition code regs") 6505(condition-code-logic nandncr (op-nandncr) OPE1_14 "nandn condition code regs") 6506(condition-code-logic norncr (op-norncr) OPE1_15 "norn condition code regs") 6507 6508(dni notcr 6509 ("not cccr register") 6510 ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) 6511 (FR400-MAJOR B-6) (FR450-MAJOR B-6)) 6512 (.str notcr "$pack $CRj,$CRk") 6513 (+ pack (misc-null-6) CRk OP_0A (rs-null) OPE1_0B (misc-null-8) CRj) 6514 (set CRk (xor CRj 1)) 6515 () 6516) 6517 6518(define-pmacro (check-semantics cond cr) 6519 (if cond (set cr (cr-true)) (set cr (cr-false))) 6520) 6521 6522(define-pmacro (check-int-condition-code prefix cc op cond comment) 6523 (dni (.sym prefix cc) 6524 (comment) 6525 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6526 (FR400-MAJOR B-5) (FR450-MAJOR B-5)) 6527 (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int") 6528 (+ pack (.sym ICC_ cc) CRj_int op (misc-null-5) ICCi_3) 6529 (check-semantics (cond ICCi_3) CRj_int) 6530 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6531 (fr500 (unit u-check)) (fr550 (unit u-check))) 6532 ) 6533) 6534 6535(dni ckra 6536 "check integer cc always" 6537 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6538 (FR400-MAJOR B-5) (FR450-MAJOR B-5)) 6539 "ckra$pack $CRj_int" 6540 (+ pack ICC_ra CRj_int OP_08 (misc-null-5) (ICCi_3-null)) 6541 (check-semantics (const BI 1) CRj_int) 6542 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6543 (fr500 (unit u-check)) (fr550 (unit u-check))) 6544) 6545 6546(dni ckno 6547 "check integer cc never" 6548 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6549 (FR400-MAJOR B-5) (FR450-MAJOR B-5)) 6550 "ckno$pack $CRj_int" 6551 (+ pack ICC_nev CRj_int OP_08 (misc-null-5) (ICCi_3-null)) 6552 (check-semantics (const BI 0) CRj_int) 6553 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6554 (fr500 (unit u-check)) (fr550 (unit u-check))) 6555) 6556 6557(check-int-condition-code ck eq OP_08 Ieq "check integer cc equal") 6558(check-int-condition-code ck ne OP_08 Ine "check integer cc not equal") 6559(check-int-condition-code ck le OP_08 Ile "check integer cc less or equal") 6560(check-int-condition-code ck gt OP_08 Igt "check integer cc greater") 6561(check-int-condition-code ck lt OP_08 Ilt "check integer cc less") 6562(check-int-condition-code ck ge OP_08 Ige "check integer cc greater or equal") 6563(check-int-condition-code ck ls OP_08 Ils "check integer cc less or equal unsigned") 6564(check-int-condition-code ck hi OP_08 Ihi "check integer cc greater unsigned") 6565(check-int-condition-code ck c OP_08 Ic "check integer cc carry set") 6566(check-int-condition-code ck nc OP_08 Inc "check integer cc carry clear") 6567(check-int-condition-code ck n OP_08 In "check integer cc negative") 6568(check-int-condition-code ck p OP_08 Ip "check integer cc positive") 6569(check-int-condition-code ck v OP_08 Iv "check integer cc overflow set") 6570(check-int-condition-code ck nv OP_08 Inv "check integer cc overflow clear") 6571 6572(define-pmacro (check-float-condition-code prefix cc op cond comment) 6573 (dni (.sym prefix cc) 6574 (comment) 6575 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6576 (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) 6577 (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float") 6578 (+ pack (.sym FCC_ cc) CRj_float op (misc-null-5) FCCi_3) 6579 (check-semantics (cond FCCi_3) CRj_float) 6580 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6581 (fr500 (unit u-check)) (fr550 (unit u-check))) 6582 ) 6583) 6584 6585(dni fckra 6586 "check float cc always" 6587 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6588 (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) 6589 "fckra$pack $CRj_float" 6590 (+ pack FCC_ra CRj_float OP_09 (misc-null-5) FCCi_3) 6591 (check-semantics (const BI 1) CRj_float) 6592 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6593 (fr500 (unit u-check)) (fr550 (unit u-check))) 6594) 6595 6596(dni fckno 6597 "check float cc never" 6598 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6599 (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) 6600 "fckno$pack $CRj_float" 6601 (+ pack FCC_nev CRj_float OP_09 (misc-null-5) FCCi_3) 6602 (check-semantics (const BI 0) CRj_float) 6603 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6604 (fr500 (unit u-check)) (fr550 (unit u-check))) 6605) 6606 6607(check-float-condition-code fck ne OP_09 Fne "check float cc not equal") 6608(check-float-condition-code fck eq OP_09 Feq "check float cc equal") 6609(check-float-condition-code fck lg OP_09 Flg "check float cc greater or less") 6610(check-float-condition-code fck ue OP_09 Fue "check float cc unordered or equal") 6611(check-float-condition-code fck ul OP_09 Ful "check float cc unordered or less") 6612(check-float-condition-code fck ge OP_09 Fge "check float cc greater or equal") 6613(check-float-condition-code fck lt OP_09 Flt "check float cc less") 6614(check-float-condition-code fck uge OP_09 Fuge "check float cc unordered greater or equal") 6615(check-float-condition-code fck ug OP_09 Fug "check float cc unordered or greater") 6616(check-float-condition-code fck le OP_09 Fle "check float cc less or equal") 6617(check-float-condition-code fck gt OP_09 Fgt "check float cc greater") 6618(check-float-condition-code fck ule OP_09 Fule "check float cc unordered less or equal") 6619(check-float-condition-code fck u OP_09 Fu "check float cc unordered") 6620(check-float-condition-code fck o OP_09 Fo "check float cc ordered") 6621 6622(define-pmacro (conditional-check-int-condition-code prefix cc op ope test comment) 6623 (dni (.sym prefix cc) 6624 (comment) 6625 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6626 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) 6627 (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int,$CCi,$cond") 6628 (+ pack (.sym ICC_ cc) CRj_int op (rs-null) CCi cond ope 6629 (misc-null-9) ICCi_3) 6630 (if (eq CCi (or cond 2)) 6631 (check-semantics (test ICCi_3) CRj_int) 6632 (set CRj_int (cr-undefined))) 6633 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6634 (fr500 (unit u-check)) (fr550 (unit u-check))) 6635 ) 6636) 6637 6638(dni cckra 6639 "conditional check integer cc always" 6640 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6641 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) 6642 "cckra$pack $CRj_int,$CCi,$cond" 6643 (+ pack ICC_ra CRj_int OP_6A (rs-null) CCi cond OPE4_0 6644 (misc-null-9) (ICCi_3-null)) 6645 (if (eq CCi (or cond 2)) 6646 (check-semantics (const BI 1) CRj_int) 6647 (set CRj_int (cr-undefined))) 6648 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6649 (fr500 (unit u-check)) (fr550 (unit u-check))) 6650) 6651 6652(dni cckno 6653 "conditional check integer cc never" 6654 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6655 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) 6656 "cckno$pack $CRj_int,$CCi,$cond" 6657 (+ pack ICC_nev CRj_int OP_6A (rs-null) CCi cond OPE4_0 6658 (misc-null-9) (ICCi_3-null)) 6659 (if (eq CCi (or cond 2)) 6660 (check-semantics (const BI 0) CRj_int) 6661 (set CRj_int (cr-undefined))) 6662 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6663 (fr500 (unit u-check)) (fr550 (unit u-check))) 6664) 6665 6666(conditional-check-int-condition-code cck eq OP_6A OPE4_0 Ieq "check integer cc equal") 6667(conditional-check-int-condition-code cck ne OP_6A OPE4_0 Ine "check integer cc not equal") 6668(conditional-check-int-condition-code cck le OP_6A OPE4_0 Ile "check integer cc less or equal") 6669(conditional-check-int-condition-code cck gt OP_6A OPE4_0 Igt "check integer cc greater") 6670(conditional-check-int-condition-code cck lt OP_6A OPE4_0 Ilt "check integer cc less") 6671(conditional-check-int-condition-code cck ge OP_6A OPE4_0 Ige "check integer cc greater or equal") 6672(conditional-check-int-condition-code cck ls OP_6A OPE4_0 Ils "check integer cc less or equal unsigned") 6673(conditional-check-int-condition-code cck hi OP_6A OPE4_0 Ihi "check integer cc greater unsigned") 6674(conditional-check-int-condition-code cck c OP_6A OPE4_0 Ic "check integer cc carry set") 6675(conditional-check-int-condition-code cck nc OP_6A OPE4_0 Inc "check integer cc carry clear") 6676(conditional-check-int-condition-code cck n OP_6A OPE4_0 In "check integer cc negative") 6677(conditional-check-int-condition-code cck p OP_6A OPE4_0 Ip "check integer cc positive") 6678(conditional-check-int-condition-code cck v OP_6A OPE4_0 Iv "check integer cc overflow set") 6679(conditional-check-int-condition-code cck nv OP_6A OPE4_0 Inv "check integer cc overflow clear") 6680 6681(define-pmacro (conditional-check-float-condition-code prefix cc op ope test comment) 6682 (dni (.sym prefix cc) 6683 (comment) 6684 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6685 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) 6686 (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float,$CCi,$cond") 6687 (+ pack (.sym FCC_ cc) CRj_float op (rs-null) CCi cond ope 6688 (misc-null-9) FCCi_3) 6689 (if (eq CCi (or cond 2)) 6690 (check-semantics (test FCCi_3) CRj_float) 6691 (set CRj_float (cr-undefined))) 6692 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6693 (fr500 (unit u-check)) (fr550 (unit u-check))) 6694 ) 6695) 6696 6697(dni cfckra 6698 "conditional check float cc always" 6699 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6700 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) 6701 "cfckra$pack $CRj_float,$CCi,$cond" 6702 (+ pack FCC_ra CRj_float OP_6A (rs-null) CCi cond OPE4_1 6703 (misc-null-9) (FCCi_3-null)) 6704 (if (eq CCi (or cond 2)) 6705 (check-semantics (const BI 1) CRj_float) 6706 (set CRj_float (cr-undefined))) 6707 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6708 (fr500 (unit u-check)) (fr550 (unit u-check))) 6709) 6710 6711(dni cfckno 6712 "conditional check float cc never" 6713 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6714 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) 6715 "cfckno$pack $CRj_float,$CCi,$cond" 6716 (+ pack FCC_nev CRj_float OP_6A (rs-null) CCi cond OPE4_1 6717 (misc-null-9) (FCCi_3-null)) 6718 (if (eq CCi (or cond 2)) 6719 (check-semantics (const BI 0) CRj_float) 6720 (set CRj_float (cr-undefined))) 6721 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6722 (fr500 (unit u-check)) (fr550 (unit u-check))) 6723) 6724 6725(conditional-check-float-condition-code cfck ne OP_6A OPE4_1 Fne "check float cc not equal") 6726(conditional-check-float-condition-code cfck eq OP_6A OPE4_1 Feq "check float cc equal") 6727(conditional-check-float-condition-code cfck lg OP_6A OPE4_1 Flg "check float cc greater or less") 6728(conditional-check-float-condition-code cfck ue OP_6A OPE4_1 Fue "check float cc unordered or equal") 6729(conditional-check-float-condition-code cfck ul OP_6A OPE4_1 Ful "check float cc unordered or less") 6730(conditional-check-float-condition-code cfck ge OP_6A OPE4_1 Fge "check float cc greater or equal") 6731(conditional-check-float-condition-code cfck lt OP_6A OPE4_1 Flt "check float cc less") 6732(conditional-check-float-condition-code cfck uge OP_6A OPE4_1 Fuge "check float cc unordered greater or equal") 6733(conditional-check-float-condition-code cfck ug OP_6A OPE4_1 Fug "check float cc unordered or greater") 6734(conditional-check-float-condition-code cfck le OP_6A OPE4_1 Fle "check float cc less or equal") 6735(conditional-check-float-condition-code cfck gt OP_6A OPE4_1 Fgt "check float cc greater") 6736(conditional-check-float-condition-code cfck ule OP_6A OPE4_1 Fule "check float cc unordered less or equal") 6737(conditional-check-float-condition-code cfck u OP_6A OPE4_1 Fu "check float cc unordered") 6738(conditional-check-float-condition-code cfck o OP_6A OPE4_1 Fo "check float cc ordered") 6739 6740(dni cjmpl 6741 "conditional jump and link" 6742 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6743 (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL) 6744 "cjmpl$pack @($GRi,$GRj),$CCi,$cond" 6745 (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj) 6746 (if (eq CCi (or cond 2)) 6747 (jump-and-link-semantics GRi GRj LI)) 6748 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6749 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6750) 6751 6752(dni ccalll 6753 "conditional call and link" 6754 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6755 (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL) 6756 "ccalll$pack @($GRi,$GRj),$CCi,$cond" 6757 (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj) 6758 (if (eq CCi (or cond 2)) 6759 (jump-and-link-semantics GRi GRj LI)) 6760 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6761 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6762) 6763 6764(define-pmacro (cache-invalidate name cache all op ope profile comment) 6765 (dni name 6766 (comment) 6767 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6768 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6769 (.str name "$pack @($GRi,$GRj)") 6770 (+ pack (rd-null) op GRi ope GRj) 6771 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) all) 6772 profile 6773 ) 6774) 6775 6776(cache-invalidate ici insn 0 OP_03 OPE1_38 6777 ((fr400 (unit u-ici)) (fr450 (unit u-ici)) 6778 (fr500 (unit u-ici)) (fr550 (unit u-ici))) 6779 "invalidate insn cache") 6780(cache-invalidate dci data 0 OP_03 OPE1_3C 6781 ((fr400 (unit u-dci)) (fr450 (unit u-dci)) 6782 (fr500 (unit u-dci)) (fr550 (unit u-dci))) 6783 "invalidate data cache") 6784 6785(define-pmacro (cache-invalidate-entry name cache op ope profile comment) 6786 (dni name 6787 (comment) 6788 ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2) 6789 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6790 (.str name "$pack @($GRi,$GRj),$ae") 6791 (+ pack (misc-null-1) ae op GRi ope GRj) 6792 (if (eq ae 0) 6793 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) -1) ; Invalid ae setting for this insn 6794 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) ae)) 6795 profile 6796 ) 6797) 6798 6799(cache-invalidate-entry icei insn OP_03 OPE1_39 6800 ((fr400 (unit u-ici)) (fr450 (unit u-ici)) 6801 (fr550 (unit u-ici))) 6802 "invalidate insn cache entry") 6803(cache-invalidate-entry dcei data OP_03 OPE1_3A 6804 ((fr400 (unit u-dci)) (fr450 (unit u-dci)) 6805 (fr550 (unit u-dci))) 6806 "invalidate data cache entry") 6807 6808(dni dcf 6809 "Data cache flush" 6810 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6811 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6812 "dcf$pack @($GRi,$GRj)" 6813 (+ pack (rd-null) OP_03 GRi OPE1_3D GRj) 6814 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) 0) 6815 ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) 6816 (fr500 (unit u-dcf)) (fr550 (unit u-dcf))) 6817) 6818 6819(dni dcef 6820 "Data cache entry flush" 6821 ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2) 6822 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6823 "dcef$pack @($GRi,$GRj),$ae" 6824 (+ pack (misc-null-1) ae OP_03 GRi OPE1_3B GRj) 6825 (if (eq ae 0) 6826 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) -1) 6827 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) ae)) 6828 ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) (fr550 (unit u-dcf))) 6829) 6830 6831(define-pmacro (write-TLB name insn op ope comment) 6832 (dni name 6833 (comment) 6834 ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED) 6835 (.str insn "$pack $GRk,@($GRi,$GRj)") 6836 (+ pack GRk op GRi ope GRj) 6837 (nop) ; for now 6838 () 6839 ) 6840) 6841 6842(write-TLB witlb witlb OP_03 OPE1_32 "write for insn TLB") 6843(write-TLB wdtlb wdtlb OP_03 OPE1_36 "write for data TLB") 6844 6845(define-pmacro (invalidate-TLB name insn op ope comment) 6846 (dni name 6847 (comment) 6848 ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED) 6849 (.str insn "$pack @($GRi,$GRj)") 6850 (+ pack (rd-null) op GRi ope GRj) 6851 (nop) ; for now 6852 () 6853 ) 6854) 6855 6856(invalidate-TLB itlbi itlbi OP_03 OPE1_33 "invalidate insn TLB") 6857(invalidate-TLB dtlbi dtlbi OP_03 OPE1_37 "invalidate data TLB") 6858 6859(define-pmacro (cache-preload name cache pipe attrs op ope profile comment) 6860 (dni name 6861 (comment) 6862 (.splice (UNIT pipe) (FR500-MAJOR C-2) 6863 (FR400-MAJOR C-2) (.unsplice attrs)) 6864 (.str name "$pack $GRi,$GRj,$lock") 6865 (+ pack (misc-null-1) lock op GRi ope GRj) 6866 (c-call VOID (.str "@cpu@_" cache "_cache_preload") GRi GRj lock) 6867 profile 6868 ) 6869) 6870 6871(cache-preload icpl insn C ((FR550-MAJOR C-2) (FR450-MAJOR C-2)) OP_03 OPE1_30 6872 ((fr400 (unit u-icpl)) (fr450 (unit u-icpl)) 6873 (fr500 (unit u-icpl)) (fr550 (unit u-icpl))) 6874 "preload insn cache") 6875(cache-preload dcpl data DCPL ((FR550-MAJOR I-8) (FR450-MAJOR I-2)) OP_03 OPE1_34 6876 ((fr400 (unit u-dcpl)) (fr450 (unit u-dcpl)) 6877 (fr500 (unit u-dcpl)) (fr550 (unit u-dcpl))) 6878 "preload data cache") 6879 6880(define-pmacro (cache-unlock name cache op ope profile comment) 6881 (dni name 6882 (comment) 6883 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6884 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6885 (.str name "$pack $GRi") 6886 (+ pack (rd-null) op GRi ope (GRj-null)) 6887 (c-call VOID (.str "@cpu@_" cache "_cache_unlock") GRi) 6888 profile 6889 ) 6890) 6891 6892(cache-unlock icul insn OP_03 OPE1_31 6893 ((fr400 (unit u-icul)) (fr450 (unit u-icul)) 6894 (fr500 (unit u-icul)) (fr550 (unit u-icul))) 6895 "unlock insn cache") 6896(cache-unlock dcul data OP_03 OPE1_35 6897 ((fr400 (unit u-dcul)) (fr450 (unit u-dcul)) 6898 (fr500 (unit u-dcul)) (fr550 (unit u-dcul))) 6899 "unlock data cache") 6900 6901(define-pmacro (barrier name insn op ope profile comment) 6902 (dni name 6903 (comment) 6904 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6905 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6906 (.str insn "$pack") 6907 (+ pack (rd-null) op (rs-null) ope (GRj-null)) 6908 (nop) ; sufficient implementation 6909 profile 6910 ) 6911) 6912 6913(barrier bar bar OP_03 OPE1_3E 6914 ((fr400 (unit u-barrier)) (fr450 (unit u-barrier)) 6915 (fr500 (unit u-barrier))) 6916 "barrier") 6917(barrier membar membar OP_03 OPE1_3F 6918 ((fr400 (unit u-membar)) (fr450 (unit u-membar)) 6919 (fr500 (unit u-membar))) 6920 "memory barrier") 6921 6922; Load real address instructions 6923(define-pmacro (load-real-address name insn what op ope) 6924 (dni name 6925 (.str "Load real address of " what) 6926 ((UNIT C) (FR450-MAJOR C-2) (MACH fr450)) 6927 (.str insn "$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS") 6928 (+ pack GRk op GRi ope LRAE LRAD LRAS (LRA-null)) 6929 (nop) ; not simulated 6930 () 6931 ) 6932) 6933 6934(load-real-address lrai "lrai" "instruction" OP_03 OPE1_20) 6935(load-real-address lrad "lrad" "data" OP_03 OPE1_21) 6936 6937(dni tlbpr 6938 "TLB Probe" 6939 ((UNIT C) (FR450-MAJOR C-2) (MACH fr450)) 6940 "tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL" 6941 (+ pack (TLBPR-null) TLBPRopx TLBPRL OP_03 GRi OPE1_24 GRj) 6942 (nop) ; not simulated 6943 () 6944) 6945 6946; Coprocessor operations 6947(define-pmacro (cop-op num op) 6948 (dni (.sym cop num) 6949 "Coprocessor operation" 6950 ((UNIT C) (FR500-MAJOR C-2) (MACH frv)) 6951 (.str "cop" num "$pack $s6_1,$CPRi,$CPRj,$CPRk") 6952 (+ pack CPRk op CPRi s6_1 CPRj) 6953 (nop) ; sufficient implementation 6954 () 6955 ) 6956) 6957 6958(cop-op 1 OP_7E) 6959(cop-op 2 OP_7F) 6960 6961(define-pmacro (clear-ne-flag-semantics target_index is_float) 6962 (c-call VOID "@cpu@_clear_ne_flags" target_index is_float) 6963) 6964 6965(define-pmacro (clear-ne-flag-r name op ope reg is_float attr profile comment) 6966 (dni name 6967 (comment) 6968 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr) 6969 (.str name "$pack $" reg "k") 6970 (+ pack (.sym reg k) op (rs-null) ope (GRj-null)) 6971 (sequence () 6972 ; hack to get this referenced for profiling 6973 (c-raw-call VOID "frv_ref_SI" (.sym reg k)) 6974 (clear-ne-flag-semantics (index-of (.sym reg k)) is_float)) 6975 profile 6976 ) 6977) 6978 6979(clear-ne-flag-r clrgr OP_0A OPE1_00 GR 0 NA 6980 ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr))) 6981 "Clear GR NE flag") 6982(clear-ne-flag-r clrfr OP_0A OPE1_02 FR 1 FR-ACCESS 6983 ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr))) 6984 "Clear FR NE flag") 6985 6986(define-pmacro (clear-ne-flag-all name op ope is_float attr profile comment) 6987 (dni name 6988 (comment) 6989 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr) 6990 (.str name "$pack") 6991 (+ pack (rd-null) op (rs-null) ope (GRj-null)) 6992 (clear-ne-flag-semantics -1 is_float) 6993 profile 6994 ) 6995) 6996 6997(clear-ne-flag-all clrga OP_0A OPE1_01 0 NA 6998 ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr))) 6999 "Clear GR NE flag ALL") 7000(clear-ne-flag-all clrfa OP_0A OPE1_03 1 FR-ACCESS 7001 ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr))) 7002 "Clear FR NE flag ALL") 7003 7004(define-pmacro (commit-semantics target_index is_float) 7005 (c-call VOID "@cpu@_commit" target_index is_float) 7006) 7007 7008(define-pmacro (commit-r name op ope reg is_float attr comment) 7009 (dni name 7010 (comment) 7011 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr) 7012 (.str name "$pack $" reg "k") 7013 (+ pack (.sym reg k) op (rs-null) ope (GRj-null)) 7014 (commit-semantics (index-of (.sym reg k)) is_float) 7015 ((fr500 (unit u-commit)) (fr550 (unit u-commit))) 7016 ) 7017) 7018 7019(commit-r commitgr OP_0A OPE1_04 GR 0 NA "commit exceptions, specific GR") 7020(commit-r commitfr OP_0A OPE1_06 FR 1 FR-ACCESS "commit exceptions, specific FR") 7021 7022(define-pmacro (commit name op ope is_float attr comment) 7023 (dni name 7024 (comment) 7025 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr) 7026 (.str name "$pack") 7027 (+ pack (rd-null) op (rs-null) ope (GRj-null)) 7028 (commit-semantics -1 is_float) 7029 ((fr500 (unit u-commit)) (fr550 (unit u-commit))) 7030 ) 7031) 7032 7033(commit commitga OP_0A OPE1_05 0 NA "commit exceptions, any GR") 7034(commit commitfa OP_0A OPE1_07 1 FR-ACCESS "commit exceptions, any FR") 7035 7036(define-pmacro (floating-point-conversion 7037 name op ope conv mode src targ attr comment) 7038 (dni name 7039 (comment) 7040 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) 7041 (.str name "$pack $" src ",$" targ) 7042 (+ pack targ op (rs-null) ope src) 7043 (set targ (conv mode src)) 7044 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert))) 7045 ) 7046) 7047 7048(floating-point-conversion fitos OP_79 OPE1_00 float SF FRintj FRk 7049 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7050 "Convert Integer to Single") 7051(floating-point-conversion fstoi OP_79 OPE1_01 fix SI FRj FRintk 7052 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7053 "Convert Single to Integer") 7054(floating-point-conversion fitod OP_7A OPE1_00 float DF FRintj FRdoublek 7055 ((MACH frv)) 7056 "Convert Integer to Double") 7057(floating-point-conversion fdtoi OP_7A OPE1_01 fix SI FRdoublej FRintk 7058 ((MACH frv)) 7059 "Convert Double to Integer") 7060 7061(define-pmacro (floating-point-dual-conversion 7062 name op ope conv mode src src_hw targ targ_hw attr comment) 7063 (dni name 7064 (comment) 7065 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) attr) 7066 (.str name "$pack $" src ",$" targ) 7067 (+ pack targ op (rs-null) ope src) 7068 (sequence () 7069 (set targ (conv mode src)) 7070 (set (nextreg targ_hw targ 1) 7071 (conv mode (nextreg src_hw src 1)))) 7072 ((fr500 (unit u-float-dual-convert))) 7073 ) 7074) 7075 7076(floating-point-dual-conversion fditos OP_79 OPE1_10 float SF FRintj h-fr_int FRk h-fr NA "Dual Convert Integer to Single") 7077(floating-point-dual-conversion fdstoi OP_79 OPE1_11 fix SI FRj h-fr FRintk h-fr_int NA "Dual Convert Single to Integer") 7078 7079(define-pmacro (ne-floating-point-dual-conversion 7080 name op ope conv mode src src_hw targ targ_hw attr comment) 7081 (dni name 7082 (comment) 7083 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) NON-EXCEPTING attr) 7084 (.str name "$pack $" src ",$" targ) 7085 (+ pack targ op (rs-null) ope src) 7086 (sequence () 7087 (c-call VOID "@cpu@_set_ne_index" (index-of targ)) 7088 (set targ (conv mode src)) 7089 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1)) 7090 (set (nextreg targ_hw targ 1) 7091 (conv mode (nextreg src_hw src 1)))) 7092 ((fr500 (unit u-float-dual-convert))) 7093 ) 7094) 7095 7096(ne-floating-point-dual-conversion nfditos OP_79 OPE1_30 float SF FRintj h-fr_int FRk h-fr NA "Non excepting dual Convert Integer to Single") 7097(ne-floating-point-dual-conversion nfdstoi OP_79 OPE1_31 fix SI FRj h-fr FRintk h-fr_int NA "Non excepting dual Convert Single to Integer") 7098 7099(define-pmacro (conditional-floating-point-conversion 7100 name op ope conv mode src targ comment) 7101 (dni name 7102 (comment) 7103 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7104 (.str name "$pack $" src ",$" targ ",$CCi,$cond") 7105 (+ pack targ op (rs-null) CCi cond ope src) 7106 (if (eq CCi (or cond 2)) 7107 (set targ (conv mode src))) 7108 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert))) 7109 ) 7110) 7111 7112(conditional-floating-point-conversion cfitos OP_6B OPE4_0 float SF FRintj FRk "Conditional convert Integer to Single") 7113(conditional-floating-point-conversion cfstoi OP_6B OPE4_1 fix SI FRj FRintk "Conditional convert Single to Integer") 7114 7115(define-pmacro (ne-floating-point-conversion 7116 name op ope conv mode src targ comment) 7117 (dni name 7118 (comment) 7119 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7120 (.str name "$pack $" src ",$" targ) 7121 (+ pack targ op (rs-null) ope src) 7122 (sequence () 7123 (c-call VOID "@cpu@_set_ne_index" (index-of targ)) 7124 (set targ (conv mode src))) 7125 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert))) 7126 ) 7127) 7128 7129(ne-floating-point-conversion nfitos OP_79 OPE1_20 float SF FRintj FRk "NE convert Integer to Single") 7130(ne-floating-point-conversion nfstoi OP_79 OPE1_21 fix SI FRj FRintk "NE convert Single to Integer") 7131 7132(register-transfer fmovs OP_79 OPE1_02 7133 FRj FRk FMALL 7134 ((FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7135 ((fr500 (unit u-fr2fr))) 7136 "Move Single Float") 7137(register-transfer fmovd OP_7A OPE1_02 7138 ; TODO -- unit doesn't handle extra register 7139 FRdoublej FRdoublek FM01 7140 ((FR500-MAJOR F-1) (MACH frv)) 7141 ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr))) 7142 "Move Double Float") 7143 7144(dni fdmovs 7145 "Dual move single float" 7146 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) 7147 "fdmovs$pack $FRj,$FRk" 7148 (+ pack FRk OP_79 (rs-null) OPE1_12 FRj) 7149 (sequence () 7150 (set FRk FRj) 7151 (set (nextreg h-fr FRk 1) (nextreg h-fr FRj 1))) 7152 ; TODO -- unit doesn't handle extra register 7153 ((fr500 (unit u-fr2fr))) 7154) 7155 7156(conditional-register-transfer cfmovs OP_6C OPE4_0 FRj FRk FMALL 7157 ((FR500-MAJOR F-1) (FR550-MAJOR F-2) 7158 (MACH simple,tomcat,fr500,fr550,frv)) 7159 ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr))) 7160 "Conditional move Single Float") 7161 7162(define-pmacro (floating-point-neg name src targ op ope attr comment) 7163 (dni name 7164 (comment) 7165 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) 7166 (.str name "$pack $" src ",$" targ) 7167 (+ pack src op (rs-null) ope targ) 7168 (set targ (neg src)) 7169 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7170 ) 7171) 7172 7173(floating-point-neg fnegs FRj FRk OP_79 OPE1_03 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Floating point negate, single") 7174(floating-point-neg fnegd FRdoublej FRdoublek OP_7A OPE1_03 ((MACH frv)) "Floating point negate, double") 7175 7176(dni fdnegs 7177 "Floating point dual negate, single" 7178 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) 7179 "fdnegs$pack $FRj,$FRk" 7180 (+ pack FRk OP_79 (rs-null) OPE1_13 FRj) 7181 (sequence () 7182 (set FRk (neg FRj)) 7183 (set (nextreg h-fr FRk 1) (neg (nextreg h-fr FRj 1)))) 7184 ((fr500 (unit u-float-dual-arith))) 7185) 7186 7187(dni cfnegs 7188 "Conditional floating point negate, single" 7189 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7190 "cfnegs$pack $FRj,$FRk,$CCi,$cond" 7191 (+ pack FRj OP_6C (rs-null) CCi cond OPE4_1 FRk) 7192 (if (eq CCi (or cond 2)) 7193 (set FRk (neg FRj))) 7194 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7195) 7196 7197(define-pmacro (float-abs name src targ op ope attr comment) 7198 (dni name 7199 (comment) 7200 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) 7201 (.str name "$pack $" src ",$" targ ) 7202 (+ pack targ op (rs-null) ope src) 7203 (set targ (abs src)) 7204 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7205 ) 7206) 7207 7208(float-abs fabss FRj FRk OP_79 OPE1_04 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Float absolute value, single") 7209(float-abs fabsd FRdoublej FRdoublek OP_7A OPE1_04 ((MACH frv)) "Float absolute value, double") 7210 7211(dni fdabss 7212 "Floating point dual absolute value, single" 7213 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) 7214 "fdabss$pack $FRj,$FRk" 7215 (+ pack FRk OP_79 (rs-null) OPE1_14 FRj) 7216 (sequence () 7217 (set FRk (abs FRj)) 7218 (set (nextreg h-fr FRk 1) (abs (nextreg h-fr FRj 1)))) 7219 ((fr500 (unit u-float-dual-arith))) 7220) 7221 7222(dni cfabss 7223 "Conditional floating point absolute value, single" 7224 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7225 "cfabss$pack $FRj,$FRk,$CCi,$cond" 7226 (+ pack FRj OP_6C (rs-null) CCi cond OPE4_2 FRk) 7227 (if (eq CCi (or cond 2)) 7228 (set FRk (abs FRj))) 7229 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7230) 7231 7232(dni fsqrts 7233 "Square root single" 7234 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv)) 7235 "fsqrts$pack $FRj,$FRk" 7236 (+ pack FRk OP_79 (rs-null) OPE1_05 FRj) 7237 (set FRk (sqrt SF FRj)) 7238 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt))) 7239) 7240 7241(dni fdsqrts 7242 "Dual square root single" 7243 ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4)) 7244 "fdsqrts$pack $FRj,$FRk" 7245 (+ pack FRk OP_79 (rs-null) OPE1_15 FRj) 7246 (sequence () 7247 (set FRk (sqrt SF FRj)) 7248 (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1)))) 7249 ((fr500 (unit u-float-dual-sqrt))) 7250) 7251 7252(dni nfdsqrts 7253 "Non excepting Dual square root single" 7254 ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4) NON-EXCEPTING) 7255 "nfdsqrts$pack $FRj,$FRk" 7256 (+ pack FRk OP_79 (rs-null) OPE1_35 FRj) 7257 (sequence () 7258 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7259 (set FRk (sqrt SF FRj)) 7260 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7261 (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1)))) 7262 ((fr500 (unit u-float-dual-sqrt))) 7263) 7264 7265(dni fsqrtd 7266 "Square root double" 7267 ((UNIT FM01) (FR500-MAJOR F-4) (MACH frv)) 7268 "fsqrtd$pack $FRdoublej,$FRdoublek" 7269 (+ pack FRdoublek OP_7A (rs-null) OPE1_05 FRdoublej) 7270 (set FRdoublek (sqrt DF FRdoublej)) 7271 ((fr500 (unit u-float-sqrt))) 7272) 7273 7274(dni cfsqrts 7275 "Conditional square root single" 7276 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv)) 7277 "cfsqrts$pack $FRj,$FRk,$CCi,$cond" 7278 (+ pack FRk OP_6E (rs-null) CCi cond OPE4_2 FRj) 7279 (if (eq CCi (or cond 2)) 7280 (set FRk (sqrt SF FRj))) 7281 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt))) 7282) 7283 7284(dni nfsqrts 7285 "Non exception square root, single" 7286 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv)) 7287 "nfsqrts$pack $FRj,$FRk" 7288 (+ pack FRk OP_79 (rs-null) OPE1_25 FRj) 7289 (sequence () 7290 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7291 (set FRk (sqrt SF FRj))) 7292 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt))) 7293) 7294 7295(define-pmacro (float-binary-op-s name pipe attr operation op ope comment) 7296 (dni name 7297 (comment) 7298 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) (.unsplice attr)) 7299 (.str name "$pack $FRi,$FRj,$FRk") 7300 (+ pack FRk op FRi ope FRj) 7301 (set FRk (operation FRi FRj)) 7302 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7303 ) 7304) 7305 7306(float-binary-op-s fadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_06 "add single float") 7307(float-binary-op-s fsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_07 "sub single float") 7308(float-binary-op-s fmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_08 "mul single float") 7309 7310(dni fdivs 7311 "div single float" 7312 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv)) 7313 "fdivs$pack $FRi,$FRj,$FRk" 7314 (+ pack FRk OP_79 FRi OPE1_09 FRj) 7315 (set FRk (div FRi FRj)) 7316 ((fr500 (unit u-float-div)) 7317 (fr550 (unit u-float-div))) 7318) 7319 7320(define-pmacro (float-binary-op-d name operation op ope major comment) 7321 (dni name 7322 (comment) 7323 ((UNIT FMALL) (FR500-MAJOR major) (MACH frv)) 7324 (.str name "$pack $FRdoublei,$FRdoublej,$FRdoublek") 7325 (+ pack FRdoublek op FRdoublei ope FRdoublej) 7326 (set FRdoublek (operation FRdoublei FRdoublej)) 7327 ((fr500 (unit u-float-arith))) 7328 ) 7329) 7330 7331(float-binary-op-d faddd add OP_7A OPE1_06 F-2 "add double float") 7332(float-binary-op-d fsubd sub OP_7A OPE1_07 F-2 "sub double float") 7333(float-binary-op-d fmuld mul OP_7A OPE1_08 F-3 "mul double float") 7334(float-binary-op-d fdivd div OP_7A OPE1_09 F-4 "div double float") 7335 7336(define-pmacro (conditional-float-binary-op name pipe attr operation op ope profile comment) 7337 (dni name 7338 (comment) 7339 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) 7340 (.unsplice attr)) 7341 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") 7342 (+ pack FRk op FRi CCi cond ope FRj) 7343 (if (eq CCi (or cond 2)) 7344 (set FRk (operation FRi FRj))) 7345 profile 7346 ) 7347) 7348 7349(conditional-float-binary-op cfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_6D OPE4_0 7350 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7351 "cond add single") 7352(conditional-float-binary-op cfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_6D OPE4_1 7353 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7354 "cond sub single") 7355(conditional-float-binary-op cfmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_6E OPE4_0 7356 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7357 "cond mul single") 7358(conditional-float-binary-op cfdivs FM01 ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_6E OPE4_1 7359 ((fr500 (unit u-float-div)) (fr550 (unit u-float-div))) 7360 "cond div single") 7361 7362(define-pmacro (ne-float-binary-op name pipe attr operation op ope profile comment) 7363 (dni name 7364 (comment) 7365 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) 7366 (.unsplice attr)) 7367 (.str name "$pack $FRi,$FRj,$FRk") 7368 (+ pack FRk op FRi ope FRj) 7369 (sequence () 7370 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7371 (set FRk (operation FRi FRj))) 7372 profile 7373 ) 7374) 7375 7376(ne-float-binary-op nfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_26 7377 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7378 "ne add single") 7379(ne-float-binary-op nfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_27 7380 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7381 "ne sub single") 7382(ne-float-binary-op nfmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_28 7383 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7384 "ne mul single") 7385(ne-float-binary-op nfdivs FM01 ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_79 OPE1_29 7386 ((fr500 (unit u-float-div)) (fr550 (unit u-float-div))) 7387 "ne div single") 7388 7389(define-pmacro (fcc-eq) 8) 7390(define-pmacro (fcc-lt) 4) 7391(define-pmacro (fcc-gt) 2) 7392(define-pmacro (fcc-uo) 1) 7393 7394(define-pmacro (compare-and-set-fcc arg1 arg2 fcc) 7395 (if (gt arg1 arg2) 7396 (set fcc (fcc-gt)) 7397 (if (eq arg1 arg2) 7398 (set fcc (fcc-eq)) 7399 (if (lt arg1 arg2) 7400 (set fcc (fcc-lt)) 7401 (set fcc (fcc-uo))))) 7402) 7403 7404(dni fcmps 7405 "compare single float" 7406 ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7407 "fcmps$pack $FRi,$FRj,$FCCi_2" 7408 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_0A FRj) 7409 (compare-and-set-fcc FRi FRj FCCi_2) 7410 ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare))) 7411) 7412 7413(dni fcmpd 7414 "compare double float" 7415 ((UNIT FMALL) (FR500-MAJOR F-2) (MACH frv)) 7416 "fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2" 7417 (+ pack (cond-null) FCCi_2 OP_7A FRdoublei OPE1_0A FRdoublej) 7418 (compare-and-set-fcc FRdoublei FRdoublej FCCi_2) 7419 ((fr500 (unit u-float-compare))) 7420) 7421 7422(dni cfcmps 7423 "Conditional compare single, float" 7424 ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7425 "cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond" 7426 (+ pack (cond-null) FCCi_2 OP_6D FRi CCi cond OPE4_2 FRj) 7427 (if (eq CCi (or cond 2)) 7428 (compare-and-set-fcc FRi FRj FCCi_2)) 7429 ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare))) 7430) 7431 7432(dni fdcmps 7433 "float dual compare single" 7434 ((UNIT FMALL) (FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7435 "fdcmps$pack $FRi,$FRj,$FCCi_2" 7436 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_1A FRj) 7437 (sequence () 7438 (compare-and-set-fcc FRi FRj FCCi_2) 7439 (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1) 7440 (nextreg h-fccr FCCi_2 1))) 7441 ((fr500 (unit u-float-dual-compare)) (fr550 (unit u-float-dual-compare))) 7442) 7443 7444(define-pmacro (float-mul-with-add name add_sub arg1 arg2 targ op ope comment) 7445 (dni name 7446 (comment) 7447 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) 7448 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7449 (+ pack targ op arg1 ope arg2) 7450 (set targ (add_sub (mul arg1 arg2) targ)) 7451 ((fr500 (unit u-float-dual-arith))) 7452 ) 7453) 7454 7455(float-mul-with-add fmadds add FRi FRj FRk OP_79 OPE1_0B "mul with add, single") 7456(float-mul-with-add fmsubs sub FRi FRj FRk OP_79 OPE1_0C "mul with sub, single") 7457 7458(float-mul-with-add fmaddd add FRdoublei FRdoublej FRdoublek OP_7A OPE1_0B "mul with add, double") 7459(float-mul-with-add fmsubd sub FRdoublei FRdoublej FRdoublek OP_7A OPE1_0C "mul with sub, double") 7460 7461(dni fdmadds 7462 "Float dual multiply with add" 7463 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) 7464 "fdmadds$pack $FRi,$FRj,$FRk" 7465 (+ pack FRk OP_79 FRi OPE1_1B FRj) 7466 (sequence () 7467 (set FRk (add (mul FRi FRj) FRk)) 7468 (set (nextreg h-fr FRk 1) 7469 (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)) 7470 (nextreg h-fr FRk 1)))) 7471 ; TODO dual registers not referenced for profiling 7472 ((fr500 (unit u-float-dual-arith))) 7473) 7474 7475(dni nfdmadds 7476 "Non excepting float dual multiply with add" 7477 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) 7478 "nfdmadds$pack $FRi,$FRj,$FRk" 7479 (+ pack FRk OP_79 FRi OPE1_3B FRj) 7480 (sequence () 7481 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7482 (set FRk (add (mul FRi FRj) FRk)) 7483 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7484 (set (nextreg h-fr FRk 1) 7485 (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)) 7486 (nextreg h-fr FRk 1)))) 7487 ; TODO dual registers not referenced for profiling 7488 ((fr500 (unit u-float-dual-arith))) 7489) 7490 7491(define-pmacro (conditional-float-mul-with-add 7492 name add_sub arg1 arg2 targ op ope comment) 7493 (dni name 7494 (comment) 7495 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) CONDITIONAL) 7496 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") 7497 (+ pack FRk op FRi CCi cond ope FRj) 7498 (if (eq CCi (or cond 2)) 7499 (set targ (add_sub (mul arg1 arg2) targ))) 7500 ((fr500 (unit u-float-dual-arith))) 7501 ) 7502) 7503 7504(conditional-float-mul-with-add cfmadds add FRi FRj FRk OP_6F OPE4_0 "conditional mul with add, single") 7505(conditional-float-mul-with-add cfmsubs sub FRi FRj FRk OP_6F OPE4_1 "conditional mul with sub, single") 7506 7507(define-pmacro (ne-float-mul-with-add name add_sub arg1 arg2 targ op ope comment) 7508 (dni name 7509 (comment) 7510 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) NON-EXCEPTING) 7511 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7512 (+ pack targ op arg1 ope arg2) 7513 (sequence () 7514 (c-call VOID "@cpu@_set_ne_index" (index-of targ)) 7515 (set targ (add_sub (mul arg1 arg2) targ))) 7516 ((fr500 (unit u-float-dual-arith))) 7517 ) 7518) 7519 7520(ne-float-mul-with-add nfmadds add FRi FRj FRk OP_79 OPE1_2B "non excepting mul with add, single") 7521(ne-float-mul-with-add nfmsubs sub FRi FRj FRk OP_79 OPE1_2C "non excepting mul with sub, single") 7522 7523(define-pmacro (float-parallel-mul-add-semantics cond add_sub arg1 arg2 targ) 7524 (if cond 7525 (sequence () 7526 (set targ (mul arg1 arg2)) 7527 (set (nextreg h-fr targ 1) 7528 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))))) 7529) 7530 7531(define-pmacro (float-parallel-mul-add 7532 name add_sub arg1 arg2 targ op ope comment) 7533 (dni name 7534 (comment) 7535 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7536 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7537 (+ pack targ op arg1 ope arg2) 7538 (float-parallel-mul-add-semantics 1 add_sub arg1 arg2 targ) 7539 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7540 ) 7541) 7542 7543(float-parallel-mul-add fmas add FRi FRj FRk OP_79 OPE1_0E "parallel mul/add, single") 7544(float-parallel-mul-add fmss sub FRi FRj FRk OP_79 OPE1_0F "parallel mul/sub, single") 7545 7546(define-pmacro (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) 7547 (sequence () 7548 (set targ (mul arg1 arg2)) 7549 (set (nextreg h-fr targ 1) 7550 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))) 7551 (set (nextreg h-fr targ 2) 7552 (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2))) 7553 (set (nextreg h-fr targ 3) 7554 (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3)))) 7555) 7556 7557(define-pmacro (float-dual-parallel-mul-add 7558 name add_sub arg1 arg2 targ op ope comment) 7559 (dni name 7560 (comment) 7561 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) 7562 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7563 (+ pack targ op arg1 ope arg2) 7564 (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) 7565 () 7566 ) 7567) 7568 7569(float-dual-parallel-mul-add fdmas add FRi FRj FRk OP_79 OPE1_1C "dual parallel mul/add, single") 7570(float-dual-parallel-mul-add fdmss sub FRi FRj FRk OP_79 OPE1_1D "dual parallel mul/sub, single") 7571 7572(define-pmacro (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) 7573 (sequence () 7574 (c-call VOID "@cpu@_set_ne_index" (index-of targ)) 7575 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1)) 7576 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 2)) 7577 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 3)) 7578 (set targ (mul arg1 arg2)) 7579 (set (nextreg h-fr targ 1) 7580 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))) 7581 (set (nextreg h-fr targ 2) 7582 (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2))) 7583 (set (nextreg h-fr targ 3) 7584 (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3)))) 7585) 7586 7587(define-pmacro (ne-float-dual-parallel-mul-add 7588 name add_sub arg1 arg2 targ op ope comment) 7589 (dni name 7590 (comment) 7591 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) 7592 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7593 (+ pack targ op arg1 ope arg2) 7594 (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) 7595 () 7596 ) 7597) 7598 7599(ne-float-dual-parallel-mul-add nfdmas add FRi FRj FRk OP_79 OPE1_3C "non excepting dual parallel mul/add, single") 7600(ne-float-dual-parallel-mul-add nfdmss sub FRi FRj FRk OP_79 OPE1_3D "non excepting dual parallel mul/sub, single") 7601 7602(define-pmacro (conditional-float-parallel-mul-add name add_sub op ope comment) 7603 (dni name 7604 (comment) 7605 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) CONDITIONAL (MACH simple,tomcat,fr500,fr550,frv)) 7606 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") 7607 (+ pack FRk op FRi CCi cond ope FRj) 7608 (float-parallel-mul-add-semantics (eq CCi (or cond 2)) 7609 add_sub FRi FRj FRk) 7610 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7611 ) 7612) 7613 7614(conditional-float-parallel-mul-add cfmas add OP_6F OPE4_2 "conditional parallel mul/add, single") 7615(conditional-float-parallel-mul-add cfmss sub OP_6F OPE4_3 "conditional parallel mul/sub, single") 7616 7617(define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ) 7618 (sequence () 7619 (set targ (ftrunc SF (mul DF (fext DF arg1) (fext DF arg2)))) 7620 (set (nextreg h-fr targ 1) 7621 (ftrunc SF (add_sub DF 7622 (fext DF (nextreg h-fr arg1 1)) 7623 (fext DF (nextreg h-fr arg2 1)))))) 7624) 7625 7626(define-pmacro (float-parallel-mul-add-double 7627 name add_sub arg1 arg2 targ op ope comment) 7628 (dni name 7629 (comment) 7630 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) 7631 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7632 (+ pack targ op arg1 ope arg2) 7633 (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ) 7634 () 7635 ) 7636) 7637 7638(float-parallel-mul-add-double fmad add FRi FRj FRk OP_7A OPE1_0E "parallel mul/add, double") 7639(float-parallel-mul-add-double fmsd sub FRi FRj FRk OP_7A OPE1_0F "parallel mul/sub, double") 7640 7641(define-pmacro (ne-float-parallel-mul-add name add_sub op ope comment) 7642 (dni name 7643 (comment) 7644 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7645 (.str name "$pack $FRi,$FRj,$FRk") 7646 (+ pack FRk op FRi ope FRj) 7647 (sequence () 7648 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7649 (set FRk (mul FRi FRj)) 7650 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7651 (set (nextreg h-fr FRk 1) 7652 (add_sub (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) 7653 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7654 ) 7655) 7656 7657(ne-float-parallel-mul-add nfmas add OP_79 OPE1_2E "ne parallel mul/add,single") 7658(ne-float-parallel-mul-add nfmss sub OP_79 OPE1_2F "ne parallel mul/sub,single") 7659 7660(define-pmacro (float-dual-arith name attr oper1 oper2 op ope comment) 7661 (dni name 7662 (comment) 7663 (.splice (UNIT FM01) (.unsplice attr)) 7664 (.str name "$pack $FRi,$FRj,$FRk") 7665 (+ pack FRk op FRi ope FRj) 7666 (sequence () 7667 (set FRk (oper1 FRi FRj)) 7668 (set (nextreg h-fr FRk 1) 7669 (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) 7670 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7671 ) 7672) 7673 7674(float-dual-arith fdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_16 "dual add, single") 7675(float-dual-arith fdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_17 "dual sub, single") 7676(float-dual-arith fdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_18 "dual mul, single") 7677(float-dual-arith fddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_19 "dual div,single") 7678(float-dual-arith fdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_1E "dual add/sub, single") 7679 7680(dni fdmulcs 7681 "Float dual cross multiply single" 7682 ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7683 "fdmulcs$pack $FRi,$FRj,$FRk" 7684 (+ pack FRk OP_79 FRi OPE1_1F FRj) 7685 (sequence () 7686 (set FRk (mul FRi (nextreg h-fr FRj 1))) 7687 (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj))) 7688 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7689) 7690 7691(dni nfdmulcs 7692 "NE float dual cross multiply single" 7693 ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7694 "nfdmulcs$pack $FRi,$FRj,$FRk" 7695 (+ pack FRk OP_79 FRi OPE1_3F FRj) 7696 (sequence () 7697 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7698 (set FRk (mul FRi (nextreg h-fr FRj 1))) 7699 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7700 (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj))) 7701 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7702) 7703 7704(define-pmacro (ne-float-dual-arith name attr oper1 oper2 op ope comment) 7705 (dni name 7706 (comment) 7707 (.splice (UNIT FM01) (.unsplice attr)) 7708 (.str name "$pack $FRi,$FRj,$FRk") 7709 (+ pack FRk op FRi ope FRj) 7710 (sequence () 7711 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7712 (set FRk (oper1 FRi FRj)) 7713 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7714 (set (nextreg h-fr FRk 1) 7715 (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) 7716 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7717 ) 7718) 7719 7720(ne-float-dual-arith nfdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_36 "ne dual add, single") 7721(ne-float-dual-arith nfdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_37 "ne dual sub, single") 7722(ne-float-dual-arith nfdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_38 "ne dual mul, single") 7723(ne-float-dual-arith nfddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_39 "ne dual div,single") 7724(ne-float-dual-arith nfdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_3E "ne dual add/sub, single") 7725 7726(dni nfdcmps 7727 "non-excepting dual float compare" 7728 ((UNIT FM01) (FR500-MAJOR F-6) (MACH simple,tomcat,frv)) 7729 "nfdcmps$pack $FRi,$FRj,$FCCi_2" 7730 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_3A FRj) 7731 (sequence () 7732 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7733 (compare-and-set-fcc FRi FRj FCCi_2) 7734 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7735 (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1) 7736 (nextreg h-fccr FCCi_2 1))) 7737 ((fr500 (unit u-float-dual-compare))) 7738) 7739 7740; Media Instructions 7741; 7742(define-pmacro (halfword hilo arg offset) 7743 (reg (.sym h-fr_ hilo) (add (index-of arg) offset))) 7744 7745(dni mhsetlos 7746 "Media set lower signed 12 bits" 7747 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7748 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7749 "mhsetlos$pack $u12,$FRklo" 7750 (+ pack FRklo OP_78 OPE1_20 u12) 7751 (set FRklo u12) 7752 ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) 7753 (fr550 (unit u-media-set (out FRintk FRklo)))) 7754) 7755 7756(dni mhsethis 7757 "Media set upper signed 12 bits" 7758 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7759 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7760 "mhsethis$pack $u12,$FRkhi" 7761 (+ pack FRkhi OP_78 OPE1_22 u12) 7762 (set FRkhi u12) 7763 ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) 7764 (fr550 (unit u-media-set (out FRintk FRkhi)))) 7765) 7766 7767(dni mhdsets 7768 "Media dual set halfword signed 12 bits" 7769 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7770 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7771 "mhdsets$pack $u12,$FRintk" 7772 (+ pack FRintk OP_78 OPE1_24 u12) 7773 (sequence () 7774 ; hack to get FRintk passed to modelling functions 7775 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 7776 (set (halfword hi FRintk 0) u12) 7777 (set (halfword lo FRintk 0) u12)) 7778 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7779 (fr550 (unit u-media-set))) 7780) 7781 7782(define-pmacro (set-5-semantics target value) 7783 (sequence ((HI tmp)) 7784 (set tmp target) 7785 (set tmp (and tmp #x07ff)) 7786 (set tmp (or tmp (sll (and s5 #x1f) 11))) 7787 (set target tmp)) 7788) 7789 7790(define-pmacro (media-set-5 name hilo op ope comment) 7791 (dni name 7792 (comment) 7793 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7794 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7795 (.str name "$pack $s5,$FRk" hilo) 7796 (+ pack (.sym FRk hilo) op (FRi-null) ope (misc-null-11) s5) 7797 (set-5-semantics (.sym FRk hilo) s5) 7798 ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) 7799 (fr550 (unit u-media-set (out FRintk (.sym FRk hilo))))) 7800 ) 7801) 7802 7803(media-set-5 mhsetloh lo OP_78 OPE1_21 "Media set upper 5 bits lo") 7804(media-set-5 mhsethih hi OP_78 OPE1_23 "Media set upper 5 bits hi") 7805 7806(dni mhdseth 7807 "Media dual set halfword upper 5 bits" 7808 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7809 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7810 "mhdseth$pack $s5,$FRintk" 7811 (+ pack FRintk OP_78 (FRi-null) OPE1_25 (misc-null-11) s5) 7812 (sequence () 7813 ; hack to get FRintk passed to modelling functions 7814 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 7815 (set-5-semantics (halfword hi FRintk 0) s5) 7816 (set-5-semantics (halfword lo FRintk 0) s5)) 7817 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7818 (fr550 (unit u-media-set))) 7819) 7820 7821(define-pmacro (media-logic-r-r name operation op ope comment) 7822 (dni name 7823 (comment) 7824 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7825 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7826 (.str name "$pack $FRinti,$FRintj,$FRintk") 7827 (+ pack FRintk op FRinti ope FRintj) 7828 (set FRintk (operation FRinti FRintj)) 7829 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7830 (fr500 (unit u-media)) (fr550 (unit u-media))) 7831 ) 7832) 7833 7834(media-logic-r-r mand and OP_7B OPE1_00 "and reg/reg") 7835(media-logic-r-r mor or OP_7B OPE1_01 "or reg/reg") 7836(media-logic-r-r mxor xor OP_7B OPE1_02 "xor reg/reg") 7837 7838(define-pmacro (conditional-media-logic name operation op ope comment) 7839 (dni name 7840 (comment) 7841 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7842 (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) 7843 (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond") 7844 (+ pack FRintk op FRinti CCi cond ope FRintj) 7845 (if (eq CCi (or cond 2)) 7846 (set FRintk (operation FRinti FRintj))) 7847 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7848 (fr500 (unit u-media)) (fr550 (unit u-media))) 7849 ) 7850) 7851 7852(conditional-media-logic cmand and OP_70 OPE4_0 "conditional and reg/reg") 7853(conditional-media-logic cmor or OP_70 OPE4_1 "conditional or reg/reg") 7854(conditional-media-logic cmxor xor OP_70 OPE4_2 "conditional xor reg/reg") 7855 7856(dni mnot 7857 ("mnot") 7858 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7859 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7860 ("mnot$pack $FRintj,$FRintk") 7861 (+ pack FRintk OP_7B (rs-null) OPE1_03 FRintj) 7862 (set FRintk (inv FRintj)) 7863 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7864 (fr500 (unit u-media)) (fr550 (unit u-media))) 7865) 7866 7867(dni cmnot 7868 ("cmnot") 7869 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7870 (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) 7871 ("cmnot$pack $FRintj,$FRintk,$CCi,$cond") 7872 (+ pack FRintk OP_70 (rs-null) CCi cond OPE4_3 FRintj) 7873 (if (eq CCi (or cond 2)) 7874 (set FRintk (inv FRintj))) 7875 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7876 (fr500 (unit u-media)) (fr550 (unit u-media))) 7877) 7878 7879(define-pmacro (media-rotate-r-r name operation op ope comment) 7880 (dni name 7881 (comment) 7882 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7883 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7884 (.str name "$pack $FRinti,$u6,$FRintk") 7885 (+ pack FRintk op FRinti ope u6) 7886 (set FRintk (operation FRinti (and u6 #x1f))) 7887 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 7888 (fr500 (unit u-media)) (fr550 (unit u-media))) 7889 ) 7890) 7891 7892(media-rotate-r-r mrotli rol OP_7B OPE1_04 "rotate left reg/reg") 7893(media-rotate-r-r mrotri ror OP_7B OPE1_05 "rotate right reg/reg") 7894 7895(define-pmacro (media-cut-r-r name arg op ope comment) 7896 (dni name 7897 (comment) 7898 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7899 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 7900 (.str name "$pack $FRinti,$" arg ",$FRintk") 7901 (+ pack FRintk op FRinti ope arg) 7902 (set FRintk (c-call SI "@cpu@_cut" FRinti (nextreg h-fr_int FRinti 1) arg)) 7903 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 7904 (fr500 (unit u-media)) (fr550 (unit u-media))) 7905 ) 7906) 7907 7908(media-cut-r-r mwcut FRintj OP_7B OPE1_06 "media cut") 7909(media-cut-r-r mwcuti u6 OP_7B OPE1_07 "media cut") 7910 7911(define-pmacro (media-cut-acc name arg op ope fr450-major comment) 7912 (dni name 7913 (comment) 7914 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7915 (FR400-MAJOR M-1) (FR450-MAJOR fr450-major)) 7916 (.str name "$pack $ACC40Si,$" arg ",$FRintk") 7917 (+ pack FRintk op ACC40Si ope arg) 7918 (set FRintk (c-call SI "@cpu@_media_cut" ACC40Si arg)) 7919 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 7920 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) 7921 ) 7922) 7923 7924(media-cut-acc mcut FRintj OP_7B OPE1_2C M-1 "media accumulator cut reg") 7925(media-cut-acc mcuti s6 OP_7B OPE1_2E M-5 "media accumulator cut immed") 7926 7927(define-pmacro (media-cut-acc-ss name arg op ope fr450-major comment) 7928 (dni name 7929 (comment) 7930 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7931 (FR400-MAJOR M-1) (FR450-MAJOR fr450-major)) 7932 (.str name "$pack $ACC40Si,$" arg ",$FRintk") 7933 (+ pack FRintk op ACC40Si ope arg) 7934 (set FRintk (c-call SI "@cpu@_media_cut_ss" ACC40Si arg)) 7935 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 7936 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) 7937 ) 7938) 7939 7940(media-cut-acc-ss mcutss FRintj OP_7B OPE1_2D M-1 "media accumulator cut reg with saturation") 7941(media-cut-acc-ss mcutssi s6 OP_7B OPE1_2F M-5 "media accumulator cut immed with saturation") 7942 7943; Dual Media Instructions 7944; 7945(define-pmacro (register-unaligned register alignment) 7946 (and (index-of register) (sub alignment 1)) 7947) 7948 7949(dni mdcutssi 7950 "Media dual cut with signed saturation" 7951 ((UNIT MDCUTSSI) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) 7952 (FR400-MAJOR M-2) (FR450-MAJOR M-6)) 7953 "mdcutssi$pack $ACC40Si,$s6,$FRintkeven" 7954 (+ pack FRintkeven OP_78 ACC40Si OPE1_0E s6) 7955 (if (register-unaligned ACC40Si 2) 7956 (c-call VOID "@cpu@_media_acc_not_aligned") 7957 (if (register-unaligned FRintkeven 2) 7958 (c-call VOID "@cpu@_media_register_not_aligned") 7959 (sequence () 7960 (set FRintkeven (c-call SI "@cpu@_media_cut_ss" ACC40Si s6)) 7961 (set (nextreg h-fr_int FRintkeven 1) 7962 (c-call SI "@cpu@_media_cut_ss" 7963 (nextreg h-acc40S ACC40Si 1) s6))))) 7964 ((fr400 (unit u-media-4-acc-dual 7965 (out FRintk FRintkeven))) 7966 (fr450 (unit u-media-4-acc-dual 7967 (out FRintk FRintkeven))) 7968 (fr550 (unit u-media-3-acc-dual))) 7969) 7970 7971; The (add (xxxx) (mul arg 0)) is a hack to get a reference to arg generated 7972; so it will be passed to the unit modelers. YUCK!!!!! 7973(define-pmacro (extract-hilo reg1 off1 reg2 off2 arg1hi arg1lo arg2hi arg2lo) 7974 (sequence () 7975 (set arg1hi (add (halfword hi reg1 off1) (mul reg1 0))) 7976 (set arg1lo (add (halfword lo reg1 off1) (mul reg1 0))) 7977 (set arg2hi (add (halfword hi reg2 off2) (mul reg2 0))) 7978 (set arg2lo (add (halfword lo reg2 off2) (mul reg2 0)))) 7979) 7980 7981(dni maveh 7982 "Media dual average" 7983 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7984 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7985 "maveh$pack $FRinti,$FRintj,$FRintk" 7986 (+ pack FRintk OP_7B FRinti OPE1_08 FRintj) 7987 (set FRintk (c-call SI "@cpu@_media_average" FRinti FRintj)) 7988 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7989 (fr500 (unit u-media)) (fr550 (unit u-media))) 7990) 7991 7992(define-pmacro (media-dual-shift name operation op ope profile comment) 7993 (dni name 7994 (comment) 7995 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7996 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7997 (.str name "$pack $FRinti,$u6,$FRintk") 7998 (+ pack FRintk op FRinti ope u6) 7999 (sequence () 8000 ; hack to get these referenced for profiling 8001 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) 8002 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 8003 (set (halfword hi FRintk 0) 8004 (operation (halfword hi FRinti 0) (and u6 #xf))) 8005 (set (halfword lo FRintk 0) 8006 (operation (halfword lo FRinti 0) (and u6 #xf)))) 8007 profile 8008 ) 8009) 8010 8011(media-dual-shift msllhi sll OP_7B OPE1_09 8012 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 8013 (fr500 (unit u-media)) (fr550 (unit u-media))) 8014 "Media dual shift left logical") 8015(media-dual-shift msrlhi srl OP_7B OPE1_0A 8016 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 8017 (fr500 (unit u-media)) (fr550 (unit u-media))) 8018 "Media dual shift right logical") 8019(media-dual-shift msrahi sra OP_7B OPE1_0B 8020 ((fr400 (unit u-media-6)) (fr450 (unit u-media-6)) 8021 (fr500 (unit u-media)) (fr550 (unit u-media))) 8022 "Media dual shift right arithmetic") 8023 8024(define-pmacro (media-dual-word-rotate-r-r name operation op ope comment) 8025 (dni name 8026 (comment) 8027 ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) 8028 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8029 (.str name "$pack $FRintieven,$s6,$FRintkeven") 8030 (+ pack FRintkeven op FRintieven ope s6) 8031 (if (orif (register-unaligned FRintieven 2) 8032 (register-unaligned FRintkeven 2)) 8033 (c-call VOID "@cpu@_media_register_not_aligned") 8034 (sequence () 8035 (set FRintkeven (operation FRintieven (and s6 #x1f))) 8036 (set (nextreg h-fr_int FRintkeven 1) 8037 (operation (nextreg h-fr_int FRintieven 1) 8038 (and s6 #x1f))))) 8039 ((fr400 (unit u-media-3-quad 8040 (in FRinti FRintieven) 8041 (out FRintk FRintkeven))) 8042 (fr450 (unit u-media-3-quad 8043 (in FRinti FRintieven) 8044 (out FRintk FRintkeven))) 8045 (fr550 (unit u-media-quad))) 8046 ) 8047) 8048 8049(media-dual-word-rotate-r-r mdrotli rol OP_78 OPE1_0B "rotate left reg/reg") 8050 8051(dni mcplhi 8052 "Media bit concatenate, halfword" 8053 ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) 8054 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8055 "mcplhi$pack $FRinti,$u6,$FRintk" 8056 (+ pack FRintk OP_78 FRinti OPE1_0C u6) 8057 (sequence ((HI arg1) (HI arg2) (HI shift)) 8058 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) 8059 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 8060 (set shift (and u6 #xf)) 8061 (set arg1 (sll (halfword hi FRinti 0) shift)) 8062 (if (ne shift 0) 8063 (sequence () 8064 (set arg2 (halfword hi FRinti 1)) 8065 (set arg2 (srl HI (sll HI arg2 (sub 15 shift)) 8066 (sub 15 shift))) 8067 (set arg1 (or HI arg1 arg2)))) 8068 (set (halfword hi FRintk 0) arg1)) 8069 ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual)) 8070 (fr550 (unit u-media-3-dual))) 8071) 8072 8073(dni mcpli 8074 "Media bit concatenate, word" 8075 ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) 8076 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8077 "mcpli$pack $FRinti,$u6,$FRintk" 8078 (+ pack FRintk OP_78 FRinti OPE1_0D u6) 8079 (sequence ((SI tmp) (SI shift)) 8080 (set shift (and u6 #x1f)) 8081 (set tmp (sll FRinti shift)) 8082 (if (ne shift 0) 8083 (sequence ((SI tmp1)) 8084 (set tmp1 (srl (sll (nextreg h-fr_int FRinti 1) 8085 (sub 31 shift)) 8086 (sub 31 shift))) 8087 (set tmp (or tmp tmp1)))) 8088 (set FRintk tmp)) 8089 ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual)) 8090 (fr550 (unit u-media-3-dual))) 8091) 8092 8093(define-pmacro (saturate arg max min result) 8094 (if (gt arg max) 8095 (set result max) 8096 (if (lt arg min) 8097 (set result min) 8098 (set result arg))) 8099) 8100 8101(dni msaths 8102 "Media dual saturation signed" 8103 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8104 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8105 "msaths$pack $FRinti,$FRintj,$FRintk" 8106 (+ pack FRintk OP_7B FRinti OPE1_0C FRintj) 8107 (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo)) 8108 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 8109 (saturate argihi argjhi (inv argjhi) (halfword hi FRintk 0)) 8110 (saturate argilo argjlo (inv argjlo) (halfword lo FRintk 0))) 8111 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8112 (fr500 (unit u-media)) (fr550 (unit u-media))) 8113) 8114 8115(dni mqsaths 8116 "Media quad saturation signed" 8117 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2) 8118 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8119 "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven" 8120 (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven) 8121 (if (orif (register-unaligned FRintieven 2) 8122 (orif (register-unaligned FRintjeven 2) 8123 (register-unaligned FRintkeven 2))) 8124 (c-call VOID "@cpu@_media_register_not_aligned") 8125 (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo)) 8126 ; hack to get FRintkeven referenced as a target for profiling 8127 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 8128 (extract-hilo FRintieven 0 FRintjeven 0 argihi argilo argjhi argjlo) 8129 (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 0)) 8130 (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 0)) 8131 (extract-hilo FRintieven 1 FRintjeven 1 argihi argilo argjhi argjlo) 8132 (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 1)) 8133 (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 1)))) 8134 ((fr400 (unit u-media-1-quad 8135 (in FRinti FRintieven) 8136 (in FRintj FRintjeven) 8137 (out FRintk FRintkeven))) 8138 (fr450 (unit u-media-1-quad 8139 (in FRinti FRintieven) 8140 (in FRintj FRintjeven) 8141 (out FRintk FRintkeven))) 8142 (fr550 (unit u-media-quad))) 8143) 8144 8145(define-pmacro (saturate-unsigned arg max result) 8146 (if (gt arg max) 8147 (set result max) 8148 (set result arg)) 8149) 8150 8151(dni msathu 8152 "Media dual saturation unsigned" 8153 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8154 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8155 "msathu$pack $FRinti,$FRintj,$FRintk" 8156 (+ pack FRintk OP_7B FRinti OPE1_0D FRintj) 8157 (sequence ((UHI argihi) (UHI argilo) (UHI argjhi) (UHI argjlo)) 8158 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 8159 (saturate-unsigned argihi argjhi (halfword hi FRintk 0)) 8160 (saturate-unsigned argilo argjlo (halfword lo FRintk 0))) 8161 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8162 (fr500 (unit u-media)) (fr550 (unit u-media))) 8163) 8164 8165(define-pmacro (media-dual-compare name mode op ope comment) 8166 (dni name 8167 (comment) 8168 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8169 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8170 (.str name "$pack $FRinti,$FRintj,$FCCk") 8171 (+ pack (cond-null) FCCk op FRinti ope FRintj) 8172 (if (register-unaligned FCCk 2) 8173 (c-call VOID "@cpu@_media_cr_not_aligned") 8174 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8175 (extract-hilo FRinti 0 FRintj 0 8176 argihi argilo argjhi argjlo) 8177 (compare-and-set-fcc argihi argjhi FCCk) 8178 (compare-and-set-fcc argilo argjlo (nextreg h-fccr FCCk 1)))) 8179 ; TODO - doesn't handle second FCC 8180 ((fr400 (unit u-media-7)) (fr450 (unit u-media-7)) 8181 (fr500 (unit u-media)) (fr550 (unit u-media))) 8182 ) 8183) 8184 8185(media-dual-compare mcmpsh HI OP_7B OPE1_0E "Media dual compare signed") 8186(media-dual-compare mcmpuh UHI OP_7B OPE1_0F "Media dual compare unsigned") 8187 8188; Bits for the MSR.SIE field 8189(define-pmacro (msr-sie-nil) 0) 8190(define-pmacro (msr-sie-fri-hi) 8) 8191(define-pmacro (msr-sie-fri-lo) 4) 8192(define-pmacro (msr-sie-fri-1-hi) 2) 8193(define-pmacro (msr-sie-fri-1-lo) 1) 8194(define-pmacro (msr-sie-acci) 8) 8195(define-pmacro (msr-sie-acci-1) 4) 8196(define-pmacro (msr-sie-acci-2) 2) 8197(define-pmacro (msr-sie-acci-3) 1) 8198 8199(define-pmacro (saturate-v arg max min sie result) 8200 (if (gt DI arg max) 8201 (sequence () 8202 (set result max) 8203 (c-call VOID "@cpu@_media_overflow" sie)) 8204 (if (lt DI arg min) 8205 (sequence () 8206 (set result min) 8207 (c-call VOID "@cpu@_media_overflow" sie)) 8208 (set result arg))) 8209) 8210 8211(dni mabshs 8212 "Media dual absolute value, halfword" 8213 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2) 8214 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8215 "mabshs$pack $FRintj,$FRintk" 8216 (+ pack FRintk OP_78 (FRi-null) OPE1_0A FRintj) 8217 (sequence ((HI arghi) (HI arglo)) 8218 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 8219 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 8220 (set arghi (halfword hi FRintj 0)) 8221 (set arglo (halfword lo FRintj 0)) 8222 (saturate-v (abs arghi) 32767 -32768 (msr-sie-fri-hi) 8223 (halfword hi FRintk 0)) 8224 (saturate-v (abs arglo) 32767 -32768 (msr-sie-fri-lo) 8225 (halfword lo FRintk 0))) 8226 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8227 (fr550 (unit u-media))) 8228) 8229 8230(define-pmacro (media-arith-sat-semantics 8231 operation arg1 arg2 res mode max min sie) 8232 (sequence ((DI tmp)) 8233 (set tmp (operation arg1 arg2)) 8234 (saturate-v tmp max min sie res)) 8235) 8236 8237(define-pmacro (media-dual-arith-sat-semantics operation mode max min) 8238 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8239 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 8240 (media-arith-sat-semantics operation argihi argjhi 8241 (halfword hi FRintk 0) mode max min 8242 (msr-sie-fri-hi)) 8243 (media-arith-sat-semantics operation argilo argjlo 8244 (halfword lo FRintk 0) mode max min 8245 (msr-sie-fri-lo))) 8246) 8247 8248(define-pmacro (media-dual-arith-sat name operation mode max min op ope comment) 8249 (dni name 8250 (comment) 8251 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8252 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8253 (.str name "$pack $FRinti,$FRintj,$FRintk") 8254 (+ pack FRintk op FRinti ope FRintj) 8255 (media-dual-arith-sat-semantics operation mode max min) 8256 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8257 (fr500 (unit u-media)) (fr550 (unit u-media))) 8258 ) 8259) 8260 8261(media-dual-arith-sat maddhss add HI 32767 -32768 OP_7B OPE1_10 "Media dual add signed with saturation") 8262(media-dual-arith-sat maddhus add UHI 65535 0 OP_7B OPE1_11 "Media dual add unsigned with saturation") 8263 8264(media-dual-arith-sat msubhss sub HI 32767 -32768 OP_7B OPE1_12 "Media dual sub signed with saturation") 8265(media-dual-arith-sat msubhus sub UHI 65535 0 OP_7B OPE1_13 "Media dual sub unsigned with saturation") 8266 8267(define-pmacro (conditional-media-dual-arith-sat 8268 name operation mode max min op ope comment) 8269 (dni name 8270 (comment) 8271 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8272 (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) 8273 (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond") 8274 (+ pack FRintk op FRinti CCi cond ope FRintj) 8275 (if (eq CCi (or cond 2)) 8276 (media-dual-arith-sat-semantics operation mode max min)) 8277 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8278 (fr500 (unit u-media)) (fr550 (unit u-media))) 8279 ) 8280) 8281 8282(conditional-media-dual-arith-sat cmaddhss add HI 32767 -32768 OP_71 OPE4_0 "Conditional Media dual add signed with saturation") 8283(conditional-media-dual-arith-sat cmaddhus add UHI 65535 0 OP_71 OPE4_1 "Conditional Media dual add unsigned with saturation") 8284 8285(conditional-media-dual-arith-sat cmsubhss sub HI 32767 -32768 OP_71 OPE4_2 "Conditional Media dual sub signed with saturation") 8286(conditional-media-dual-arith-sat cmsubhus sub UHI 65535 0 OP_71 OPE4_3 "Conditional Media dual sub unsigned with saturation") 8287 8288(define-pmacro (media-quad-arith-sat-semantics cond operation mode max min) 8289 (if (orif (register-unaligned FRintieven 2) 8290 (orif (register-unaligned FRintjeven 2) 8291 (register-unaligned FRintkeven 2))) 8292 (c-call VOID "@cpu@_media_register_not_aligned") 8293 (if cond 8294 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8295 ; hack to get FRintkeven referenced as a target for profiling 8296 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 8297 (extract-hilo FRintieven 0 FRintjeven 0 8298 argihi argilo argjhi argjlo) 8299 (media-arith-sat-semantics operation argihi argjhi 8300 (halfword hi FRintkeven 0) mode 8301 max min (msr-sie-fri-hi)) 8302 (media-arith-sat-semantics operation argilo argjlo 8303 (halfword lo FRintkeven 0) mode 8304 max min (msr-sie-fri-lo)) 8305 (extract-hilo FRintieven 1 FRintjeven 1 8306 argihi argilo argjhi argjlo) 8307 (media-arith-sat-semantics operation argihi argjhi 8308 (halfword hi FRintkeven 1) mode 8309 max min (msr-sie-fri-1-hi)) 8310 (media-arith-sat-semantics operation argilo argjlo 8311 (halfword lo FRintkeven 1) mode 8312 max min (msr-sie-fri-1-lo))))) 8313) 8314 8315(define-pmacro (media-quad-arith-sat name operation mode max min op ope comment) 8316 (dni name 8317 (comment) 8318 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8319 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8320 (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven") 8321 (+ pack FRintkeven op FRintieven ope FRintjeven) 8322 (media-quad-arith-sat-semantics 1 operation mode max min) 8323 ((fr400 (unit u-media-1-quad 8324 (in FRinti FRintieven) 8325 (in FRintj FRintjeven) 8326 (out FRintk FRintkeven))) 8327 (fr450 (unit u-media-1-quad 8328 (in FRinti FRintieven) 8329 (in FRintj FRintjeven) 8330 (out FRintk FRintkeven))) 8331 (fr500 (unit u-media-quad-arith 8332 (in FRinti FRintieven) 8333 (in FRintj FRintjeven) 8334 (out FRintk FRintkeven))) (fr550 (unit u-media-quad))) 8335 ) 8336) 8337 8338(media-quad-arith-sat mqaddhss add HI 32767 -32768 OP_7B OPE1_18 "Media quad add signed with saturation") 8339(media-quad-arith-sat mqaddhus add UHI 65535 0 OP_7B OPE1_19 "Media quad add unsigned with saturation") 8340 8341(media-quad-arith-sat mqsubhss sub HI 32767 -32768 OP_7B OPE1_1A "Media quad sub signed with saturation") 8342(media-quad-arith-sat mqsubhus sub UHI 65535 0 OP_7B OPE1_1B "Media quad sub unsigned with saturation") 8343 8344(define-pmacro (conditional-media-quad-arith-sat 8345 name operation mode max min op ope comment) 8346 (dni name 8347 (comment) 8348 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8349 (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) 8350 (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond") 8351 (+ pack FRintkeven op FRintieven CCi cond ope FRintjeven) 8352 (media-quad-arith-sat-semantics (eq CCi (or cond 2)) 8353 operation mode max min) 8354 ((fr400 (unit u-media-1-quad 8355 (in FRinti FRintieven) 8356 (in FRintj FRintjeven) 8357 (out FRintk FRintkeven))) 8358 (fr450 (unit u-media-1-quad 8359 (in FRinti FRintieven) 8360 (in FRintj FRintjeven) 8361 (out FRintk FRintkeven))) 8362 (fr500 (unit u-media-quad-arith 8363 (in FRinti FRintieven) 8364 (in FRintj FRintjeven) 8365 (out FRintk FRintkeven))) (fr550 (unit u-media-quad))) 8366 ) 8367) 8368 8369(conditional-media-quad-arith-sat cmqaddhss add HI 32767 -32768 OP_73 OPE4_0 "Conditional Media quad add signed with saturation") 8370(conditional-media-quad-arith-sat cmqaddhus add UHI 65535 0 OP_73 OPE4_1 "Conditional Media quad add unsigned with saturation") 8371 8372(conditional-media-quad-arith-sat cmqsubhss sub HI 32767 -32768 OP_73 OPE4_2 "Conditional Media quad sub signed with saturation") 8373(conditional-media-quad-arith-sat cmqsubhus sub UHI 65535 0 OP_73 OPE4_3 "Conditional Media quad sub unsigned with saturation") 8374 8375;; Return A if |A| > |B| and B is positive. Return -A if |A| > |B| and 8376;; B is negative, saturating 0x8000 as 0x7fff. Return 0 otherwise. 8377(define-pmacro (media-low-clear-semantics a b) 8378 (cond HI 8379 ((le UHI (abs a) (abs b)) 0) 8380 ((le HI 0 b) a) 8381 ((eq HI a -32768) 32767) 8382 (else (neg a)))) 8383 8384;; Return A if -|B| < A < |B|. Return -B if A <= -|B|, saturating 0x8000 8385;; as 0x7fff. Return B if A >= |B|. 8386(define-pmacro (media-scope-limit-semantics a b) 8387 (cond HI 8388 ((andif (gt HI b -32768) 8389 (ge HI a (abs b))) b) 8390 ((gt HI a (neg (abs b))) a) 8391 ((eq HI b -32768) 32767) 8392 (else (neg b)))) 8393 8394(define-pmacro (media-quad-limit name operation op ope comment) 8395 (dni name 8396 comment 8397 ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2)) 8398 (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven") 8399 (+ pack FRintkeven op FRintieven ope FRintjeven) 8400 (if (orif (register-unaligned FRintieven 2) 8401 (orif (register-unaligned FRintjeven 2) 8402 (register-unaligned FRintkeven 2))) 8403 (c-call VOID "@cpu@_media_register_not_aligned") 8404 (sequence ((HI a1) (HI a2) (HI a3) (HI a4) 8405 (HI b1) (HI b2) (HI b3) (HI b4)) 8406 ; hack to get FRintkeven referenced as a target 8407 ; for profiling 8408 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 8409 (extract-hilo FRintieven 0 FRintjeven 0 a1 a2 b1 b2) 8410 (extract-hilo FRintieven 1 FRintjeven 1 a3 a4 b3 b4) 8411 (set (halfword hi FRintkeven 0) (operation a1 b1)) 8412 (set (halfword lo FRintkeven 0) (operation a2 b2)) 8413 (set (halfword hi FRintkeven 1) (operation a3 b3)) 8414 (set (halfword lo FRintkeven 1) (operation a4 b4)))) 8415 ((fr450 (unit u-media-1-quad 8416 (in FRinti FRintieven) 8417 (in FRintj FRintjeven) 8418 (out FRintk FRintkeven)))) 8419 ) 8420) 8421 8422(media-quad-limit mqlclrhs media-low-clear-semantics OP_78 OPE1_10 8423 "Media quad low clear") 8424(media-quad-limit mqlmths media-scope-limit-semantics OP_78 OPE1_14 8425 "Media quad scope limitation") 8426 8427(define-pmacro (media-quad-shift name operation op ope comment) 8428 (dni name 8429 (comment) 8430 ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2)) 8431 (.str name "$pack $FRintieven,$u6,$FRintkeven") 8432 (+ pack FRintkeven op FRintieven ope u6) 8433 (if (orif (register-unaligned FRintieven 2) 8434 (register-unaligned FRintkeven 2)) 8435 (c-call VOID "@cpu@_media_register_not_aligned") 8436 (sequence () 8437 ; hack to get these referenced for profiling 8438 (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) 8439 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 8440 (set (halfword hi FRintkeven 0) 8441 (operation HI (halfword hi FRintieven 0) 8442 (and u6 #xf))) 8443 (set (halfword lo FRintkeven 0) 8444 (operation HI (halfword lo FRintieven 0) 8445 (and u6 #xf))) 8446 (set (halfword hi FRintkeven 1) 8447 (operation HI (halfword hi FRintieven 1) 8448 (and u6 #xf))) 8449 (set (halfword lo FRintkeven 1) 8450 (operation HI (halfword lo FRintieven 1) 8451 (and u6 #xf))))) 8452 ((fr450 (unit u-media-3-quad 8453 (in FRinti FRintieven) 8454 (in FRintj FRintieven) 8455 (out FRintk FRintkeven)))) 8456 ) 8457) 8458 8459(media-quad-shift mqsllhi sll OP_78 OPE1_11 "Media quad left shift") 8460(media-quad-shift mqsrahi sra OP_78 OPE1_13 "Media quad right shift") 8461 8462(define-pmacro (media-acc-arith-sat name operation mode max min op ope comment) 8463 (dni name 8464 (comment) 8465 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8466 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 8467 (.str name "$pack $ACC40Si,$ACC40Sk") 8468 (+ pack ACC40Sk op ACC40Si ope (ACCj-null)) 8469 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) 8470 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8471 (if (register-unaligned ACC40Si 2) 8472 (c-call VOID "@cpu@_media_acc_not_aligned") 8473 (media-arith-sat-semantics operation ACC40Si 8474 (nextreg h-acc40S ACC40Si 1) 8475 ACC40Sk mode max min (msr-sie-acci))))) 8476 ((fr400 (unit u-media-2-acc)) (fr450 (unit u-media-2-acc)) 8477 (fr550 (unit u-media-4-acc))) 8478 ) 8479) 8480 8481(media-acc-arith-sat maddaccs add DI #x7fffffffff (inv DI #x7fffffffff) 8482 OP_78 OPE1_04 "Media accumulator addition") 8483(media-acc-arith-sat msubaccs sub DI #x7fffffffff (inv DI #x7fffffffff) 8484 OP_78 OPE1_05 "Media accumulator subtraction") 8485 8486(define-pmacro (media-dual-acc-arith-sat name operation mode max min op ope 8487 comment) 8488 (dni name 8489 (comment) 8490 ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8491 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8492 (.str name "$pack $ACC40Si,$ACC40Sk") 8493 (+ pack ACC40Sk op ACC40Si ope (ACCj-null)) 8494 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) 8495 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8496 (if (register-unaligned ACC40Si 4) 8497 (c-call VOID "@cpu@_media_acc_not_aligned") 8498 (if (register-unaligned ACC40Sk 2) 8499 (c-call VOID "@cpu@_media_acc_not_aligned") 8500 (sequence () 8501 (media-arith-sat-semantics operation ACC40Si 8502 (nextreg h-acc40S ACC40Si 1) 8503 ACC40Sk mode max min 8504 (msr-sie-acci)) 8505 (media-arith-sat-semantics operation 8506 (nextreg h-acc40S ACC40Si 2) 8507 (nextreg h-acc40S ACC40Si 3) 8508 (nextreg h-acc40S ACC40Sk 1) 8509 mode max min 8510 (msr-sie-acci-1))))))) 8511 ((fr400 (unit u-media-2-acc-dual)) (fr450 (unit u-media-2-acc-dual)) 8512 (fr550 (unit u-media-4-acc-dual))) 8513 ) 8514) 8515 8516(media-dual-acc-arith-sat mdaddaccs add DI #x7fffffffff (inv DI #x7fffffffff) 8517 OP_78 OPE1_06 "Media accumulator addition") 8518(media-dual-acc-arith-sat mdsubaccs sub DI #x7fffffffff (inv DI #x7fffffffff) 8519 OP_78 OPE1_07 "Media accumulator subtraction") 8520 8521(dni masaccs 8522 "Media add and subtract signed accumulator with saturation" 8523 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8524 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 8525 "masaccs$pack $ACC40Si,$ACC40Sk" 8526 (+ pack ACC40Sk OP_78 ACC40Si OPE1_08 (ACCj-null)) 8527 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) 8528 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8529 (if (register-unaligned ACC40Si 2) 8530 (c-call VOID "@cpu@_media_acc_not_aligned") 8531 (if (register-unaligned ACC40Sk 2) 8532 (c-call VOID "@cpu@_media_acc_not_aligned") 8533 (sequence () 8534 (media-arith-sat-semantics add ACC40Si 8535 (nextreg h-acc40S ACC40Si 1) 8536 ACC40Sk DI 8537 #x7fffffffff 8538 (inv DI #x7fffffffff) 8539 (msr-sie-acci)) 8540 (media-arith-sat-semantics sub ACC40Si 8541 (nextreg h-acc40S ACC40Si 1) 8542 (nextreg h-acc40S ACC40Sk 1) 8543 DI 8544 #x7fffffffff 8545 (inv DI #x7fffffffff) 8546 (msr-sie-acci-1))))))) 8547 ((fr400 (unit u-media-2-add-sub)) (fr450 (unit u-media-2-add-sub)) 8548 (fr550 (unit u-media-4-add-sub))) 8549 ) 8550 8551(dni mdasaccs 8552 "Media add and subtract signed accumulator with saturation" 8553 ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8554 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8555 "mdasaccs$pack $ACC40Si,$ACC40Sk" 8556 (+ pack ACC40Sk OP_78 ACC40Si OPE1_09 (ACCj-null)) 8557 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) 8558 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8559 (if (register-unaligned ACC40Si 4) 8560 (c-call VOID "@cpu@_media_acc_not_aligned") 8561 (if (register-unaligned ACC40Sk 4) 8562 (c-call VOID "@cpu@_media_acc_not_aligned") 8563 (sequence () 8564 (media-arith-sat-semantics add ACC40Si 8565 (nextreg h-acc40S ACC40Si 1) 8566 ACC40Sk DI 8567 #x7fffffffff 8568 (inv DI #x7fffffffff) 8569 (msr-sie-acci)) 8570 (media-arith-sat-semantics sub ACC40Si 8571 (nextreg h-acc40S ACC40Si 1) 8572 (nextreg h-acc40S ACC40Sk 1) 8573 DI 8574 #x7fffffffff 8575 (inv DI #x7fffffffff) 8576 (msr-sie-acci-1)) 8577 (media-arith-sat-semantics add 8578 (nextreg h-acc40S ACC40Si 2) 8579 (nextreg h-acc40S ACC40Si 3) 8580 (nextreg h-acc40S ACC40Sk 2) 8581 DI 8582 #x7fffffffff 8583 (inv DI #x7fffffffff) 8584 (msr-sie-acci-2)) 8585 (media-arith-sat-semantics sub 8586 (nextreg h-acc40S ACC40Si 2) 8587 (nextreg h-acc40S ACC40Si 3) 8588 (nextreg h-acc40S ACC40Sk 3) 8589 DI 8590 #x7fffffffff 8591 (inv DI #x7fffffffff) 8592 (msr-sie-acci-3))))))) 8593 ((fr400 (unit u-media-2-add-sub-dual)) 8594 (fr450 (unit u-media-2-add-sub-dual)) 8595 (fr550 (unit u-media-4-add-sub-dual))) 8596 ) 8597 8598(define-pmacro (media-multiply-semantics conv arg1 arg2 res) 8599 (set res (mul DI (conv DI arg1) (conv DI arg2))) 8600) 8601 8602(define-pmacro (media-dual-multiply-semantics cond mode conv rhs1 rhs2) 8603 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8604 (if (register-unaligned ACC40Sk 2) 8605 (c-call VOID "@cpu@_media_acc_not_aligned") 8606 (if cond 8607 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8608 (extract-hilo FRinti 0 FRintj 0 8609 argihi argilo argjhi argjlo) 8610 (media-multiply-semantics conv argihi rhs1 ACC40Sk) 8611 (media-multiply-semantics conv argilo rhs2 8612 (nextreg h-acc40S ACC40Sk 1)))))) 8613) 8614 8615(define-pmacro (media-dual-multiply name mode conv rhs1 rhs2 op ope comment) 8616 (dni name 8617 (comment) 8618 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8619 (FR400-MAJOR M-1) (FR450-MAJOR M-3) PRESERVE-OVF) 8620 (.str name "$pack $FRinti,$FRintj,$ACC40Sk") 8621 (+ pack ACC40Sk op FRinti ope FRintj) 8622 (media-dual-multiply-semantics 1 mode conv rhs1 rhs2) 8623 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 8624 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 8625 ) 8626) 8627 8628(media-dual-multiply mmulhs HI ext argjhi argjlo OP_7B OPE1_14 "Media dual multiply signed") 8629(media-dual-multiply mmulhu UHI zext argjhi argjlo OP_7B OPE1_15 "Media dual multiply unsigned") 8630 8631(media-dual-multiply mmulxhs HI ext argjlo argjhi OP_7B OPE1_28 "Media dual cross multiply signed") 8632(media-dual-multiply mmulxhu UHI zext argjlo argjhi OP_7B OPE1_29 "Media dual cross multiply unsigned") 8633 8634(define-pmacro (conditional-media-dual-multiply 8635 name mode conv rhs1 rhs2 op ope comment) 8636 (dni name 8637 (comment) 8638 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8639 (FR400-MAJOR M-1) (FR450-MAJOR M-3) 8640 PRESERVE-OVF CONDITIONAL) 8641 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") 8642 (+ pack ACC40Sk op FRinti CCi cond ope FRintj) 8643 (media-dual-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2) 8644 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 8645 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 8646 ) 8647) 8648 8649(conditional-media-dual-multiply cmmulhs HI ext argjhi argjlo OP_72 OPE4_0 "Conditional Media dual multiply signed") 8650(conditional-media-dual-multiply cmmulhu UHI zext argjhi argjlo OP_72 OPE4_1 "Conditional Media dual multiply unsigned") 8651 8652(define-pmacro (media-quad-multiply-semantics cond mode conv rhs1 rhs2) 8653 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8654 (if (register-unaligned ACC40Sk 4) 8655 (c-call VOID "@cpu@_media_acc_not_aligned") 8656 (if (orif (register-unaligned FRintieven 2) 8657 (register-unaligned FRintjeven 2)) 8658 (c-call VOID "@cpu@_media_register_not_aligned") 8659 (if cond 8660 (sequence ((mode argihi) (mode argilo) 8661 (mode argjhi) (mode argjlo)) 8662 (extract-hilo FRintieven 0 FRintjeven 0 8663 argihi argilo argjhi argjlo) 8664 (media-multiply-semantics conv argihi rhs1 ACC40Sk) 8665 (media-multiply-semantics conv argilo rhs2 8666 (nextreg h-acc40S ACC40Sk 1)) 8667 (extract-hilo FRintieven 1 FRintjeven 1 8668 argihi argilo argjhi argjlo) 8669 (media-multiply-semantics conv argihi rhs1 8670 (nextreg h-acc40S ACC40Sk 2)) 8671 (media-multiply-semantics conv argilo rhs2 8672 (nextreg h-acc40S ACC40Sk 3))))))) 8673) 8674 8675(define-pmacro (media-quad-multiply name mode conv rhs1 rhs2 op ope comment) 8676 (dni name 8677 (comment) 8678 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8679 (FR400-MAJOR M-2) (FR450-MAJOR M-4) PRESERVE-OVF) 8680 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") 8681 (+ pack ACC40Sk op FRintieven ope FRintjeven) 8682 (media-quad-multiply-semantics 1 mode conv rhs1 rhs2) 8683 ((fr400 (unit u-media-2-quad 8684 (in FRinti FRintieven) 8685 (in FRintj FRintjeven))) 8686 (fr450 (unit u-media-2-quad 8687 (in FRinti FRintieven) 8688 (in FRintj FRintjeven))) 8689 (fr500 (unit u-media-quad-mul 8690 (in FRinti FRintieven) 8691 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 8692 ) 8693) 8694 8695(media-quad-multiply mqmulhs HI ext argjhi argjlo OP_7B OPE1_1C "Media quad multiply signed") 8696(media-quad-multiply mqmulhu UHI zext argjhi argjlo OP_7B OPE1_1D "Media quad multiply unsigned") 8697 8698(media-quad-multiply mqmulxhs HI ext argjlo argjhi OP_7B OPE1_2A "Media quad cross multiply signed") 8699(media-quad-multiply mqmulxhu UHI zext argjlo argjhi OP_7B OPE1_2B "Media quad cross multiply unsigned") 8700 8701(define-pmacro (conditional-media-quad-multiply 8702 name mode conv rhs1 rhs2 op ope comment) 8703 (dni name 8704 (comment) 8705 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8706 (FR400-MAJOR M-2) (FR450-MAJOR M-4) 8707 PRESERVE-OVF CONDITIONAL) 8708 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond") 8709 (+ pack ACC40Sk op FRintieven CCi cond ope FRintjeven) 8710 (media-quad-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2) 8711 ((fr400 (unit u-media-2-quad 8712 (in FRinti FRintieven) 8713 (in FRintj FRintjeven))) 8714 (fr450 (unit u-media-2-quad 8715 (in FRinti FRintieven) 8716 (in FRintj FRintjeven))) 8717 (fr500 (unit u-media-quad-mul 8718 (in FRinti FRintieven) 8719 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 8720 ) 8721) 8722 8723(conditional-media-quad-multiply cmqmulhs HI ext argjhi argjlo OP_74 OPE4_0 "Conditional Media quad multiply signed") 8724(conditional-media-quad-multiply cmqmulhu UHI zext argjhi argjlo OP_74 OPE4_1 "Conditional Media quad multiply unsigned") 8725 8726(define-pmacro (media-multiply-acc-semantics 8727 conv arg1 addop arg2 res max min sie) 8728 (sequence ((DI tmp)) 8729 (set tmp (addop res (mul DI (conv DI arg1) (conv DI arg2)))) 8730 (saturate-v tmp max min sie res)) 8731) 8732 8733(define-pmacro (media-dual-multiply-acc-semantics 8734 cond mode conv addop rhw res max min) 8735 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 8736 (if (register-unaligned res 2) 8737 (c-call VOID "@cpu@_media_acc_not_aligned") 8738 (if cond 8739 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8740 (extract-hilo FRinti 0 FRintj 0 8741 argihi argilo argjhi argjlo) 8742 (media-multiply-acc-semantics conv argihi addop argjhi 8743 res 8744 max min (msr-sie-acci)) 8745 (media-multiply-acc-semantics conv argilo addop argjlo 8746 (nextreg rhw res 1) 8747 max min (msr-sie-acci-1)))))) 8748) 8749 8750(define-pmacro (media-dual-multiply-acc 8751 name mode conv addop rhw res max min op ope comment) 8752 (dni name 8753 (comment) 8754 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8755 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 8756 (.str name "$pack $FRinti,$FRintj,$" res) 8757 (+ pack res op FRinti ope FRintj) 8758 (media-dual-multiply-acc-semantics 1 mode conv addop rhw res max min) 8759 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 8760 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 8761 ) 8762) 8763 8764(media-dual-multiply-acc mmachs HI ext add h-acc40S ACC40Sk 8765 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8766 OP_7B OPE1_16 8767 "Media dual multiply and accumulate signed") 8768 8769(media-dual-multiply-acc mmachu UHI zext add h-acc40U ACC40Uk 8770 (const DI #xffffffffff) (const DI 0) 8771 OP_7B OPE1_17 8772 "Media dual multiply and accumulate unsigned") 8773 8774(media-dual-multiply-acc mmrdhs HI ext sub h-acc40S ACC40Sk 8775 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8776 OP_7B OPE1_30 8777 "Media dual multiply and reduce signed") 8778 8779(media-dual-multiply-acc mmrdhu UHI zext sub h-acc40U ACC40Uk 8780 (const DI #xffffffffff) (const DI 0) 8781 OP_7B OPE1_31 8782 "Media dual multiply and reduce unsigned") 8783 8784(define-pmacro (conditional-media-dual-multiply-acc 8785 name mode conv addop rhw res max min op ope comment) 8786 (dni name 8787 (comment) 8788 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8789 (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) 8790 (.str name "$pack $FRinti,$FRintj,$" res ",$CCi,$cond") 8791 (+ pack res op FRinti CCi cond ope FRintj) 8792 (media-dual-multiply-acc-semantics (eq CCi (or cond 2)) 8793 mode conv addop rhw res max min) 8794 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 8795 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 8796 ) 8797) 8798 8799(conditional-media-dual-multiply-acc cmmachs HI ext add h-acc40S ACC40Sk 8800 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8801 OP_72 OPE4_2 8802 "Conditional Media dual multiply and accumulate signed") 8803 8804(conditional-media-dual-multiply-acc cmmachu UHI zext add h-acc40U ACC40Uk 8805 (const DI #xffffffffff) (const DI 0) 8806 OP_72 OPE4_3 8807 "Conditional Media dual multiply and accumulate unsigned") 8808 8809(define-pmacro (media-quad-multiply-acc-semantics 8810 cond mode conv addop rhw res max min) 8811 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 8812 (if (register-unaligned res 4) 8813 (c-call VOID "@cpu@_media_acc_not_aligned") 8814 (if (orif (register-unaligned FRintieven 2) 8815 (register-unaligned FRintjeven 2)) 8816 (c-call VOID "@cpu@_media_register_not_aligned") 8817 (if cond 8818 (sequence ((mode argihi) (mode argilo) 8819 (mode argjhi) (mode argjlo)) 8820 (extract-hilo FRintieven 0 FRintjeven 0 8821 argihi argilo argjhi argjlo) 8822 (media-multiply-acc-semantics conv argihi addop argjhi 8823 res 8824 max min (msr-sie-acci)) 8825 (media-multiply-acc-semantics conv argilo addop argjlo 8826 (nextreg rhw res 1) 8827 max min (msr-sie-acci-1)) 8828 (extract-hilo FRintieven 1 FRintjeven 1 8829 argihi argilo argjhi argjlo) 8830 (media-multiply-acc-semantics conv argihi addop argjhi 8831 (nextreg rhw res 2) 8832 max min (msr-sie-acci-2)) 8833 (media-multiply-acc-semantics conv argilo addop argjlo 8834 (nextreg rhw res 3) 8835 max min 8836 (msr-sie-acci-3))))))) 8837) 8838 8839(define-pmacro (media-quad-multiply-acc 8840 name mode conv addop rhw res max min op ope comment) 8841 (dni name 8842 (comment) 8843 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8844 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8845 (.str name "$pack $FRintieven,$FRintjeven,$" res) 8846 (+ pack res op FRintieven ope FRintjeven) 8847 (media-quad-multiply-acc-semantics 1 mode conv addop rhw res max min) 8848 ((fr400 (unit u-media-2-quad 8849 (in FRinti FRintieven) 8850 (in FRintj FRintjeven))) 8851 (fr450 (unit u-media-2-quad 8852 (in FRinti FRintieven) 8853 (in FRintj FRintjeven))) 8854 (fr500 (unit u-media-quad-mul 8855 (in FRinti FRintieven) 8856 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 8857 ) 8858) 8859 8860(media-quad-multiply-acc mqmachs HI ext add h-acc40S ACC40Sk 8861 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8862 OP_7B OPE1_1E 8863 "Media quad multiply and accumulate signed") 8864 8865(media-quad-multiply-acc mqmachu UHI zext add h-acc40U ACC40Uk 8866 (const DI #xffffffffff) (const DI 0) 8867 OP_7B OPE1_1F 8868 "Media quad multiply and accumulate unsigned") 8869 8870(define-pmacro (conditional-media-quad-multiply-acc 8871 name mode conv addop rhw res max min op ope comment) 8872 (dni name 8873 (comment) 8874 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8875 (FR400-MAJOR M-2) (FR450-MAJOR M-4) CONDITIONAL) 8876 (.str name "$pack $FRintieven,$FRintjeven,$" res ",$CCi,$cond") 8877 (+ pack res op FRintieven CCi cond ope FRintjeven) 8878 (media-quad-multiply-acc-semantics (eq CCi (or cond 2)) 8879 mode conv addop rhw res max min) 8880 ((fr400 (unit u-media-2-quad 8881 (in FRinti FRintieven) 8882 (in FRintj FRintjeven))) 8883 (fr450 (unit u-media-2-quad 8884 (in FRinti FRintieven) 8885 (in FRintj FRintjeven))) 8886 (fr500 (unit u-media-quad-mul 8887 (in FRinti FRintieven) 8888 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 8889 ) 8890) 8891 8892(conditional-media-quad-multiply-acc cmqmachs HI ext add h-acc40S ACC40Sk 8893 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8894 OP_74 OPE4_2 8895 "Conditional Media quad multiply and accumulate signed") 8896 8897(conditional-media-quad-multiply-acc cmqmachu UHI zext add h-acc40U ACC40Uk 8898 (const DI #xffffffffff) (const DI 0) 8899 OP_74 OPE4_3 8900 "Conditional media quad multiply and accumulate unsigned") 8901 8902(define-pmacro (media-quad-multiply-cross-acc-semantics 8903 cond mode conv addop rhw res max min) 8904 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 8905 (if (register-unaligned res 4) 8906 (c-call VOID "@cpu@_media_acc_not_aligned") 8907 (if (orif (register-unaligned FRintieven 2) 8908 (register-unaligned FRintjeven 2)) 8909 (c-call VOID "@cpu@_media_register_not_aligned") 8910 (if cond 8911 (sequence ((mode argihi) (mode argilo) 8912 (mode argjhi) (mode argjlo)) 8913 (extract-hilo FRintieven 0 FRintjeven 0 8914 argihi argilo argjhi argjlo) 8915 (media-multiply-acc-semantics conv argihi addop argjhi 8916 (nextreg rhw res 2) 8917 max min (msr-sie-acci-2)) 8918 (media-multiply-acc-semantics conv argilo addop argjlo 8919 (nextreg rhw res 3) 8920 max min (msr-sie-acci-3)) 8921 (extract-hilo FRintieven 1 FRintjeven 1 8922 argihi argilo argjhi argjlo) 8923 (media-multiply-acc-semantics conv argihi addop argjhi 8924 res 8925 max min (msr-sie-acci)) 8926 (media-multiply-acc-semantics conv argilo addop argjlo 8927 (nextreg rhw res 1) 8928 max min 8929 (msr-sie-acci-1))))))) 8930) 8931 8932(define-pmacro (media-quad-multiply-cross-acc 8933 name mode conv addop rhw res max min op ope comment) 8934 (dni name 8935 (comment) 8936 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8937 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8938 (.str name "$pack $FRintieven,$FRintjeven,$" res) 8939 (+ pack res op FRintieven ope FRintjeven) 8940 (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res 8941 max min) 8942 ((fr400 (unit u-media-2-quad 8943 (in FRinti FRintieven) 8944 (in FRintj FRintjeven))) 8945 (fr450 (unit u-media-2-quad 8946 (in FRinti FRintieven) 8947 (in FRintj FRintjeven))) 8948 (fr550 (unit u-media-4-quad))) 8949 ) 8950) 8951 8952(media-quad-multiply-cross-acc mqxmachs HI ext add h-acc40S ACC40Sk 8953 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8954 OP_78 OPE1_00 8955 "Media quad multiply and cross accumulate signed") 8956 8957(define-pmacro (media-quad-cross-multiply-cross-acc-semantics 8958 cond mode conv addop rhw res max min) 8959 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 8960 (if (register-unaligned res 4) 8961 (c-call VOID "@cpu@_media_acc_not_aligned") 8962 (if (orif (register-unaligned FRintieven 2) 8963 (register-unaligned FRintjeven 2)) 8964 (c-call VOID "@cpu@_media_register_not_aligned") 8965 (if cond 8966 (sequence ((mode argihi) (mode argilo) 8967 (mode argjhi) (mode argjlo)) 8968 (extract-hilo FRintieven 0 FRintjeven 0 8969 argihi argilo argjhi argjlo) 8970 (media-multiply-acc-semantics conv argihi addop argjlo 8971 (nextreg rhw res 2) 8972 max min (msr-sie-acci-2)) 8973 (media-multiply-acc-semantics conv argilo addop argjhi 8974 (nextreg rhw res 3) 8975 max min (msr-sie-acci-3)) 8976 (extract-hilo FRintieven 1 FRintjeven 1 8977 argihi argilo argjhi argjlo) 8978 (media-multiply-acc-semantics conv argihi addop argjlo 8979 res 8980 max min (msr-sie-acci)) 8981 (media-multiply-acc-semantics conv argilo addop argjhi 8982 (nextreg rhw res 1) 8983 max min 8984 (msr-sie-acci-1))))))) 8985) 8986 8987(define-pmacro (media-quad-cross-multiply-cross-acc 8988 name mode conv addop rhw res max min op ope comment) 8989 (dni name 8990 (comment) 8991 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8992 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8993 (.str name "$pack $FRintieven,$FRintjeven,$" res) 8994 (+ pack res op FRintieven ope FRintjeven) 8995 (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res 8996 max min) 8997 ((fr400 (unit u-media-2-quad 8998 (in FRinti FRintieven) 8999 (in FRintj FRintjeven))) 9000 (fr450 (unit u-media-2-quad 9001 (in FRinti FRintieven) 9002 (in FRintj FRintjeven))) 9003 (fr550 (unit u-media-4-quad))) 9004 ) 9005) 9006 9007(media-quad-cross-multiply-cross-acc mqxmacxhs HI ext add h-acc40S ACC40Sk 9008 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9009 OP_78 OPE1_01 9010 "Media quad cross multiply and cross accumulate signed") 9011 9012(define-pmacro (media-quad-cross-multiply-acc-semantics 9013 cond mode conv addop rhw res max min) 9014 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 9015 (if (register-unaligned res 4) 9016 (c-call VOID "@cpu@_media_acc_not_aligned") 9017 (if (orif (register-unaligned FRintieven 2) 9018 (register-unaligned FRintjeven 2)) 9019 (c-call VOID "@cpu@_media_register_not_aligned") 9020 (if cond 9021 (sequence ((mode argihi) (mode argilo) 9022 (mode argjhi) (mode argjlo)) 9023 (extract-hilo FRintieven 0 FRintjeven 0 9024 argihi argilo argjhi argjlo) 9025 (media-multiply-acc-semantics conv argihi addop argjlo 9026 res 9027 max min (msr-sie-acci)) 9028 (media-multiply-acc-semantics conv argilo addop argjhi 9029 (nextreg rhw res 1) 9030 max min (msr-sie-acci-1)) 9031 (extract-hilo FRintieven 1 FRintjeven 1 9032 argihi argilo argjhi argjlo) 9033 (media-multiply-acc-semantics conv argihi addop argjlo 9034 (nextreg rhw res 2) 9035 max min (msr-sie-acci-2)) 9036 (media-multiply-acc-semantics conv argilo addop argjhi 9037 (nextreg rhw res 3) 9038 max min 9039 (msr-sie-acci-3))))))) 9040) 9041 9042(define-pmacro (media-quad-cross-multiply-acc 9043 name mode conv addop rhw res max min op ope comment) 9044 (dni name 9045 (comment) 9046 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 9047 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9048 (.str name "$pack $FRintieven,$FRintjeven,$" res) 9049 (+ pack res op FRintieven ope FRintjeven) 9050 (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res 9051 max min) 9052 ((fr400 (unit u-media-2-quad 9053 (in FRinti FRintieven) 9054 (in FRintj FRintjeven))) 9055 (fr450 (unit u-media-2-quad 9056 (in FRinti FRintieven) 9057 (in FRintj FRintjeven))) 9058 (fr550 (unit u-media-4-quad))) 9059 ) 9060) 9061 9062(media-quad-cross-multiply-acc mqmacxhs HI ext add h-acc40S ACC40Sk 9063 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9064 OP_78 OPE1_02 9065 "Media quad cross multiply and accumulate signed") 9066 9067(define-pmacro (media-complex-semantics 9068 conv lhs1 rhs1 lhs2 rhs2 res max min sie) 9069 (sequence ((DI tmp1) (DI tmp2)) 9070 (media-multiply-semantics conv lhs1 rhs1 tmp1) 9071 (media-multiply-semantics conv lhs2 rhs2 tmp2) 9072 (set tmp1 (sub tmp1 tmp2)) 9073 (saturate-v tmp1 max min sie res)) 9074) 9075 9076(define-pmacro (media-complex-semantics-i 9077 conv lhs1 rhs1 lhs2 rhs2 res max min sie) 9078 (sequence ((DI tmp1) (DI tmp2)) 9079 (media-multiply-semantics conv lhs1 rhs1 tmp1) 9080 (media-multiply-semantics conv lhs2 rhs2 tmp2) 9081 (set tmp1 (add tmp1 tmp2)) 9082 (saturate-v tmp1 max min sie res)) 9083) 9084 9085(define-pmacro (media-dual-complex-semantics mode conv rhs1 rhs2 max min) 9086 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 9087 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 9088 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 9089 (media-complex-semantics conv argihi rhs1 argilo rhs2 ACC40Sk 9090 max min (msr-sie-acci)))) 9091) 9092 9093(define-pmacro (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min) 9094 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 9095 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 9096 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 9097 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 ACC40Sk 9098 max min (msr-sie-acci)))) 9099) 9100 9101(define-pmacro (media-dual-complex 9102 name mode conv rhs1 rhs2 max min op ope comment) 9103 (dni name 9104 (comment) 9105 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9106 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9107 (.str name "$pack $FRinti,$FRintj,$ACC40Sk") 9108 (+ pack ACC40Sk op FRinti ope FRintj) 9109 (media-dual-complex-semantics mode conv rhs1 rhs2 max min) 9110 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 9111 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 9112 ) 9113) 9114 9115(define-pmacro (media-dual-complex-i 9116 name mode conv rhs1 rhs2 max min op ope comment) 9117 (dni name 9118 (comment) 9119 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9120 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9121 (.str name "$pack $FRinti,$FRintj,$ACC40Sk") 9122 (+ pack ACC40Sk op FRinti ope FRintj) 9123 (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min) 9124 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 9125 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 9126 ) 9127) 9128 9129(media-dual-complex mcpxrs HI ext argjhi argjlo 9130 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9131 OP_7B OPE1_20 9132 "Media dual complex real signed with saturation") 9133 9134(media-dual-complex mcpxru UHI zext argjhi argjlo 9135 (const DI #xffffffffff) (const DI 0) 9136 OP_7B OPE1_21 9137 "Media dual complex real unsigned with saturation") 9138 9139(media-dual-complex-i mcpxis HI ext argjlo argjhi 9140 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9141 OP_7B OPE1_22 9142 "Media dual complex imaginary signed with saturation") 9143 9144(media-dual-complex-i mcpxiu UHI zext argjlo argjhi 9145 (const DI #xffffffffff) (const DI 0) 9146 OP_7B OPE1_23 9147 "Media dual complex imaginary unsigned with saturation") 9148 9149(define-pmacro (conditional-media-dual-complex 9150 name mode conv rhs1 rhs2 max min op ope comment) 9151 (dni name 9152 (comment) 9153 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9154 (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) 9155 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") 9156 (+ pack ACC40Sk op FRinti CCi cond ope FRintj) 9157 (if (eq CCi (or cond 2)) 9158 (media-dual-complex-semantics mode conv rhs1 rhs2 max min)) 9159 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 9160 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 9161 ) 9162) 9163 9164(define-pmacro (conditional-media-dual-complex-i 9165 name mode conv rhs1 rhs2 max min op ope comment) 9166 (dni name 9167 (comment) 9168 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9169 (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) 9170 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") 9171 (+ pack ACC40Sk op FRinti CCi cond ope FRintj) 9172 (if (eq CCi (or cond 2)) 9173 (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)) 9174 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 9175 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 9176 ) 9177) 9178 9179(conditional-media-dual-complex cmcpxrs HI ext argjhi argjlo 9180 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9181 OP_75 OPE4_0 9182 "Conditional Media dual complex real signed with saturation") 9183 9184(conditional-media-dual-complex cmcpxru UHI zext argjhi argjlo 9185 (const DI #xffffffffff) (const DI 0) 9186 OP_75 OPE4_1 9187 "Conditional Media dual complex real unsigned with saturation") 9188 9189(conditional-media-dual-complex-i cmcpxis HI ext argjlo argjhi 9190 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9191 OP_75 OPE4_2 9192 "Conditional Media dual complex imaginary signed with saturation") 9193 9194(conditional-media-dual-complex-i cmcpxiu UHI zext argjlo argjhi 9195 (const DI #xffffffffff) (const DI 0) 9196 OP_75 OPE4_3 9197 "Conditional Media dual complex imaginary unsigned with saturation") 9198 9199(define-pmacro (media-quad-complex 9200 name mode conv rhs1 rhs2 max min op ope comment) 9201 (dni name 9202 (comment) 9203 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9204 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9205 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") 9206 (+ pack ACC40Sk op FRintieven ope FRintjeven) 9207 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 9208 (if (register-unaligned ACC40Sk 2) 9209 (c-call VOID "@cpu@_media_acc_not_aligned") 9210 (if (orif (register-unaligned FRintieven 2) 9211 (register-unaligned FRintjeven 2)) 9212 (c-call VOID "@cpu@_media_register_not_aligned") 9213 (sequence ((mode argihi) (mode argilo) 9214 (mode argjhi) (mode argjlo)) 9215 (extract-hilo FRintieven 0 FRintjeven 0 9216 argihi argilo argjhi argjlo) 9217 (media-complex-semantics conv argihi rhs1 argilo rhs2 9218 ACC40Sk 9219 max min (msr-sie-acci)) 9220 (extract-hilo FRintieven 1 FRintjeven 1 9221 argihi argilo argjhi argjlo) 9222 (media-complex-semantics conv argihi rhs1 argilo rhs2 9223 (nextreg h-acc40S ACC40Sk 1) 9224 max min (msr-sie-acci-1)))))) 9225 ((fr400 (unit u-media-2-quad 9226 (in FRinti FRintieven) 9227 (in FRintj FRintjeven))) 9228 (fr450 (unit u-media-2-quad 9229 (in FRinti FRintieven) 9230 (in FRintj FRintjeven))) 9231 (fr500 (unit u-media-quad-complex 9232 (in FRinti FRintieven) 9233 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 9234 ) 9235) 9236 9237(define-pmacro (media-quad-complex-i 9238 name mode conv rhs1 rhs2 max min op ope comment) 9239 (dni name 9240 (comment) 9241 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9242 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9243 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") 9244 (+ pack ACC40Sk op FRintieven ope FRintjeven) 9245 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 9246 (if (register-unaligned ACC40Sk 2) 9247 (c-call VOID "@cpu@_media_acc_not_aligned") 9248 (if (orif (register-unaligned FRintieven 2) 9249 (register-unaligned FRintjeven 2)) 9250 (c-call VOID "@cpu@_media_register_not_aligned") 9251 (sequence ((mode argihi) (mode argilo) 9252 (mode argjhi) (mode argjlo)) 9253 (extract-hilo FRintieven 0 FRintjeven 0 9254 argihi argilo argjhi argjlo) 9255 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 9256 ACC40Sk 9257 max min (msr-sie-acci)) 9258 (extract-hilo FRintieven 1 FRintjeven 1 9259 argihi argilo argjhi argjlo) 9260 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 9261 (nextreg h-acc40S ACC40Sk 1) 9262 max min (msr-sie-acci-1)))))) 9263 ((fr400 (unit u-media-2-quad 9264 (in FRinti FRintieven) 9265 (in FRintj FRintjeven))) 9266 (fr450 (unit u-media-2-quad 9267 (in FRinti FRintieven) 9268 (in FRintj FRintjeven))) 9269 (fr500 (unit u-media-quad-complex 9270 (in FRinti FRintieven) 9271 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 9272 ) 9273) 9274 9275(media-quad-complex mqcpxrs HI ext argjhi argjlo 9276 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9277 OP_7B OPE1_24 9278 "Media quad complex real signed with saturation") 9279 9280(media-quad-complex mqcpxru UHI zext argjhi argjlo 9281 (const DI #xffffffffff) (const DI 0) 9282 OP_7B OPE1_25 9283 "Media quad complex real unsigned with saturation") 9284 9285(media-quad-complex-i mqcpxis HI ext argjlo argjhi 9286 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9287 OP_7B OPE1_26 9288 "Media quad complex imaginary signed with saturation") 9289 9290(media-quad-complex-i mqcpxiu UHI zext argjlo argjhi 9291 (const DI #xffffffffff) (const DI 0) 9292 OP_7B OPE1_27 9293 "Media quad complex imaginary unsigned with saturation") 9294 9295(define-pmacro (media-pack src1 src2 targ offset) 9296 (sequence () 9297 (set (halfword hi targ offset) (halfword lo src1 offset)) 9298 (set (halfword lo targ offset) (halfword lo src2 offset))) 9299) 9300 9301(define-pmacro (media-expand-halfword-to-word-semantics cond) 9302 (if cond 9303 (sequence ((UHI tmp)) 9304 (if (and u6 1) 9305 (set tmp (halfword lo FRinti 0)) 9306 (set tmp (halfword hi FRinti 0))) 9307 (set (halfword hi FRintk 0) tmp) 9308 (set (halfword lo FRintk 0) tmp))) 9309) 9310 9311(dni mexpdhw 9312 "Media expand halfword to word" 9313 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9314 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 9315 "mexpdhw$pack $FRinti,$u6,$FRintk" 9316 (+ pack FRintk OP_7B FRinti OPE1_32 u6) 9317 (media-expand-halfword-to-word-semantics 1) 9318 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 9319 (fr500 (unit u-media)) (fr550 (unit u-media))) 9320) 9321 9322(dni cmexpdhw 9323 "Conditional media expand halfword to word" 9324 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9325 (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) 9326 "cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond" 9327 (+ pack FRintk OP_76 FRinti CCi cond OPE4_2 u6) 9328 (media-expand-halfword-to-word-semantics (eq CCi (or cond 2))) 9329 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 9330 (fr500 (unit u-media)) (fr550 (unit u-media))) 9331) 9332 9333(define-pmacro (media-expand-halfword-to-double-semantics cond) 9334 (if (register-unaligned FRintkeven 2) 9335 (c-call VOID "@cpu@_media_register_not_aligned") 9336 (if cond 9337 (sequence ((UHI tmp)) 9338 ; a hack to get FRintkeven referenced for profiling 9339 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9340 (if (and u6 1) 9341 (set tmp (halfword lo FRinti 0)) 9342 (set tmp (halfword hi FRinti 0))) 9343 (set (halfword hi FRintkeven 0) tmp) 9344 (set (halfword lo FRintkeven 0) tmp) 9345 (set (halfword hi FRintkeven 1) tmp) 9346 (set (halfword lo FRintkeven 1) tmp)))) 9347) 9348 9349(dni mexpdhd 9350 "Media expand halfword to double" 9351 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9352 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9353 "mexpdhd$pack $FRinti,$u6,$FRintkeven" 9354 (+ pack FRintkeven OP_7B FRinti OPE1_33 u6) 9355 (media-expand-halfword-to-double-semantics 1) 9356 ((fr400 (unit u-media-dual-expand 9357 (out FRintk FRintkeven))) 9358 (fr450 (unit u-media-dual-expand 9359 (out FRintk FRintkeven))) 9360 (fr500 (unit u-media-dual-expand 9361 (out FRintk FRintkeven))) 9362 (fr550 (unit u-media-dual-expand))) 9363) 9364 9365(dni cmexpdhd 9366 "Conditional media expand halfword to double" 9367 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9368 (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) 9369 "cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond" 9370 (+ pack FRintkeven OP_76 FRinti CCi cond OPE4_3 u6) 9371 (media-expand-halfword-to-double-semantics (eq CCi (or cond 2))) 9372 ((fr400 (unit u-media-dual-expand 9373 (out FRintk FRintkeven))) 9374 (fr450 (unit u-media-dual-expand 9375 (out FRintk FRintkeven))) 9376 (fr500 (unit u-media-dual-expand 9377 (out FRintk FRintkeven))) 9378 (fr550 (unit u-media-dual-expand))) 9379) 9380 9381(dni mpackh 9382 "Media halfword pack" 9383 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9384 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 9385 "mpackh$pack $FRinti,$FRintj,$FRintk" 9386 (+ pack FRintk OP_7B FRinti OPE1_34 FRintj) 9387 (media-pack FRinti FRintj FRintk 0) 9388 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 9389 (fr500 (unit u-media)) (fr550 (unit u-media))) 9390) 9391 9392(dni mdpackh 9393 "Media dual pack" 9394 ((UNIT FM01) (FR500-MAJOR M-5) (FR550-MAJOR M-3) 9395 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9396 "mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven" 9397 (+ pack FRintkeven OP_7B FRintieven OPE1_36 FRintjeven) 9398 (if (orif (register-unaligned FRintieven 2) 9399 (orif (register-unaligned FRintjeven 2) 9400 (register-unaligned FRintkeven 2))) 9401 (c-call VOID "@cpu@_media_register_not_aligned") 9402 (sequence () 9403 ; hack to get these referenced for profiling 9404 (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) 9405 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) 9406 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9407 (media-pack FRintieven FRintjeven FRintkeven 0) 9408 (media-pack FRintieven FRintjeven FRintkeven 1))) 9409 ((fr400 (unit u-media-3-quad 9410 (in FRinti FRintieven) 9411 (in FRintj FRintjeven) 9412 (out FRintk FRintkeven))) 9413 (fr450 (unit u-media-3-quad 9414 (in FRinti FRintieven) 9415 (in FRintj FRintjeven) 9416 (out FRintk FRintkeven))) 9417 (fr500 (unit u-media-quad-arith 9418 (in FRinti FRintieven) 9419 (in FRintj FRintjeven) 9420 (out FRintk FRintkeven))) 9421 (fr550 (unit u-media-quad))) 9422) 9423 9424(define-pmacro (media-unpack src soff targ toff) 9425 (sequence () 9426 (set (halfword hi targ toff) (halfword hi src soff)) 9427 (set (halfword lo targ toff) (halfword hi src soff)) 9428 (set (halfword hi targ (add toff 1)) (halfword lo src soff)) 9429 (set (halfword lo targ (add toff 1)) (halfword lo src soff))) 9430) 9431 9432(dni munpackh 9433 "Media halfword unpack" 9434 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9435 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9436 "munpackh$pack $FRinti,$FRintkeven" 9437 (+ pack FRintkeven OP_7B FRinti OPE1_35 (FRj-null)) 9438 (if (register-unaligned FRintkeven 2) 9439 (c-call VOID "@cpu@_media_register_not_aligned") 9440 (sequence () 9441 ; hack to get these referenced for profiling 9442 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) 9443 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9444 (media-unpack FRinti 0 FRintkeven 0))) 9445 ((fr400 (unit u-media-dual-expand 9446 (out FRintk FRintkeven))) 9447 (fr450 (unit u-media-dual-expand 9448 (out FRintk FRintkeven))) 9449 (fr500 (unit u-media-dual-expand 9450 (out FRintk FRintkeven))) 9451 (fr550 (unit u-media-dual-expand))) 9452) 9453 9454(dni mdunpackh 9455 "Media dual unpack" 9456 ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv)) 9457 "mdunpackh$pack $FRintieven,$FRintk" 9458 (+ pack FRintk OP_7B FRintieven OPE1_37 (FRj-null)) 9459 (if (orif (register-unaligned FRintieven 2) (register-unaligned FRintk 4)) 9460 (c-call VOID "@cpu@_media_register_not_aligned") 9461 (sequence () 9462 ; hack to get these referenced for profiling 9463 (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) 9464 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9465 (media-unpack FRintieven 0 FRintk 0) 9466 (media-unpack FRintieven 1 FRintk 2))) 9467 ((fr500 (unit u-media-dual-unpack 9468 (in FRinti FRintieven)))) 9469) 9470 9471(define-pmacro (ubyte num arg offset) 9472 (reg (.sym h-fr_ num) (add (index-of arg) offset))) 9473 9474(define-pmacro (mbtoh-semantics cond) 9475 (if (register-unaligned FRintkeven 2) 9476 (c-call VOID "@cpu@_media_register_not_aligned") 9477 (if cond 9478 (sequence () 9479 (set (halfword hi FRintkeven 0) (ubyte 3 FRintj 0)) 9480 (set (halfword lo FRintkeven 0) (ubyte 2 FRintj 0)) 9481 (set (halfword hi FRintkeven 1) (ubyte 1 FRintj 0)) 9482 (set (halfword lo FRintkeven 1) (ubyte 0 FRintj 0))))) 9483) 9484 9485(dni mbtoh 9486 "Media convert byte to halfword" 9487 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9488 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9489 "mbtoh$pack $FRintj,$FRintkeven" 9490 (+ pack FRintkeven OP_7B (FRi-null) OPE1_38 FRintj) 9491 (sequence () 9492 ; hack to get these referenced for profiling 9493 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 9494 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9495 (mbtoh-semantics 1)) 9496 ((fr400 (unit u-media-dual-expand 9497 (out FRintk FRintkeven))) 9498 (fr450 (unit u-media-dual-expand 9499 (out FRintk FRintkeven))) 9500 (fr500 (unit u-media-dual-btoh 9501 (out FRintk FRintkeven))) 9502 (fr550 (unit u-media-dual-expand))) 9503) 9504 9505(dni cmbtoh 9506 "Conditional media convert byte to halfword" 9507 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9508 (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) 9509 "cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond" 9510 (+ pack FRintkeven OP_77 (FRi-null) CCi cond OPE4_0 FRintj) 9511 (sequence () 9512 ; hack to get these referenced for profiling 9513 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 9514 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9515 (mbtoh-semantics (eq CCi (or cond 2)))) 9516 ((fr400 (unit u-media-dual-expand 9517 (out FRintk FRintkeven))) 9518 (fr450 (unit u-media-dual-expand 9519 (out FRintk FRintkeven))) 9520 (fr500 (unit u-media-dual-btoh 9521 (out FRintk FRintkeven))) 9522 (fr550 (unit u-media-dual-expand 9523 (in FRinti FRintj)))) 9524) 9525 9526(define-pmacro (mhtob-semantics cond) 9527 (if (register-unaligned FRintjeven 2) 9528 (c-call VOID "@cpu@_media_register_not_aligned") 9529 (if cond 9530 (sequence () 9531 (set (ubyte 3 FRintk 0) (halfword hi FRintjeven 0)) 9532 (set (ubyte 2 FRintk 0) (halfword lo FRintjeven 0)) 9533 (set (ubyte 1 FRintk 0) (halfword hi FRintjeven 1)) 9534 (set (ubyte 0 FRintk 0) (halfword lo FRintjeven 1))))) 9535) 9536 9537(dni mhtob 9538 "Media convert halfword to byte" 9539 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9540 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9541 "mhtob$pack $FRintjeven,$FRintk" 9542 (+ pack FRintk OP_7B (FRi-null) OPE1_39 FRintjeven) 9543 (sequence () 9544 ; hack to get these referenced for profiling 9545 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) 9546 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9547 (mhtob-semantics 1)) 9548 ((fr400 (unit u-media-dual-htob 9549 (in FRintj FRintjeven))) 9550 (fr450 (unit u-media-dual-htob 9551 (in FRintj FRintjeven))) 9552 (fr500 (unit u-media-dual-htob 9553 (in FRintj FRintjeven))) 9554 (fr550 (unit u-media-3-dual 9555 (in FRinti FRintjeven)))) 9556) 9557 9558(dni cmhtob 9559 "Conditional media convert halfword to byte" 9560 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9561 (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) 9562 "cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond" 9563 (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_1 FRintjeven) 9564 (sequence () 9565 ; hack to get these referenced for profiling 9566 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) 9567 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9568 (mhtob-semantics (eq CCi (or cond 2)))) 9569 ((fr400 (unit u-media-dual-htob 9570 (in FRintj FRintjeven))) 9571 (fr450 (unit u-media-dual-htob 9572 (in FRintj FRintjeven))) 9573 (fr500 (unit u-media-dual-htob 9574 (in FRintj FRintjeven))) 9575 (fr550 (unit u-media-3-dual 9576 (in FRinti FRintjeven)))) 9577) 9578 9579(define-pmacro (mbtohe-semantics cond) 9580 (if (register-unaligned FRintk 4) 9581 (c-call VOID "@cpu@_media_register_not_aligned") 9582 (if cond 9583 (sequence () 9584 (set (halfword hi FRintk 0) (ubyte 3 FRintj 0)) 9585 (set (halfword lo FRintk 0) (ubyte 3 FRintj 0)) 9586 (set (halfword hi FRintk 1) (ubyte 2 FRintj 0)) 9587 (set (halfword lo FRintk 1) (ubyte 2 FRintj 0)) 9588 (set (halfword hi FRintk 2) (ubyte 1 FRintj 0)) 9589 (set (halfword lo FRintk 2) (ubyte 1 FRintj 0)) 9590 (set (halfword hi FRintk 3) (ubyte 0 FRintj 0)) 9591 (set (halfword lo FRintk 3) (ubyte 0 FRintj 0))))) 9592) 9593 9594(dni mbtohe 9595 "Media convert byte to halfword extended" 9596 ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv)) 9597 "mbtohe$pack $FRintj,$FRintk" 9598 (+ pack FRintk OP_7B (FRi-null) OPE1_3A FRintj) 9599 (sequence () 9600 ; hack to get these referenced for profiling 9601 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 9602 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9603 (mbtohe-semantics 1)) 9604 ((fr500 (unit u-media-dual-btohe))) 9605) 9606 9607(dni cmbtohe 9608 "Conditional media convert byte to halfword extended" 9609 ((UNIT FM01) (FR500-MAJOR M-7) CONDITIONAL (MACH simple,tomcat,frv)) 9610 "cmbtohe$pack $FRintj,$FRintk,$CCi,$cond" 9611 (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_2 FRintj) 9612 (sequence () 9613 ; hack to get these referenced for profiling 9614 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 9615 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9616 (mbtohe-semantics (eq CCi (or cond 2)))) 9617 ((fr500 (unit u-media-dual-btohe))) 9618) 9619 9620; Media NOP 9621; A special case of mclracc 9622(dni mnop "Media nop" 9623 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-1) 9624 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 9625 "mnop$pack" 9626 (+ pack (f-ACC40Sk 63) OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null)) 9627 (nop) 9628 () 9629) 9630 9631; mclracc with #A==0 9632(dni mclracc-0 9633 "Media clear accumulator(s)" 9634 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) 9635 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9636 "mclracc$pack $ACC40Sk,$A0" 9637 (+ pack ACC40Sk OP_7B (f-A 0) (misc-null-10) OPE1_3B (FRj-null)) 9638 (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 0) 9639 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 9640 (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc))) 9641) 9642 9643; mclracc with #A==1 9644(dni mclracc-1 9645 "Media clear accumulator(s)" 9646 ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR550-MAJOR M-3) 9647 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9648 "mclracc$pack $ACC40Sk,$A1" 9649 (+ pack ACC40Sk OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null)) 9650 (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 1) 9651 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4-mclracca)) 9652 (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc))) 9653) 9654 9655(dni mrdacc 9656 "Media read accumulator" 9657 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9658 (FR400-MAJOR M-1) (FR450-MAJOR M-5)) 9659 "mrdacc$pack $ACC40Si,$FRintk" 9660 (+ pack FRintk OP_7B ACC40Si OPE1_3C (FRj-null)) 9661 (set FRintk ACC40Si) 9662 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 9663 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) 9664) 9665 9666(dni mrdaccg 9667 "Media read accumulator guard" 9668 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9669 (FR400-MAJOR M-1) (FR450-MAJOR M-5)) 9670 "mrdaccg$pack $ACCGi,$FRintk" 9671 (+ pack FRintk OP_7B ACCGi OPE1_3E (FRj-null)) 9672 (set FRintk ACCGi) 9673 ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg)) 9674 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc (in ACC40Si ACCGi)))) 9675) 9676 9677(dni mwtacc 9678 "Media write accumulator" 9679 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) 9680 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9681 "mwtacc$pack $FRinti,$ACC40Sk" 9682 (+ pack ACC40Sk OP_7B FRinti OPE1_3D (FRj-null)) 9683 (set ACC40Sk (or (and ACC40Sk (const DI #xffffffff00000000)) 9684 FRinti)) 9685 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 9686 (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc))) 9687) 9688 9689(dni mwtaccg 9690 "Media write accumulator guard" 9691 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) 9692 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9693 "mwtaccg$pack $FRinti,$ACCGk" 9694 (+ pack ACCGk OP_7B FRinti OPE1_3F (FRj-null)) 9695 (sequence () 9696 ; hack to get these referenced for profiling 9697 (c-raw-call VOID "frv_ref_SI" ACCGk) 9698 (set ACCGk FRinti)) 9699 ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg)) 9700 (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc (in ACC40Sk ACCGk)))) 9701) 9702 9703(define-pmacro (media-cop num op) 9704 (dni (.sym mcop num) 9705 "Media custom instruction" 9706 ((UNIT FM01) (FR500-MAJOR M-1) (MACH frv)) 9707 (.str "mcop" num "$pack $FRi,$FRj,$FRk") 9708 (+ pack FRk op FRi OPE1_00 FRj) 9709 (c-call VOID "@cpu@_media_cop" num) 9710 () 9711 ) 9712) 9713 9714(media-cop 1 OP_7C) 9715(media-cop 2 OP_7D) 9716 9717; nop 9718; A nop is defined to be a "ori gr0,0,gr0" 9719; This needn't be a macro-insn, but making it one greatly simplifies decode.c 9720; On the other hand spending a little time in the decoder is often worth it. 9721; 9722(dnmi nop "nop" 9723 ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 9724 "nop$pack" 9725 (emit ori pack (GRi 0) (s12 0) (GRk 0)) 9726) 9727 9728; Floating point NOP 9729(dni fnop 9730 "Floating point nop" 9731 ((UNIT FMALL) (FR500-MAJOR F-8) (FR550-MAJOR F-1) (MACH simple,tomcat,fr500,fr550,frv)) 9732 "fnop$pack" 9733 (+ pack (rd-null) OP_79 (FRi-null) OPE1_0D (FRj-null)) 9734 (nop) 9735 () 9736) 9737 9738; A return instruction 9739(dnmi ret "return" 9740 (NO-DIS (UNIT B01) (FR500-MAJOR B-3) 9741 (FR400-MAJOR B-3) (FR450-MAJOR B-3)) 9742 "ret$pack" 9743 (emit bralr pack (hint_taken 2)) 9744) 9745 9746(dnmi cmp "compare" 9747 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9748 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 9749 "cmp$pack $GRi,$GRj,$ICCi_1" 9750 (emit subcc pack GRi GRj (GRk 0) ICCi_1) 9751) 9752 9753(dnmi cmpi "compare immediate" 9754 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9755 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 9756 "cmpi$pack $GRi,$s10,$ICCi_1" 9757 (emit subicc pack GRi s10 (GRk 0) ICCi_1) 9758) 9759 9760(dnmi ccmp "conditional compare" 9761 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9762 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 9763 "ccmp$pack $GRi,$GRj,$CCi,$cond" 9764 (emit csubcc pack GRi GRj (GRk 0) CCi cond) 9765) 9766 9767(dnmi mov "move" 9768 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9769 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 9770 "mov$pack $GRi,$GRk" 9771 (emit ori pack GRi (s12 0) GRk) 9772) 9773 9774(dnmi cmov "conditional move" 9775 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9776 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 9777 "cmov$pack $GRi,$GRk,$CCi,$cond" 9778 (emit cor pack GRi (GRj 0) GRk CCi cond) 9779) 9780