1 /* tc-mcore.c -- Assemble code for M*Core 2 Copyright 1999, 2000, 2001, 2002, 2003, 2005 3 Free Software Foundation, Inc. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include <stdio.h> 23 #include "as.h" 24 #include "bfd.h" 25 #include "subsegs.h" 26 #define DEFINE_TABLE 27 #include "../opcodes/mcore-opc.h" 28 #include "safe-ctype.h" 29 #include <string.h> 30 31 #ifdef OBJ_ELF 32 #include "elf/mcore.h" 33 #endif 34 35 #ifndef streq 36 #define streq(a,b) (strcmp (a, b) == 0) 37 #endif 38 39 /* Forward declarations for dumb compilers. */ 40 41 /* Several places in this file insert raw instructions into the 42 object. They should use MCORE_INST_XXX macros to get the opcodes 43 and then use these two macros to crack the MCORE_INST value into 44 the appropriate byte values. */ 45 #define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF)) 46 #define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF)) 47 48 const char comment_chars[] = "#/"; 49 const char line_separator_chars[] = ";"; 50 const char line_comment_chars[] = "#/"; 51 52 static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */ 53 static int sifilter_mode = 0; 54 55 const char EXP_CHARS[] = "eE"; 56 57 /* Chars that mean this number is a floating point constant 58 As in 0f12.456 59 or 0d1.2345e12 */ 60 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 61 62 #define C(what,length) (((what) << 2) + (length)) 63 #define GET_WHAT(x) ((x >> 2)) 64 65 /* These are the two types of relaxable instruction. */ 66 #define COND_JUMP 1 67 #define UNCD_JUMP 2 68 69 #define UNDEF_DISP 0 70 #define DISP12 1 71 #define DISP32 2 72 #define UNDEF_WORD_DISP 3 73 74 #define C12_LEN 2 75 #define C32_LEN 10 /* Allow for align. */ 76 #define U12_LEN 2 77 #define U32_LEN 8 /* Allow for align. */ 78 79 typedef enum 80 { 81 M210, 82 M340 83 } 84 cpu_type; 85 86 cpu_type cpu = M340; 87 88 /* Initialize the relax table. */ 89 const relax_typeS md_relax_table[] = 90 { 91 { 0, 0, 0, 0 }, 92 { 0, 0, 0, 0 }, 93 { 0, 0, 0, 0 }, 94 { 0, 0, 0, 0 }, 95 96 /* COND_JUMP */ 97 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 98 { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */ 99 { 0, 0, C32_LEN, 0 }, /* DISP32 */ 100 { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */ 101 102 /* UNCD_JUMP */ 103 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 104 { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */ 105 { 0, 0, U32_LEN, 0 }, /* DISP32 */ 106 { 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */ 107 108 }; 109 110 /* Literal pool data structures. */ 111 struct literal 112 { 113 unsigned short refcnt; 114 unsigned char ispcrel; 115 unsigned char unused; 116 expressionS e; 117 }; 118 119 #define MAX_POOL_SIZE (1024/4) 120 static struct literal litpool [MAX_POOL_SIZE]; 121 static unsigned poolsize; 122 static unsigned poolnumber; 123 static unsigned long poolspan; 124 125 /* SPANPANIC: the point at which we get too scared and force a dump 126 of the literal pool, and perhaps put a branch in place. 127 Calculated as: 128 1024 span of lrw/jmpi/jsri insn (actually span+1) 129 -2 possible alignment at the insn. 130 -2 possible alignment to get the table aligned. 131 -2 an inserted branch around the table. 132 == 1018 133 at 1018, we might be in trouble. 134 -- so we have to be smaller than 1018 and since we deal with 2-byte 135 instructions, the next good choice is 1016. 136 -- Note we have a test case that fails when we've got 1018 here. */ 137 #define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */ 138 #define SPANCLOSE (900) 139 #define SPANEXIT (600) 140 static symbolS * poolsym; /* Label for current pool. */ 141 static char poolname[8]; 142 static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ 143 144 #define POOL_END_LABEL ".LE" 145 #define POOL_START_LABEL ".LS" 146 147 static void 148 make_name (char * s, char * p, int n) 149 { 150 static const char hex[] = "0123456789ABCDEF"; 151 152 s[0] = p[0]; 153 s[1] = p[1]; 154 s[2] = p[2]; 155 s[3] = hex[(n >> 12) & 0xF]; 156 s[4] = hex[(n >> 8) & 0xF]; 157 s[5] = hex[(n >> 4) & 0xF]; 158 s[6] = hex[(n) & 0xF]; 159 s[7] = 0; 160 } 161 162 static void 163 dump_literals (int isforce) 164 { 165 unsigned int i; 166 struct literal * p; 167 symbolS * brarsym = NULL; 168 169 if (poolsize == 0) 170 return; 171 172 /* Must we branch around the literal table? */ 173 if (isforce) 174 { 175 char * output; 176 char brarname[8]; 177 178 make_name (brarname, POOL_END_LABEL, poolnumber); 179 180 brarsym = symbol_make (brarname); 181 182 symbol_table_insert (brarsym); 183 184 output = frag_var (rs_machine_dependent, 185 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 186 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 187 C (UNCD_JUMP, 0), brarsym, 0, 0); 188 output[0] = INST_BYTE0 (MCORE_INST_BR); /* br .+xxx */ 189 output[1] = INST_BYTE1 (MCORE_INST_BR); 190 } 191 192 /* Make sure that the section is sufficiently aligned and that 193 the literal table is aligned within it. */ 194 record_alignment (now_seg, 2); 195 frag_align (2, 0, 0); 196 197 colon (S_GET_NAME (poolsym)); 198 199 for (i = 0, p = litpool; i < poolsize; i++, p++) 200 emit_expr (& p->e, 4); 201 202 if (brarsym != NULL) 203 colon (S_GET_NAME (brarsym)); 204 205 poolsize = 0; 206 } 207 208 static void 209 mcore_s_literals (int ignore ATTRIBUTE_UNUSED) 210 { 211 dump_literals (0); 212 demand_empty_rest_of_line (); 213 } 214 215 /* Perform FUNC (ARG), and track number of bytes added to frag. */ 216 217 static void 218 mcore_pool_count (void (*func) (int), int arg) 219 { 220 const fragS *curr_frag = frag_now; 221 offsetT added = -frag_now_fix_octets (); 222 223 (*func) (arg); 224 225 while (curr_frag != frag_now) 226 { 227 added += curr_frag->fr_fix; 228 curr_frag = curr_frag->fr_next; 229 } 230 231 added += frag_now_fix_octets (); 232 poolspan += added; 233 } 234 235 static void 236 check_literals (int kind, int offset) 237 { 238 poolspan += offset; 239 240 /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC. 241 SPANPANIC means that we must dump now. 242 kind == 0 is any old instruction. 243 kind > 0 means we just had a control transfer instruction. 244 kind == 1 means within a function 245 kind == 2 means we just left a function 246 247 The dump_literals (1) call inserts a branch around the table, so 248 we first look to see if its a situation where we won't have to 249 insert a branch (e.g., the previous instruction was an unconditional 250 branch). 251 252 SPANPANIC is the point where we must dump a single-entry pool. 253 it accounts for alignments and an inserted branch. 254 the 'poolsize*2' accounts for the scenario where we do: 255 lrw r1,lit1; lrw r2,lit2; lrw r3,lit3 256 Note that the 'lit2' reference is 2 bytes further along 257 but the literal it references will be 4 bytes further along, 258 so we must consider the poolsize into this equation. 259 This is slightly over-cautious, but guarantees that we won't 260 panic because a relocation is too distant. */ 261 262 if (poolspan > SPANCLOSE && kind > 0) 263 dump_literals (0); 264 else if (poolspan > SPANEXIT && kind > 1) 265 dump_literals (0); 266 else if (poolspan >= (SPANPANIC - poolsize * 2)) 267 dump_literals (1); 268 } 269 270 static void 271 mcore_cons (int nbytes) 272 { 273 if (now_seg == text_section) 274 mcore_pool_count (cons, nbytes); 275 else 276 cons (nbytes); 277 278 /* In theory we ought to call check_literals (2,0) here in case 279 we need to dump the literal table. We cannot do this however, 280 as the directives that we are intercepting may be being used 281 to build a switch table, and we must not interfere with its 282 contents. Instead we cross our fingers and pray... */ 283 } 284 285 static void 286 mcore_float_cons (int float_type) 287 { 288 if (now_seg == text_section) 289 mcore_pool_count (float_cons, float_type); 290 else 291 float_cons (float_type); 292 293 /* See the comment in mcore_cons () about calling check_literals. 294 It is unlikely that a switch table will be constructed using 295 floating point values, but it is still likely that an indexed 296 table of floating point constants is being created by these 297 directives, so again we must not interfere with their placement. */ 298 } 299 300 static void 301 mcore_stringer (int append_zero) 302 { 303 if (now_seg == text_section) 304 mcore_pool_count (stringer, append_zero); 305 else 306 stringer (append_zero); 307 308 /* We call check_literals here in case a large number of strings are 309 being placed into the text section with a sequence of stringer 310 directives. In theory we could be upsetting something if these 311 strings are actually in an indexed table instead of referenced by 312 individual labels. Let us hope that that never happens. */ 313 check_literals (2, 0); 314 } 315 316 static void 317 mcore_fill (int unused) 318 { 319 if (now_seg == text_section) 320 mcore_pool_count (s_fill, unused); 321 else 322 s_fill (unused); 323 324 check_literals (2, 0); 325 } 326 327 /* Handle the section changing pseudo-ops. These call through to the 328 normal implementations, but they dump the literal pool first. */ 329 330 static void 331 mcore_s_text (int ignore) 332 { 333 dump_literals (0); 334 335 #ifdef OBJ_ELF 336 obj_elf_text (ignore); 337 #else 338 s_text (ignore); 339 #endif 340 } 341 342 static void 343 mcore_s_data (int ignore) 344 { 345 dump_literals (0); 346 347 #ifdef OBJ_ELF 348 obj_elf_data (ignore); 349 #else 350 s_data (ignore); 351 #endif 352 } 353 354 static void 355 mcore_s_section (int ignore) 356 { 357 /* Scan forwards to find the name of the section. If the section 358 being switched to is ".line" then this is a DWARF1 debug section 359 which is arbitrarily placed inside generated code. In this case 360 do not dump the literal pool because it is a) inefficient and 361 b) would require the generation of extra code to jump around the 362 pool. */ 363 char * ilp = input_line_pointer; 364 365 while (*ilp != 0 && ISSPACE (*ilp)) 366 ++ ilp; 367 368 if (strncmp (ilp, ".line", 5) == 0 369 && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r')) 370 ; 371 else 372 dump_literals (0); 373 374 #ifdef OBJ_ELF 375 obj_elf_section (ignore); 376 #endif 377 #ifdef OBJ_COFF 378 obj_coff_section (ignore); 379 #endif 380 } 381 382 static void 383 mcore_s_bss (int needs_align) 384 { 385 dump_literals (0); 386 387 s_lcomm_bytes (needs_align); 388 } 389 390 #ifdef OBJ_ELF 391 static void 392 mcore_s_comm (int needs_align) 393 { 394 dump_literals (0); 395 396 obj_elf_common (needs_align); 397 } 398 #endif 399 400 /* This table describes all the machine specific pseudo-ops the assembler 401 has to support. The fields are: 402 Pseudo-op name without dot 403 Function to call to execute this pseudo-op 404 Integer arg to pass to the function. */ 405 const pseudo_typeS md_pseudo_table[] = 406 { 407 { "export", s_globl, 0 }, 408 { "import", s_ignore, 0 }, 409 { "literals", mcore_s_literals, 0 }, 410 { "page", listing_eject, 0 }, 411 412 /* The following are to intercept the placement of data into the text 413 section (eg addresses for a switch table), so that the space they 414 occupy can be taken into account when deciding whether or not to 415 dump the current literal pool. 416 XXX - currently we do not cope with the .space and .dcb.d directives. */ 417 { "ascii", mcore_stringer, 0 }, 418 { "asciz", mcore_stringer, 1 }, 419 { "byte", mcore_cons, 1 }, 420 { "dc", mcore_cons, 2 }, 421 { "dc.b", mcore_cons, 1 }, 422 { "dc.d", mcore_float_cons, 'd'}, 423 { "dc.l", mcore_cons, 4 }, 424 { "dc.s", mcore_float_cons, 'f'}, 425 { "dc.w", mcore_cons, 2 }, 426 { "dc.x", mcore_float_cons, 'x'}, 427 { "double", mcore_float_cons, 'd'}, 428 { "float", mcore_float_cons, 'f'}, 429 { "hword", mcore_cons, 2 }, 430 { "int", mcore_cons, 4 }, 431 { "long", mcore_cons, 4 }, 432 { "octa", mcore_cons, 16 }, 433 { "quad", mcore_cons, 8 }, 434 { "short", mcore_cons, 2 }, 435 { "single", mcore_float_cons, 'f'}, 436 { "string", mcore_stringer, 1 }, 437 { "word", mcore_cons, 2 }, 438 { "fill", mcore_fill, 0 }, 439 440 /* Allow for the effect of section changes. */ 441 { "text", mcore_s_text, 0 }, 442 { "data", mcore_s_data, 0 }, 443 { "bss", mcore_s_bss, 1 }, 444 #ifdef OBJ_ELF 445 { "comm", mcore_s_comm, 0 }, 446 #endif 447 { "section", mcore_s_section, 0 }, 448 { "section.s", mcore_s_section, 0 }, 449 { "sect", mcore_s_section, 0 }, 450 { "sect.s", mcore_s_section, 0 }, 451 452 { 0, 0, 0 } 453 }; 454 455 /* This function is called once, at assembler startup time. This should 456 set up all the tables, etc that the MD part of the assembler needs. */ 457 458 void 459 md_begin (void) 460 { 461 const mcore_opcode_info * opcode; 462 char * prev_name = ""; 463 464 opcode_hash_control = hash_new (); 465 466 /* Insert unique names into hash table. */ 467 for (opcode = mcore_table; opcode->name; opcode ++) 468 { 469 if (! streq (prev_name, opcode->name)) 470 { 471 prev_name = opcode->name; 472 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 473 } 474 } 475 } 476 477 /* Get a log2(val). */ 478 479 static int 480 mylog2 (unsigned int val) 481 { 482 int log = -1; 483 484 while (val != 0) 485 { 486 log ++; 487 val >>= 1; 488 } 489 490 return log; 491 } 492 493 /* Try to parse a reg name. */ 494 495 static char * 496 parse_reg (char * s, unsigned * reg) 497 { 498 /* Strip leading whitespace. */ 499 while (ISSPACE (* s)) 500 ++ s; 501 502 if (TOLOWER (s[0]) == 'r') 503 { 504 if (s[1] == '1' && s[2] >= '0' && s[2] <= '5') 505 { 506 *reg = 10 + s[2] - '0'; 507 return s + 3; 508 } 509 510 if (s[1] >= '0' && s[1] <= '9') 511 { 512 *reg = s[1] - '0'; 513 return s + 2; 514 } 515 } 516 else if ( TOLOWER (s[0]) == 's' 517 && TOLOWER (s[1]) == 'p' 518 && ! ISALNUM (s[2])) 519 { 520 * reg = 0; 521 return s + 2; 522 } 523 524 as_bad (_("register expected, but saw '%.6s'"), s); 525 return s; 526 } 527 528 static struct Cregs 529 { 530 char * name; 531 unsigned int crnum; 532 } 533 cregs[] = 534 { 535 { "psr", 0}, 536 { "vbr", 1}, 537 { "epsr", 2}, 538 { "fpsr", 3}, 539 { "epc", 4}, 540 { "fpc", 5}, 541 { "ss0", 6}, 542 { "ss1", 7}, 543 { "ss2", 8}, 544 { "ss3", 9}, 545 { "ss4", 10}, 546 { "gcr", 11}, 547 { "gsr", 12}, 548 { "", 0} 549 }; 550 551 static char * 552 parse_creg (char * s, unsigned * reg) 553 { 554 int i; 555 556 /* Strip leading whitespace. */ 557 while (ISSPACE (* s)) 558 ++s; 559 560 if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r')) 561 { 562 if (s[2] == '3' && s[3] >= '0' && s[3] <= '1') 563 { 564 *reg = 30 + s[3] - '0'; 565 return s + 4; 566 } 567 568 if (s[2] == '2' && s[3] >= '0' && s[3] <= '9') 569 { 570 *reg = 20 + s[3] - '0'; 571 return s + 4; 572 } 573 574 if (s[2] == '1' && s[3] >= '0' && s[3] <= '9') 575 { 576 *reg = 10 + s[3] - '0'; 577 return s + 4; 578 } 579 580 if (s[2] >= '0' && s[2] <= '9') 581 { 582 *reg = s[2] - '0'; 583 return s + 3; 584 } 585 } 586 587 /* Look at alternate creg names before giving error. */ 588 for (i = 0; cregs[i].name[0] != '\0'; i++) 589 { 590 char buf [10]; 591 int length; 592 int j; 593 594 length = strlen (cregs[i].name); 595 596 for (j = 0; j < length; j++) 597 buf[j] = TOLOWER (s[j]); 598 599 if (strncmp (cregs[i].name, buf, length) == 0) 600 { 601 *reg = cregs[i].crnum; 602 return s + length; 603 } 604 } 605 606 as_bad (_("control register expected, but saw '%.6s'"), s); 607 608 return s; 609 } 610 611 static char * 612 parse_psrmod (char * s, unsigned * reg) 613 { 614 int i; 615 char buf[10]; 616 static struct psrmods 617 { 618 char * name; 619 unsigned int value; 620 } 621 psrmods[] = 622 { 623 { "ie", 1 }, 624 { "fe", 2 }, 625 { "ee", 4 }, 626 { "af", 8 } /* Really 0 and non-combinable. */ 627 }; 628 629 for (i = 0; i < 2; i++) 630 buf[i] = TOLOWER (s[i]); 631 632 for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;) 633 { 634 if (! strncmp (psrmods[i].name, buf, 2)) 635 { 636 * reg = psrmods[i].value; 637 638 return s + 2; 639 } 640 } 641 642 as_bad (_("bad/missing psr specifier")); 643 644 * reg = 0; 645 646 return s; 647 } 648 649 static char * 650 parse_exp (char * s, expressionS * e) 651 { 652 char * save; 653 char * new; 654 655 /* Skip whitespace. */ 656 while (ISSPACE (* s)) 657 ++ s; 658 659 save = input_line_pointer; 660 input_line_pointer = s; 661 662 expression (e); 663 664 if (e->X_op == O_absent) 665 as_bad (_("missing operand")); 666 667 new = input_line_pointer; 668 input_line_pointer = save; 669 670 return new; 671 } 672 673 static int 674 enter_literal (expressionS * e, int ispcrel) 675 { 676 unsigned int i; 677 struct literal * p; 678 679 if (poolsize >= MAX_POOL_SIZE - 2) 680 /* The literal pool is as full as we can handle. We have 681 to be 2 entries shy of the 1024/4=256 entries because we 682 have to allow for the branch (2 bytes) and the alignment 683 (2 bytes before the first insn referencing the pool and 684 2 bytes before the pool itself) == 6 bytes, rounds up 685 to 2 entries. */ 686 dump_literals (1); 687 688 if (poolsize == 0) 689 { 690 /* Create new literal pool. */ 691 if (++ poolnumber > 0xFFFF) 692 as_fatal (_("more than 65K literal pools")); 693 694 make_name (poolname, POOL_START_LABEL, poolnumber); 695 poolsym = symbol_make (poolname); 696 symbol_table_insert (poolsym); 697 poolspan = 0; 698 } 699 700 /* Search pool for value so we don't have duplicates. */ 701 for (p = litpool, i = 0; i < poolsize; i++, p++) 702 { 703 if (e->X_op == p->e.X_op 704 && e->X_add_symbol == p->e.X_add_symbol 705 && e->X_add_number == p->e.X_add_number 706 && ispcrel == p->ispcrel) 707 { 708 p->refcnt ++; 709 return i; 710 } 711 } 712 713 p->refcnt = 1; 714 p->ispcrel = ispcrel; 715 p->e = * e; 716 717 poolsize ++; 718 719 return i; 720 } 721 722 /* Parse a literal specification. -- either new or old syntax. 723 old syntax: the user supplies the label and places the literal. 724 new syntax: we put it into the literal pool. */ 725 726 static char * 727 parse_rt (char * s, 728 char ** outputp, 729 int ispcrel, 730 expressionS * ep) 731 { 732 expressionS e; 733 int n; 734 735 if (ep) 736 /* Indicate nothing there. */ 737 ep->X_op = O_absent; 738 739 if (*s == '[') 740 { 741 s = parse_exp (s + 1, & e); 742 743 if (*s == ']') 744 s++; 745 else 746 as_bad (_("missing ']'")); 747 } 748 else 749 { 750 s = parse_exp (s, & e); 751 752 n = enter_literal (& e, ispcrel); 753 754 if (ep) 755 *ep = e; 756 757 /* Create a reference to pool entry. */ 758 e.X_op = O_symbol; 759 e.X_add_symbol = poolsym; 760 e.X_add_number = n << 2; 761 } 762 763 * outputp = frag_more (2); 764 765 fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1, 766 BFD_RELOC_MCORE_PCREL_IMM8BY4); 767 768 return s; 769 } 770 771 static char * 772 parse_imm (char * s, 773 unsigned * val, 774 unsigned min, 775 unsigned max) 776 { 777 char * new; 778 expressionS e; 779 780 new = parse_exp (s, & e); 781 782 if (e.X_op == O_absent) 783 ; /* An error message has already been emitted. */ 784 else if (e.X_op != O_constant) 785 as_bad (_("operand must be a constant")); 786 else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max) 787 as_bad (_("operand must be absolute in range %u..%u, not %ld"), 788 min, max, (long) e.X_add_number); 789 790 * val = e.X_add_number; 791 792 return new; 793 } 794 795 static char * 796 parse_mem (char * s, 797 unsigned * reg, 798 unsigned * off, 799 unsigned siz) 800 { 801 * off = 0; 802 803 while (ISSPACE (* s)) 804 ++ s; 805 806 if (* s == '(') 807 { 808 s = parse_reg (s + 1, reg); 809 810 while (ISSPACE (* s)) 811 ++ s; 812 813 if (* s == ',') 814 { 815 s = parse_imm (s + 1, off, 0, 63); 816 817 if (siz > 1) 818 { 819 if (siz > 2) 820 { 821 if (* off & 0x3) 822 as_bad (_("operand must be a multiple of 4")); 823 824 * off >>= 2; 825 } 826 else 827 { 828 if (* off & 0x1) 829 as_bad (_("operand must be a multiple of 2")); 830 831 * off >>= 1; 832 } 833 } 834 } 835 836 while (ISSPACE (* s)) 837 ++ s; 838 839 if (* s == ')') 840 s ++; 841 } 842 else 843 as_bad (_("base register expected")); 844 845 return s; 846 } 847 848 /* This is the guts of the machine-dependent assembler. STR points to a 849 machine dependent instruction. This function is supposed to emit 850 the frags/bytes it assembles to. */ 851 852 void 853 md_assemble (char * str) 854 { 855 char * op_start; 856 char * op_end; 857 mcore_opcode_info * opcode; 858 char * output; 859 int nlen = 0; 860 unsigned short inst; 861 unsigned reg; 862 unsigned off; 863 unsigned isize; 864 expressionS e; 865 char name[20]; 866 867 /* Drop leading whitespace. */ 868 while (ISSPACE (* str)) 869 str ++; 870 871 /* Find the op code end. */ 872 for (op_start = op_end = str; 873 nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' '; 874 op_end++) 875 { 876 name[nlen] = op_start[nlen]; 877 nlen++; 878 } 879 880 name [nlen] = 0; 881 882 if (nlen == 0) 883 { 884 as_bad (_("can't find opcode ")); 885 return; 886 } 887 888 opcode = (mcore_opcode_info *) hash_find (opcode_hash_control, name); 889 if (opcode == NULL) 890 { 891 as_bad (_("unknown opcode \"%s\""), name); 892 return; 893 } 894 895 inst = opcode->inst; 896 isize = 2; 897 898 switch (opcode->opclass) 899 { 900 case O0: 901 output = frag_more (2); 902 break; 903 904 case OT: 905 op_end = parse_imm (op_end + 1, & reg, 0, 3); 906 inst |= reg; 907 output = frag_more (2); 908 break; 909 910 case O1: 911 op_end = parse_reg (op_end + 1, & reg); 912 inst |= reg; 913 output = frag_more (2); 914 break; 915 916 case JMP: 917 op_end = parse_reg (op_end + 1, & reg); 918 inst |= reg; 919 output = frag_more (2); 920 /* In a sifilter mode, we emit this insn 2 times, 921 fixes problem of an interrupt during a jmp.. */ 922 if (sifilter_mode) 923 { 924 output[0] = INST_BYTE0 (inst); 925 output[1] = INST_BYTE1 (inst); 926 output = frag_more (2); 927 } 928 break; 929 930 case JSR: 931 op_end = parse_reg (op_end + 1, & reg); 932 933 if (reg == 15) 934 as_bad (_("invalid register: r15 illegal")); 935 936 inst |= reg; 937 output = frag_more (2); 938 939 if (sifilter_mode) 940 { 941 /* Replace with: bsr .+2 ; addi r15,6; jmp rx ; jmp rx. */ 942 inst = MCORE_INST_BSR; /* With 0 displacement. */ 943 output[0] = INST_BYTE0 (inst); 944 output[1] = INST_BYTE1 (inst); 945 946 output = frag_more (2); 947 inst = MCORE_INST_ADDI; 948 inst |= 15; /* addi r15,6 */ 949 inst |= (6 - 1) << 4; /* Over the jmp's. */ 950 output[0] = INST_BYTE0 (inst); 951 output[1] = INST_BYTE1 (inst); 952 953 output = frag_more (2); 954 inst = MCORE_INST_JMP | reg; 955 output[0] = INST_BYTE0 (inst); 956 output[1] = INST_BYTE1 (inst); 957 958 /* 2nd emitted in fallthrough. */ 959 output = frag_more (2); 960 } 961 break; 962 963 case OC: 964 op_end = parse_reg (op_end + 1, & reg); 965 inst |= reg; 966 967 /* Skip whitespace. */ 968 while (ISSPACE (* op_end)) 969 ++ op_end; 970 971 if (*op_end == ',') 972 { 973 op_end = parse_creg (op_end + 1, & reg); 974 inst |= reg << 4; 975 } 976 977 output = frag_more (2); 978 break; 979 980 case MULSH: 981 if (cpu == M210) 982 { 983 as_bad (_("M340 specific opcode used when assembling for M210")); 984 break; 985 } 986 /* drop through... */ 987 case O2: 988 op_end = parse_reg (op_end + 1, & reg); 989 inst |= reg; 990 991 /* Skip whitespace. */ 992 while (ISSPACE (* op_end)) 993 ++ op_end; 994 995 if (* op_end == ',') 996 { 997 op_end = parse_reg (op_end + 1, & reg); 998 inst |= reg << 4; 999 } 1000 else 1001 as_bad (_("second operand missing")); 1002 1003 output = frag_more (2); 1004 break; 1005 1006 case X1: 1007 /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx. */ 1008 op_end = parse_reg (op_end + 1, & reg); 1009 1010 /* Skip whitespace. */ 1011 while (ISSPACE (* op_end)) 1012 ++ op_end; 1013 1014 if (* op_end == ',') /* xtrb- r1,rx. */ 1015 { 1016 if (reg != 1) 1017 as_bad (_("destination register must be r1")); 1018 1019 op_end = parse_reg (op_end + 1, & reg); 1020 } 1021 1022 inst |= reg; 1023 output = frag_more (2); 1024 break; 1025 1026 case O1R1: /* div- rx,r1. */ 1027 op_end = parse_reg (op_end + 1, & reg); 1028 inst |= reg; 1029 1030 /* Skip whitespace. */ 1031 while (ISSPACE (* op_end)) 1032 ++ op_end; 1033 1034 if (* op_end == ',') 1035 { 1036 op_end = parse_reg (op_end + 1, & reg); 1037 if (reg != 1) 1038 as_bad (_("source register must be r1")); 1039 } 1040 else 1041 as_bad (_("second operand missing")); 1042 1043 output = frag_more (2); 1044 break; 1045 1046 case OI: 1047 op_end = parse_reg (op_end + 1, & reg); 1048 inst |= reg; 1049 1050 /* Skip whitespace. */ 1051 while (ISSPACE (* op_end)) 1052 ++ op_end; 1053 1054 if (* op_end == ',') 1055 { 1056 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1057 inst |= (reg - 1) << 4; 1058 } 1059 else 1060 as_bad (_("second operand missing")); 1061 1062 output = frag_more (2); 1063 break; 1064 1065 case OB: 1066 op_end = parse_reg (op_end + 1, & reg); 1067 inst |= reg; 1068 1069 /* Skip whitespace. */ 1070 while (ISSPACE (* op_end)) 1071 ++ op_end; 1072 1073 if (* op_end == ',') 1074 { 1075 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1076 inst |= reg << 4; 1077 } 1078 else 1079 as_bad (_("second operand missing")); 1080 1081 output = frag_more (2); 1082 break; 1083 1084 case OB2: 1085 /* Like OB, but arg is 2^n instead of n. */ 1086 op_end = parse_reg (op_end + 1, & reg); 1087 inst |= reg; 1088 1089 /* Skip whitespace. */ 1090 while (ISSPACE (* op_end)) 1091 ++ op_end; 1092 1093 if (* op_end == ',') 1094 { 1095 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); 1096 /* Further restrict the immediate to a power of two. */ 1097 if ((reg & (reg - 1)) == 0) 1098 reg = mylog2 (reg); 1099 else 1100 { 1101 reg = 0; 1102 as_bad (_("immediate is not a power of two")); 1103 } 1104 inst |= (reg) << 4; 1105 } 1106 else 1107 as_bad (_("second operand missing")); 1108 1109 output = frag_more (2); 1110 break; 1111 1112 case OBRa: /* Specific for bgeni: imm of 0->6 translate to movi. */ 1113 case OBRb: 1114 case OBRc: 1115 op_end = parse_reg (op_end + 1, & reg); 1116 inst |= reg; 1117 1118 /* Skip whitespace. */ 1119 while (ISSPACE (* op_end)) 1120 ++ op_end; 1121 1122 if (* op_end == ',') 1123 { 1124 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1125 /* Immediate values of 0 -> 6 translate to movi. */ 1126 if (reg <= 6) 1127 { 1128 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1129 reg = 0x1 << reg; 1130 as_warn (_("translating bgeni to movi")); 1131 } 1132 inst &= ~ 0x01f0; 1133 inst |= reg << 4; 1134 } 1135 else 1136 as_bad (_("second operand missing")); 1137 1138 output = frag_more (2); 1139 break; 1140 1141 case OBR2: /* Like OBR, but arg is 2^n instead of n. */ 1142 op_end = parse_reg (op_end + 1, & reg); 1143 inst |= reg; 1144 1145 /* Skip whitespace. */ 1146 while (ISSPACE (* op_end)) 1147 ++ op_end; 1148 1149 if (* op_end == ',') 1150 { 1151 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); 1152 1153 /* Further restrict the immediate to a power of two. */ 1154 if ((reg & (reg - 1)) == 0) 1155 reg = mylog2 (reg); 1156 else 1157 { 1158 reg = 0; 1159 as_bad (_("immediate is not a power of two")); 1160 } 1161 1162 /* Immediate values of 0 -> 6 translate to movi. */ 1163 if (reg <= 6) 1164 { 1165 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1166 reg = 0x1 << reg; 1167 as_warn (_("translating mgeni to movi")); 1168 } 1169 1170 inst |= reg << 4; 1171 } 1172 else 1173 as_bad (_("second operand missing")); 1174 1175 output = frag_more (2); 1176 break; 1177 1178 case OMa: /* Specific for bmaski: imm 1->7 translate to movi. */ 1179 case OMb: 1180 case OMc: 1181 op_end = parse_reg (op_end + 1, & reg); 1182 inst |= reg; 1183 1184 /* Skip whitespace. */ 1185 while (ISSPACE (* op_end)) 1186 ++ op_end; 1187 1188 if (* op_end == ',') 1189 { 1190 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1191 1192 /* Immediate values of 1 -> 7 translate to movi. */ 1193 if (reg <= 7) 1194 { 1195 inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT; 1196 reg = (0x1 << reg) - 1; 1197 inst |= reg << 4; 1198 1199 as_warn (_("translating bmaski to movi")); 1200 } 1201 else 1202 { 1203 inst &= ~ 0x01F0; 1204 inst |= (reg & 0x1F) << 4; 1205 } 1206 } 1207 else 1208 as_bad (_("second operand missing")); 1209 1210 output = frag_more (2); 1211 break; 1212 1213 case SI: 1214 op_end = parse_reg (op_end + 1, & reg); 1215 inst |= reg; 1216 1217 /* Skip whitespace. */ 1218 while (ISSPACE (* op_end)) 1219 ++ op_end; 1220 1221 if (* op_end == ',') 1222 { 1223 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1224 inst |= reg << 4; 1225 } 1226 else 1227 as_bad (_("second operand missing")); 1228 1229 output = frag_more (2); 1230 break; 1231 1232 case I7: 1233 op_end = parse_reg (op_end + 1, & reg); 1234 inst |= reg; 1235 1236 /* Skip whitespace. */ 1237 while (ISSPACE (* op_end)) 1238 ++ op_end; 1239 1240 if (* op_end == ',') 1241 { 1242 op_end = parse_imm (op_end + 1, & reg, 0, 0x7F); 1243 inst |= reg << 4; 1244 } 1245 else 1246 as_bad (_("second operand missing")); 1247 1248 output = frag_more (2); 1249 break; 1250 1251 case LS: 1252 op_end = parse_reg (op_end + 1, & reg); 1253 inst |= reg << 8; 1254 1255 /* Skip whitespace. */ 1256 while (ISSPACE (* op_end)) 1257 ++ op_end; 1258 1259 if (* op_end == ',') 1260 { 1261 int size; 1262 1263 if ((inst & 0x6000) == 0) 1264 size = 4; 1265 else if ((inst & 0x6000) == 0x4000) 1266 size = 2; 1267 else if ((inst & 0x6000) == 0x2000) 1268 size = 1; 1269 else 1270 abort (); 1271 1272 op_end = parse_mem (op_end + 1, & reg, & off, size); 1273 1274 if (off > 16) 1275 as_bad (_("displacement too large (%d)"), off); 1276 else 1277 inst |= (reg) | (off << 4); 1278 } 1279 else 1280 as_bad (_("second operand missing")); 1281 1282 output = frag_more (2); 1283 break; 1284 1285 case LR: 1286 op_end = parse_reg (op_end + 1, & reg); 1287 1288 if (reg == 0 || reg == 15) 1289 as_bad (_("Invalid register: r0 and r15 illegal")); 1290 1291 inst |= (reg << 8); 1292 1293 /* Skip whitespace. */ 1294 while (ISSPACE (* op_end)) 1295 ++ op_end; 1296 1297 if (* op_end == ',') 1298 { 1299 /* parse_rt calls frag_more() for us. */ 1300 input_line_pointer = parse_rt (op_end + 1, & output, 0, 0); 1301 op_end = input_line_pointer; 1302 } 1303 else 1304 { 1305 as_bad (_("second operand missing")); 1306 output = frag_more (2); /* save its space */ 1307 } 1308 break; 1309 1310 case LJ: 1311 input_line_pointer = parse_rt (op_end + 1, & output, 1, 0); 1312 /* parse_rt() calls frag_more() for us. */ 1313 op_end = input_line_pointer; 1314 break; 1315 1316 case RM: 1317 op_end = parse_reg (op_end + 1, & reg); 1318 1319 if (reg == 0 || reg == 15) 1320 as_bad (_("bad starting register: r0 and r15 invalid")); 1321 1322 inst |= reg; 1323 1324 /* Skip whitespace. */ 1325 while (ISSPACE (* op_end)) 1326 ++ op_end; 1327 1328 if (* op_end == '-') 1329 { 1330 op_end = parse_reg (op_end + 1, & reg); 1331 1332 if (reg != 15) 1333 as_bad (_("ending register must be r15")); 1334 1335 /* Skip whitespace. */ 1336 while (ISSPACE (* op_end)) 1337 ++ op_end; 1338 } 1339 1340 if (* op_end == ',') 1341 { 1342 op_end ++; 1343 1344 /* Skip whitespace. */ 1345 while (ISSPACE (* op_end)) 1346 ++ op_end; 1347 1348 if (* op_end == '(') 1349 { 1350 op_end = parse_reg (op_end + 1, & reg); 1351 1352 if (reg != 0) 1353 as_bad (_("bad base register: must be r0")); 1354 1355 if (* op_end == ')') 1356 op_end ++; 1357 } 1358 else 1359 as_bad (_("base register expected")); 1360 } 1361 else 1362 as_bad (_("second operand missing")); 1363 1364 output = frag_more (2); 1365 break; 1366 1367 case RQ: 1368 op_end = parse_reg (op_end + 1, & reg); 1369 1370 if (reg != 4) 1371 as_fatal (_("first register must be r4")); 1372 1373 /* Skip whitespace. */ 1374 while (ISSPACE (* op_end)) 1375 ++ op_end; 1376 1377 if (* op_end == '-') 1378 { 1379 op_end = parse_reg (op_end + 1, & reg); 1380 1381 if (reg != 7) 1382 as_fatal (_("last register must be r7")); 1383 1384 /* Skip whitespace. */ 1385 while (ISSPACE (* op_end)) 1386 ++ op_end; 1387 1388 if (* op_end == ',') 1389 { 1390 op_end ++; 1391 1392 /* Skip whitespace. */ 1393 while (ISSPACE (* op_end)) 1394 ++ op_end; 1395 1396 if (* op_end == '(') 1397 { 1398 op_end = parse_reg (op_end + 1, & reg); 1399 1400 if (reg >= 4 && reg <= 7) 1401 as_fatal ("base register cannot be r4, r5, r6, or r7"); 1402 1403 inst |= reg; 1404 1405 /* Skip whitespace. */ 1406 while (ISSPACE (* op_end)) 1407 ++ op_end; 1408 1409 if (* op_end == ')') 1410 op_end ++; 1411 } 1412 else 1413 as_bad (_("base register expected")); 1414 } 1415 else 1416 as_bad (_("second operand missing")); 1417 } 1418 else 1419 as_bad (_("reg-reg expected")); 1420 1421 output = frag_more (2); 1422 break; 1423 1424 case BR: 1425 input_line_pointer = parse_exp (op_end + 1, & e); 1426 op_end = input_line_pointer; 1427 1428 output = frag_more (2); 1429 1430 fix_new_exp (frag_now, output-frag_now->fr_literal, 1431 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2); 1432 break; 1433 1434 case BL: 1435 op_end = parse_reg (op_end + 1, & reg); 1436 inst |= reg << 4; 1437 1438 /* Skip whitespace. */ 1439 while (ISSPACE (* op_end)) 1440 ++ op_end; 1441 1442 if (* op_end == ',') 1443 { 1444 op_end = parse_exp (op_end + 1, & e); 1445 output = frag_more (2); 1446 1447 fix_new_exp (frag_now, output-frag_now->fr_literal, 1448 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2); 1449 } 1450 else 1451 { 1452 as_bad (_("second operand missing")); 1453 output = frag_more (2); 1454 } 1455 break; 1456 1457 case JC: 1458 input_line_pointer = parse_exp (op_end + 1, & e); 1459 op_end = input_line_pointer; 1460 1461 output = frag_var (rs_machine_dependent, 1462 md_relax_table[C (COND_JUMP, DISP32)].rlx_length, 1463 md_relax_table[C (COND_JUMP, DISP12)].rlx_length, 1464 C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1465 isize = C32_LEN; 1466 break; 1467 1468 case JU: 1469 input_line_pointer = parse_exp (op_end + 1, & e); 1470 op_end = input_line_pointer; 1471 1472 output = frag_var (rs_machine_dependent, 1473 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 1474 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 1475 C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1476 isize = U32_LEN; 1477 break; 1478 1479 case JL: 1480 inst = MCORE_INST_JSRI; /* jsri */ 1481 input_line_pointer = parse_rt (op_end + 1, & output, 1, & e); 1482 /* parse_rt() calls frag_more for us. */ 1483 op_end = input_line_pointer; 1484 1485 /* Only do this if we know how to do it ... */ 1486 if (e.X_op != O_absent && do_jsri2bsr) 1487 { 1488 /* Look at adding the R_PCREL_JSRIMM11BY2. */ 1489 fix_new_exp (frag_now, output-frag_now->fr_literal, 1490 2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2); 1491 } 1492 break; 1493 1494 case RSI: 1495 /* SI, but imm becomes 32-imm. */ 1496 op_end = parse_reg (op_end + 1, & reg); 1497 inst |= reg; 1498 1499 /* Skip whitespace. */ 1500 while (ISSPACE (* op_end)) 1501 ++ op_end; 1502 1503 if (* op_end == ',') 1504 { 1505 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1506 1507 reg = 32 - reg; 1508 inst |= reg << 4; 1509 } 1510 else 1511 as_bad (_("second operand missing")); 1512 1513 output = frag_more (2); 1514 break; 1515 1516 case DO21: /* O2, dup rd, lit must be 1 */ 1517 op_end = parse_reg (op_end + 1, & reg); 1518 inst |= reg; 1519 inst |= reg << 4; 1520 1521 /* Skip whitespace. */ 1522 while (ISSPACE (* op_end)) 1523 ++ op_end; 1524 1525 if (* op_end == ',') 1526 { 1527 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1528 1529 if (reg != 1) 1530 as_bad (_("second operand must be 1")); 1531 } 1532 else 1533 as_bad (_("second operand missing")); 1534 1535 output = frag_more (2); 1536 break; 1537 1538 case SIa: 1539 op_end = parse_reg (op_end + 1, & reg); 1540 inst |= reg; 1541 1542 /* Skip whitespace. */ 1543 while (ISSPACE (* op_end)) 1544 ++ op_end; 1545 1546 if (* op_end == ',') 1547 { 1548 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1549 1550 if (reg == 0) 1551 as_bad (_("zero used as immediate value")); 1552 1553 inst |= reg << 4; 1554 } 1555 else 1556 as_bad (_("second operand missing")); 1557 1558 output = frag_more (2); 1559 break; 1560 1561 case OPSR: 1562 if (cpu == M210) 1563 { 1564 as_bad (_("M340 specific opcode used when assembling for M210")); 1565 break; 1566 } 1567 1568 op_end = parse_psrmod (op_end + 1, & reg); 1569 1570 /* Look for further selectors. */ 1571 while (* op_end == ',') 1572 { 1573 unsigned value; 1574 1575 op_end = parse_psrmod (op_end + 1, & value); 1576 1577 if (value & reg) 1578 as_bad (_("duplicated psr bit specifier")); 1579 1580 reg |= value; 1581 } 1582 1583 if (reg > 8) 1584 as_bad (_("`af' must appear alone")); 1585 1586 inst |= (reg & 0x7); 1587 output = frag_more (2); 1588 break; 1589 1590 default: 1591 as_bad (_("unimplemented opcode \"%s\""), name); 1592 } 1593 1594 /* Drop whitespace after all the operands have been parsed. */ 1595 while (ISSPACE (* op_end)) 1596 op_end ++; 1597 1598 /* Give warning message if the insn has more operands than required. */ 1599 if (strcmp (op_end, opcode->name) && strcmp (op_end, "")) 1600 as_warn (_("ignoring operands: %s "), op_end); 1601 1602 output[0] = INST_BYTE0 (inst); 1603 output[1] = INST_BYTE1 (inst); 1604 1605 check_literals (opcode->transfer, isize); 1606 } 1607 1608 symbolS * 1609 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 1610 { 1611 return 0; 1612 } 1613 1614 void 1615 md_mcore_end (void) 1616 { 1617 dump_literals (0); 1618 subseg_set (text_section, 0); 1619 } 1620 1621 /* Various routines to kill one day. */ 1622 /* Equal to MAX_PRECISION in atof-ieee.c. */ 1623 #define MAX_LITTLENUMS 6 1624 1625 /* Turn a string in input_line_pointer into a floating point constant of type 1626 type, and store the appropriate bytes in *litP. The number of LITTLENUMS 1627 emitted is stored in *sizeP. An error message is returned, or NULL on OK. */ 1628 1629 char * 1630 md_atof (int type, char * litP, int * sizeP) 1631 { 1632 int prec; 1633 LITTLENUM_TYPE words[MAX_LITTLENUMS]; 1634 int i; 1635 char * t; 1636 1637 switch (type) 1638 { 1639 case 'f': 1640 case 'F': 1641 case 's': 1642 case 'S': 1643 prec = 2; 1644 break; 1645 1646 case 'd': 1647 case 'D': 1648 case 'r': 1649 case 'R': 1650 prec = 4; 1651 break; 1652 1653 case 'x': 1654 case 'X': 1655 prec = 6; 1656 break; 1657 1658 case 'p': 1659 case 'P': 1660 prec = 6; 1661 break; 1662 1663 default: 1664 *sizeP = 0; 1665 return _("Bad call to MD_NTOF()"); 1666 } 1667 1668 t = atof_ieee (input_line_pointer, type, words); 1669 1670 if (t) 1671 input_line_pointer = t; 1672 1673 *sizeP = prec * sizeof (LITTLENUM_TYPE); 1674 1675 if (! target_big_endian) 1676 { 1677 for (i = prec - 1; i >= 0; i--) 1678 { 1679 md_number_to_chars (litP, (valueT) words[i], 1680 sizeof (LITTLENUM_TYPE)); 1681 litP += sizeof (LITTLENUM_TYPE); 1682 } 1683 } 1684 else 1685 for (i = 0; i < prec; i++) 1686 { 1687 md_number_to_chars (litP, (valueT) words[i], 1688 sizeof (LITTLENUM_TYPE)); 1689 litP += sizeof (LITTLENUM_TYPE); 1690 } 1691 1692 return 0; 1693 } 1694 1695 const char * md_shortopts = ""; 1696 1697 enum options 1698 { 1699 OPTION_JSRI2BSR_ON = OPTION_MD_BASE, 1700 OPTION_JSRI2BSR_OFF, 1701 OPTION_SIFILTER_ON, 1702 OPTION_SIFILTER_OFF, 1703 OPTION_CPU, 1704 OPTION_EB, 1705 OPTION_EL, 1706 }; 1707 1708 struct option md_longopts[] = 1709 { 1710 { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF}, 1711 { "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON}, 1712 { "sifilter", no_argument, NULL, OPTION_SIFILTER_ON}, 1713 { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF}, 1714 { "cpu", required_argument, NULL, OPTION_CPU}, 1715 { "EB", no_argument, NULL, OPTION_EB}, 1716 { "EL", no_argument, NULL, OPTION_EL}, 1717 { NULL, no_argument, NULL, 0} 1718 }; 1719 1720 size_t md_longopts_size = sizeof (md_longopts); 1721 1722 int 1723 md_parse_option (int c, char * arg) 1724 { 1725 switch (c) 1726 { 1727 case OPTION_CPU: 1728 if (streq (arg, "210")) 1729 { 1730 cpu = M210; 1731 target_big_endian = 1; 1732 } 1733 else if (streq (arg, "340")) 1734 cpu = M340; 1735 else 1736 as_warn (_("unrecognised cpu type '%s'"), arg); 1737 break; 1738 1739 case OPTION_EB: target_big_endian = 1; break; 1740 case OPTION_EL: target_big_endian = 0; cpu = M340; break; 1741 case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break; 1742 case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break; 1743 case OPTION_SIFILTER_ON: sifilter_mode = 1; break; 1744 case OPTION_SIFILTER_OFF: sifilter_mode = 0; break; 1745 default: return 0; 1746 } 1747 1748 return 1; 1749 } 1750 1751 void 1752 md_show_usage (FILE * stream) 1753 { 1754 fprintf (stream, _("\ 1755 MCORE specific options:\n\ 1756 -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\ 1757 -{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\ 1758 -cpu=[210|340] select CPU type\n\ 1759 -EB assemble for a big endian system (default)\n\ 1760 -EL assemble for a little endian system\n")); 1761 } 1762 1763 int md_short_jump_size; 1764 1765 void 1766 md_create_short_jump (char * ptr ATTRIBUTE_UNUSED, 1767 addressT from_Nddr ATTRIBUTE_UNUSED, 1768 addressT to_Nddr ATTRIBUTE_UNUSED, 1769 fragS * frag ATTRIBUTE_UNUSED, 1770 symbolS * to_symbol ATTRIBUTE_UNUSED) 1771 { 1772 as_fatal (_("failed sanity check: short_jump")); 1773 } 1774 1775 void 1776 md_create_long_jump (char * ptr ATTRIBUTE_UNUSED, 1777 addressT from_Nddr ATTRIBUTE_UNUSED, 1778 addressT to_Nddr ATTRIBUTE_UNUSED, 1779 fragS * frag ATTRIBUTE_UNUSED, 1780 symbolS * to_symbol ATTRIBUTE_UNUSED) 1781 { 1782 as_fatal (_("failed sanity check: long_jump")); 1783 } 1784 1785 /* Called after relaxing, change the frags so they know how big they are. */ 1786 1787 void 1788 md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, 1789 segT sec ATTRIBUTE_UNUSED, 1790 fragS * fragP) 1791 { 1792 char *buffer; 1793 int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; 1794 1795 buffer = fragP->fr_fix + fragP->fr_literal; 1796 1797 switch (fragP->fr_subtype) 1798 { 1799 case C (COND_JUMP, DISP12): 1800 case C (UNCD_JUMP, DISP12): 1801 { 1802 /* Get the address of the end of the instruction. */ 1803 int next_inst = fragP->fr_fix + fragP->fr_address + 2; 1804 unsigned char t0; 1805 int disp = targ_addr - next_inst; 1806 1807 if (disp & 1) 1808 as_bad (_("odd displacement at %x"), next_inst - 2); 1809 1810 disp >>= 1; 1811 1812 if (! target_big_endian) 1813 { 1814 t0 = buffer[1] & 0xF8; 1815 1816 md_number_to_chars (buffer, disp, 2); 1817 1818 buffer[1] = (buffer[1] & 0x07) | t0; 1819 } 1820 else 1821 { 1822 t0 = buffer[0] & 0xF8; 1823 1824 md_number_to_chars (buffer, disp, 2); 1825 1826 buffer[0] = (buffer[0] & 0x07) | t0; 1827 } 1828 1829 fragP->fr_fix += 2; 1830 } 1831 break; 1832 1833 case C (COND_JUMP, DISP32): 1834 case C (COND_JUMP, UNDEF_WORD_DISP): 1835 { 1836 /* A conditional branch wont fit into 12 bits so: 1837 b!cond 1f 1838 jmpi 0f 1839 .align 2 1840 0: .long disp 1841 1: 1842 1843 If the b!cond is 4 byte aligned, the literal which would 1844 go at x+4 will also be aligned. */ 1845 int first_inst = fragP->fr_fix + fragP->fr_address; 1846 int needpad = (first_inst & 3); 1847 1848 if (! target_big_endian) 1849 buffer[1] ^= 0x08; 1850 else 1851 buffer[0] ^= 0x08; /* Toggle T/F bit. */ 1852 1853 buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ 1854 buffer[3] = INST_BYTE1 (MCORE_INST_JMPI); 1855 1856 if (needpad) 1857 { 1858 if (! target_big_endian) 1859 { 1860 buffer[0] = 4; /* Branch over jmpi, pad, and ptr. */ 1861 buffer[2] = 1; /* Jmpi offset of 1 gets the pointer. */ 1862 } 1863 else 1864 { 1865 buffer[1] = 4; /* Branch over jmpi, pad, and ptr. */ 1866 buffer[3] = 1; /* Jmpi offset of 1 gets the pointer. */ 1867 } 1868 1869 buffer[4] = 0; /* Alignment/pad. */ 1870 buffer[5] = 0; 1871 buffer[6] = 0; /* Space for 32 bit address. */ 1872 buffer[7] = 0; 1873 buffer[8] = 0; 1874 buffer[9] = 0; 1875 1876 /* Make reloc for the long disp. */ 1877 fix_new (fragP, fragP->fr_fix + 6, 4, 1878 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1879 1880 fragP->fr_fix += C32_LEN; 1881 } 1882 else 1883 { 1884 /* See comment below about this given gas' limitations for 1885 shrinking the fragment. '3' is the amount of code that 1886 we inserted here, but '4' is right for the space we reserved 1887 for this fragment. */ 1888 if (! target_big_endian) 1889 { 1890 buffer[0] = 3; /* Branch over jmpi, and ptr. */ 1891 buffer[2] = 0; /* Jmpi offset of 0 gets the pointer. */ 1892 } 1893 else 1894 { 1895 buffer[1] = 3; /* Branch over jmpi, and ptr. */ 1896 buffer[3] = 0; /* Jmpi offset of 0 gets the pointer. */ 1897 } 1898 1899 buffer[4] = 0; /* Space for 32 bit address. */ 1900 buffer[5] = 0; 1901 buffer[6] = 0; 1902 buffer[7] = 0; 1903 1904 /* Make reloc for the long disp. */ 1905 fix_new (fragP, fragP->fr_fix + 4, 4, 1906 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1907 fragP->fr_fix += C32_LEN; 1908 1909 /* Frag is actually shorter (see the other side of this ifdef) 1910 but gas isn't prepared for that. We have to re-adjust 1911 the branch displacement so that it goes beyond the 1912 full length of the fragment, not just what we actually 1913 filled in. */ 1914 if (! target_big_endian) 1915 buffer[0] = 4; /* Jmpi, ptr, and the 'tail pad'. */ 1916 else 1917 buffer[1] = 4; /* Jmpi, ptr, and the 'tail pad'. */ 1918 } 1919 } 1920 break; 1921 1922 case C (UNCD_JUMP, DISP32): 1923 case C (UNCD_JUMP, UNDEF_WORD_DISP): 1924 { 1925 /* An unconditional branch will not fit in 12 bits, make code which 1926 looks like: 1927 jmpi 0f 1928 .align 2 1929 0: .long disp 1930 we need a pad if "first_inst" is 4 byte aligned. 1931 [because the natural literal place is x + 2]. */ 1932 int first_inst = fragP->fr_fix + fragP->fr_address; 1933 int needpad = !(first_inst & 3); 1934 1935 buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ 1936 buffer[1] = INST_BYTE1 (MCORE_INST_JMPI); 1937 1938 if (needpad) 1939 { 1940 if (! target_big_endian) 1941 buffer[0] = 1; /* Jmpi offset of 1 since padded. */ 1942 else 1943 buffer[1] = 1; /* Jmpi offset of 1 since padded. */ 1944 buffer[2] = 0; /* Alignment. */ 1945 buffer[3] = 0; 1946 buffer[4] = 0; /* Space for 32 bit address. */ 1947 buffer[5] = 0; 1948 buffer[6] = 0; 1949 buffer[7] = 0; 1950 1951 /* Make reloc for the long disp. */ 1952 fix_new (fragP, fragP->fr_fix + 4, 4, 1953 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1954 1955 fragP->fr_fix += U32_LEN; 1956 } 1957 else 1958 { 1959 if (! target_big_endian) 1960 buffer[0] = 0; /* Jmpi offset of 0 if no pad. */ 1961 else 1962 buffer[1] = 0; /* Jmpi offset of 0 if no pad. */ 1963 buffer[2] = 0; /* Space for 32 bit address. */ 1964 buffer[3] = 0; 1965 buffer[4] = 0; 1966 buffer[5] = 0; 1967 1968 /* Make reloc for the long disp. */ 1969 fix_new (fragP, fragP->fr_fix + 2, 4, 1970 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1971 fragP->fr_fix += U32_LEN; 1972 } 1973 } 1974 break; 1975 1976 default: 1977 abort (); 1978 } 1979 } 1980 1981 /* Applies the desired value to the specified location. 1982 Also sets up addends for 'rela' type relocations. */ 1983 1984 void 1985 md_apply_fix (fixS * fixP, 1986 valueT * valP, 1987 segT segment ATTRIBUTE_UNUSED) 1988 { 1989 char * buf = fixP->fx_where + fixP->fx_frag->fr_literal; 1990 char * file = fixP->fx_file ? fixP->fx_file : _("unknown"); 1991 const char * symname; 1992 /* Note: use offsetT because it is signed, valueT is unsigned. */ 1993 offsetT val = *valP; 1994 1995 symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); 1996 /* Save this for the addend in the relocation record. */ 1997 fixP->fx_addnumber = val; 1998 1999 if (fixP->fx_addsy != NULL) 2000 { 2001 #ifdef OBJ_ELF 2002 /* For ELF we can just return and let the reloc that will be generated 2003 take care of everything. For COFF we still have to insert 'val' 2004 into the insn since the addend field will be ignored. */ 2005 return; 2006 #endif 2007 } 2008 else 2009 fixP->fx_done = 1; 2010 2011 switch (fixP->fx_r_type) 2012 { 2013 /* Second byte of 2 byte opcode. */ 2014 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 2015 if ((val & 1) != 0) 2016 as_bad_where (file, fixP->fx_line, 2017 _("odd distance branch (0x%lx bytes)"), (long) val); 2018 val /= 2; 2019 if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1)) 2020 as_bad_where (file, fixP->fx_line, 2021 _("pcrel for branch to %s too far (0x%lx)"), 2022 symname, (long) val); 2023 if (target_big_endian) 2024 { 2025 buf[0] |= ((val >> 8) & 0x7); 2026 buf[1] |= (val & 0xff); 2027 } 2028 else 2029 { 2030 buf[1] |= ((val >> 8) & 0x7); 2031 buf[0] |= (val & 0xff); 2032 } 2033 break; 2034 2035 /* Lower 8 bits of 2 byte opcode. */ 2036 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 2037 val += 3; 2038 val /= 4; 2039 if (val & ~0xff) 2040 as_bad_where (file, fixP->fx_line, 2041 _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"), 2042 symname, (long) val); 2043 else if (! target_big_endian) 2044 buf[0] |= (val & 0xff); 2045 else 2046 buf[1] |= (val & 0xff); 2047 break; 2048 2049 /* Loopt instruction. */ 2050 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 2051 if ((val < -32) || (val > -2)) 2052 as_bad_where (file, fixP->fx_line, 2053 _("pcrel for loopt too far (0x%lx)"), (long) val); 2054 val /= 2; 2055 if (! target_big_endian) 2056 buf[0] |= (val & 0xf); 2057 else 2058 buf[1] |= (val & 0xf); 2059 break; 2060 2061 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 2062 /* Conditional linker map jsri to bsr. */ 2063 /* If its a local target and close enough, fix it. 2064 NB: >= -2k for backwards bsr; < 2k for forwards... */ 2065 if (fixP->fx_addsy == 0 && val >= -2048 && val < 2048) 2066 { 2067 long nval = (val / 2) & 0x7ff; 2068 nval |= MCORE_INST_BSR; 2069 2070 /* REPLACE the instruction, don't just modify it. */ 2071 buf[0] = INST_BYTE0 (nval); 2072 buf[1] = INST_BYTE1 (nval); 2073 } 2074 else 2075 fixP->fx_done = 0; 2076 break; 2077 2078 case BFD_RELOC_MCORE_PCREL_32: 2079 case BFD_RELOC_VTABLE_INHERIT: 2080 case BFD_RELOC_VTABLE_ENTRY: 2081 fixP->fx_done = 0; 2082 break; 2083 2084 default: 2085 if (fixP->fx_addsy != NULL) 2086 { 2087 /* If the fix is an absolute reloc based on a symbol's 2088 address, then it cannot be resolved until the final link. */ 2089 fixP->fx_done = 0; 2090 } 2091 #ifdef OBJ_ELF 2092 else 2093 #endif 2094 { 2095 if (fixP->fx_size == 4) 2096 ; 2097 else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767) 2098 ; 2099 else if (fixP->fx_size == 1 && val >= -256 && val <= 255) 2100 ; 2101 else 2102 abort (); 2103 md_number_to_chars (buf, val, fixP->fx_size); 2104 } 2105 break; 2106 } 2107 } 2108 2109 void 2110 md_operand (expressionS * expressionP) 2111 { 2112 /* Ignore leading hash symbol, if poresent. */ 2113 if (* input_line_pointer == '#') 2114 { 2115 input_line_pointer ++; 2116 expression (expressionP); 2117 } 2118 } 2119 2120 int md_long_jump_size; 2121 2122 /* Called just before address relaxation, return the length 2123 by which a fragment must grow to reach it's destination. */ 2124 int 2125 md_estimate_size_before_relax (fragS * fragP, segT segment_type) 2126 { 2127 switch (fragP->fr_subtype) 2128 { 2129 default: 2130 abort (); 2131 2132 case C (UNCD_JUMP, UNDEF_DISP): 2133 /* Used to be a branch to somewhere which was unknown. */ 2134 if (!fragP->fr_symbol) 2135 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2136 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2137 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2138 else 2139 fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP); 2140 break; 2141 2142 case C (COND_JUMP, UNDEF_DISP): 2143 /* Used to be a branch to somewhere which was unknown. */ 2144 if (fragP->fr_symbol 2145 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2146 /* Got a symbol and it's defined in this segment, become byte 2147 sized - maybe it will fix up */ 2148 fragP->fr_subtype = C (COND_JUMP, DISP12); 2149 else if (fragP->fr_symbol) 2150 /* Its got a segment, but its not ours, so it will always be long. */ 2151 fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP); 2152 else 2153 /* We know the abs value. */ 2154 fragP->fr_subtype = C (COND_JUMP, DISP12); 2155 break; 2156 2157 case C (UNCD_JUMP, DISP12): 2158 case C (UNCD_JUMP, DISP32): 2159 case C (UNCD_JUMP, UNDEF_WORD_DISP): 2160 case C (COND_JUMP, DISP12): 2161 case C (COND_JUMP, DISP32): 2162 case C (COND_JUMP, UNDEF_WORD_DISP): 2163 /* When relaxing a section for the second time, we don't need to 2164 do anything besides return the current size. */ 2165 break; 2166 } 2167 2168 return md_relax_table[fragP->fr_subtype].rlx_length; 2169 } 2170 2171 /* Put number into target byte order. */ 2172 2173 void 2174 md_number_to_chars (char * ptr, valueT use, int nbytes) 2175 { 2176 if (! target_big_endian) 2177 switch (nbytes) 2178 { 2179 case 4: ptr[3] = (use >> 24) & 0xff; /* Fall through. */ 2180 case 3: ptr[2] = (use >> 16) & 0xff; /* Fall through. */ 2181 case 2: ptr[1] = (use >> 8) & 0xff; /* Fall through. */ 2182 case 1: ptr[0] = (use >> 0) & 0xff; break; 2183 default: abort (); 2184 } 2185 else 2186 switch (nbytes) 2187 { 2188 case 4: *ptr++ = (use >> 24) & 0xff; /* Fall through. */ 2189 case 3: *ptr++ = (use >> 16) & 0xff; /* Fall through. */ 2190 case 2: *ptr++ = (use >> 8) & 0xff; /* Fall through. */ 2191 case 1: *ptr++ = (use >> 0) & 0xff; break; 2192 default: abort (); 2193 } 2194 } 2195 2196 /* Round up a section size to the appropriate boundary. */ 2197 2198 valueT 2199 md_section_align (segT segment ATTRIBUTE_UNUSED, 2200 valueT size) 2201 { 2202 /* Byte alignment is fine. */ 2203 return size; 2204 } 2205 2206 /* The location from which a PC relative jump should be calculated, 2207 given a PC relative reloc. */ 2208 2209 long 2210 md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) 2211 { 2212 #ifdef OBJ_ELF 2213 /* If the symbol is undefined or defined in another section 2214 we leave the add number alone for the linker to fix it later. 2215 Only account for the PC pre-bump (which is 2 bytes on the MCore). */ 2216 if (fixp->fx_addsy != (symbolS *) NULL 2217 && (! S_IS_DEFINED (fixp->fx_addsy) 2218 || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) 2219 2220 { 2221 assert (fixp->fx_size == 2); /* must be an insn */ 2222 return fixp->fx_size; 2223 } 2224 #endif 2225 2226 /* The case where we are going to resolve things... */ 2227 return fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address; 2228 } 2229 2230 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL)) 2231 #define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break 2232 2233 arelent * 2234 tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) 2235 { 2236 arelent * rel; 2237 bfd_reloc_code_real_type code; 2238 2239 switch (fixp->fx_r_type) 2240 { 2241 /* These confuse the size/pcrel macro approach. */ 2242 case BFD_RELOC_VTABLE_INHERIT: 2243 case BFD_RELOC_VTABLE_ENTRY: 2244 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 2245 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 2246 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 2247 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 2248 case BFD_RELOC_RVA: 2249 code = fixp->fx_r_type; 2250 break; 2251 2252 default: 2253 switch (F (fixp->fx_size, fixp->fx_pcrel)) 2254 { 2255 MAP (1, 0, BFD_RELOC_8); 2256 MAP (2, 0, BFD_RELOC_16); 2257 MAP (4, 0, BFD_RELOC_32); 2258 MAP (1, 1, BFD_RELOC_8_PCREL); 2259 MAP (2, 1, BFD_RELOC_16_PCREL); 2260 MAP (4, 1, BFD_RELOC_32_PCREL); 2261 default: 2262 code = fixp->fx_r_type; 2263 as_bad (_("Can not do %d byte %srelocation"), 2264 fixp->fx_size, 2265 fixp->fx_pcrel ? _("pc-relative") : ""); 2266 } 2267 break; 2268 } 2269 2270 rel = xmalloc (sizeof (arelent)); 2271 rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); 2272 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2273 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 2274 /* Always pass the addend along! */ 2275 rel->addend = fixp->fx_addnumber; 2276 2277 rel->howto = bfd_reloc_type_lookup (stdoutput, code); 2278 2279 if (rel->howto == NULL) 2280 { 2281 as_bad_where (fixp->fx_file, fixp->fx_line, 2282 _("Cannot represent relocation type %s"), 2283 bfd_get_reloc_code_name (code)); 2284 2285 /* Set howto to a garbage value so that we can keep going. */ 2286 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 2287 assert (rel->howto != NULL); 2288 } 2289 2290 return rel; 2291 } 2292 2293 #ifdef OBJ_ELF 2294 /* See whether we need to force a relocation into the output file. 2295 This is used to force out switch and PC relative relocations when 2296 relaxing. */ 2297 int 2298 mcore_force_relocation (fixS * fix) 2299 { 2300 if (fix->fx_r_type == BFD_RELOC_RVA) 2301 return 1; 2302 2303 return generic_force_reloc (fix); 2304 } 2305 2306 /* Return true if the fix can be handled by GAS, false if it must 2307 be passed through to the linker. */ 2308 2309 bfd_boolean 2310 mcore_fix_adjustable (fixS * fixP) 2311 { 2312 /* We need the symbol name for the VTABLE entries. */ 2313 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 2314 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 2315 return 0; 2316 2317 return 1; 2318 } 2319 #endif /* OBJ_ELF */ 2320