1*3d8817e4Smiod /* d30v.h -- Header file for D30V opcode table 2*3d8817e4Smiod Copyright 1997, 1998, 1999, 2000, 2001, 2003 Free Software Foundation, Inc. 3*3d8817e4Smiod Written by Martin Hunt (hunt@cygnus.com), Cygnus Solutions 4*3d8817e4Smiod 5*3d8817e4Smiod This file is part of GDB, GAS, and the GNU binutils. 6*3d8817e4Smiod 7*3d8817e4Smiod GDB, GAS, and the GNU binutils are free software; you can redistribute 8*3d8817e4Smiod them and/or modify them under the terms of the GNU General Public 9*3d8817e4Smiod License as published by the Free Software Foundation; either version 10*3d8817e4Smiod 1, or (at your option) any later version. 11*3d8817e4Smiod 12*3d8817e4Smiod GDB, GAS, and the GNU binutils are distributed in the hope that they 13*3d8817e4Smiod will be useful, but WITHOUT ANY WARRANTY; without even the implied 14*3d8817e4Smiod warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 15*3d8817e4Smiod the GNU General Public License for more details. 16*3d8817e4Smiod 17*3d8817e4Smiod You should have received a copy of the GNU General Public License 18*3d8817e4Smiod along with this file; see the file COPYING. If not, write to the Free 19*3d8817e4Smiod Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 20*3d8817e4Smiod 21*3d8817e4Smiod #ifndef D30V_H 22*3d8817e4Smiod #define D30V_H 23*3d8817e4Smiod 24*3d8817e4Smiod #define NOP 0x00F00000 25*3d8817e4Smiod 26*3d8817e4Smiod /* Structure to hold information about predefined registers. */ 27*3d8817e4Smiod struct pd_reg 28*3d8817e4Smiod { 29*3d8817e4Smiod char *name; /* name to recognize */ 30*3d8817e4Smiod char *pname; /* name to print for this register */ 31*3d8817e4Smiod int value; 32*3d8817e4Smiod }; 33*3d8817e4Smiod 34*3d8817e4Smiod extern const struct pd_reg pre_defined_registers[]; 35*3d8817e4Smiod int reg_name_cnt (void); 36*3d8817e4Smiod 37*3d8817e4Smiod /* the number of control registers */ 38*3d8817e4Smiod #define MAX_CONTROL_REG 64 39*3d8817e4Smiod 40*3d8817e4Smiod /* define the format specifiers */ 41*3d8817e4Smiod #define FM00 0 42*3d8817e4Smiod #define FM01 0x80000000 43*3d8817e4Smiod #define FM10 0x8000000000000000LL 44*3d8817e4Smiod #define FM11 0x8000000080000000LL 45*3d8817e4Smiod 46*3d8817e4Smiod /* define the opcode classes */ 47*3d8817e4Smiod #define BRA 0 48*3d8817e4Smiod #define LOGIC 1 49*3d8817e4Smiod #define IMEM 2 50*3d8817e4Smiod #define IALU1 4 51*3d8817e4Smiod #define IALU2 5 52*3d8817e4Smiod 53*3d8817e4Smiod /* define the execution condition codes */ 54*3d8817e4Smiod #define ECC_AL 0 /* ALways (default) */ 55*3d8817e4Smiod #define ECC_TX 1 /* F0=True, F1=Don't care */ 56*3d8817e4Smiod #define ECC_FX 2 /* F0=False, F1=Don't care */ 57*3d8817e4Smiod #define ECC_XT 3 /* F0=Don't care, F1=True */ 58*3d8817e4Smiod #define ECC_XF 4 /* F0=Don't care, F1=False */ 59*3d8817e4Smiod #define ECC_TT 5 /* F0=True, F1=True */ 60*3d8817e4Smiod #define ECC_TF 6 /* F0=True, F1=False */ 61*3d8817e4Smiod #define ECC_RESERVED 7 /* reserved */ 62*3d8817e4Smiod #define ECC_MAX ECC_RESERVED 63*3d8817e4Smiod 64*3d8817e4Smiod extern const char *d30v_ecc_names[]; 65*3d8817e4Smiod 66*3d8817e4Smiod /* condition code table for CMP and CMPU */ 67*3d8817e4Smiod extern const char *d30v_cc_names[]; 68*3d8817e4Smiod 69*3d8817e4Smiod /* The opcode table is an array of struct d30v_opcode. */ 70*3d8817e4Smiod struct d30v_opcode 71*3d8817e4Smiod { 72*3d8817e4Smiod /* The opcode name. */ 73*3d8817e4Smiod const char *name; 74*3d8817e4Smiod 75*3d8817e4Smiod /* the opcode */ 76*3d8817e4Smiod int op1; /* first part, "IALU1" for example */ 77*3d8817e4Smiod int op2; /* the rest of the opcode */ 78*3d8817e4Smiod 79*3d8817e4Smiod /* opcode format(s). These numbers correspond to entries */ 80*3d8817e4Smiod /* in the d30v_format_table */ 81*3d8817e4Smiod unsigned char format[4]; 82*3d8817e4Smiod 83*3d8817e4Smiod #define SHORT_M 1 84*3d8817e4Smiod #define SHORT_M2 5 /* for ld2w and st2w */ 85*3d8817e4Smiod #define SHORT_A 9 86*3d8817e4Smiod #define SHORT_B1 11 87*3d8817e4Smiod #define SHORT_B2 12 88*3d8817e4Smiod #define SHORT_B2r 13 89*3d8817e4Smiod #define SHORT_B3 14 90*3d8817e4Smiod #define SHORT_B3r 16 91*3d8817e4Smiod #define SHORT_B3b 18 92*3d8817e4Smiod #define SHORT_B3br 20 93*3d8817e4Smiod #define SHORT_D1r 22 94*3d8817e4Smiod #define SHORT_D2 24 95*3d8817e4Smiod #define SHORT_D2r 26 96*3d8817e4Smiod #define SHORT_D2Br 28 97*3d8817e4Smiod #define SHORT_U 30 /* unary SHORT_A. ABS for example */ 98*3d8817e4Smiod #define SHORT_F 31 /* SHORT_A with flag registers */ 99*3d8817e4Smiod #define SHORT_AF 33 /* SHORT_A with only the first register a flag register */ 100*3d8817e4Smiod #define SHORT_T 35 /* for trap instruction */ 101*3d8817e4Smiod #define SHORT_A5 36 /* SHORT_A with a 5-bit immediate instead of 6 */ 102*3d8817e4Smiod #define SHORT_CMP 38 /* special form for CMPcc */ 103*3d8817e4Smiod #define SHORT_CMPU 40 /* special form for CMPUcc */ 104*3d8817e4Smiod #define SHORT_A1 42 /* special form of SHORT_A for MACa opcodes where a=1 */ 105*3d8817e4Smiod #define SHORT_AA 44 /* SHORT_A with the first register an accumulator */ 106*3d8817e4Smiod #define SHORT_RA 46 /* SHORT_A with the second register an accumulator */ 107*3d8817e4Smiod #define SHORT_MODINC 48 108*3d8817e4Smiod #define SHORT_MODDEC 49 109*3d8817e4Smiod #define SHORT_C1 50 110*3d8817e4Smiod #define SHORT_C2 51 111*3d8817e4Smiod #define SHORT_UF 52 112*3d8817e4Smiod #define SHORT_A2 53 113*3d8817e4Smiod #define SHORT_NONE 55 /* no operands */ 114*3d8817e4Smiod #define SHORT_AR 56 /* like SHORT_AA but only accept register as third parameter */ 115*3d8817e4Smiod #define LONG 57 116*3d8817e4Smiod #define LONG_U 58 /* unary LONG */ 117*3d8817e4Smiod #define LONG_Ur 59 /* LONG pc-relative */ 118*3d8817e4Smiod #define LONG_CMP 60 /* special form for CMPcc and CMPUcc */ 119*3d8817e4Smiod #define LONG_M 61 /* Memory long for ldb, stb */ 120*3d8817e4Smiod #define LONG_M2 62 /* Memory long for ld2w, st2w */ 121*3d8817e4Smiod #define LONG_2 63 /* LONG with 2 operands; jmptnz */ 122*3d8817e4Smiod #define LONG_2r 64 /* LONG with 2 operands; bratnz */ 123*3d8817e4Smiod #define LONG_2b 65 /* LONG_2 with modifier of 3 */ 124*3d8817e4Smiod #define LONG_2br 66 /* LONG_2r with modifier of 3 */ 125*3d8817e4Smiod #define LONG_D 67 /* for DJMPI */ 126*3d8817e4Smiod #define LONG_Dr 68 /* for DBRAI */ 127*3d8817e4Smiod #define LONG_Dbr 69 /* for repeati */ 128*3d8817e4Smiod 129*3d8817e4Smiod /* the execution unit(s) used */ 130*3d8817e4Smiod int unit; 131*3d8817e4Smiod #define EITHER 0 132*3d8817e4Smiod #define IU 1 133*3d8817e4Smiod #define MU 2 134*3d8817e4Smiod #define EITHER_BUT_PREFER_MU 3 135*3d8817e4Smiod 136*3d8817e4Smiod /* this field is used to decide if two instructions */ 137*3d8817e4Smiod /* can be executed in parallel */ 138*3d8817e4Smiod long flags_used; 139*3d8817e4Smiod long flags_set; 140*3d8817e4Smiod #define FLAG_0 (1L<<0) 141*3d8817e4Smiod #define FLAG_1 (1L<<1) 142*3d8817e4Smiod #define FLAG_2 (1L<<2) 143*3d8817e4Smiod #define FLAG_3 (1L<<3) 144*3d8817e4Smiod #define FLAG_4 (1L<<4) /* S (saturation) */ 145*3d8817e4Smiod #define FLAG_5 (1L<<5) /* V (overflow) */ 146*3d8817e4Smiod #define FLAG_6 (1L<<6) /* VA (accumulated overflow) */ 147*3d8817e4Smiod #define FLAG_7 (1L<<7) /* C (carry/borrow) */ 148*3d8817e4Smiod #define FLAG_SM (1L<<8) /* SM (stack mode) */ 149*3d8817e4Smiod #define FLAG_RP (1L<<9) /* RP (repeat enable) */ 150*3d8817e4Smiod #define FLAG_CONTROL (1L<<10) /* control registers */ 151*3d8817e4Smiod #define FLAG_A0 (1L<<11) /* A0 */ 152*3d8817e4Smiod #define FLAG_A1 (1L<<12) /* A1 */ 153*3d8817e4Smiod #define FLAG_JMP (1L<<13) /* instruction is a branch */ 154*3d8817e4Smiod #define FLAG_JSR (1L<<14) /* subroutine call. must be aligned */ 155*3d8817e4Smiod #define FLAG_MEM (1L<<15) /* reads/writes memory */ 156*3d8817e4Smiod #define FLAG_NOT_WITH_ADDSUBppp (1L<<16) /* Old meaning: a 2 word 4 byter operation 157*3d8817e4Smiod New meaning: operation cannot be 158*3d8817e4Smiod combined in parallel with ADD/SUBppp. */ 159*3d8817e4Smiod #define FLAG_MUL16 (1L<<17) /* 16 bit multiply */ 160*3d8817e4Smiod #define FLAG_MUL32 (1L<<18) /* 32 bit multiply */ 161*3d8817e4Smiod #define FLAG_ADDSUBppp (1L<<19) /* ADDppp or SUBppp */ 162*3d8817e4Smiod #define FLAG_DELAY (1L<<20) /* This is a delayed branch or jump */ 163*3d8817e4Smiod #define FLAG_LKR (1L<<21) /* insn in left slot kills right slot */ 164*3d8817e4Smiod #define FLAG_CVVA (FLAG_5|FLAG_6|FLAG_7) 165*3d8817e4Smiod #define FLAG_C FLAG_7 166*3d8817e4Smiod #define FLAG_ALL (FLAG_0 | \ 167*3d8817e4Smiod FLAG_1 | \ 168*3d8817e4Smiod FLAG_2 | \ 169*3d8817e4Smiod FLAG_3 | \ 170*3d8817e4Smiod FLAG_4 | \ 171*3d8817e4Smiod FLAG_5 | \ 172*3d8817e4Smiod FLAG_6 | \ 173*3d8817e4Smiod FLAG_7 | \ 174*3d8817e4Smiod FLAG_SM | \ 175*3d8817e4Smiod FLAG_RP | \ 176*3d8817e4Smiod FLAG_CONTROL) 177*3d8817e4Smiod 178*3d8817e4Smiod int reloc_flag; 179*3d8817e4Smiod #define RELOC_PCREL 1 180*3d8817e4Smiod #define RELOC_ABS 2 181*3d8817e4Smiod }; 182*3d8817e4Smiod 183*3d8817e4Smiod extern const struct d30v_opcode d30v_opcode_table[]; 184*3d8817e4Smiod extern const int d30v_num_opcodes; 185*3d8817e4Smiod 186*3d8817e4Smiod /* The operands table is an array of struct d30v_operand. */ 187*3d8817e4Smiod struct d30v_operand 188*3d8817e4Smiod { 189*3d8817e4Smiod /* the length of the field */ 190*3d8817e4Smiod int length; 191*3d8817e4Smiod 192*3d8817e4Smiod /* The number of significant bits in the operand. */ 193*3d8817e4Smiod int bits; 194*3d8817e4Smiod 195*3d8817e4Smiod /* position relative to Ra */ 196*3d8817e4Smiod int position; 197*3d8817e4Smiod 198*3d8817e4Smiod /* syntax flags. */ 199*3d8817e4Smiod long flags; 200*3d8817e4Smiod }; 201*3d8817e4Smiod extern const struct d30v_operand d30v_operand_table[]; 202*3d8817e4Smiod 203*3d8817e4Smiod /* Values defined for the flags field of a struct d30v_operand. */ 204*3d8817e4Smiod 205*3d8817e4Smiod /* this is the destination register; it will be modified */ 206*3d8817e4Smiod /* this is used by the optimizer */ 207*3d8817e4Smiod #define OPERAND_DEST (1) 208*3d8817e4Smiod 209*3d8817e4Smiod /* number or symbol */ 210*3d8817e4Smiod #define OPERAND_NUM (2) 211*3d8817e4Smiod 212*3d8817e4Smiod /* address or label */ 213*3d8817e4Smiod #define OPERAND_ADDR (4) 214*3d8817e4Smiod 215*3d8817e4Smiod /* register */ 216*3d8817e4Smiod #define OPERAND_REG (8) 217*3d8817e4Smiod 218*3d8817e4Smiod /* postincrement + */ 219*3d8817e4Smiod #define OPERAND_PLUS (0x10) 220*3d8817e4Smiod 221*3d8817e4Smiod /* postdecrement - */ 222*3d8817e4Smiod #define OPERAND_MINUS (0x20) 223*3d8817e4Smiod 224*3d8817e4Smiod /* signed number */ 225*3d8817e4Smiod #define OPERAND_SIGNED (0x40) 226*3d8817e4Smiod 227*3d8817e4Smiod /* this operand must be shifted left by 3 */ 228*3d8817e4Smiod #define OPERAND_SHIFT (0x80) 229*3d8817e4Smiod 230*3d8817e4Smiod /* flag register */ 231*3d8817e4Smiod #define OPERAND_FLAG (0x100) 232*3d8817e4Smiod 233*3d8817e4Smiod /* control register */ 234*3d8817e4Smiod #define OPERAND_CONTROL (0x200) 235*3d8817e4Smiod 236*3d8817e4Smiod /* accumulator */ 237*3d8817e4Smiod #define OPERAND_ACC (0x400) 238*3d8817e4Smiod 239*3d8817e4Smiod /* @ */ 240*3d8817e4Smiod #define OPERAND_ATSIGN (0x800) 241*3d8817e4Smiod 242*3d8817e4Smiod /* @( */ 243*3d8817e4Smiod #define OPERAND_ATPAR (0x1000) 244*3d8817e4Smiod 245*3d8817e4Smiod /* predecrement mode '@-sp' */ 246*3d8817e4Smiod #define OPERAND_ATMINUS (0x2000) 247*3d8817e4Smiod 248*3d8817e4Smiod /* this operand changes the instruction name */ 249*3d8817e4Smiod /* for example, CPMcc, CMPUcc */ 250*3d8817e4Smiod #define OPERAND_NAME (0x4000) 251*3d8817e4Smiod 252*3d8817e4Smiod /* fake operand for mvtsys and mvfsys */ 253*3d8817e4Smiod #define OPERAND_SPECIAL (0x8000) 254*3d8817e4Smiod 255*3d8817e4Smiod /* let the optimizer know that two registers are affected */ 256*3d8817e4Smiod #define OPERAND_2REG (0x10000) 257*3d8817e4Smiod 258*3d8817e4Smiod /* This operand is pc-relative. Note that repeati can have two immediate 259*3d8817e4Smiod operands, one of which is pcrel, the other (the IMM6U one) is not. */ 260*3d8817e4Smiod #define OPERAND_PCREL (0x20000) 261*3d8817e4Smiod 262*3d8817e4Smiod /* The format table is an array of struct d30v_format. */ 263*3d8817e4Smiod struct d30v_format 264*3d8817e4Smiod { 265*3d8817e4Smiod int form; /* SHORT_A, LONG, etc */ 266*3d8817e4Smiod int modifier; /* two bit modifier following opcode */ 267*3d8817e4Smiod unsigned char operands[5]; 268*3d8817e4Smiod }; 269*3d8817e4Smiod extern const struct d30v_format d30v_format_table[]; 270*3d8817e4Smiod 271*3d8817e4Smiod 272*3d8817e4Smiod /* an instruction is defined by an opcode and a format */ 273*3d8817e4Smiod /* for example, "add" has one opcode, but three different */ 274*3d8817e4Smiod /* formats, 2 SHORT_A forms and a LONG form. */ 275*3d8817e4Smiod struct d30v_insn 276*3d8817e4Smiod { 277*3d8817e4Smiod struct d30v_opcode *op; /* pointer to an entry in the opcode table */ 278*3d8817e4Smiod struct d30v_format *form; /* pointer to an entry in the format table */ 279*3d8817e4Smiod int ecc; /* execution condition code */ 280*3d8817e4Smiod }; 281*3d8817e4Smiod 282*3d8817e4Smiod /* an expressionS only has one register type, so we fake it */ 283*3d8817e4Smiod /* by setting high bits to indicate type */ 284*3d8817e4Smiod #define REGISTER_MASK 0xFF 285*3d8817e4Smiod 286*3d8817e4Smiod #endif /* D30V_H */ 287