1 /* Disassembler code for CRIS. 2 Copyright 2000, 2001, 2002, 2004, 2005 Free Software Foundation, Inc. 3 Contributed by Axis Communications AB, Lund, Sweden. 4 Written by Hans-Peter Nilsson. 5 6 This file is part of the GNU binutils and GDB, the GNU debugger. 7 8 This program is free software; you can redistribute it and/or modify it 9 under the terms of the GNU General Public License as published by the 10 Free Software Foundation; either version 2, or (at your option) any later 11 version. 12 13 This program is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 16 more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 21 MA 02110-1301, USA. */ 22 23 #include "dis-asm.h" 24 #include "sysdep.h" 25 #include "opcode/cris.h" 26 #include "libiberty.h" 27 28 /* No instruction will be disassembled longer than this. In theory, and 29 in silicon, address prefixes can be cascaded. In practice, cascading 30 is not used by GCC, and not supported by the assembler. */ 31 #ifndef MAX_BYTES_PER_CRIS_INSN 32 #define MAX_BYTES_PER_CRIS_INSN 8 33 #endif 34 35 /* Whether or not to decode prefixes, folding it into the following 36 instruction. FIXME: Make this optional later. */ 37 #ifndef PARSE_PREFIX 38 #define PARSE_PREFIX 1 39 #endif 40 41 /* Sometimes we prefix all registers with this character. */ 42 #define REGISTER_PREFIX_CHAR '$' 43 44 /* Whether or not to trace the following sequence: 45 sub* X,r%d 46 bound* Y,r%d 47 adds.w [pc+r%d.w],pc 48 49 This is the assembly form of a switch-statement in C. 50 The "sub is optional. If there is none, then X will be zero. 51 X is the value of the first case, 52 Y is the number of cases (including default). 53 54 This results in case offsets printed on the form: 55 case N: -> case_address 56 where N is an estimation on the corresponding 'case' operand in C, 57 and case_address is where execution of that case continues after the 58 sequence presented above. 59 60 The old style of output was to print the offsets as instructions, 61 which made it hard to follow "case"-constructs in the disassembly, 62 and caused a lot of annoying warnings about undefined instructions. 63 64 FIXME: Make this optional later. */ 65 #ifndef TRACE_CASE 66 #define TRACE_CASE (disdata->trace_case) 67 #endif 68 69 enum cris_disass_family 70 { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 }; 71 72 /* Stored in the disasm_info->private_data member. */ 73 struct cris_disasm_data 74 { 75 /* Whether to print something less confusing if we find something 76 matching a switch-construct. */ 77 bfd_boolean trace_case; 78 79 /* Whether this code is flagged as crisv32. FIXME: Should be an enum 80 that includes "compatible". */ 81 enum cris_disass_family distype; 82 }; 83 84 /* Value of first element in switch. */ 85 static long case_offset = 0; 86 87 /* How many more case-offsets to print. */ 88 static long case_offset_counter = 0; 89 90 /* Number of case offsets. */ 91 static long no_of_case_offsets = 0; 92 93 /* Candidate for next case_offset. */ 94 static long last_immediate = 0; 95 96 static int cris_constraint 97 (const char *, unsigned, unsigned, struct cris_disasm_data *); 98 99 /* Parse disassembler options and store state in info. FIXME: For the 100 time being, we abuse static variables. */ 101 102 static bfd_boolean 103 cris_parse_disassembler_options (disassemble_info *info, 104 enum cris_disass_family distype) 105 { 106 struct cris_disasm_data *disdata; 107 108 info->private_data = calloc (1, sizeof (struct cris_disasm_data)); 109 disdata = (struct cris_disasm_data *) info->private_data; 110 if (disdata == NULL) 111 return FALSE; 112 113 /* Default true. */ 114 disdata->trace_case 115 = (info->disassembler_options == NULL 116 || (strcmp (info->disassembler_options, "nocase") != 0)); 117 118 disdata->distype = distype; 119 return TRUE; 120 } 121 122 static const struct cris_spec_reg * 123 spec_reg_info (unsigned int sreg, enum cris_disass_family distype) 124 { 125 int i; 126 127 for (i = 0; cris_spec_regs[i].name != NULL; i++) 128 { 129 if (cris_spec_regs[i].number == sreg) 130 { 131 if (distype == cris_dis_v32) 132 switch (cris_spec_regs[i].applicable_version) 133 { 134 case cris_ver_warning: 135 case cris_ver_version_all: 136 case cris_ver_v3p: 137 case cris_ver_v8p: 138 case cris_ver_v10p: 139 case cris_ver_v32p: 140 /* No ambiguous sizes or register names with CRISv32. */ 141 if (cris_spec_regs[i].warning == NULL) 142 return &cris_spec_regs[i]; 143 default: 144 ; 145 } 146 else if (cris_spec_regs[i].applicable_version != cris_ver_v32p) 147 return &cris_spec_regs[i]; 148 } 149 } 150 151 return NULL; 152 } 153 154 /* Return the number of bits in the argument. */ 155 156 static int 157 number_of_bits (unsigned int val) 158 { 159 int bits; 160 161 for (bits = 0; val != 0; val &= val - 1) 162 bits++; 163 164 return bits; 165 } 166 167 /* Get an entry in the opcode-table. */ 168 169 static const struct cris_opcode * 170 get_opcode_entry (unsigned int insn, 171 unsigned int prefix_insn, 172 struct cris_disasm_data *disdata) 173 { 174 /* For non-prefixed insns, we keep a table of pointers, indexed by the 175 insn code. Each entry is initialized when found to be NULL. */ 176 static const struct cris_opcode **opc_table = NULL; 177 178 const struct cris_opcode *max_matchedp = NULL; 179 const struct cris_opcode **prefix_opc_table = NULL; 180 181 /* We hold a table for each prefix that need to be handled differently. */ 182 static const struct cris_opcode **dip_prefixes = NULL; 183 static const struct cris_opcode **bdapq_m1_prefixes = NULL; 184 static const struct cris_opcode **bdapq_m2_prefixes = NULL; 185 static const struct cris_opcode **bdapq_m4_prefixes = NULL; 186 static const struct cris_opcode **rest_prefixes = NULL; 187 188 /* Allocate and clear the opcode-table. */ 189 if (opc_table == NULL) 190 { 191 opc_table = malloc (65536 * sizeof (opc_table[0])); 192 if (opc_table == NULL) 193 return NULL; 194 195 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *)); 196 197 dip_prefixes 198 = malloc (65536 * sizeof (const struct cris_opcode **)); 199 if (dip_prefixes == NULL) 200 return NULL; 201 202 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0])); 203 204 bdapq_m1_prefixes 205 = malloc (65536 * sizeof (const struct cris_opcode **)); 206 if (bdapq_m1_prefixes == NULL) 207 return NULL; 208 209 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0])); 210 211 bdapq_m2_prefixes 212 = malloc (65536 * sizeof (const struct cris_opcode **)); 213 if (bdapq_m2_prefixes == NULL) 214 return NULL; 215 216 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0])); 217 218 bdapq_m4_prefixes 219 = malloc (65536 * sizeof (const struct cris_opcode **)); 220 if (bdapq_m4_prefixes == NULL) 221 return NULL; 222 223 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0])); 224 225 rest_prefixes 226 = malloc (65536 * sizeof (const struct cris_opcode **)); 227 if (rest_prefixes == NULL) 228 return NULL; 229 230 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0])); 231 } 232 233 /* Get the right table if this is a prefix. 234 This code is connected to cris_constraints in that it knows what 235 prefixes play a role in recognition of patterns; the necessary 236 state is reflected by which table is used. If constraints 237 involving match or non-match of prefix insns are changed, then this 238 probably needs changing too. */ 239 if (prefix_insn != NO_CRIS_PREFIX) 240 { 241 const struct cris_opcode *popcodep 242 = (opc_table[prefix_insn] != NULL 243 ? opc_table[prefix_insn] 244 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata)); 245 246 if (popcodep == NULL) 247 return NULL; 248 249 if (popcodep->match == BDAP_QUICK_OPCODE) 250 { 251 /* Since some offsets are recognized with "push" macros, we 252 have to have different tables for them. */ 253 int offset = (prefix_insn & 255); 254 255 if (offset > 127) 256 offset -= 256; 257 258 switch (offset) 259 { 260 case -4: 261 prefix_opc_table = bdapq_m4_prefixes; 262 break; 263 264 case -2: 265 prefix_opc_table = bdapq_m2_prefixes; 266 break; 267 268 case -1: 269 prefix_opc_table = bdapq_m1_prefixes; 270 break; 271 272 default: 273 prefix_opc_table = rest_prefixes; 274 break; 275 } 276 } 277 else if (popcodep->match == DIP_OPCODE) 278 /* We don't allow postincrement when the prefix is DIP, so use a 279 different table for DIP. */ 280 prefix_opc_table = dip_prefixes; 281 else 282 prefix_opc_table = rest_prefixes; 283 } 284 285 if (prefix_insn != NO_CRIS_PREFIX 286 && prefix_opc_table[insn] != NULL) 287 max_matchedp = prefix_opc_table[insn]; 288 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL) 289 max_matchedp = opc_table[insn]; 290 else 291 { 292 const struct cris_opcode *opcodep; 293 int max_level_of_match = -1; 294 295 for (opcodep = cris_opcodes; 296 opcodep->name != NULL; 297 opcodep++) 298 { 299 int level_of_match; 300 301 if (disdata->distype == cris_dis_v32) 302 { 303 switch (opcodep->applicable_version) 304 { 305 case cris_ver_version_all: 306 break; 307 308 case cris_ver_v0_3: 309 case cris_ver_v0_10: 310 case cris_ver_v3_10: 311 case cris_ver_sim_v0_10: 312 case cris_ver_v8_10: 313 case cris_ver_v10: 314 case cris_ver_warning: 315 continue; 316 317 case cris_ver_v3p: 318 case cris_ver_v8p: 319 case cris_ver_v10p: 320 case cris_ver_v32p: 321 break; 322 323 case cris_ver_v8: 324 abort (); 325 default: 326 abort (); 327 } 328 } 329 else 330 { 331 switch (opcodep->applicable_version) 332 { 333 case cris_ver_version_all: 334 case cris_ver_v0_3: 335 case cris_ver_v3p: 336 case cris_ver_v0_10: 337 case cris_ver_v8p: 338 case cris_ver_v8_10: 339 case cris_ver_v10: 340 case cris_ver_sim_v0_10: 341 case cris_ver_v10p: 342 case cris_ver_warning: 343 break; 344 345 case cris_ver_v32p: 346 continue; 347 348 case cris_ver_v8: 349 abort (); 350 default: 351 abort (); 352 } 353 } 354 355 /* We give a double lead for bits matching the template in 356 cris_opcodes. Not even, because then "move p8,r10" would 357 be given 2 bits lead over "clear.d r10". When there's a 358 tie, the first entry in the table wins. This is 359 deliberate, to avoid a more complicated recognition 360 formula. */ 361 if ((opcodep->match & insn) == opcodep->match 362 && (opcodep->lose & insn) == 0 363 && ((level_of_match 364 = cris_constraint (opcodep->args, 365 insn, 366 prefix_insn, 367 disdata)) 368 >= 0) 369 && ((level_of_match 370 += 2 * number_of_bits (opcodep->match 371 | opcodep->lose)) 372 > max_level_of_match)) 373 { 374 max_matchedp = opcodep; 375 max_level_of_match = level_of_match; 376 377 /* If there was a full match, never mind looking 378 further. */ 379 if (level_of_match >= 2 * 16) 380 break; 381 } 382 } 383 /* Fill in the new entry. 384 385 If there are changes to the opcode-table involving prefixes, and 386 disassembly then does not work correctly, try removing the 387 else-clause below that fills in the prefix-table. If that 388 helps, you need to change the prefix_opc_table setting above, or 389 something related. */ 390 if (prefix_insn == NO_CRIS_PREFIX) 391 opc_table[insn] = max_matchedp; 392 else 393 prefix_opc_table[insn] = max_matchedp; 394 } 395 396 return max_matchedp; 397 } 398 399 /* Return -1 if the constraints of a bitwise-matched instruction say 400 that there is no match. Otherwise return a nonnegative number 401 indicating the confidence in the match (higher is better). */ 402 403 static int 404 cris_constraint (const char *cs, 405 unsigned int insn, 406 unsigned int prefix_insn, 407 struct cris_disasm_data *disdata) 408 { 409 int retval = 0; 410 int tmp; 411 int prefix_ok = 0; 412 const char *s; 413 414 for (s = cs; *s; s++) 415 switch (*s) 416 { 417 case '!': 418 /* Do not recognize "pop" if there's a prefix and then only for 419 v0..v10. */ 420 if (prefix_insn != NO_CRIS_PREFIX 421 || disdata->distype != cris_dis_v0_v10) 422 return -1; 423 break; 424 425 case 'U': 426 /* Not recognized at disassembly. */ 427 return -1; 428 429 case 'M': 430 /* Size modifier for "clear", i.e. special register 0, 4 or 8. 431 Check that it is one of them. Only special register 12 could 432 be mismatched, but checking for matches is more logical than 433 checking for mismatches when there are only a few cases. */ 434 tmp = ((insn >> 12) & 0xf); 435 if (tmp != 0 && tmp != 4 && tmp != 8) 436 return -1; 437 break; 438 439 case 'm': 440 if ((insn & 0x30) == 0x30) 441 return -1; 442 break; 443 444 case 'S': 445 /* A prefix operand without side-effect. */ 446 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0) 447 { 448 prefix_ok = 1; 449 break; 450 } 451 else 452 return -1; 453 454 case 's': 455 case 'y': 456 case 'Y': 457 /* If this is a prefixed insn with postincrement (side-effect), 458 the prefix must not be DIP. */ 459 if (prefix_insn != NO_CRIS_PREFIX) 460 { 461 if (insn & 0x400) 462 { 463 const struct cris_opcode *prefix_opcodep 464 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata); 465 466 if (prefix_opcodep->match == DIP_OPCODE) 467 return -1; 468 } 469 470 prefix_ok = 1; 471 } 472 break; 473 474 case 'B': 475 /* If we don't fall through, then the prefix is ok. */ 476 prefix_ok = 1; 477 478 /* A "push" prefix. Check for valid "push" size. 479 In case of special register, it may be != 4. */ 480 if (prefix_insn != NO_CRIS_PREFIX) 481 { 482 /* Match the prefix insn to BDAPQ. */ 483 const struct cris_opcode *prefix_opcodep 484 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata); 485 486 if (prefix_opcodep->match == BDAP_QUICK_OPCODE) 487 { 488 int pushsize = (prefix_insn & 255); 489 490 if (pushsize > 127) 491 pushsize -= 256; 492 493 if (s[1] == 'P') 494 { 495 unsigned int spec_reg = (insn >> 12) & 15; 496 const struct cris_spec_reg *sregp 497 = spec_reg_info (spec_reg, disdata->distype); 498 499 /* For a special-register, the "prefix size" must 500 match the size of the register. */ 501 if (sregp && sregp->reg_size == (unsigned int) -pushsize) 502 break; 503 } 504 else if (s[1] == 'R') 505 { 506 if ((insn & 0x30) == 0x20 && pushsize == -4) 507 break; 508 } 509 /* FIXME: Should abort here; next constraint letter 510 *must* be 'P' or 'R'. */ 511 } 512 } 513 return -1; 514 515 case 'D': 516 retval = (((insn >> 12) & 15) == (insn & 15)); 517 if (!retval) 518 return -1; 519 else 520 retval += 4; 521 break; 522 523 case 'P': 524 { 525 const struct cris_spec_reg *sregp 526 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 527 528 /* Since we match four bits, we will give a value of 4-1 = 3 529 in a match. If there is a corresponding exact match of a 530 special register in another pattern, it will get a value of 531 4, which will be higher. This should be correct in that an 532 exact pattern would match better than a general pattern. 533 534 Note that there is a reason for not returning zero; the 535 pattern for "clear" is partly matched in the bit-pattern 536 (the two lower bits must be zero), while the bit-pattern 537 for a move from a special register is matched in the 538 register constraint. */ 539 540 if (sregp != NULL) 541 { 542 retval += 3; 543 break; 544 } 545 else 546 return -1; 547 } 548 } 549 550 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok) 551 return -1; 552 553 return retval; 554 } 555 556 /* Format number as hex with a leading "0x" into outbuffer. */ 557 558 static char * 559 format_hex (unsigned long number, 560 char *outbuffer, 561 struct cris_disasm_data *disdata) 562 { 563 /* Truncate negative numbers on >32-bit hosts. */ 564 number &= 0xffffffff; 565 566 sprintf (outbuffer, "0x%lx", number); 567 568 /* Save this value for the "case" support. */ 569 if (TRACE_CASE) 570 last_immediate = number; 571 572 return outbuffer + strlen (outbuffer); 573 } 574 575 /* Format number as decimal into outbuffer. Parameter signedp says 576 whether the number should be formatted as signed (!= 0) or 577 unsigned (== 0). */ 578 579 static char * 580 format_dec (long number, char *outbuffer, int signedp) 581 { 582 last_immediate = number; 583 sprintf (outbuffer, signedp ? "%ld" : "%lu", number); 584 585 return outbuffer + strlen (outbuffer); 586 } 587 588 /* Format the name of the general register regno into outbuffer. */ 589 590 static char * 591 format_reg (struct cris_disasm_data *disdata, 592 int regno, 593 char *outbuffer_start, 594 bfd_boolean with_reg_prefix) 595 { 596 char *outbuffer = outbuffer_start; 597 598 if (with_reg_prefix) 599 *outbuffer++ = REGISTER_PREFIX_CHAR; 600 601 switch (regno) 602 { 603 case 15: 604 /* For v32, there is no context in which we output PC. */ 605 if (disdata->distype == cris_dis_v32) 606 strcpy (outbuffer, "acr"); 607 else 608 strcpy (outbuffer, "pc"); 609 break; 610 611 case 14: 612 strcpy (outbuffer, "sp"); 613 break; 614 615 default: 616 sprintf (outbuffer, "r%d", regno); 617 break; 618 } 619 620 return outbuffer_start + strlen (outbuffer_start); 621 } 622 623 /* Format the name of a support register into outbuffer. */ 624 625 static char * 626 format_sup_reg (unsigned int regno, 627 char *outbuffer_start, 628 bfd_boolean with_reg_prefix) 629 { 630 char *outbuffer = outbuffer_start; 631 int i; 632 633 if (with_reg_prefix) 634 *outbuffer++ = REGISTER_PREFIX_CHAR; 635 636 for (i = 0; cris_support_regs[i].name != NULL; i++) 637 if (cris_support_regs[i].number == regno) 638 { 639 sprintf (outbuffer, "%s", cris_support_regs[i].name); 640 return outbuffer_start + strlen (outbuffer_start); 641 } 642 643 /* There's supposed to be register names covering all numbers, though 644 some may be generic names. */ 645 sprintf (outbuffer, "format_sup_reg-BUG"); 646 return outbuffer_start + strlen (outbuffer_start); 647 } 648 649 /* Return the length of an instruction. */ 650 651 static unsigned 652 bytes_to_skip (unsigned int insn, 653 const struct cris_opcode *matchedp, 654 enum cris_disass_family distype, 655 const struct cris_opcode *prefix_matchedp) 656 { 657 /* Each insn is a word plus "immediate" operands. */ 658 unsigned to_skip = 2; 659 const char *template = matchedp->args; 660 const char *s; 661 662 for (s = template; *s; s++) 663 if ((*s == 's' || *s == 'N' || *s == 'Y') 664 && (insn & 0x400) && (insn & 15) == 15 665 && prefix_matchedp == NULL) 666 { 667 /* Immediate via [pc+], so we have to check the size of the 668 operand. */ 669 int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3)); 670 671 if (matchedp->imm_oprnd_size == SIZE_FIX_32) 672 to_skip += 4; 673 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG) 674 { 675 const struct cris_spec_reg *sregp 676 = spec_reg_info ((insn >> 12) & 15, distype); 677 678 /* FIXME: Improve error handling; should have been caught 679 earlier. */ 680 if (sregp == NULL) 681 return 2; 682 683 /* PC is incremented by two, not one, for a byte. Except on 684 CRISv32, where constants are always DWORD-size for 685 special registers. */ 686 to_skip += 687 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1; 688 } 689 else 690 to_skip += (mode_size + 1) & ~1; 691 } 692 else if (*s == 'n') 693 to_skip += 4; 694 else if (*s == 'b') 695 to_skip += 2; 696 697 return to_skip; 698 } 699 700 /* Print condition code flags. */ 701 702 static char * 703 print_flags (struct cris_disasm_data *disdata, unsigned int insn, char *cp) 704 { 705 /* Use the v8 (Etrax 100) flag definitions for disassembly. 706 The differences with v0 (Etrax 1..4) vs. Svinto are: 707 v0 'd' <=> v8 'm' 708 v0 'e' <=> v8 'b'. 709 FIXME: Emit v0..v3 flag names somehow. */ 710 static const char v8_fnames[] = "cvznxibm"; 711 static const char v32_fnames[] = "cvznxiup"; 712 const char *fnames 713 = disdata->distype == cris_dis_v32 ? v32_fnames : v8_fnames; 714 715 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15)); 716 int i; 717 718 for (i = 0; i < 8; i++) 719 if (flagbits & (1 << i)) 720 *cp++ = fnames[i]; 721 722 return cp; 723 } 724 725 /* Print out an insn with its operands, and update the info->insn_type 726 fields. The prefix_opcodep and the rest hold a prefix insn that is 727 supposed to be output as an address mode. */ 728 729 static void 730 print_with_operands (const struct cris_opcode *opcodep, 731 unsigned int insn, 732 unsigned char *buffer, 733 bfd_vma addr, 734 disassemble_info *info, 735 /* If a prefix insn was before this insn (and is supposed 736 to be output as an address), here is a description of 737 it. */ 738 const struct cris_opcode *prefix_opcodep, 739 unsigned int prefix_insn, 740 unsigned char *prefix_buffer, 741 bfd_boolean with_reg_prefix) 742 { 743 /* Get a buffer of somewhat reasonable size where we store 744 intermediate parts of the insn. */ 745 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2]; 746 char *tp = temp; 747 static const char mode_char[] = "bwd?"; 748 const char *s; 749 const char *cs; 750 struct cris_disasm_data *disdata 751 = (struct cris_disasm_data *) info->private_data; 752 753 /* Print out the name first thing we do. */ 754 (*info->fprintf_func) (info->stream, "%s", opcodep->name); 755 756 cs = opcodep->args; 757 s = cs; 758 759 /* Ignore any prefix indicator. */ 760 if (*s == 'p') 761 s++; 762 763 if (*s == 'm' || *s == 'M' || *s == 'z') 764 { 765 *tp++ = '.'; 766 767 /* Get the size-letter. */ 768 *tp++ = *s == 'M' 769 ? (insn & 0x8000 ? 'd' 770 : insn & 0x4000 ? 'w' : 'b') 771 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)]; 772 773 /* Ignore the size and the space character that follows. */ 774 s += 2; 775 } 776 777 /* Add a space if this isn't a long-branch, because for those will add 778 the condition part of the name later. */ 779 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256)) 780 *tp++ = ' '; 781 782 /* Fill in the insn-type if deducible from the name (and there's no 783 better way). */ 784 if (opcodep->name[0] == 'j') 785 { 786 if (strncmp (opcodep->name, "jsr", 3) == 0) 787 /* It's "jsr" or "jsrc". */ 788 info->insn_type = dis_jsr; 789 else 790 /* Any other jump-type insn is considered a branch. */ 791 info->insn_type = dis_branch; 792 } 793 794 /* We might know some more fields right now. */ 795 info->branch_delay_insns = opcodep->delayed; 796 797 /* Handle operands. */ 798 for (; *s; s++) 799 { 800 switch (*s) 801 { 802 case 'T': 803 tp = format_sup_reg ((insn >> 12) & 15, tp, with_reg_prefix); 804 break; 805 806 case 'A': 807 if (with_reg_prefix) 808 *tp++ = REGISTER_PREFIX_CHAR; 809 *tp++ = 'a'; 810 *tp++ = 'c'; 811 *tp++ = 'r'; 812 break; 813 814 case '[': 815 case ']': 816 case ',': 817 *tp++ = *s; 818 break; 819 820 case '!': 821 /* Ignore at this point; used at earlier stages to avoid 822 recognition if there's a prefix at something that in other 823 ways looks like a "pop". */ 824 break; 825 826 case 'd': 827 /* Ignore. This is an optional ".d " on the large one of 828 relaxable insns. */ 829 break; 830 831 case 'B': 832 /* This was the prefix that made this a "push". We've already 833 handled it by recognizing it, so signal that the prefix is 834 handled by setting it to NULL. */ 835 prefix_opcodep = NULL; 836 break; 837 838 case 'D': 839 case 'r': 840 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 841 break; 842 843 case 'R': 844 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 845 break; 846 847 case 'n': 848 { 849 /* Like N but pc-relative to the start of the insn. */ 850 unsigned long number 851 = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536 852 + buffer[5] * 0x1000000 + addr); 853 854 /* Finish off and output previous formatted bytes. */ 855 *tp = 0; 856 if (temp[0]) 857 (*info->fprintf_func) (info->stream, "%s", temp); 858 tp = temp; 859 860 (*info->print_address_func) ((bfd_vma) number, info); 861 } 862 break; 863 864 case 'u': 865 { 866 /* Like n but the offset is bits <3:0> in the instruction. */ 867 unsigned long number = (buffer[0] & 0xf) * 2 + addr; 868 869 /* Finish off and output previous formatted bytes. */ 870 *tp = 0; 871 if (temp[0]) 872 (*info->fprintf_func) (info->stream, "%s", temp); 873 tp = temp; 874 875 (*info->print_address_func) ((bfd_vma) number, info); 876 } 877 break; 878 879 case 'N': 880 case 'y': 881 case 'Y': 882 case 'S': 883 case 's': 884 /* Any "normal" memory operand. */ 885 if ((insn & 0x400) && (insn & 15) == 15 && prefix_opcodep == NULL) 886 { 887 /* We're looking at [pc+], i.e. we need to output an immediate 888 number, where the size can depend on different things. */ 889 long number; 890 int signedp 891 = ((*cs == 'z' && (insn & 0x20)) 892 || opcodep->match == BDAP_QUICK_OPCODE); 893 int nbytes; 894 895 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 896 nbytes = 4; 897 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 898 { 899 const struct cris_spec_reg *sregp 900 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 901 902 /* A NULL return should have been as a non-match earlier, 903 so catch it as an internal error in the error-case 904 below. */ 905 if (sregp == NULL) 906 /* Whatever non-valid size. */ 907 nbytes = 42; 908 else 909 /* PC is always incremented by a multiple of two. 910 For CRISv32, immediates are always 4 bytes for 911 special registers. */ 912 nbytes = disdata->distype == cris_dis_v32 913 ? 4 : (sregp->reg_size + 1) & ~1; 914 } 915 else 916 { 917 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3)); 918 919 if (mode_size == 1) 920 nbytes = 2; 921 else 922 nbytes = mode_size; 923 } 924 925 switch (nbytes) 926 { 927 case 1: 928 number = buffer[2]; 929 if (signedp && number > 127) 930 number -= 256; 931 break; 932 933 case 2: 934 number = buffer[2] + buffer[3] * 256; 935 if (signedp && number > 32767) 936 number -= 65536; 937 break; 938 939 case 4: 940 number 941 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536 942 + buffer[5] * 0x1000000; 943 break; 944 945 default: 946 strcpy (tp, "bug"); 947 tp += 3; 948 number = 42; 949 } 950 951 if ((*cs == 'z' && (insn & 0x20)) 952 || (opcodep->match == BDAP_QUICK_OPCODE 953 && (nbytes <= 2 || buffer[1 + nbytes] == 0))) 954 tp = format_dec (number, tp, signedp); 955 else 956 { 957 unsigned int highbyte = (number >> 24) & 0xff; 958 959 /* Either output this as an address or as a number. If it's 960 a dword with the same high-byte as the address of the 961 insn, assume it's an address, and also if it's a non-zero 962 non-0xff high-byte. If this is a jsr or a jump, then 963 it's definitely an address. */ 964 if (nbytes == 4 965 && (highbyte == ((addr >> 24) & 0xff) 966 || (highbyte != 0 && highbyte != 0xff) 967 || info->insn_type == dis_branch 968 || info->insn_type == dis_jsr)) 969 { 970 /* Finish off and output previous formatted bytes. */ 971 *tp = 0; 972 tp = temp; 973 if (temp[0]) 974 (*info->fprintf_func) (info->stream, "%s", temp); 975 976 (*info->print_address_func) ((bfd_vma) number, info); 977 978 info->target = number; 979 } 980 else 981 tp = format_hex (number, tp, disdata); 982 } 983 } 984 else 985 { 986 /* Not an immediate number. Then this is a (possibly 987 prefixed) memory operand. */ 988 if (info->insn_type != dis_nonbranch) 989 { 990 int mode_size 991 = 1 << ((insn >> 4) 992 & (opcodep->args[0] == 'z' ? 1 : 3)); 993 int size; 994 info->insn_type = dis_dref; 995 info->flags |= CRIS_DIS_FLAG_MEMREF; 996 997 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 998 size = 4; 999 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 1000 { 1001 const struct cris_spec_reg *sregp 1002 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 1003 1004 /* FIXME: Improve error handling; should have been caught 1005 earlier. */ 1006 if (sregp == NULL) 1007 size = 4; 1008 else 1009 size = sregp->reg_size; 1010 } 1011 else 1012 size = mode_size; 1013 1014 info->data_size = size; 1015 } 1016 1017 *tp++ = '['; 1018 1019 if (prefix_opcodep 1020 /* We don't match dip with a postincremented field 1021 as a side-effect address mode. */ 1022 && ((insn & 0x400) == 0 1023 || prefix_opcodep->match != DIP_OPCODE)) 1024 { 1025 if (insn & 0x400) 1026 { 1027 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 1028 *tp++ = '='; 1029 } 1030 1031 1032 /* We mainly ignore the prefix format string when the 1033 address-mode syntax is output. */ 1034 switch (prefix_opcodep->match) 1035 { 1036 case DIP_OPCODE: 1037 /* It's [r], [r+] or [pc+]. */ 1038 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 1039 { 1040 /* It's [pc+]. This cannot possibly be anything 1041 but an address. */ 1042 unsigned long number 1043 = prefix_buffer[2] + prefix_buffer[3] * 256 1044 + prefix_buffer[4] * 65536 1045 + prefix_buffer[5] * 0x1000000; 1046 1047 info->target = (bfd_vma) number; 1048 1049 /* Finish off and output previous formatted 1050 data. */ 1051 *tp = 0; 1052 tp = temp; 1053 if (temp[0]) 1054 (*info->fprintf_func) (info->stream, "%s", temp); 1055 1056 (*info->print_address_func) ((bfd_vma) number, info); 1057 } 1058 else 1059 { 1060 /* For a memref in an address, we use target2. 1061 In this case, target is zero. */ 1062 info->flags 1063 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1064 | CRIS_DIS_FLAG_MEM_TARGET2_MEM); 1065 1066 info->target2 = prefix_insn & 15; 1067 1068 *tp++ = '['; 1069 tp = format_reg (disdata, prefix_insn & 15, tp, 1070 with_reg_prefix); 1071 if (prefix_insn & 0x400) 1072 *tp++ = '+'; 1073 *tp++ = ']'; 1074 } 1075 break; 1076 1077 case BDAP_QUICK_OPCODE: 1078 { 1079 int number; 1080 1081 number = prefix_buffer[0]; 1082 if (number > 127) 1083 number -= 256; 1084 1085 /* Output "reg+num" or, if num < 0, "reg-num". */ 1086 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1087 with_reg_prefix); 1088 if (number >= 0) 1089 *tp++ = '+'; 1090 tp = format_dec (number, tp, 1); 1091 1092 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1093 info->target = (prefix_insn >> 12) & 15; 1094 info->target2 = (bfd_vma) number; 1095 break; 1096 } 1097 1098 case BIAP_OPCODE: 1099 /* Output "r+R.m". */ 1100 tp = format_reg (disdata, prefix_insn & 15, tp, 1101 with_reg_prefix); 1102 *tp++ = '+'; 1103 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1104 with_reg_prefix); 1105 *tp++ = '.'; 1106 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1107 1108 info->flags 1109 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1110 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1111 1112 | ((prefix_insn & 0x8000) 1113 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4 1114 : ((prefix_insn & 0x8000) 1115 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0))); 1116 1117 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */ 1118 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f) 1119 /* Then start interpreting data as offsets. */ 1120 case_offset_counter = no_of_case_offsets; 1121 break; 1122 1123 case BDAP_INDIR_OPCODE: 1124 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or 1125 "r-s". */ 1126 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1127 with_reg_prefix); 1128 1129 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 1130 { 1131 long number; 1132 unsigned int nbytes; 1133 1134 /* It's a value. Get its size. */ 1135 int mode_size = 1 << ((prefix_insn >> 4) & 3); 1136 1137 if (mode_size == 1) 1138 nbytes = 2; 1139 else 1140 nbytes = mode_size; 1141 1142 switch (nbytes) 1143 { 1144 case 1: 1145 number = prefix_buffer[2]; 1146 if (number > 127) 1147 number -= 256; 1148 break; 1149 1150 case 2: 1151 number = prefix_buffer[2] + prefix_buffer[3] * 256; 1152 if (number > 32767) 1153 number -= 65536; 1154 break; 1155 1156 case 4: 1157 number 1158 = prefix_buffer[2] + prefix_buffer[3] * 256 1159 + prefix_buffer[4] * 65536 1160 + prefix_buffer[5] * 0x1000000; 1161 break; 1162 1163 default: 1164 strcpy (tp, "bug"); 1165 tp += 3; 1166 number = 42; 1167 } 1168 1169 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1170 info->target2 = (bfd_vma) number; 1171 1172 /* If the size is dword, then assume it's an 1173 address. */ 1174 if (nbytes == 4) 1175 { 1176 /* Finish off and output previous formatted 1177 bytes. */ 1178 *tp++ = '+'; 1179 *tp = 0; 1180 tp = temp; 1181 (*info->fprintf_func) (info->stream, "%s", temp); 1182 1183 (*info->print_address_func) ((bfd_vma) number, info); 1184 } 1185 else 1186 { 1187 if (number >= 0) 1188 *tp++ = '+'; 1189 tp = format_dec (number, tp, 1); 1190 } 1191 } 1192 else 1193 { 1194 /* Output "r+[R].m" or "r+[R+].m". */ 1195 *tp++ = '+'; 1196 *tp++ = '['; 1197 tp = format_reg (disdata, prefix_insn & 15, tp, 1198 with_reg_prefix); 1199 if (prefix_insn & 0x400) 1200 *tp++ = '+'; 1201 *tp++ = ']'; 1202 *tp++ = '.'; 1203 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1204 1205 info->flags 1206 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1207 | CRIS_DIS_FLAG_MEM_TARGET2_MEM 1208 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1209 1210 | (((prefix_insn >> 4) == 2) 1211 ? 0 1212 : (((prefix_insn >> 4) & 3) == 1 1213 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD 1214 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE))); 1215 } 1216 break; 1217 1218 default: 1219 (*info->fprintf_func) (info->stream, "?prefix-bug"); 1220 } 1221 1222 /* To mark that the prefix is used, reset it. */ 1223 prefix_opcodep = NULL; 1224 } 1225 else 1226 { 1227 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 1228 1229 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1230 info->target = insn & 15; 1231 1232 if (insn & 0x400) 1233 *tp++ = '+'; 1234 } 1235 *tp++ = ']'; 1236 } 1237 break; 1238 1239 case 'x': 1240 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 1241 *tp++ = '.'; 1242 *tp++ = mode_char[(insn >> 4) & 3]; 1243 break; 1244 1245 case 'I': 1246 tp = format_dec (insn & 63, tp, 0); 1247 break; 1248 1249 case 'b': 1250 { 1251 int where = buffer[2] + buffer[3] * 256; 1252 1253 if (where > 32767) 1254 where -= 65536; 1255 1256 where += addr + ((disdata->distype == cris_dis_v32) ? 0 : 4); 1257 1258 if (insn == BA_PC_INCR_OPCODE) 1259 info->insn_type = dis_branch; 1260 else 1261 info->insn_type = dis_condbranch; 1262 1263 info->target = (bfd_vma) where; 1264 1265 *tp = 0; 1266 tp = temp; 1267 (*info->fprintf_func) (info->stream, "%s%s ", 1268 temp, cris_cc_strings[insn >> 12]); 1269 1270 (*info->print_address_func) ((bfd_vma) where, info); 1271 } 1272 break; 1273 1274 case 'c': 1275 tp = format_dec (insn & 31, tp, 0); 1276 break; 1277 1278 case 'C': 1279 tp = format_dec (insn & 15, tp, 0); 1280 break; 1281 1282 case 'o': 1283 { 1284 long offset = insn & 0xfe; 1285 bfd_vma target; 1286 1287 if (insn & 1) 1288 offset |= ~0xff; 1289 1290 if (opcodep->match == BA_QUICK_OPCODE) 1291 info->insn_type = dis_branch; 1292 else 1293 info->insn_type = dis_condbranch; 1294 1295 target = addr + ((disdata->distype == cris_dis_v32) ? 0 : 2) + offset; 1296 info->target = target; 1297 *tp = 0; 1298 tp = temp; 1299 (*info->fprintf_func) (info->stream, "%s", temp); 1300 (*info->print_address_func) (target, info); 1301 } 1302 break; 1303 1304 case 'Q': 1305 case 'O': 1306 { 1307 long number = buffer[0]; 1308 1309 if (number > 127) 1310 number = number - 256; 1311 1312 tp = format_dec (number, tp, 1); 1313 *tp++ = ','; 1314 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 1315 } 1316 break; 1317 1318 case 'f': 1319 tp = print_flags (disdata, insn, tp); 1320 break; 1321 1322 case 'i': 1323 tp = format_dec ((insn & 32) ? (insn & 31) | ~31L : insn & 31, tp, 1); 1324 break; 1325 1326 case 'P': 1327 { 1328 const struct cris_spec_reg *sregp 1329 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 1330 1331 if (sregp->name == NULL) 1332 /* Should have been caught as a non-match eariler. */ 1333 *tp++ = '?'; 1334 else 1335 { 1336 if (with_reg_prefix) 1337 *tp++ = REGISTER_PREFIX_CHAR; 1338 strcpy (tp, sregp->name); 1339 tp += strlen (tp); 1340 } 1341 } 1342 break; 1343 1344 default: 1345 strcpy (tp, "???"); 1346 tp += 3; 1347 } 1348 } 1349 1350 *tp = 0; 1351 1352 if (prefix_opcodep) 1353 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")", 1354 prefix_opcodep->name, prefix_opcodep->args); 1355 1356 (*info->fprintf_func) (info->stream, "%s", temp); 1357 1358 /* Get info for matching case-tables, if we don't have any active. 1359 We assume that the last constant seen is used; either in the insn 1360 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */ 1361 if (TRACE_CASE && case_offset_counter == 0) 1362 { 1363 if (strncmp (opcodep->name, "sub", 3) == 0) 1364 case_offset = last_immediate; 1365 1366 /* It could also be an "add", if there are negative case-values. */ 1367 else if (strncmp (opcodep->name, "add", 3) == 0) 1368 /* The first case is the negated operand to the add. */ 1369 case_offset = -last_immediate; 1370 1371 /* A bound insn will tell us the number of cases. */ 1372 else if (strncmp (opcodep->name, "bound", 5) == 0) 1373 no_of_case_offsets = last_immediate + 1; 1374 1375 /* A jump or jsr or branch breaks the chain of insns for a 1376 case-table, so assume default first-case again. */ 1377 else if (info->insn_type == dis_jsr 1378 || info->insn_type == dis_branch 1379 || info->insn_type == dis_condbranch) 1380 case_offset = 0; 1381 } 1382 } 1383 1384 1385 /* Print the CRIS instruction at address memaddr on stream. Returns 1386 length of the instruction, in bytes. Prefix register names with `$' if 1387 WITH_REG_PREFIX. */ 1388 1389 static int 1390 print_insn_cris_generic (bfd_vma memaddr, 1391 disassemble_info *info, 1392 bfd_boolean with_reg_prefix) 1393 { 1394 int nbytes; 1395 unsigned int insn; 1396 const struct cris_opcode *matchedp; 1397 int advance = 0; 1398 struct cris_disasm_data *disdata 1399 = (struct cris_disasm_data *) info->private_data; 1400 1401 /* No instruction will be disassembled as longer than this number of 1402 bytes; stacked prefixes will not be expanded. */ 1403 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN]; 1404 unsigned char *bufp; 1405 int status = 0; 1406 bfd_vma addr; 1407 1408 /* There will be an "out of range" error after the last instruction. 1409 Reading pairs of bytes in decreasing number, we hope that we will get 1410 at least the amount that we will consume. 1411 1412 If we can't get any data, or we do not get enough data, we print 1413 the error message. */ 1414 1415 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2) 1416 { 1417 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info); 1418 if (status == 0) 1419 break; 1420 } 1421 1422 /* If we did not get all we asked for, then clear the rest. 1423 Hopefully this makes a reproducible result in case of errors. */ 1424 if (nbytes != MAX_BYTES_PER_CRIS_INSN) 1425 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes); 1426 1427 addr = memaddr; 1428 bufp = buffer; 1429 1430 /* Set some defaults for the insn info. */ 1431 info->insn_info_valid = 1; 1432 info->branch_delay_insns = 0; 1433 info->data_size = 0; 1434 info->insn_type = dis_nonbranch; 1435 info->flags = 0; 1436 info->target = 0; 1437 info->target2 = 0; 1438 1439 /* If we got any data, disassemble it. */ 1440 if (nbytes != 0) 1441 { 1442 matchedp = NULL; 1443 1444 insn = bufp[0] + bufp[1] * 256; 1445 1446 /* If we're in a case-table, don't disassemble the offsets. */ 1447 if (TRACE_CASE && case_offset_counter != 0) 1448 { 1449 info->insn_type = dis_noninsn; 1450 advance += 2; 1451 1452 /* If to print data as offsets, then shortcut here. */ 1453 (*info->fprintf_func) (info->stream, "case %ld%s: -> ", 1454 case_offset + no_of_case_offsets 1455 - case_offset_counter, 1456 case_offset_counter == 1 ? "/default" : 1457 ""); 1458 1459 (*info->print_address_func) ((bfd_vma) 1460 ((short) (insn) 1461 + (long) (addr 1462 - (no_of_case_offsets 1463 - case_offset_counter) 1464 * 2)), info); 1465 case_offset_counter--; 1466 1467 /* The default case start (without a "sub" or "add") must be 1468 zero. */ 1469 if (case_offset_counter == 0) 1470 case_offset = 0; 1471 } 1472 else if (insn == 0) 1473 { 1474 /* We're often called to disassemble zeroes. While this is a 1475 valid "bcc .+2" insn, it is also useless enough and enough 1476 of a nuiscance that we will just output "bcc .+2" for it 1477 and signal it as a noninsn. */ 1478 (*info->fprintf_func) (info->stream, 1479 disdata->distype == cris_dis_v32 1480 ? "bcc ." : "bcc .+2"); 1481 info->insn_type = dis_noninsn; 1482 advance += 2; 1483 } 1484 else 1485 { 1486 const struct cris_opcode *prefix_opcodep = NULL; 1487 unsigned char *prefix_buffer = bufp; 1488 unsigned int prefix_insn = insn; 1489 int prefix_size = 0; 1490 1491 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX, disdata); 1492 1493 /* Check if we're supposed to write out prefixes as address 1494 modes and if this was a prefix. */ 1495 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p') 1496 { 1497 /* If it's a prefix, put it into the prefix vars and get the 1498 main insn. */ 1499 prefix_size = bytes_to_skip (prefix_insn, matchedp, 1500 disdata->distype, NULL); 1501 prefix_opcodep = matchedp; 1502 1503 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256; 1504 matchedp = get_opcode_entry (insn, prefix_insn, disdata); 1505 1506 if (matchedp != NULL) 1507 { 1508 addr += prefix_size; 1509 bufp += prefix_size; 1510 advance += prefix_size; 1511 } 1512 else 1513 { 1514 /* The "main" insn wasn't valid, at least not when 1515 prefixed. Put back things enough to output the 1516 prefix insn only, as a normal insn. */ 1517 matchedp = prefix_opcodep; 1518 insn = prefix_insn; 1519 prefix_opcodep = NULL; 1520 } 1521 } 1522 1523 if (matchedp == NULL) 1524 { 1525 (*info->fprintf_func) (info->stream, "??0x%x", insn); 1526 advance += 2; 1527 1528 info->insn_type = dis_noninsn; 1529 } 1530 else 1531 { 1532 advance 1533 += bytes_to_skip (insn, matchedp, disdata->distype, 1534 prefix_opcodep); 1535 1536 /* The info_type and assorted fields will be set according 1537 to the operands. */ 1538 print_with_operands (matchedp, insn, bufp, addr, info, 1539 prefix_opcodep, prefix_insn, 1540 prefix_buffer, with_reg_prefix); 1541 } 1542 } 1543 } 1544 else 1545 info->insn_type = dis_noninsn; 1546 1547 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error 1548 status when reading that much, and the insn decoding indicated a 1549 length exceeding what we read, there is an error. */ 1550 if (status != 0 && (nbytes == 0 || advance > nbytes)) 1551 { 1552 (*info->memory_error_func) (status, memaddr, info); 1553 return -1; 1554 } 1555 1556 /* Max supported insn size with one folded prefix insn. */ 1557 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN; 1558 1559 /* I would like to set this to a fixed value larger than the actual 1560 number of bytes to print in order to avoid spaces between bytes, 1561 but objdump.c (2.9.1) does not like that, so we print 16-bit 1562 chunks, which is the next choice. */ 1563 info->bytes_per_chunk = 2; 1564 1565 /* Printing bytes in order of increasing addresses makes sense, 1566 especially on a little-endian target. 1567 This is completely the opposite of what you think; setting this to 1568 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N 1569 we want. */ 1570 info->display_endian = BFD_ENDIAN_BIG; 1571 1572 return advance; 1573 } 1574 1575 /* Disassemble, prefixing register names with `$'. CRIS v0..v10. */ 1576 1577 static int 1578 print_insn_cris_with_register_prefix (bfd_vma vma, 1579 disassemble_info *info) 1580 { 1581 if (info->private_data == NULL 1582 && !cris_parse_disassembler_options (info, cris_dis_v0_v10)) 1583 return -1; 1584 return print_insn_cris_generic (vma, info, TRUE); 1585 } 1586 1587 /* Disassemble, prefixing register names with `$'. CRIS v32. */ 1588 1589 static int 1590 print_insn_crisv32_with_register_prefix (bfd_vma vma, 1591 disassemble_info *info) 1592 { 1593 if (info->private_data == NULL 1594 && !cris_parse_disassembler_options (info, cris_dis_v32)) 1595 return -1; 1596 return print_insn_cris_generic (vma, info, TRUE); 1597 } 1598 1599 /* Disassemble, prefixing register names with `$'. 1600 Common v10 and v32 subset. */ 1601 1602 static int 1603 print_insn_crisv10_v32_with_register_prefix (bfd_vma vma, 1604 disassemble_info *info) 1605 { 1606 if (info->private_data == NULL 1607 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) 1608 return -1; 1609 return print_insn_cris_generic (vma, info, TRUE); 1610 } 1611 1612 /* Disassemble, no prefixes on register names. CRIS v0..v10. */ 1613 1614 static int 1615 print_insn_cris_without_register_prefix (bfd_vma vma, 1616 disassemble_info *info) 1617 { 1618 if (info->private_data == NULL 1619 && !cris_parse_disassembler_options (info, cris_dis_v0_v10)) 1620 return -1; 1621 return print_insn_cris_generic (vma, info, FALSE); 1622 } 1623 1624 /* Disassemble, no prefixes on register names. CRIS v32. */ 1625 1626 static int 1627 print_insn_crisv32_without_register_prefix (bfd_vma vma, 1628 disassemble_info *info) 1629 { 1630 if (info->private_data == NULL 1631 && !cris_parse_disassembler_options (info, cris_dis_v32)) 1632 return -1; 1633 return print_insn_cris_generic (vma, info, FALSE); 1634 } 1635 1636 /* Disassemble, no prefixes on register names. 1637 Common v10 and v32 subset. */ 1638 1639 static int 1640 print_insn_crisv10_v32_without_register_prefix (bfd_vma vma, 1641 disassemble_info *info) 1642 { 1643 if (info->private_data == NULL 1644 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) 1645 return -1; 1646 return print_insn_cris_generic (vma, info, FALSE); 1647 } 1648 1649 /* Return a disassembler-function that prints registers with a `$' prefix, 1650 or one that prints registers without a prefix. 1651 FIXME: We should improve the solution to avoid the multitude of 1652 functions seen above. */ 1653 1654 disassembler_ftype 1655 cris_get_disassembler (bfd *abfd) 1656 { 1657 /* If there's no bfd in sight, we return what is valid as input in all 1658 contexts if fed back to the assembler: disassembly *with* register 1659 prefix. Unfortunately this will be totally wrong for v32. */ 1660 if (abfd == NULL) 1661 return print_insn_cris_with_register_prefix; 1662 1663 if (bfd_get_symbol_leading_char (abfd) == 0) 1664 { 1665 if (bfd_get_mach (abfd) == bfd_mach_cris_v32) 1666 return print_insn_crisv32_with_register_prefix; 1667 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32) 1668 return print_insn_crisv10_v32_with_register_prefix; 1669 1670 /* We default to v10. This may be specifically specified in the 1671 bfd mach, but is also the default setting. */ 1672 return print_insn_cris_with_register_prefix; 1673 } 1674 1675 if (bfd_get_mach (abfd) == bfd_mach_cris_v32) 1676 return print_insn_crisv32_without_register_prefix; 1677 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32) 1678 return print_insn_crisv10_v32_without_register_prefix; 1679 return print_insn_cris_without_register_prefix; 1680 } 1681 1682 /* Local variables: 1683 eval: (c-set-style "gnu") 1684 indent-tabs-mode: t 1685 End: */ 1686