1; IQ2000-only CPU description. -*- Scheme -*- 2; 3; Copyright 2000, 2001, 2002 Free Software Foundation, Inc. 4; 5; Contributed by Red Hat Inc; developed under contract from Vitesse. 6; 7; This file is part of the GNU Binutils. 8; 9; This program is free software; you can redistribute it and/or modify 10; it under the terms of the GNU General Public License as published by 11; the Free Software Foundation; either version 2 of the License, or 12; (at your option) any later version. 13; 14; This program is distributed in the hope that it will be useful, 15; but WITHOUT ANY WARRANTY; without even the implied warranty of 16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17; GNU General Public License for more details. 18; 19; You should have received a copy of the GNU General Public License 20; along with this program; if not, write to the Free Software 21; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 22 23(dni andoui "and upper ones immediate" (MACH2000 USES-RS USES-RT) 24 "andoui $rt,$rs,$hi16" 25 (+ OP_ANDOUI rs rt hi16) 26 (set rt (and rs (or (sll hi16 16) #xFFFF))) 27 ()) 28 29(dni andoui2 "and upper ones immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT) 30 "andoui ${rt-rs},$hi16" 31 (+ OP_ANDOUI rt-rs hi16) 32 (set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF))) 33 ()) 34 35(dni orui2 "or upper immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT) 36 "orui ${rt-rs},$hi16" 37 (+ OP_ORUI rt-rs hi16) 38 (set rt-rs (or rt-rs (sll hi16 16))) 39 ()) 40 41(dni orui "or upper immediate" (MACH2000 USES-RS USES-RT) 42 "orui $rt,$rs,$hi16" 43 (+ OP_ORUI rs rt hi16) 44 (set rt (or rs (sll hi16 16))) 45 ()) 46 47(dni bgtz "branch if greater than zero" (MACH2000 USES-RS) 48 "bgtz $rs,$offset" 49 (+ OP_BGTZ rs (f-rt 0) offset) 50 (if (gt rs 0) 51 (delay 1 (set pc offset))) 52 ()) 53 54 55(dni bgtzl "branch if greater than zero likely" (MACH2000 USES-RS) 56 "bgtzl $rs,$offset" 57 (+ OP_BGTZL rs (f-rt 0) offset) 58 (if (gt rs 0) 59 (delay 1 (set pc offset)) 60 (skip 1)) 61 ()) 62 63(dni blez "branch if less than or equal to zero" (MACH2000 USES-RS) 64 "blez $rs,$offset" 65 (+ OP_BLEZ rs (f-rt 0) offset) 66 (if (le rs 0) 67 (delay 1 (set pc offset))) 68 ()) 69 70(dni blezl "branch if less than or equal to zero likely" (MACH2000 USES-RS) 71 "blezl $rs,$offset" 72 (+ OP_BLEZL rs (f-rt 0) offset) 73 (if (le rs 0) 74 (delay 1 (set pc offset)) 75 (skip 1)) 76 ()) 77 78 79(dni mrgb "merge bytes" (MACH2000 USES-RD USES-RS USES-RT) 80 "mrgb $rd,$rs,$rt,$mask" 81 (+ OP_SPECIAL rs rt rd (f-10 0) mask FUNC_MRGB) 82 (sequence ((SI temp)) 83 (if (bitclear? mask 0) 84 (set temp (and rs #xFF)) 85 (set temp (and rt #xFF))) 86 (if (bitclear? mask 1) 87 (set temp (or temp (and rs #xFF00))) 88 (set temp (or temp (and rt #xFF00)))) 89 (if (bitclear? mask 2) 90 (set temp (or temp (and rs #xFF0000))) 91 (set temp (or temp (and rt #xFF0000)))) 92 (if (bitclear? mask 3) 93 (set temp (or temp (and rs #xFF000000))) 94 (set temp (or temp (and rt #xFF000000)))) 95 (set rd temp)) 96 ()) 97 98(dni mrgb2 "merge bytes" (ALIAS NO-DIS MACH2000 USES-RD USES-RS USES-RT) 99 "mrgb ${rd-rs},$rt,$mask" 100 (+ OP_SPECIAL rt rd-rs (f-10 0) mask FUNC_MRGB) 101 (sequence ((SI temp)) 102 (if (bitclear? mask 0) 103 (set temp (and rd-rs #xFF)) 104 (set temp (and rt #xFF))) 105 (if (bitclear? mask 1) 106 (set temp (or temp (and rd-rs #xFF00))) 107 (set temp (or temp (and rt #xFF00)))) 108 (if (bitclear? mask 2) 109 (set temp (or temp (and rd-rs #xFF0000))) 110 (set temp (or temp (and rt #xFF0000)))) 111 (if (bitclear? mask 3) 112 (set temp (or temp (and rd-rs #xFF000000))) 113 (set temp (or temp (and rt #xFF000000)))) 114 (set rd-rs temp)) 115 ()) 116 117; NOTE: None of these instructions' semantics are specified, so they 118; will not work in a simulator. 119; 120; Architectural and coprocessor instructions. 121; BREAK and SYSCALL are implemented with escape hatches to the C 122; code. These are used by the test suite to indicate pass/failures. 123 124(dni bctxt "branch and switch context" (MACH2000 DELAY-SLOT COND-CTI USES-RS) 125 "bctxt $rs,$offset" 126 (+ OP_REGIMM rs (f-rt 6) offset) 127 (unimp bctxt) 128 ()) 129 130(dni bc0f "branch if copro 0 condition false" (MACH2000 DELAY-SLOT COND-CTI) 131 "bc0f $offset" 132 (+ OP_COP0 (f-rs 8) (f-rt 0) offset) 133 (unimp bc0f) 134 ()) 135 136(dni bc0fl "branch if copro 0 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI) 137 "bc0fl $offset" 138 (+ OP_COP0 (f-rs 8) (f-rt 2) offset) 139 (unimp bc0fl) 140 ()) 141 142(dni bc3f "branch if copro 3 condition false" (MACH2000 DELAY-SLOT COND-CTI) 143 "bc3f $offset" 144 (+ OP_COP3 (f-rs 8) (f-rt 0) offset) 145 (unimp bc3f) 146 ()) 147 148(dni bc3fl "branch if copro 3 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI) 149 "bc3fl $offset" 150 (+ OP_COP3 (f-rs 8) (f-rt 2) offset) 151 (unimp bc3fl) 152 ()) 153 154(dni bc0t "branch if copro 0 condition true" (MACH2000 DELAY-SLOT COND-CTI) 155 "bc0t $offset" 156 (+ OP_COP0 (f-rs 8) (f-rt 1) offset) 157 (unimp bc0t) 158 ()) 159 160(dni bc0tl "branch if copro 0 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI) 161 "bc0tl $offset" 162 (+ OP_COP0 (f-rs 8) (f-rt 3) offset) 163 (unimp bc0tl) 164 ()) 165 166(dni bc3t "branch if copro 3 condition true" (MACH2000 DELAY-SLOT COND-CTI) 167 "bc3t $offset" 168 (+ OP_COP3 (f-rs 8) (f-rt 1) offset) 169 (unimp bc3t) 170 ()) 171 172(dni bc3tl "branch if copro 3 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI) 173 "bc3tl $offset" 174 (+ OP_COP3 (f-rs 8) (f-rt 3) offset) 175 (unimp bc3tl) 176 ()) 177 178; Note that we don't set the USES-RD or USES-RT attributes for many of the following 179; instructions, as it's the COP register that's being specified. 180 181(dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT) 182 "cfc0 $rt,$rd" 183 (+ OP_COP0 (f-rs 2) rt rd (f-10-11 0)) 184 (unimp cfc0) 185 ()) 186 187(dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT) 188 "cfc1 $rt,$rd" 189 (+ OP_COP1 (f-rs 2) rt rd (f-10-11 0)) 190 (unimp cfc1) 191 ()) 192 193(dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN) 194 "cfc2 $rt,$rd" 195 (+ OP_COP2 (f-rs 2) rt rd (f-10-11 0)) 196 (unimp cfc2) 197 ()) 198 199(dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN) 200 "cfc3 $rt,$rd" 201 (+ OP_COP3 (f-rs 2) rt rd (f-10-11 0)) 202 (unimp cfc3) 203 ()) 204 205; COPz instructions are an instruction form, not real instructions 206; with associated assembly mnemonics. Therefore, they are omitted 207; from the ISA description. 208 209(dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN) 210 "chkhdr $rd,$rt" 211 (+ OP_COP3 (f-rs 9) rt rd (f-shamt 0) (f-func 0)) 212 (unimp chkhdr) 213 ()) 214 215(dni ctc0 "control to coprocessor 0" (MACH2000 USES-RT) 216 "ctc0 $rt,$rd" 217 (+ OP_COP0 (f-rs 6) rt rd (f-10-11 0)) 218 (unimp ctc0) 219 ()) 220 221(dni ctc1 "control to coprocessor 1" (MACH2000 USES-RT) 222 "ctc1 $rt,$rd" 223 (+ OP_COP1 (f-rs 6) rt rd (f-10-11 0)) 224 (unimp ctc1) 225 ()) 226 227(dni ctc2 "control to coprocessor 2" (MACH2000 USES-RT) 228 "ctc2 $rt,$rd" 229 (+ OP_COP2 (f-rs 6) rt rd (f-10-11 0)) 230 (unimp ctc2) 231 ()) 232 233(dni ctc3 "control to coprocessor 3" (MACH2000 USES-RT) 234 "ctc3 $rt,$rd" 235 (+ OP_COP3 (f-rs 6) rt rd (f-10-11 0)) 236 (unimp ctc3) 237 ()) 238 239(dni jcr "jump context register" (MACH2000 DELAY-SLOT UNCOND-CTI USES-RS) 240 "jcr $rs" 241 (+ OP_SPECIAL rs (f-rt 0) (f-rd 0) (f-shamt 0) FUNC_JCR) 242 (unimp jcr) 243 ()) 244 245(dni luc32 "lookup chain 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN) 246 "luc32 $rt,$rd" 247 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 3)) 248 (unimp luc32) 249 ()) 250 251(dni luc32l "lookup chain 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN) 252 "luc32l $rt,$rd" 253 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 7)) 254 (unimp luc32l) 255 ()) 256 257(dni luc64 "lookup chain 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN) 258 "luc64 $rt,$rd" 259 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 11)) 260 (unimp luc64) 261 ()) 262 263(dni luc64l "lookup chain 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN) 264 "luc64l $rt,$rd" 265 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 15)) 266 (unimp luc64l) 267 ()) 268 269(dni luk "lookup key" (MACH2000 USES-RD USES-RT) 270 "luk $rt,$rd" 271 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 8)) 272 (unimp luk) 273 ()) 274 275(dni lulck "lookup lock" (MACH2000 USES-RT YIELD-INSN) 276 "lulck $rt" 277 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 4)) 278 (unimp lulck) 279 ()) 280 281(dni lum32 "lookup match 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN) 282 "lum32 $rt,$rd" 283 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 2)) 284 (unimp lum32) 285 ()) 286 287(dni lum32l "lookup match 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN) 288 "lum32l $rt,$rd" 289 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 6)) 290 (unimp lum32l) 291 ()) 292 293(dni lum64 "lookup match 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN) 294 "lum64 $rt,$rd" 295 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 10)) 296 (unimp lum64) 297 ()) 298 299(dni lum64l "lookup match 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN) 300 "lum64l $rt,$rd" 301 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 14)) 302 (unimp lum64l) 303 ()) 304 305(dni lur "lookup read" (MACH2000 USES-RD USES-RT YIELD-INSN) 306 "lur $rt,$rd" 307 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 1)) 308 (unimp lur) 309 ()) 310 311(dni lurl "lookup read and lock" (MACH2000 USES-RD USES-RT YIELD-INSN) 312 "lurl $rt,$rd" 313 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 5)) 314 (unimp lurl) 315 ()) 316 317(dni luulck "lookup unlock" (MACH2000 USES-RT YIELD-INSN) 318 "luulck $rt" 319 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 0)) 320 (unimp luulck) 321 ()) 322 323(dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT) 324 "mfc0 $rt,$rd" 325 (+ OP_COP0 (f-rs 0) rt rd (f-10-11 0)) 326 (unimp mfc0) 327 ()) 328 329(dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT) 330 "mfc1 $rt,$rd" 331 (+ OP_COP1 (f-rs 0) rt rd (f-10-11 0)) 332 (unimp mfc1) 333 ()) 334 335(dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN) 336 "mfc2 $rt,$rd" 337 (+ OP_COP2 (f-rs 0) rt rd (f-10-11 0)) 338 (unimp mfc2) 339 ()) 340 341(dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN) 342 "mfc3 $rt,$rd" 343 (+ OP_COP3 (f-rs 0) rt rd (f-10-11 0)) 344 (unimp mfc3) 345 ()) 346 347(dni mtc0 "move to coprocessor 0" (MACH2000 USES-RT) 348 "mtc0 $rt,$rd" 349 (+ OP_COP0 (f-rs 4) rt rd (f-10-11 0)) 350 (unimp mtc0) 351 ()) 352 353(dni mtc1 "move to coprocessor 1" (MACH2000 USES-RT) 354 "mtc1 $rt,$rd" 355 (+ OP_COP1 (f-rs 4) rt rd (f-10-11 0)) 356 (unimp mtc1) 357 ()) 358 359(dni mtc2 "move to coprocessor 2" (MACH2000 USES-RT) 360 "mtc2 $rt,$rd" 361 (+ OP_COP2 (f-rs 4) rt rd (f-10-11 0)) 362 (unimp mtc2) 363 ()) 364 365(dni mtc3 "move to coprocessor 3" (MACH2000 USES-RT) 366 "mtc3 $rt,$rd" 367 (+ OP_COP3 (f-rs 4) rt rd (f-10-11 0)) 368 (unimp mtc3) 369 ()) 370 371(dni pkrl "pkrl" (MACH2000 USES-RD USES-RT YIELD-INSN) 372 "pkrl $rd,$rt" 373 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 7)) 374 (unimp pkrl) 375 ()) 376 377(dni pkrlr1 "pkrlr1" (MACH2000 USES-RT YIELD-INSN) 378 "pkrlr1 $rt,$count" 379 (+ OP_COP3 (f-rs 29) rt count) 380 (unimp pkrlr1) 381 ()) 382 383(dni pkrlr30 "pkrlr30" (MACH2000 USES-RT YIELD-INSN) 384 "pkrlr30 $rt,$count" 385 (+ OP_COP3 (f-rs 31) rt count) 386 (unimp pkrlr30) 387 ()) 388 389(dni rb "dma read bytes" (MACH2000 USES-RD USES-RT YIELD-INSN) 390 "rb $rd,$rt" 391 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 4)) 392 (unimp rb) 393 ()) 394 395(dni rbr1 "dma read bytes using r1" (MACH2000 USES-RT YIELD-INSN) 396 "rbr1 $rt,$count" 397 (+ OP_COP3 (f-rs 24) rt count) 398 (unimp rbr1) 399 ()) 400 401(dni rbr30 "dma read bytes using r30" (MACH2000 USES-RT YIELD-INSN) 402 "rbr30 $rt,$count" 403 (+ OP_COP3 (f-rs 26) rt count) 404 (unimp rbr30) 405 ()) 406 407(dni rfe "restore from exception" (MACH2000) 408 "rfe" 409 (+ OP_COP0 (f-25 1) (f-24-19 0) (f-func 16)) 410 (unimp rfe) 411 ()) 412 413(dni rx "dma read word64s" (MACH2000 USES-RD USES-RT YIELD-INSN) 414 "rx $rd,$rt" 415 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 6)) 416 (unimp rx) 417 ()) 418 419(dni rxr1 "dma read word64s using r1" (MACH2000 USES-RT YIELD-INSN) 420 "rxr1 $rt,$count" 421 (+ OP_COP3 (f-rs 28) rt count) 422 (unimp rxr1) 423 ()) 424 425(dni rxr30 "dma read word 64s using r30" (MACH2000 USES-RT YIELD-INSN) 426 "rxr30 $rt,$count" 427 (+ OP_COP3 (f-rs 30) rt count) 428 (unimp rxr30) 429 ()) 430 431(dni sleep "sleep" (MACH2000 YIELD-INSN) 432 "sleep" 433 (+ OP_SPECIAL execode FUNC_SLEEP) 434 (unimp sleep) 435 ()) 436 437(dni srrd "sram read" (MACH2000 USES-RT YIELD-INSN) 438 "srrd $rt" 439 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 16)) 440 (unimp srrd) 441 ()) 442 443(dni srrdl "sram read and lock" (MACH2000 USES-RT YIELD-INSN) 444 "srrdl $rt" 445 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 20)) 446 (unimp srrdl) 447 ()) 448 449(dni srulck "sram unlock" (MACH2000 USES-RT YIELD-INSN) 450 "srulck $rt" 451 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 22)) 452 (unimp srulck) 453 ()) 454 455(dni srwr "sram write" (MACH2000 USES-RD USES-RT YIELD-INSN) 456 "srwr $rt,$rd" 457 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 17)) 458 (unimp srwr) 459 ()) 460 461(dni srwru "sram write and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN) 462 "srwru $rt,$rd" 463 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 21)) 464 (unimp srwru) 465 ()) 466 467(dni trapqfl "yield if dma queue full" (MACH2000 YIELD-INSN) 468 "trapqfl" 469 (+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 8)) 470 (unimp trapqfl) 471 ()) 472 473(dni trapqne "yield if dma queue not empty" (MACH2000 YIELD-INSN) 474 "trapqne" 475 (+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 9)) 476 (unimp trapqne) 477 ()) 478 479(dni traprel "traprel" (MACH2000 USES-RT YIELD-INSN) 480 "traprel $rt" 481 (+ OP_COP3 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 10)) 482 (unimp traprel) 483 ()) 484 485(dni wb "dma write bytes" (MACH2000 USES-RD USES-RT YIELD-INSN) 486 "wb $rd,$rt" 487 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 0)) 488 (unimp wb) 489 ()) 490 491(dni wbu "dma write bytes and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN) 492 "wbu $rd,$rt" 493 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 1)) 494 (unimp wbu) 495 ()) 496 497(dni wbr1 "dma write bytes using r1" (MACH2000 USES-RT YIELD-INSN) 498 "wbr1 $rt,$count" 499 (+ OP_COP3 (f-rs 16) rt count) 500 (unimp wbr1) 501 ()) 502 503(dni wbr1u "dma write bytes using r1 and unlock" (MACH2000 USES-RT YIELD-INSN) 504 "wbr1u $rt,$count" 505 (+ OP_COP3 (f-rs 17) rt count) 506 (unimp wbr1u) 507 ()) 508 509(dni wbr30 "dma write bytes using r30" (MACH2000 USES-RT YIELD-INSN) 510 "wbr30 $rt,$count" 511 (+ OP_COP3 (f-rs 18) rt count) 512 (unimp wbr30) 513 ()) 514 515(dni wbr30u "dma write bytes using r30 and unlock" (MACH2000 USES-RT YIELD-INSN) 516 "wbr30u $rt,$count" 517 (+ OP_COP3 (f-rs 19) rt count) 518 (unimp wbr30u) 519 ()) 520 521(dni wx "dma write word64s" (MACH2000 USES-RD USES-RT YIELD-INSN) 522 "wx $rd,$rt" 523 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 2)) 524 (unimp wx) 525 ()) 526 527(dni wxu "dma write word64s and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN) 528 "wxu $rd,$rt" 529 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 3)) 530 (unimp wxu) 531 ()) 532 533(dni wxr1 "dma write word64s using r1" (MACH2000 USES-RT YIELD-INSN) 534 "wxr1 $rt,$count" 535 (+ OP_COP3 (f-rs 20) rt count) 536 (unimp wxr1) 537 ()) 538 539(dni wxr1u "dma write word64s using r1 and unlock" (MACH2000 USES-RT YIELD-INSN) 540 "wxr1u $rt,$count" 541 (+ OP_COP3 (f-rs 21) rt count) 542 (unimp wxr1u) 543 ()) 544 545(dni wxr30 "dma write word64s using r30" (MACH2000 USES-RT YIELD-INSN) 546 "wxr30 $rt,$count" 547 (+ OP_COP3 (f-rs 22) rt count) 548 (unimp wxr30) 549 ()) 550 551(dni wxr30u "dma write word64s using r30 and unlock" (MACH2000 USES-RT YIELD-INSN) 552 "wxr30u $rt,$count" 553 (+ OP_COP3 (f-rs 23) rt count) 554 (unimp wxr30u) 555 ()) 556 557 558; Load/Store instructions. 559 560(dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT) 561 "ldw $rt,$lo16($base)" 562 (+ OP_LDW base rt lo16) 563 (sequence ((SI addr)) 564 (set addr (and (add base lo16) (inv 3))) 565 (set (reg h-gr (add (ifield f-rt) 1)) (mem SI addr)) 566 (set rt (mem SI (add addr 4)))) 567 ()) 568 569(dni sdw "store double word" (MACH2000 EVEN-REG-NUM USES-RT) 570 "sdw $rt,$lo16($base)" 571 (+ OP_SDW base rt lo16) 572 (sequence ((SI addr)) 573 (set addr (and (add base lo16) (inv 3))) 574 (set (mem SI (add addr 4)) rt) 575 (set (mem SI addr) (reg h-gr (add (ifield f-rt) 1)))) 576 ()) 577 578 579; Jump instructions 580 581(dni j "jump" (MACH2000) 582 "j $jmptarg" 583 (+ OP_J (f-rsrvd 0) jmptarg) 584 (delay 1 (set pc jmptarg)) 585 ()) 586 587(dni jal "jump and link" (MACH2000 USES-R31) 588 "jal $jmptarg" 589 (+ OP_JAL (f-rsrvd 0) jmptarg) 590 (delay 1 591 (sequence () 592 (set (reg h-gr 31) (add pc 8)) 593 (set pc jmptarg))) 594 ()) 595 596(dni bmb "branch if matching byte-lane" (MACH2000 USES-RS USES-RT) 597 "bmb $rs,$rt,$offset" 598 (+ OP_BMB rs rt offset) 599 (sequence ((BI branch?)) 600 (set branch? 0) 601 (if (eq (and rs #xFF) (and rt #xFF)) 602 (set branch? 1)) 603 (if (eq (and rs #xFF00) (and rt #xFF00)) 604 (set branch? 1)) 605 (if (eq (and rs #xFF0000) (and rt #xFF0000)) 606 (set branch? 1)) 607 (if (eq (and rs #xFF000000) (and rt #xFF000000)) 608 (set branch? 1)) 609 (if branch? 610 (delay 1 (set pc offset)))) 611 ()) 612 613 614; Macros 615 616(dnmi ldw-base-0 "load double word - implied base 0" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT USES-RS NO-DIS) 617 "ldw $rt,$lo16" 618 (emit ldw rt lo16 (base 0)) 619) 620 621(dnmi sdw-base-0 "store double word - implied base 0" (MACH2000 EVEN-REG-NUM USES-RT NO-DIS) 622 "sdw $rt,$lo16" 623 (emit sdw rt lo16 (base 0)) 624) 625 626 627 628 629 630 631