1 /* tc-mcore.c -- Assemble code for M*Core 2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to the Free 18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 19 02111-1307, USA. */ 20 21 #include <stdio.h> 22 #include "as.h" 23 #include "bfd.h" 24 #include "subsegs.h" 25 #define DEFINE_TABLE 26 #include "../opcodes/mcore-opc.h" 27 #include "safe-ctype.h" 28 #include <string.h> 29 30 #ifdef OBJ_ELF 31 #include "elf/mcore.h" 32 #endif 33 34 #ifndef streq 35 #define streq(a,b) (strcmp (a, b) == 0) 36 #endif 37 38 /* Forward declarations for dumb compilers. */ 39 static void mcore_s_literals PARAMS ((int)); 40 static void mcore_pool_count PARAMS ((void (*) (int), int)); 41 static void mcore_cons PARAMS ((int)); 42 static void mcore_float_cons PARAMS ((int)); 43 static void mcore_stringer PARAMS ((int)); 44 static void mcore_fill PARAMS ((int)); 45 static int log2 PARAMS ((unsigned int)); 46 static char * parse_reg PARAMS ((char *, unsigned *)); 47 static char * parse_creg PARAMS ((char *, unsigned *)); 48 static char * parse_exp PARAMS ((char *, expressionS *)); 49 static char * parse_rt PARAMS ((char *, char **, int, expressionS *)); 50 static char * parse_imm PARAMS ((char *, unsigned *, unsigned, unsigned)); 51 static char * parse_mem PARAMS ((char *, unsigned *, unsigned *, unsigned)); 52 static char * parse_psrmod PARAMS ((char *, unsigned *)); 53 static void make_name PARAMS ((char *, char *, int)); 54 static int enter_literal PARAMS ((expressionS *, int)); 55 static void dump_literals PARAMS ((int)); 56 static void check_literals PARAMS ((int, int)); 57 static void mcore_s_text PARAMS ((int)); 58 static void mcore_s_data PARAMS ((int)); 59 static void mcore_s_section PARAMS ((int)); 60 static void mcore_s_bss PARAMS ((int)); 61 #ifdef OBJ_ELF 62 static void mcore_s_comm PARAMS ((int)); 63 #endif 64 65 /* Several places in this file insert raw instructions into the 66 object. They should use MCORE_INST_XXX macros to get the opcodes 67 and then use these two macros to crack the MCORE_INST value into 68 the appropriate byte values. */ 69 #define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF)) 70 #define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF)) 71 72 const char comment_chars[] = "#/"; 73 const char line_separator_chars[] = ";"; 74 const char line_comment_chars[] = "#/"; 75 76 const int md_reloc_size = 8; 77 78 static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */ 79 static int sifilter_mode = 0; 80 81 const char EXP_CHARS[] = "eE"; 82 83 /* Chars that mean this number is a floating point constant 84 As in 0f12.456 85 or 0d1.2345e12 */ 86 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 87 88 #define C(what,length) (((what) << 2) + (length)) 89 #define GET_WHAT(x) ((x >> 2)) 90 91 /* These are the two types of relaxable instruction */ 92 #define COND_JUMP 1 93 #define UNCD_JUMP 2 94 95 #define UNDEF_DISP 0 96 #define DISP12 1 97 #define DISP32 2 98 #define UNDEF_WORD_DISP 3 99 100 #define C12_LEN 2 101 #define C32_LEN 10 /* allow for align */ 102 #define U12_LEN 2 103 #define U32_LEN 8 /* allow for align */ 104 105 typedef enum 106 { 107 M210, 108 M340 109 } 110 cpu_type; 111 112 cpu_type cpu = M340; 113 114 /* Initialize the relax table. */ 115 const relax_typeS md_relax_table[] = { 116 { 0, 0, 0, 0 }, 117 { 0, 0, 0, 0 }, 118 { 0, 0, 0, 0 }, 119 { 0, 0, 0, 0 }, 120 121 /* COND_JUMP */ 122 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 123 { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */ 124 { 0, 0, C32_LEN, 0 }, /* DISP32 */ 125 { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */ 126 127 /* UNCD_JUMP */ 128 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 129 { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */ 130 { 0, 0, U32_LEN, 0 }, /* DISP32 */ 131 { 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */ 132 133 }; 134 135 /* Literal pool data structures. */ 136 struct literal 137 { 138 unsigned short refcnt; 139 unsigned char ispcrel; 140 unsigned char unused; 141 expressionS e; 142 }; 143 144 #define MAX_POOL_SIZE (1024/4) 145 static struct literal litpool [MAX_POOL_SIZE]; 146 static unsigned poolsize; 147 static unsigned poolnumber; 148 static unsigned long poolspan; 149 150 /* SPANPANIC: the point at which we get too scared and force a dump 151 of the literal pool, and perhaps put a branch in place. 152 Calculated as: 153 1024 span of lrw/jmpi/jsri insn (actually span+1) 154 -2 possible alignment at the insn. 155 -2 possible alignment to get the table aligned. 156 -2 an inserted branch around the table. 157 == 1018 158 at 1018, we might be in trouble. 159 -- so we have to be smaller than 1018 and since we deal with 2-byte 160 instructions, the next good choice is 1016. 161 -- Note we have a test case that fails when we've got 1018 here. */ 162 #define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */ 163 #define SPANCLOSE (900) 164 #define SPANEXIT (600) 165 static symbolS * poolsym; /* label for current pool. */ 166 static char poolname[8]; 167 static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ 168 169 /* This table describes all the machine specific pseudo-ops the assembler 170 has to support. The fields are: 171 Pseudo-op name without dot 172 Function to call to execute this pseudo-op 173 Integer arg to pass to the function. */ 174 const pseudo_typeS md_pseudo_table[] = 175 { 176 { "export", s_globl, 0 }, 177 { "import", s_ignore, 0 }, 178 { "literals", mcore_s_literals, 0 }, 179 { "page", listing_eject, 0 }, 180 181 /* The following are to intercept the placement of data into the text 182 section (eg addresses for a switch table), so that the space they 183 occupy can be taken into account when deciding whether or not to 184 dump the current literal pool. 185 XXX - currently we do not cope with the .space and .dcb.d directives. */ 186 { "ascii", mcore_stringer, 0 }, 187 { "asciz", mcore_stringer, 1 }, 188 { "byte", mcore_cons, 1 }, 189 { "dc", mcore_cons, 2 }, 190 { "dc.b", mcore_cons, 1 }, 191 { "dc.d", mcore_float_cons, 'd'}, 192 { "dc.l", mcore_cons, 4 }, 193 { "dc.s", mcore_float_cons, 'f'}, 194 { "dc.w", mcore_cons, 2 }, 195 { "dc.x", mcore_float_cons, 'x'}, 196 { "double", mcore_float_cons, 'd'}, 197 { "float", mcore_float_cons, 'f'}, 198 { "hword", mcore_cons, 2 }, 199 { "int", mcore_cons, 4 }, 200 { "long", mcore_cons, 4 }, 201 { "octa", mcore_cons, 16 }, 202 { "quad", mcore_cons, 8 }, 203 { "short", mcore_cons, 2 }, 204 { "single", mcore_float_cons, 'f'}, 205 { "string", mcore_stringer, 1 }, 206 { "word", mcore_cons, 2 }, 207 { "fill", mcore_fill, 0 }, 208 209 /* Allow for the effect of section changes. */ 210 { "text", mcore_s_text, 0 }, 211 { "data", mcore_s_data, 0 }, 212 { "bss", mcore_s_bss, 1 }, 213 #ifdef OBJ_ELF 214 { "comm", mcore_s_comm, 0 }, 215 #endif 216 { "section", mcore_s_section, 0 }, 217 { "section.s", mcore_s_section, 0 }, 218 { "sect", mcore_s_section, 0 }, 219 { "sect.s", mcore_s_section, 0 }, 220 221 { 0, 0, 0 } 222 }; 223 224 static void 225 mcore_s_literals (ignore) 226 int ignore ATTRIBUTE_UNUSED; 227 { 228 dump_literals (0); 229 demand_empty_rest_of_line (); 230 } 231 232 /* Perform FUNC (ARG), and track number of bytes added to frag. */ 233 234 static void 235 mcore_pool_count (func, arg) 236 void (*func) PARAMS ((int)); 237 int arg; 238 { 239 const fragS *curr_frag = frag_now; 240 offsetT added = -frag_now_fix_octets (); 241 242 (*func) (arg); 243 244 while (curr_frag != frag_now) 245 { 246 added += curr_frag->fr_fix; 247 curr_frag = curr_frag->fr_next; 248 } 249 250 added += frag_now_fix_octets (); 251 poolspan += added; 252 } 253 254 static void 255 mcore_cons (nbytes) 256 int nbytes; 257 { 258 if (now_seg == text_section) 259 mcore_pool_count (cons, nbytes); 260 else 261 cons (nbytes); 262 263 /* In theory we ought to call check_literals (2,0) here in case 264 we need to dump the literal table. We cannot do this however, 265 as the directives that we are intercepting may be being used 266 to build a switch table, and we must not interfere with its 267 contents. Instead we cross our fingers and pray... */ 268 } 269 270 static void 271 mcore_float_cons (float_type) 272 int float_type; 273 { 274 if (now_seg == text_section) 275 mcore_pool_count (float_cons, float_type); 276 else 277 float_cons (float_type); 278 279 /* See the comment in mcore_cons () about calling check_literals. 280 It is unlikely that a switch table will be constructed using 281 floating point values, but it is still likely that an indexed 282 table of floating point constants is being created by these 283 directives, so again we must not interfere with their placement. */ 284 } 285 286 static void 287 mcore_stringer (append_zero) 288 int append_zero; 289 { 290 if (now_seg == text_section) 291 mcore_pool_count (stringer, append_zero); 292 else 293 stringer (append_zero); 294 295 /* We call check_literals here in case a large number of strings are 296 being placed into the text section with a sequence of stringer 297 directives. In theory we could be upsetting something if these 298 strings are actually in an indexed table instead of referenced by 299 individual labels. Let us hope that that never happens. */ 300 check_literals (2, 0); 301 } 302 303 static void 304 mcore_fill (unused) 305 int unused; 306 { 307 if (now_seg == text_section) 308 mcore_pool_count (s_fill, unused); 309 else 310 s_fill (unused); 311 312 check_literals (2, 0); 313 } 314 315 /* Handle the section changing pseudo-ops. These call through to the 316 normal implementations, but they dump the literal pool first. */ 317 static void 318 mcore_s_text (ignore) 319 int ignore; 320 { 321 dump_literals (0); 322 323 #ifdef OBJ_ELF 324 obj_elf_text (ignore); 325 #else 326 s_text (ignore); 327 #endif 328 } 329 330 static void 331 mcore_s_data (ignore) 332 int ignore; 333 { 334 dump_literals (0); 335 336 #ifdef OBJ_ELF 337 obj_elf_data (ignore); 338 #else 339 s_data (ignore); 340 #endif 341 } 342 343 static void 344 mcore_s_section (ignore) 345 int ignore; 346 { 347 /* Scan forwards to find the name of the section. If the section 348 being switched to is ".line" then this is a DWARF1 debug section 349 which is arbitrarily placed inside generated code. In this case 350 do not dump the literal pool because it is a) inefficient and 351 b) would require the generation of extra code to jump around the 352 pool. */ 353 char * ilp = input_line_pointer; 354 355 while (*ilp != 0 && ISSPACE (*ilp)) 356 ++ ilp; 357 358 if (strncmp (ilp, ".line", 5) == 0 359 && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r')) 360 ; 361 else 362 dump_literals (0); 363 364 #ifdef OBJ_ELF 365 obj_elf_section (ignore); 366 #endif 367 #ifdef OBJ_COFF 368 obj_coff_section (ignore); 369 #endif 370 } 371 372 static void 373 mcore_s_bss (needs_align) 374 int needs_align; 375 { 376 dump_literals (0); 377 378 s_lcomm_bytes (needs_align); 379 } 380 381 #ifdef OBJ_ELF 382 static void 383 mcore_s_comm (needs_align) 384 int needs_align; 385 { 386 dump_literals (0); 387 388 obj_elf_common (needs_align); 389 } 390 #endif 391 392 /* This function is called once, at assembler startup time. This should 393 set up all the tables, etc that the MD part of the assembler needs. */ 394 void 395 md_begin () 396 { 397 const mcore_opcode_info * opcode; 398 char * prev_name = ""; 399 400 opcode_hash_control = hash_new (); 401 402 /* Insert unique names into hash table */ 403 for (opcode = mcore_table; opcode->name; opcode ++) 404 { 405 if (! streq (prev_name, opcode->name)) 406 { 407 prev_name = opcode->name; 408 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 409 } 410 } 411 } 412 413 /* Get a log2(val). */ 414 static int 415 log2 (val) 416 unsigned int val; 417 { 418 int log = -1; 419 while (val != 0) 420 { 421 log ++; 422 val >>= 1; 423 } 424 425 return log; 426 } 427 428 /* Try to parse a reg name. */ 429 static char * 430 parse_reg (s, reg) 431 char * s; 432 unsigned * reg; 433 { 434 /* Strip leading whitespace. */ 435 while (ISSPACE (* s)) 436 ++ s; 437 438 if (TOLOWER (s[0]) == 'r') 439 { 440 if (s[1] == '1' && s[2] >= '0' && s[2] <= '5') 441 { 442 *reg = 10 + s[2] - '0'; 443 return s + 3; 444 } 445 446 if (s[1] >= '0' && s[1] <= '9') 447 { 448 *reg = s[1] - '0'; 449 return s + 2; 450 } 451 } 452 else if ( TOLOWER (s[0]) == 's' 453 && TOLOWER (s[1]) == 'p' 454 && ! ISALNUM (s[2])) 455 { 456 * reg = 0; 457 return s + 2; 458 } 459 460 as_bad (_("register expected, but saw '%.6s'"), s); 461 return s; 462 } 463 464 static struct Cregs 465 { 466 char * name; 467 unsigned int crnum; 468 } 469 cregs[] = 470 { 471 { "psr", 0}, 472 { "vbr", 1}, 473 { "epsr", 2}, 474 { "fpsr", 3}, 475 { "epc", 4}, 476 { "fpc", 5}, 477 { "ss0", 6}, 478 { "ss1", 7}, 479 { "ss2", 8}, 480 { "ss3", 9}, 481 { "ss4", 10}, 482 { "gcr", 11}, 483 { "gsr", 12}, 484 { "", 0} 485 }; 486 487 static char * 488 parse_creg (s, reg) 489 char * s; 490 unsigned * reg; 491 { 492 int i; 493 494 /* Strip leading whitespace. */ 495 while (ISSPACE (* s)) 496 ++s; 497 498 if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r')) 499 { 500 if (s[2] == '3' && s[3] >= '0' && s[3] <= '1') 501 { 502 *reg = 30 + s[3] - '0'; 503 return s + 4; 504 } 505 506 if (s[2] == '2' && s[3] >= '0' && s[3] <= '9') 507 { 508 *reg = 20 + s[3] - '0'; 509 return s + 4; 510 } 511 512 if (s[2] == '1' && s[3] >= '0' && s[3] <= '9') 513 { 514 *reg = 10 + s[3] - '0'; 515 return s + 4; 516 } 517 518 if (s[2] >= '0' && s[2] <= '9') 519 { 520 *reg = s[2] - '0'; 521 return s + 3; 522 } 523 } 524 525 /* Look at alternate creg names before giving error. */ 526 for (i = 0; cregs[i].name[0] != '\0'; i++) 527 { 528 char buf [10]; 529 int length; 530 int j; 531 532 length = strlen (cregs[i].name); 533 534 for (j = 0; j < length; j++) 535 buf[j] = TOLOWER (s[j]); 536 537 if (strncmp (cregs[i].name, buf, length) == 0) 538 { 539 *reg = cregs[i].crnum; 540 return s + length; 541 } 542 } 543 544 as_bad (_("control register expected, but saw '%.6s'"), s); 545 546 return s; 547 } 548 549 static char * 550 parse_psrmod (s, reg) 551 char * s; 552 unsigned * reg; 553 { 554 int i; 555 char buf[10]; 556 static struct psrmods 557 { 558 char * name; 559 unsigned int value; 560 } 561 psrmods[] = 562 { 563 { "ie", 1 }, 564 { "fe", 2 }, 565 { "ee", 4 }, 566 { "af", 8 } /* Really 0 and non-combinable. */ 567 }; 568 569 for (i = 0; i < 2; i++) 570 buf[i] = TOLOWER (s[i]); 571 572 for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;) 573 { 574 if (! strncmp (psrmods[i].name, buf, 2)) 575 { 576 * reg = psrmods[i].value; 577 578 return s + 2; 579 } 580 } 581 582 as_bad (_("bad/missing psr specifier")); 583 584 * reg = 0; 585 586 return s; 587 } 588 589 static char * 590 parse_exp (s, e) 591 char * s; 592 expressionS * e; 593 { 594 char * save; 595 char * new; 596 597 /* Skip whitespace. */ 598 while (ISSPACE (* s)) 599 ++ s; 600 601 save = input_line_pointer; 602 input_line_pointer = s; 603 604 expression (e); 605 606 if (e->X_op == O_absent) 607 as_bad (_("missing operand")); 608 609 new = input_line_pointer; 610 input_line_pointer = save; 611 612 return new; 613 } 614 615 static void 616 make_name (s, p, n) 617 char * s; 618 char * p; 619 int n; 620 { 621 static const char hex[] = "0123456789ABCDEF"; 622 623 s[0] = p[0]; 624 s[1] = p[1]; 625 s[2] = p[2]; 626 s[3] = hex[(n >> 12) & 0xF]; 627 s[4] = hex[(n >> 8) & 0xF]; 628 s[5] = hex[(n >> 4) & 0xF]; 629 s[6] = hex[(n) & 0xF]; 630 s[7] = 0; 631 } 632 633 #define POOL_END_LABEL ".LE" 634 #define POOL_START_LABEL ".LS" 635 636 static void 637 dump_literals (isforce) 638 int isforce; 639 { 640 unsigned int i; 641 struct literal * p; 642 symbolS * brarsym = NULL; 643 644 if (poolsize == 0) 645 return; 646 647 /* Must we branch around the literal table? */ 648 if (isforce) 649 { 650 char * output; 651 char brarname[8]; 652 653 make_name (brarname, POOL_END_LABEL, poolnumber); 654 655 brarsym = symbol_make (brarname); 656 657 symbol_table_insert (brarsym); 658 659 output = frag_var (rs_machine_dependent, 660 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 661 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 662 C (UNCD_JUMP, 0), brarsym, 0, 0); 663 output[0] = INST_BYTE0 (MCORE_INST_BR); /* br .+xxx */ 664 output[1] = INST_BYTE1 (MCORE_INST_BR); 665 } 666 667 /* Make sure that the section is sufficiently aligned and that 668 the literal table is aligned within it. */ 669 record_alignment (now_seg, 2); 670 frag_align (2, 0, 0); 671 672 colon (S_GET_NAME (poolsym)); 673 674 for (i = 0, p = litpool; i < poolsize; i++, p++) 675 emit_expr (& p->e, 4); 676 677 if (brarsym != NULL) 678 colon (S_GET_NAME (brarsym)); 679 680 poolsize = 0; 681 } 682 683 static void 684 check_literals (kind, offset) 685 int kind; 686 int offset; 687 { 688 poolspan += offset; 689 690 /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC. 691 SPANPANIC means that we must dump now. 692 kind == 0 is any old instruction. 693 kind > 0 means we just had a control transfer instruction. 694 kind == 1 means within a function 695 kind == 2 means we just left a function 696 697 The dump_literals (1) call inserts a branch around the table, so 698 we first look to see if its a situation where we won't have to 699 insert a branch (e.g., the previous instruction was an unconditional 700 branch). 701 702 SPANPANIC is the point where we must dump a single-entry pool. 703 it accounts for alignments and an inserted branch. 704 the 'poolsize*2' accounts for the scenario where we do: 705 lrw r1,lit1; lrw r2,lit2; lrw r3,lit3 706 Note that the 'lit2' reference is 2 bytes further along 707 but the literal it references will be 4 bytes further along, 708 so we must consider the poolsize into this equation. 709 This is slightly over-cautious, but guarantees that we won't 710 panic because a relocation is too distant. */ 711 712 if (poolspan > SPANCLOSE && kind > 0) 713 dump_literals (0); 714 else if (poolspan > SPANEXIT && kind > 1) 715 dump_literals (0); 716 else if (poolspan >= (SPANPANIC - poolsize * 2)) 717 dump_literals (1); 718 } 719 720 static int 721 enter_literal (e, ispcrel) 722 expressionS * e; 723 int ispcrel; 724 { 725 unsigned int i; 726 struct literal * p; 727 728 if (poolsize >= MAX_POOL_SIZE - 2) 729 { 730 /* The literal pool is as full as we can handle. We have 731 to be 2 entries shy of the 1024/4=256 entries because we 732 have to allow for the branch (2 bytes) and the alignment 733 (2 bytes before the first insn referencing the pool and 734 2 bytes before the pool itself) == 6 bytes, rounds up 735 to 2 entries. */ 736 dump_literals (1); 737 } 738 739 if (poolsize == 0) 740 { 741 /* Create new literal pool. */ 742 if (++ poolnumber > 0xFFFF) 743 as_fatal (_("more than 65K literal pools")); 744 745 make_name (poolname, POOL_START_LABEL, poolnumber); 746 poolsym = symbol_make (poolname); 747 symbol_table_insert (poolsym); 748 poolspan = 0; 749 } 750 751 /* Search pool for value so we don't have duplicates. */ 752 for (p = litpool, i = 0; i < poolsize; i++, p++) 753 { 754 if (e->X_op == p->e.X_op 755 && e->X_add_symbol == p->e.X_add_symbol 756 && e->X_add_number == p->e.X_add_number 757 && ispcrel == p->ispcrel) 758 { 759 p->refcnt ++; 760 return i; 761 } 762 } 763 764 p->refcnt = 1; 765 p->ispcrel = ispcrel; 766 p->e = * e; 767 768 poolsize ++; 769 770 return i; 771 } 772 773 /* Parse a literal specification. -- either new or old syntax. 774 old syntax: the user supplies the label and places the literal. 775 new syntax: we put it into the literal pool. */ 776 static char * 777 parse_rt (s, outputp, ispcrel, ep) 778 char * s; 779 char ** outputp; 780 int ispcrel; 781 expressionS * ep; 782 { 783 expressionS e; 784 int n; 785 786 if (ep) 787 /* Indicate nothing there. */ 788 ep->X_op = O_absent; 789 790 if (*s == '[') 791 { 792 s = parse_exp (s + 1, & e); 793 794 if (*s == ']') 795 s++; 796 else 797 as_bad (_("missing ']'")); 798 } 799 else 800 { 801 s = parse_exp (s, & e); 802 803 n = enter_literal (& e, ispcrel); 804 805 if (ep) 806 *ep = e; 807 808 /* Create a reference to pool entry. */ 809 e.X_op = O_symbol; 810 e.X_add_symbol = poolsym; 811 e.X_add_number = n << 2; 812 } 813 814 * outputp = frag_more (2); 815 816 fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1, 817 BFD_RELOC_MCORE_PCREL_IMM8BY4); 818 819 return s; 820 } 821 822 static char * 823 parse_imm (s, val, min, max) 824 char * s; 825 unsigned * val; 826 unsigned min; 827 unsigned max; 828 { 829 char * new; 830 expressionS e; 831 832 new = parse_exp (s, & e); 833 834 if (e.X_op == O_absent) 835 ; /* An error message has already been emitted. */ 836 else if (e.X_op != O_constant) 837 as_bad (_("operand must be a constant")); 838 else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max) 839 as_bad (_("operand must be absolute in range %u..%u, not %ld"), 840 min, max, (long) e.X_add_number); 841 842 * val = e.X_add_number; 843 844 return new; 845 } 846 847 static char * 848 parse_mem (s, reg, off, siz) 849 char * s; 850 unsigned * reg; 851 unsigned * off; 852 unsigned siz; 853 { 854 * off = 0; 855 856 while (ISSPACE (* s)) 857 ++ s; 858 859 if (* s == '(') 860 { 861 s = parse_reg (s + 1, reg); 862 863 while (ISSPACE (* s)) 864 ++ s; 865 866 if (* s == ',') 867 { 868 s = parse_imm (s + 1, off, 0, 63); 869 870 if (siz > 1) 871 { 872 if (siz > 2) 873 { 874 if (* off & 0x3) 875 as_bad (_("operand must be a multiple of 4")); 876 877 * off >>= 2; 878 } 879 else 880 { 881 if (* off & 0x1) 882 as_bad (_("operand must be a multiple of 2")); 883 884 * off >>= 1; 885 } 886 } 887 } 888 889 while (ISSPACE (* s)) 890 ++ s; 891 892 if (* s == ')') 893 s ++; 894 } 895 else 896 as_bad (_("base register expected")); 897 898 return s; 899 } 900 901 /* This is the guts of the machine-dependent assembler. STR points to a 902 machine dependent instruction. This function is supposed to emit 903 the frags/bytes it assembles to. */ 904 905 void 906 md_assemble (str) 907 char * str; 908 { 909 char * op_start; 910 char * op_end; 911 mcore_opcode_info * opcode; 912 char * output; 913 int nlen = 0; 914 unsigned short inst; 915 unsigned reg; 916 unsigned off; 917 unsigned isize; 918 expressionS e; 919 char name[20]; 920 921 /* Drop leading whitespace. */ 922 while (ISSPACE (* str)) 923 str ++; 924 925 /* Find the op code end. */ 926 for (op_start = op_end = str; 927 nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' '; 928 op_end++) 929 { 930 name[nlen] = op_start[nlen]; 931 nlen++; 932 } 933 934 name [nlen] = 0; 935 936 if (nlen == 0) 937 { 938 as_bad (_("can't find opcode ")); 939 return; 940 } 941 942 opcode = (mcore_opcode_info *) hash_find (opcode_hash_control, name); 943 if (opcode == NULL) 944 { 945 as_bad (_("unknown opcode \"%s\""), name); 946 return; 947 } 948 949 inst = opcode->inst; 950 isize = 2; 951 952 switch (opcode->opclass) 953 { 954 case O0: 955 output = frag_more (2); 956 break; 957 958 case OT: 959 op_end = parse_imm (op_end + 1, & reg, 0, 3); 960 inst |= reg; 961 output = frag_more (2); 962 break; 963 964 case O1: 965 op_end = parse_reg (op_end + 1, & reg); 966 inst |= reg; 967 output = frag_more (2); 968 break; 969 970 case JMP: 971 op_end = parse_reg (op_end + 1, & reg); 972 inst |= reg; 973 output = frag_more (2); 974 /* In a sifilter mode, we emit this insn 2 times, 975 fixes problem of an interrupt during a jmp.. */ 976 if (sifilter_mode) 977 { 978 output[0] = INST_BYTE0 (inst); 979 output[1] = INST_BYTE1 (inst); 980 output = frag_more (2); 981 } 982 break; 983 984 case JSR: 985 op_end = parse_reg (op_end + 1, & reg); 986 987 if (reg == 15) 988 as_bad (_("invalid register: r15 illegal")); 989 990 inst |= reg; 991 output = frag_more (2); 992 993 if (sifilter_mode) 994 { 995 /* Replace with: bsr .+2 ; addi r15,6; jmp rx ; jmp rx */ 996 inst = MCORE_INST_BSR; /* with 0 displacement */ 997 output[0] = INST_BYTE0 (inst); 998 output[1] = INST_BYTE1 (inst); 999 1000 output = frag_more (2); 1001 inst = MCORE_INST_ADDI; 1002 inst |= 15; /* addi r15,6 */ 1003 inst |= (6 - 1) << 4; /* over the jmp's */ 1004 output[0] = INST_BYTE0 (inst); 1005 output[1] = INST_BYTE1 (inst); 1006 1007 output = frag_more (2); 1008 inst = MCORE_INST_JMP | reg; 1009 output[0] = INST_BYTE0 (inst); 1010 output[1] = INST_BYTE1 (inst); 1011 1012 output = frag_more (2); /* 2nd emitted in fallthru */ 1013 } 1014 break; 1015 1016 case OC: 1017 op_end = parse_reg (op_end + 1, & reg); 1018 inst |= reg; 1019 1020 /* Skip whitespace. */ 1021 while (ISSPACE (* op_end)) 1022 ++ op_end; 1023 1024 if (*op_end == ',') 1025 { 1026 op_end = parse_creg (op_end + 1, & reg); 1027 inst |= reg << 4; 1028 } 1029 1030 output = frag_more (2); 1031 break; 1032 1033 case MULSH: 1034 if (cpu == M210) 1035 { 1036 as_bad (_("M340 specific opcode used when assembling for M210")); 1037 break; 1038 } 1039 /* drop through... */ 1040 case O2: 1041 op_end = parse_reg (op_end + 1, & reg); 1042 inst |= reg; 1043 1044 /* Skip whitespace. */ 1045 while (ISSPACE (* op_end)) 1046 ++ op_end; 1047 1048 if (* op_end == ',') 1049 { 1050 op_end = parse_reg (op_end + 1, & reg); 1051 inst |= reg << 4; 1052 } 1053 else 1054 as_bad (_("second operand missing")); 1055 1056 output = frag_more (2); 1057 break; 1058 1059 case X1: /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx */ 1060 op_end = parse_reg (op_end + 1, & reg); 1061 1062 /* Skip whitespace. */ 1063 while (ISSPACE (* op_end)) 1064 ++ op_end; 1065 1066 if (* op_end == ',') /* xtrb- r1,rx */ 1067 { 1068 if (reg != 1) 1069 as_bad (_("destination register must be r1")); 1070 1071 op_end = parse_reg (op_end + 1, & reg); 1072 } 1073 1074 inst |= reg; 1075 output = frag_more (2); 1076 break; 1077 1078 case O1R1: /* div- rx,r1 */ 1079 op_end = parse_reg (op_end + 1, & reg); 1080 inst |= reg; 1081 1082 /* Skip whitespace. */ 1083 while (ISSPACE (* op_end)) 1084 ++ op_end; 1085 1086 if (* op_end == ',') 1087 { 1088 op_end = parse_reg (op_end + 1, & reg); 1089 if (reg != 1) 1090 as_bad (_("source register must be r1")); 1091 } 1092 else 1093 as_bad (_("second operand missing")); 1094 1095 output = frag_more (2); 1096 break; 1097 1098 case OI: 1099 op_end = parse_reg (op_end + 1, & reg); 1100 inst |= reg; 1101 1102 /* Skip whitespace. */ 1103 while (ISSPACE (* op_end)) 1104 ++ op_end; 1105 1106 if (* op_end == ',') 1107 { 1108 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1109 inst |= (reg - 1) << 4; 1110 } 1111 else 1112 as_bad (_("second operand missing")); 1113 1114 output = frag_more (2); 1115 break; 1116 1117 case OB: 1118 op_end = parse_reg (op_end + 1, & reg); 1119 inst |= reg; 1120 1121 /* Skip whitespace. */ 1122 while (ISSPACE (* op_end)) 1123 ++ op_end; 1124 1125 if (* op_end == ',') 1126 { 1127 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1128 inst |= reg << 4; 1129 } 1130 else 1131 as_bad (_("second operand missing")); 1132 1133 output = frag_more (2); 1134 break; 1135 1136 case OB2: /* like OB, but arg is 2^n instead of n */ 1137 op_end = parse_reg (op_end + 1, & reg); 1138 inst |= reg; 1139 1140 /* Skip whitespace. */ 1141 while (ISSPACE (* op_end)) 1142 ++ op_end; 1143 1144 if (* op_end == ',') 1145 { 1146 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); 1147 /* Further restrict the immediate to a power of two. */ 1148 if ((reg & (reg - 1)) == 0) 1149 reg = log2 (reg); 1150 else 1151 { 1152 reg = 0; 1153 as_bad (_("immediate is not a power of two")); 1154 } 1155 inst |= (reg) << 4; 1156 } 1157 else 1158 as_bad (_("second operand missing")); 1159 1160 output = frag_more (2); 1161 break; 1162 1163 case OBRa: /* Specific for bgeni: imm of 0->6 translate to movi. */ 1164 case OBRb: 1165 case OBRc: 1166 op_end = parse_reg (op_end + 1, & reg); 1167 inst |= reg; 1168 1169 /* Skip whitespace. */ 1170 while (ISSPACE (* op_end)) 1171 ++ op_end; 1172 1173 if (* op_end == ',') 1174 { 1175 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1176 /* immediate values of 0 -> 6 translate to movi */ 1177 if (reg <= 6) 1178 { 1179 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1180 reg = 0x1 << reg; 1181 as_warn (_("translating bgeni to movi")); 1182 } 1183 inst &= ~ 0x01f0; 1184 inst |= reg << 4; 1185 } 1186 else 1187 as_bad (_("second operand missing")); 1188 1189 output = frag_more (2); 1190 break; 1191 1192 case OBR2: /* like OBR, but arg is 2^n instead of n */ 1193 op_end = parse_reg (op_end + 1, & reg); 1194 inst |= reg; 1195 1196 /* Skip whitespace. */ 1197 while (ISSPACE (* op_end)) 1198 ++ op_end; 1199 1200 if (* op_end == ',') 1201 { 1202 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); 1203 1204 /* Further restrict the immediate to a power of two. */ 1205 if ((reg & (reg - 1)) == 0) 1206 reg = log2 (reg); 1207 else 1208 { 1209 reg = 0; 1210 as_bad (_("immediate is not a power of two")); 1211 } 1212 1213 /* Immediate values of 0 -> 6 translate to movi. */ 1214 if (reg <= 6) 1215 { 1216 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1217 reg = 0x1 << reg; 1218 as_warn (_("translating mgeni to movi")); 1219 } 1220 1221 inst |= reg << 4; 1222 } 1223 else 1224 as_bad (_("second operand missing")); 1225 1226 output = frag_more (2); 1227 break; 1228 1229 case OMa: /* Specific for bmaski: imm 1->7 translate to movi. */ 1230 case OMb: 1231 case OMc: 1232 op_end = parse_reg (op_end + 1, & reg); 1233 inst |= reg; 1234 1235 /* Skip whitespace. */ 1236 while (ISSPACE (* op_end)) 1237 ++ op_end; 1238 1239 if (* op_end == ',') 1240 { 1241 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1242 1243 /* Immediate values of 1 -> 7 translate to movi. */ 1244 if (reg <= 7) 1245 { 1246 inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT; 1247 reg = (0x1 << reg) - 1; 1248 inst |= reg << 4; 1249 1250 as_warn (_("translating bmaski to movi")); 1251 } 1252 else 1253 { 1254 inst &= ~ 0x01F0; 1255 inst |= (reg & 0x1F) << 4; 1256 } 1257 } 1258 else 1259 as_bad (_("second operand missing")); 1260 1261 output = frag_more (2); 1262 break; 1263 1264 case SI: 1265 op_end = parse_reg (op_end + 1, & reg); 1266 inst |= reg; 1267 1268 /* Skip whitespace. */ 1269 while (ISSPACE (* op_end)) 1270 ++ op_end; 1271 1272 if (* op_end == ',') 1273 { 1274 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1275 inst |= reg << 4; 1276 } 1277 else 1278 as_bad (_("second operand missing")); 1279 1280 output = frag_more (2); 1281 break; 1282 1283 case I7: 1284 op_end = parse_reg (op_end + 1, & reg); 1285 inst |= reg; 1286 1287 /* Skip whitespace. */ 1288 while (ISSPACE (* op_end)) 1289 ++ op_end; 1290 1291 if (* op_end == ',') 1292 { 1293 op_end = parse_imm (op_end + 1, & reg, 0, 0x7F); 1294 inst |= reg << 4; 1295 } 1296 else 1297 as_bad (_("second operand missing")); 1298 1299 output = frag_more (2); 1300 break; 1301 1302 case LS: 1303 op_end = parse_reg (op_end + 1, & reg); 1304 inst |= reg << 8; 1305 1306 /* Skip whitespace. */ 1307 while (ISSPACE (* op_end)) 1308 ++ op_end; 1309 1310 if (* op_end == ',') 1311 { 1312 int size; 1313 1314 if ((inst & 0x6000) == 0) 1315 size = 4; 1316 else if ((inst & 0x6000) == 0x4000) 1317 size = 2; 1318 else if ((inst & 0x6000) == 0x2000) 1319 size = 1; 1320 else 1321 abort (); 1322 1323 op_end = parse_mem (op_end + 1, & reg, & off, size); 1324 1325 if (off > 16) 1326 as_bad (_("displacement too large (%d)"), off); 1327 else 1328 inst |= (reg) | (off << 4); 1329 } 1330 else 1331 as_bad (_("second operand missing")); 1332 1333 output = frag_more (2); 1334 break; 1335 1336 case LR: 1337 op_end = parse_reg (op_end + 1, & reg); 1338 1339 if (reg == 0 || reg == 15) 1340 as_bad (_("Invalid register: r0 and r15 illegal")); 1341 1342 inst |= (reg << 8); 1343 1344 /* Skip whitespace. */ 1345 while (ISSPACE (* op_end)) 1346 ++ op_end; 1347 1348 if (* op_end == ',') 1349 { 1350 /* parse_rt calls frag_more() for us. */ 1351 input_line_pointer = parse_rt (op_end + 1, & output, 0, 0); 1352 op_end = input_line_pointer; 1353 } 1354 else 1355 { 1356 as_bad (_("second operand missing")); 1357 output = frag_more (2); /* save its space */ 1358 } 1359 break; 1360 1361 case LJ: 1362 input_line_pointer = parse_rt (op_end + 1, & output, 1, 0); 1363 /* parse_rt() calls frag_more() for us. */ 1364 op_end = input_line_pointer; 1365 break; 1366 1367 case RM: 1368 op_end = parse_reg (op_end + 1, & reg); 1369 1370 if (reg == 0 || reg == 15) 1371 as_bad (_("bad starting register: r0 and r15 invalid")); 1372 1373 inst |= reg; 1374 1375 /* Skip whitespace. */ 1376 while (ISSPACE (* op_end)) 1377 ++ op_end; 1378 1379 if (* op_end == '-') 1380 { 1381 op_end = parse_reg (op_end + 1, & reg); 1382 1383 if (reg != 15) 1384 as_bad (_("ending register must be r15")); 1385 1386 /* Skip whitespace. */ 1387 while (ISSPACE (* op_end)) 1388 ++ op_end; 1389 } 1390 1391 if (* op_end == ',') 1392 { 1393 op_end ++; 1394 1395 /* Skip whitespace. */ 1396 while (ISSPACE (* op_end)) 1397 ++ op_end; 1398 1399 if (* op_end == '(') 1400 { 1401 op_end = parse_reg (op_end + 1, & reg); 1402 1403 if (reg != 0) 1404 as_bad (_("bad base register: must be r0")); 1405 1406 if (* op_end == ')') 1407 op_end ++; 1408 } 1409 else 1410 as_bad (_("base register expected")); 1411 } 1412 else 1413 as_bad (_("second operand missing")); 1414 1415 output = frag_more (2); 1416 break; 1417 1418 case RQ: 1419 op_end = parse_reg (op_end + 1, & reg); 1420 1421 if (reg != 4) 1422 as_fatal (_("first register must be r4")); 1423 1424 /* Skip whitespace. */ 1425 while (ISSPACE (* op_end)) 1426 ++ op_end; 1427 1428 if (* op_end == '-') 1429 { 1430 op_end = parse_reg (op_end + 1, & reg); 1431 1432 if (reg != 7) 1433 as_fatal (_("last register must be r7")); 1434 1435 /* Skip whitespace. */ 1436 while (ISSPACE (* op_end)) 1437 ++ op_end; 1438 1439 if (* op_end == ',') 1440 { 1441 op_end ++; 1442 1443 /* Skip whitespace. */ 1444 while (ISSPACE (* op_end)) 1445 ++ op_end; 1446 1447 if (* op_end == '(') 1448 { 1449 op_end = parse_reg (op_end + 1, & reg); 1450 1451 if (reg >= 4 && reg <= 7) 1452 as_fatal ("base register cannot be r4, r5, r6, or r7"); 1453 1454 inst |= reg; 1455 1456 /* Skip whitespace. */ 1457 while (ISSPACE (* op_end)) 1458 ++ op_end; 1459 1460 if (* op_end == ')') 1461 op_end ++; 1462 } 1463 else 1464 as_bad (_("base register expected")); 1465 } 1466 else 1467 as_bad (_("second operand missing")); 1468 } 1469 else 1470 as_bad (_("reg-reg expected")); 1471 1472 output = frag_more (2); 1473 break; 1474 1475 case BR: 1476 input_line_pointer = parse_exp (op_end + 1, & e); 1477 op_end = input_line_pointer; 1478 1479 output = frag_more (2); 1480 1481 fix_new_exp (frag_now, output-frag_now->fr_literal, 1482 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2); 1483 break; 1484 1485 case BL: 1486 op_end = parse_reg (op_end + 1, & reg); 1487 inst |= reg << 4; 1488 1489 /* Skip whitespace. */ 1490 while (ISSPACE (* op_end)) 1491 ++ op_end; 1492 1493 if (* op_end == ',') 1494 { 1495 op_end = parse_exp (op_end + 1, & e); 1496 output = frag_more (2); 1497 1498 fix_new_exp (frag_now, output-frag_now->fr_literal, 1499 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2); 1500 } 1501 else 1502 { 1503 as_bad (_("second operand missing")); 1504 output = frag_more (2); 1505 } 1506 break; 1507 1508 case JC: 1509 input_line_pointer = parse_exp (op_end + 1, & e); 1510 op_end = input_line_pointer; 1511 1512 output = frag_var (rs_machine_dependent, 1513 md_relax_table[C (COND_JUMP, DISP32)].rlx_length, 1514 md_relax_table[C (COND_JUMP, DISP12)].rlx_length, 1515 C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1516 isize = C32_LEN; 1517 break; 1518 1519 case JU: 1520 input_line_pointer = parse_exp (op_end + 1, & e); 1521 op_end = input_line_pointer; 1522 1523 output = frag_var (rs_machine_dependent, 1524 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 1525 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 1526 C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1527 isize = U32_LEN; 1528 break; 1529 1530 case JL: 1531 inst = MCORE_INST_JSRI; /* jsri */ 1532 input_line_pointer = parse_rt (op_end + 1, & output, 1, & e); 1533 /* parse_rt() calls frag_more for us. */ 1534 op_end = input_line_pointer; 1535 1536 /* Only do this if we know how to do it ... */ 1537 if (e.X_op != O_absent && do_jsri2bsr) 1538 { 1539 /* Look at adding the R_PCREL_JSRIMM11BY2. */ 1540 fix_new_exp (frag_now, output-frag_now->fr_literal, 1541 2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2); 1542 } 1543 break; 1544 1545 case RSI: /* SI, but imm becomes 32-imm */ 1546 op_end = parse_reg (op_end + 1, & reg); 1547 inst |= reg; 1548 1549 /* Skip whitespace. */ 1550 while (ISSPACE (* op_end)) 1551 ++ op_end; 1552 1553 if (* op_end == ',') 1554 { 1555 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1556 1557 reg = 32 - reg; 1558 inst |= reg << 4; 1559 } 1560 else 1561 as_bad (_("second operand missing")); 1562 1563 output = frag_more (2); 1564 break; 1565 1566 case DO21: /* O2, dup rd, lit must be 1 */ 1567 op_end = parse_reg (op_end + 1, & reg); 1568 inst |= reg; 1569 inst |= reg << 4; 1570 1571 /* Skip whitespace. */ 1572 while (ISSPACE (* op_end)) 1573 ++ op_end; 1574 1575 if (* op_end == ',') 1576 { 1577 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1578 1579 if (reg != 1) 1580 as_bad (_("second operand must be 1")); 1581 } 1582 else 1583 as_bad (_("second operand missing")); 1584 1585 output = frag_more (2); 1586 break; 1587 1588 case SIa: 1589 op_end = parse_reg (op_end + 1, & reg); 1590 inst |= reg; 1591 1592 /* Skip whitespace. */ 1593 while (ISSPACE (* op_end)) 1594 ++ op_end; 1595 1596 if (* op_end == ',') 1597 { 1598 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1599 1600 if (reg == 0) 1601 as_bad (_("zero used as immediate value")); 1602 1603 inst |= reg << 4; 1604 } 1605 else 1606 as_bad (_("second operand missing")); 1607 1608 output = frag_more (2); 1609 break; 1610 1611 case OPSR: 1612 if (cpu == M210) 1613 { 1614 as_bad (_("M340 specific opcode used when assembling for M210")); 1615 break; 1616 } 1617 1618 op_end = parse_psrmod (op_end + 1, & reg); 1619 1620 /* Look for further selectors. */ 1621 while (* op_end == ',') 1622 { 1623 unsigned value; 1624 1625 op_end = parse_psrmod (op_end + 1, & value); 1626 1627 if (value & reg) 1628 as_bad (_("duplicated psr bit specifier")); 1629 1630 reg |= value; 1631 } 1632 1633 if (reg > 8) 1634 as_bad (_("`af' must appear alone")); 1635 1636 inst |= (reg & 0x7); 1637 output = frag_more (2); 1638 break; 1639 1640 default: 1641 as_bad (_("unimplemented opcode \"%s\""), name); 1642 } 1643 1644 /* Drop whitespace after all the operands have been parsed. */ 1645 while (ISSPACE (* op_end)) 1646 op_end ++; 1647 1648 /* Give warning message if the insn has more operands than required. */ 1649 if (strcmp (op_end, opcode->name) && strcmp (op_end, "")) 1650 as_warn (_("ignoring operands: %s "), op_end); 1651 1652 output[0] = INST_BYTE0 (inst); 1653 output[1] = INST_BYTE1 (inst); 1654 1655 check_literals (opcode->transfer, isize); 1656 } 1657 1658 symbolS * 1659 md_undefined_symbol (name) 1660 char *name ATTRIBUTE_UNUSED; 1661 { 1662 return 0; 1663 } 1664 1665 void 1666 md_mcore_end () 1667 { 1668 dump_literals (0); 1669 subseg_set (text_section, 0); 1670 } 1671 1672 /* Various routines to kill one day. */ 1673 /* Equal to MAX_PRECISION in atof-ieee.c */ 1674 #define MAX_LITTLENUMS 6 1675 1676 /* Turn a string in input_line_pointer into a floating point constant of type 1677 type, and store the appropriate bytes in *litP. The number of LITTLENUMS 1678 emitted is stored in *sizeP. An error message is returned, or NULL on OK.*/ 1679 char * 1680 md_atof (type, litP, sizeP) 1681 int type; 1682 char * litP; 1683 int * sizeP; 1684 { 1685 int prec; 1686 LITTLENUM_TYPE words[MAX_LITTLENUMS]; 1687 int i; 1688 char * t; 1689 1690 switch (type) 1691 { 1692 case 'f': 1693 case 'F': 1694 case 's': 1695 case 'S': 1696 prec = 2; 1697 break; 1698 1699 case 'd': 1700 case 'D': 1701 case 'r': 1702 case 'R': 1703 prec = 4; 1704 break; 1705 1706 case 'x': 1707 case 'X': 1708 prec = 6; 1709 break; 1710 1711 case 'p': 1712 case 'P': 1713 prec = 6; 1714 break; 1715 1716 default: 1717 *sizeP = 0; 1718 return _("Bad call to MD_NTOF()"); 1719 } 1720 1721 t = atof_ieee (input_line_pointer, type, words); 1722 1723 if (t) 1724 input_line_pointer = t; 1725 1726 *sizeP = prec * sizeof (LITTLENUM_TYPE); 1727 1728 if (! target_big_endian) 1729 { 1730 for (i = prec - 1; i >= 0; i--) 1731 { 1732 md_number_to_chars (litP, (valueT) words[i], 1733 sizeof (LITTLENUM_TYPE)); 1734 litP += sizeof (LITTLENUM_TYPE); 1735 } 1736 } 1737 else 1738 for (i = 0; i < prec; i++) 1739 { 1740 md_number_to_chars (litP, (valueT) words[i], 1741 sizeof (LITTLENUM_TYPE)); 1742 litP += sizeof (LITTLENUM_TYPE); 1743 } 1744 1745 return 0; 1746 } 1747 1748 const char * md_shortopts = ""; 1749 1750 #define OPTION_JSRI2BSR_ON (OPTION_MD_BASE + 0) 1751 #define OPTION_JSRI2BSR_OFF (OPTION_MD_BASE + 1) 1752 #define OPTION_SIFILTER_ON (OPTION_MD_BASE + 2) 1753 #define OPTION_SIFILTER_OFF (OPTION_MD_BASE + 3) 1754 #define OPTION_CPU (OPTION_MD_BASE + 4) 1755 #define OPTION_EB (OPTION_MD_BASE + 5) 1756 #define OPTION_EL (OPTION_MD_BASE + 6) 1757 1758 struct option md_longopts[] = 1759 { 1760 { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF}, 1761 { "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON}, 1762 { "sifilter", no_argument, NULL, OPTION_SIFILTER_ON}, 1763 { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF}, 1764 { "cpu", required_argument, NULL, OPTION_CPU}, 1765 { "EB", no_argument, NULL, OPTION_EB}, 1766 { "EL", no_argument, NULL, OPTION_EL}, 1767 { NULL, no_argument, NULL, 0} 1768 }; 1769 1770 size_t md_longopts_size = sizeof (md_longopts); 1771 1772 int 1773 md_parse_option (c, arg) 1774 int c; 1775 char * arg; 1776 { 1777 switch (c) 1778 { 1779 case OPTION_CPU: 1780 if (streq (arg, "210")) 1781 { 1782 cpu = M210; 1783 target_big_endian = 1; 1784 } 1785 else if (streq (arg, "340")) 1786 cpu = M340; 1787 else 1788 as_warn (_("unrecognised cpu type '%s'"), arg); 1789 break; 1790 1791 case OPTION_EB: target_big_endian = 1; break; 1792 case OPTION_EL: target_big_endian = 0; cpu = M340; break; 1793 case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break; 1794 case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break; 1795 case OPTION_SIFILTER_ON: sifilter_mode = 1; break; 1796 case OPTION_SIFILTER_OFF: sifilter_mode = 0; break; 1797 default: return 0; 1798 } 1799 1800 return 1; 1801 } 1802 1803 void 1804 md_show_usage (stream) 1805 FILE * stream; 1806 { 1807 fprintf (stream, _("\ 1808 MCORE specific options:\n\ 1809 -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\ 1810 -{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\ 1811 -cpu=[210|340] select CPU type\n\ 1812 -EB assemble for a big endian system (default)\n\ 1813 -EL assemble for a little endian system\n")); 1814 } 1815 1816 int md_short_jump_size; 1817 1818 void 1819 md_create_short_jump (ptr, from_Nddr, to_Nddr, frag, to_symbol) 1820 char * ptr ATTRIBUTE_UNUSED; 1821 addressT from_Nddr ATTRIBUTE_UNUSED; 1822 addressT to_Nddr ATTRIBUTE_UNUSED; 1823 fragS * frag ATTRIBUTE_UNUSED; 1824 symbolS * to_symbol ATTRIBUTE_UNUSED; 1825 { 1826 as_fatal (_("failed sanity check: short_jump")); 1827 } 1828 1829 void 1830 md_create_long_jump (ptr, from_Nddr, to_Nddr, frag, to_symbol) 1831 char * ptr ATTRIBUTE_UNUSED; 1832 addressT from_Nddr ATTRIBUTE_UNUSED; 1833 addressT to_Nddr ATTRIBUTE_UNUSED; 1834 fragS * frag ATTRIBUTE_UNUSED; 1835 symbolS * to_symbol ATTRIBUTE_UNUSED; 1836 { 1837 as_fatal (_("failed sanity check: long_jump")); 1838 } 1839 1840 /* Called after relaxing, change the frags so they know how big they are. */ 1841 void 1842 md_convert_frag (abfd, sec, fragP) 1843 bfd * abfd ATTRIBUTE_UNUSED; 1844 segT sec ATTRIBUTE_UNUSED; 1845 register fragS * fragP; 1846 { 1847 unsigned char * buffer; 1848 int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; 1849 1850 buffer = (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 1851 1852 switch (fragP->fr_subtype) 1853 { 1854 case C (COND_JUMP, DISP12): 1855 case C (UNCD_JUMP, DISP12): 1856 { 1857 /* Get the address of the end of the instruction. */ 1858 int next_inst = fragP->fr_fix + fragP->fr_address + 2; 1859 unsigned char t0; 1860 int disp = targ_addr - next_inst; 1861 1862 if (disp & 1) 1863 as_bad (_("odd displacement at %x"), next_inst - 2); 1864 1865 disp >>= 1; 1866 1867 if (! target_big_endian) 1868 { 1869 t0 = buffer[1] & 0xF8; 1870 1871 md_number_to_chars (buffer, disp, 2); 1872 1873 buffer[1] = (buffer[1] & 0x07) | t0; 1874 } 1875 else 1876 { 1877 t0 = buffer[0] & 0xF8; 1878 1879 md_number_to_chars (buffer, disp, 2); 1880 1881 buffer[0] = (buffer[0] & 0x07) | t0; 1882 } 1883 1884 fragP->fr_fix += 2; 1885 } 1886 break; 1887 1888 case C (COND_JUMP, DISP32): 1889 case C (COND_JUMP, UNDEF_WORD_DISP): 1890 { 1891 /* A conditional branch wont fit into 12 bits so: 1892 * b!cond 1f 1893 * jmpi 0f 1894 * .align 2 1895 * 0: .long disp 1896 * 1: 1897 * 1898 * if the b!cond is 4 byte aligned, the literal which would 1899 * go at x+4 will also be aligned. 1900 */ 1901 int first_inst = fragP->fr_fix + fragP->fr_address; 1902 int needpad = (first_inst & 3); 1903 1904 if (! target_big_endian) 1905 buffer[1] ^= 0x08; 1906 else 1907 buffer[0] ^= 0x08; /* Toggle T/F bit */ 1908 1909 buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi */ 1910 buffer[3] = INST_BYTE1 (MCORE_INST_JMPI); 1911 1912 if (needpad) 1913 { 1914 if (! target_big_endian) 1915 { 1916 buffer[0] = 4; /* branch over jmpi, pad, and ptr */ 1917 buffer[2] = 1; /* jmpi offset of 1 gets the pointer */ 1918 } 1919 else 1920 { 1921 buffer[1] = 4; /* branch over jmpi, pad, and ptr */ 1922 buffer[3] = 1; /* jmpi offset of 1 gets the pointer */ 1923 } 1924 1925 buffer[4] = 0; /* alignment/pad */ 1926 buffer[5] = 0; 1927 buffer[6] = 0; /* space for 32 bit address */ 1928 buffer[7] = 0; 1929 buffer[8] = 0; 1930 buffer[9] = 0; 1931 1932 /* Make reloc for the long disp */ 1933 fix_new (fragP, fragP->fr_fix + 6, 4, 1934 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1935 1936 fragP->fr_fix += C32_LEN; 1937 } 1938 else 1939 { 1940 /* See comment below about this given gas' limitations for 1941 shrinking the fragment. '3' is the amount of code that 1942 we inserted here, but '4' is right for the space we reserved 1943 for this fragment. */ 1944 if (! target_big_endian) 1945 { 1946 buffer[0] = 3; /* branch over jmpi, and ptr */ 1947 buffer[2] = 0; /* jmpi offset of 0 gets the pointer */ 1948 } 1949 else 1950 { 1951 buffer[1] = 3; /* branch over jmpi, and ptr */ 1952 buffer[3] = 0; /* jmpi offset of 0 gets the pointer */ 1953 } 1954 1955 buffer[4] = 0; /* space for 32 bit address */ 1956 buffer[5] = 0; 1957 buffer[6] = 0; 1958 buffer[7] = 0; 1959 1960 /* Make reloc for the long disp. */ 1961 fix_new (fragP, fragP->fr_fix + 4, 4, 1962 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1963 fragP->fr_fix += C32_LEN; 1964 1965 /* Frag is actually shorter (see the other side of this ifdef) 1966 but gas isn't prepared for that. We have to re-adjust 1967 the branch displacement so that it goes beyond the 1968 full length of the fragment, not just what we actually 1969 filled in. */ 1970 if (! target_big_endian) 1971 buffer[0] = 4; /* jmpi, ptr, and the 'tail pad' */ 1972 else 1973 buffer[1] = 4; /* jmpi, ptr, and the 'tail pad' */ 1974 } 1975 } 1976 break; 1977 1978 case C (UNCD_JUMP, DISP32): 1979 case C (UNCD_JUMP, UNDEF_WORD_DISP): 1980 { 1981 /* An unconditional branch will not fit in 12 bits, make code which 1982 looks like: 1983 jmpi 0f 1984 .align 2 1985 0: .long disp 1986 we need a pad if "first_inst" is 4 byte aligned. 1987 [because the natural literal place is x + 2] */ 1988 int first_inst = fragP->fr_fix + fragP->fr_address; 1989 int needpad = !(first_inst & 3); 1990 1991 buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi */ 1992 buffer[1] = INST_BYTE1 (MCORE_INST_JMPI); 1993 1994 if (needpad) 1995 { 1996 if (! target_big_endian) 1997 buffer[0] = 1; /* jmpi offset of 1 since padded */ 1998 else 1999 buffer[1] = 1; /* jmpi offset of 1 since padded */ 2000 buffer[2] = 0; /* alignment */ 2001 buffer[3] = 0; 2002 buffer[4] = 0; /* space for 32 bit address */ 2003 buffer[5] = 0; 2004 buffer[6] = 0; 2005 buffer[7] = 0; 2006 2007 /* Make reloc for the long disp. */ 2008 fix_new (fragP, fragP->fr_fix + 4, 4, 2009 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 2010 2011 fragP->fr_fix += U32_LEN; 2012 } 2013 else 2014 { 2015 if (! target_big_endian) 2016 buffer[0] = 0; /* jmpi offset of 0 if no pad */ 2017 else 2018 buffer[1] = 0; /* jmpi offset of 0 if no pad */ 2019 buffer[2] = 0; /* space for 32 bit address */ 2020 buffer[3] = 0; 2021 buffer[4] = 0; 2022 buffer[5] = 0; 2023 2024 /* Make reloc for the long disp. */ 2025 fix_new (fragP, fragP->fr_fix + 2, 4, 2026 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 2027 fragP->fr_fix += U32_LEN; 2028 } 2029 } 2030 break; 2031 2032 default: 2033 abort (); 2034 } 2035 } 2036 2037 /* Applies the desired value to the specified location. 2038 Also sets up addends for 'rela' type relocations. */ 2039 2040 void 2041 md_apply_fix3 (fixP, valP, segment) 2042 fixS * fixP; 2043 valueT * valP; 2044 segT segment ATTRIBUTE_UNUSED; 2045 { 2046 char * buf = fixP->fx_where + fixP->fx_frag->fr_literal; 2047 char * file = fixP->fx_file ? fixP->fx_file : _("unknown"); 2048 const char * symname; 2049 /* Note: use offsetT because it is signed, valueT is unsigned. */ 2050 offsetT val = *valP; 2051 2052 symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); 2053 /* Save this for the addend in the relocation record. */ 2054 fixP->fx_addnumber = val; 2055 2056 if (fixP->fx_addsy != NULL) 2057 { 2058 #ifdef OBJ_ELF 2059 /* For ELF we can just return and let the reloc that will be generated 2060 take care of everything. For COFF we still have to insert 'val' 2061 into the insn since the addend field will be ignored. */ 2062 return; 2063 #endif 2064 } 2065 else 2066 fixP->fx_done = 1; 2067 2068 switch (fixP->fx_r_type) 2069 { 2070 case BFD_RELOC_MCORE_PCREL_IMM11BY2: /* second byte of 2 byte opcode */ 2071 if ((val & 1) != 0) 2072 as_bad_where (file, fixP->fx_line, 2073 _("odd distance branch (0x%lx bytes)"), (long) val); 2074 val /= 2; 2075 if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1)) 2076 as_bad_where (file, fixP->fx_line, 2077 _("pcrel for branch to %s too far (0x%lx)"), 2078 symname, (long) val); 2079 if (target_big_endian) 2080 { 2081 buf[0] |= ((val >> 8) & 0x7); 2082 buf[1] |= (val & 0xff); 2083 } 2084 else 2085 { 2086 buf[1] |= ((val >> 8) & 0x7); 2087 buf[0] |= (val & 0xff); 2088 } 2089 break; 2090 2091 case BFD_RELOC_MCORE_PCREL_IMM8BY4: /* lower 8 bits of 2 byte opcode */ 2092 val += 3; 2093 val /= 4; 2094 if (val & ~0xff) 2095 as_bad_where (file, fixP->fx_line, 2096 _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"), 2097 symname, (long) val); 2098 else if (! target_big_endian) 2099 buf[0] |= (val & 0xff); 2100 else 2101 buf[1] |= (val & 0xff); 2102 break; 2103 2104 case BFD_RELOC_MCORE_PCREL_IMM4BY2: /* loopt instruction */ 2105 if ((val < -32) || (val > -2)) 2106 as_bad_where (file, fixP->fx_line, 2107 _("pcrel for loopt too far (0x%lx)"), (long) val); 2108 val /= 2; 2109 if (! target_big_endian) 2110 buf[0] |= (val & 0xf); 2111 else 2112 buf[1] |= (val & 0xf); 2113 break; 2114 2115 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 2116 /* Conditional linker map jsri to bsr. */ 2117 /* If its a local target and close enough, fix it. 2118 NB: >= -2k for backwards bsr; < 2k for forwards... */ 2119 if (fixP->fx_addsy == 0 && val >= -2048 && val < 2048) 2120 { 2121 long nval = (val / 2) & 0x7ff; 2122 nval |= MCORE_INST_BSR; 2123 2124 /* REPLACE the instruction, don't just modify it. */ 2125 buf[0] = INST_BYTE0 (nval); 2126 buf[1] = INST_BYTE1 (nval); 2127 } 2128 else 2129 fixP->fx_done = 0; 2130 break; 2131 2132 case BFD_RELOC_MCORE_PCREL_32: 2133 case BFD_RELOC_VTABLE_INHERIT: 2134 case BFD_RELOC_VTABLE_ENTRY: 2135 fixP->fx_done = 0; 2136 break; 2137 2138 default: 2139 if (fixP->fx_addsy != NULL) 2140 { 2141 /* If the fix is an absolute reloc based on a symbol's 2142 address, then it cannot be resolved until the final link. */ 2143 fixP->fx_done = 0; 2144 } 2145 #ifdef OBJ_ELF 2146 else 2147 #endif 2148 { 2149 if (fixP->fx_size == 4) 2150 ; 2151 else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767) 2152 ; 2153 else if (fixP->fx_size == 1 && val >= -256 && val <= 255) 2154 ; 2155 else 2156 abort (); 2157 md_number_to_chars (buf, val, fixP->fx_size); 2158 } 2159 break; 2160 } 2161 } 2162 2163 void 2164 md_operand (expressionP) 2165 expressionS * expressionP; 2166 { 2167 /* Ignore leading hash symbol, if poresent. */ 2168 if (* input_line_pointer == '#') 2169 { 2170 input_line_pointer ++; 2171 expression (expressionP); 2172 } 2173 } 2174 2175 int md_long_jump_size; 2176 2177 /* Called just before address relaxation, return the length 2178 by which a fragment must grow to reach it's destination. */ 2179 int 2180 md_estimate_size_before_relax (fragP, segment_type) 2181 register fragS * fragP; 2182 register segT segment_type; 2183 { 2184 switch (fragP->fr_subtype) 2185 { 2186 default: 2187 abort (); 2188 2189 case C (UNCD_JUMP, UNDEF_DISP): 2190 /* Used to be a branch to somewhere which was unknown. */ 2191 if (!fragP->fr_symbol) 2192 { 2193 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2194 } 2195 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2196 { 2197 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2198 } 2199 else 2200 { 2201 fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP); 2202 } 2203 break; 2204 2205 case C (COND_JUMP, UNDEF_DISP): 2206 /* Used to be a branch to somewhere which was unknown. */ 2207 if (fragP->fr_symbol 2208 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2209 { 2210 /* Got a symbol and it's defined in this segment, become byte 2211 sized - maybe it will fix up */ 2212 fragP->fr_subtype = C (COND_JUMP, DISP12); 2213 } 2214 else if (fragP->fr_symbol) 2215 { 2216 /* Its got a segment, but its not ours, so it will always be long. */ 2217 fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP); 2218 } 2219 else 2220 { 2221 /* We know the abs value. */ 2222 fragP->fr_subtype = C (COND_JUMP, DISP12); 2223 } 2224 break; 2225 2226 case C (UNCD_JUMP, DISP12): 2227 case C (UNCD_JUMP, DISP32): 2228 case C (UNCD_JUMP, UNDEF_WORD_DISP): 2229 case C (COND_JUMP, DISP12): 2230 case C (COND_JUMP, DISP32): 2231 case C (COND_JUMP, UNDEF_WORD_DISP): 2232 /* When relaxing a section for the second time, we don't need to 2233 do anything besides return the current size. */ 2234 break; 2235 } 2236 2237 return md_relax_table[fragP->fr_subtype].rlx_length; 2238 } 2239 2240 /* Put number into target byte order. */ 2241 void 2242 md_number_to_chars (ptr, use, nbytes) 2243 char * ptr; 2244 valueT use; 2245 int nbytes; 2246 { 2247 if (! target_big_endian) 2248 switch (nbytes) 2249 { 2250 case 4: ptr[3] = (use >> 24) & 0xff; /* fall through */ 2251 case 3: ptr[2] = (use >> 16) & 0xff; /* fall through */ 2252 case 2: ptr[1] = (use >> 8) & 0xff; /* fall through */ 2253 case 1: ptr[0] = (use >> 0) & 0xff; break; 2254 default: abort (); 2255 } 2256 else 2257 switch (nbytes) 2258 { 2259 case 4: *ptr++ = (use >> 24) & 0xff; /* fall through */ 2260 case 3: *ptr++ = (use >> 16) & 0xff; /* fall through */ 2261 case 2: *ptr++ = (use >> 8) & 0xff; /* fall through */ 2262 case 1: *ptr++ = (use >> 0) & 0xff; break; 2263 default: abort (); 2264 } 2265 } 2266 2267 /* Round up a section size to the appropriate boundary. */ 2268 valueT 2269 md_section_align (segment, size) 2270 segT segment ATTRIBUTE_UNUSED; 2271 valueT size; 2272 { 2273 return size; /* Byte alignment is fine */ 2274 } 2275 2276 /* The location from which a PC relative jump should be calculated, 2277 given a PC relative reloc. */ 2278 long 2279 md_pcrel_from_section (fixp, sec) 2280 fixS * fixp; 2281 segT sec ATTRIBUTE_UNUSED; 2282 { 2283 #ifdef OBJ_ELF 2284 /* If the symbol is undefined or defined in another section 2285 we leave the add number alone for the linker to fix it later. 2286 Only account for the PC pre-bump (which is 2 bytes on the MCore). */ 2287 if (fixp->fx_addsy != (symbolS *) NULL 2288 && (! S_IS_DEFINED (fixp->fx_addsy) 2289 || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) 2290 2291 { 2292 assert (fixp->fx_size == 2); /* must be an insn */ 2293 return fixp->fx_size; 2294 } 2295 #endif 2296 2297 /* The case where we are going to resolve things... */ 2298 return fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address; 2299 } 2300 2301 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL)) 2302 #define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break 2303 2304 arelent * 2305 tc_gen_reloc (section, fixp) 2306 asection * section ATTRIBUTE_UNUSED; 2307 fixS * fixp; 2308 { 2309 arelent * rel; 2310 bfd_reloc_code_real_type code; 2311 2312 switch (fixp->fx_r_type) 2313 { 2314 /* These confuse the size/pcrel macro approach. */ 2315 case BFD_RELOC_VTABLE_INHERIT: 2316 case BFD_RELOC_VTABLE_ENTRY: 2317 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 2318 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 2319 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 2320 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 2321 case BFD_RELOC_RVA: 2322 code = fixp->fx_r_type; 2323 break; 2324 2325 default: 2326 switch (F (fixp->fx_size, fixp->fx_pcrel)) 2327 { 2328 MAP (1, 0, BFD_RELOC_8); 2329 MAP (2, 0, BFD_RELOC_16); 2330 MAP (4, 0, BFD_RELOC_32); 2331 MAP (1, 1, BFD_RELOC_8_PCREL); 2332 MAP (2, 1, BFD_RELOC_16_PCREL); 2333 MAP (4, 1, BFD_RELOC_32_PCREL); 2334 default: 2335 code = fixp->fx_r_type; 2336 as_bad (_("Can not do %d byte %srelocation"), 2337 fixp->fx_size, 2338 fixp->fx_pcrel ? _("pc-relative") : ""); 2339 } 2340 break; 2341 } 2342 2343 rel = (arelent *) xmalloc (sizeof (arelent)); 2344 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 2345 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2346 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 2347 /* Always pass the addend along! */ 2348 rel->addend = fixp->fx_addnumber; 2349 2350 rel->howto = bfd_reloc_type_lookup (stdoutput, code); 2351 2352 if (rel->howto == NULL) 2353 { 2354 as_bad_where (fixp->fx_file, fixp->fx_line, 2355 _("Cannot represent relocation type %s"), 2356 bfd_get_reloc_code_name (code)); 2357 2358 /* Set howto to a garbage value so that we can keep going. */ 2359 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 2360 assert (rel->howto != NULL); 2361 } 2362 2363 return rel; 2364 } 2365 2366 #ifdef OBJ_ELF 2367 /* See whether we need to force a relocation into the output file. 2368 This is used to force out switch and PC relative relocations when 2369 relaxing. */ 2370 int 2371 mcore_force_relocation (fix) 2372 fixS * fix; 2373 { 2374 if (fix->fx_r_type == BFD_RELOC_RVA) 2375 return 1; 2376 2377 return generic_force_reloc (fix); 2378 } 2379 2380 /* Return true if the fix can be handled by GAS, false if it must 2381 be passed through to the linker. */ 2382 bfd_boolean 2383 mcore_fix_adjustable (fixP) 2384 fixS * fixP; 2385 { 2386 /* We need the symbol name for the VTABLE entries. */ 2387 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 2388 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 2389 return 0; 2390 2391 return 1; 2392 } 2393 #endif /* OBJ_ELF */ 2394