1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 3 2003, 2004 Free Software Foundation, Inc. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to 19 the Free Software Foundation, 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22 /* Written By Steve Chamberlain <sac@cygnus.com> */ 23 24 #include <stdio.h> 25 #include "as.h" 26 #include "bfd.h" 27 #include "subsegs.h" 28 #define DEFINE_TABLE 29 #include "opcodes/sh-opc.h" 30 #include "safe-ctype.h" 31 #include "struc-symbol.h" 32 33 #ifdef OBJ_ELF 34 #include "elf/sh.h" 35 #endif 36 37 #include "dwarf2dbg.h" 38 #include "dw2gencfi.h" 39 40 typedef struct 41 { 42 sh_arg_type type; 43 int reg; 44 expressionS immediate; 45 } 46 sh_operand_info; 47 48 const char comment_chars[] = "!"; 49 const char line_separator_chars[] = ";"; 50 const char line_comment_chars[] = "!#"; 51 52 static void s_uses (int); 53 static void s_uacons (int); 54 55 #ifdef OBJ_ELF 56 static void sh_elf_cons (int); 57 58 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 59 #endif 60 61 static void 62 big (int ignore ATTRIBUTE_UNUSED) 63 { 64 if (! target_big_endian) 65 as_bad (_("directive .big encountered when option -big required")); 66 67 /* Stop further messages. */ 68 target_big_endian = 1; 69 } 70 71 static void 72 little (int ignore ATTRIBUTE_UNUSED) 73 { 74 if (target_big_endian) 75 as_bad (_("directive .little encountered when option -little required")); 76 77 /* Stop further messages. */ 78 target_big_endian = 0; 79 } 80 81 /* This table describes all the machine specific pseudo-ops the assembler 82 has to support. The fields are: 83 pseudo-op name without dot 84 function to call to execute this pseudo-op 85 Integer arg to pass to the function. */ 86 87 const pseudo_typeS md_pseudo_table[] = 88 { 89 #ifdef OBJ_ELF 90 {"long", sh_elf_cons, 4}, 91 {"int", sh_elf_cons, 4}, 92 {"word", sh_elf_cons, 2}, 93 {"short", sh_elf_cons, 2}, 94 #else 95 {"int", cons, 4}, 96 {"word", cons, 2}, 97 #endif /* OBJ_ELF */ 98 {"big", big, 0}, 99 {"form", listing_psize, 0}, 100 {"little", little, 0}, 101 {"heading", listing_title, 0}, 102 {"import", s_ignore, 0}, 103 {"page", listing_eject, 0}, 104 {"program", s_ignore, 0}, 105 {"uses", s_uses, 0}, 106 {"uaword", s_uacons, 2}, 107 {"ualong", s_uacons, 4}, 108 {"uaquad", s_uacons, 8}, 109 {"2byte", s_uacons, 2}, 110 {"4byte", s_uacons, 4}, 111 {"8byte", s_uacons, 8}, 112 #ifdef HAVE_SH64 113 {"mode", s_sh64_mode, 0 }, 114 115 /* Have the old name too. */ 116 {"isa", s_sh64_mode, 0 }, 117 118 /* Assert that the right ABI is used. */ 119 {"abi", s_sh64_abi, 0 }, 120 121 { "vtable_inherit", sh64_vtable_inherit, 0 }, 122 { "vtable_entry", sh64_vtable_entry, 0 }, 123 #endif /* HAVE_SH64 */ 124 {0, 0, 0} 125 }; 126 127 /*int md_reloc_size; */ 128 129 int sh_relax; /* set if -relax seen */ 130 131 /* Whether -small was seen. */ 132 133 int sh_small; 134 135 /* Flag to generate relocations against symbol values for local symbols. */ 136 137 static int dont_adjust_reloc_32; 138 139 /* preset architecture set, if given; zero otherwise. */ 140 141 static int preset_target_arch; 142 143 /* The bit mask of architectures that could 144 accommodate the insns seen so far. */ 145 static int valid_arch; 146 147 const char EXP_CHARS[] = "eE"; 148 149 /* Chars that mean this number is a floating point constant. */ 150 /* As in 0f12.456 */ 151 /* or 0d1.2345e12 */ 152 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 153 154 #define C(a,b) ENCODE_RELAX(a,b) 155 156 #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 157 #define GET_WHAT(x) ((x>>4)) 158 159 /* These are the three types of relaxable instruction. */ 160 /* These are the types of relaxable instructions; except for END which is 161 a marker. */ 162 #define COND_JUMP 1 163 #define COND_JUMP_DELAY 2 164 #define UNCOND_JUMP 3 165 166 #ifdef HAVE_SH64 167 168 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ 169 #define SH64PCREL16_32 4 170 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ 171 #define SH64PCREL16_64 5 172 173 /* Variants of the above for adjusting the insn to PTA or PTB according to 174 the label. */ 175 #define SH64PCREL16PT_32 6 176 #define SH64PCREL16PT_64 7 177 178 /* A MOVI expansion, expanding to at most 32 or 64 bits. */ 179 #define MOVI_IMM_32 8 180 #define MOVI_IMM_32_PCREL 9 181 #define MOVI_IMM_64 10 182 #define MOVI_IMM_64_PCREL 11 183 #define END 12 184 185 #else /* HAVE_SH64 */ 186 187 #define END 4 188 189 #endif /* HAVE_SH64 */ 190 191 #define UNDEF_DISP 0 192 #define COND8 1 193 #define COND12 2 194 #define COND32 3 195 #define UNDEF_WORD_DISP 4 196 197 #define UNCOND12 1 198 #define UNCOND32 2 199 200 #ifdef HAVE_SH64 201 #define UNDEF_SH64PCREL 0 202 #define SH64PCREL16 1 203 #define SH64PCREL32 2 204 #define SH64PCREL48 3 205 #define SH64PCREL64 4 206 #define SH64PCRELPLT 5 207 208 #define UNDEF_MOVI 0 209 #define MOVI_16 1 210 #define MOVI_32 2 211 #define MOVI_48 3 212 #define MOVI_64 4 213 #define MOVI_PLT 5 214 #define MOVI_GOTOFF 6 215 #define MOVI_GOTPC 7 216 #endif /* HAVE_SH64 */ 217 218 /* Branch displacements are from the address of the branch plus 219 four, thus all minimum and maximum values have 4 added to them. */ 220 #define COND8_F 258 221 #define COND8_M -252 222 #define COND8_LENGTH 2 223 224 /* There is one extra instruction before the branch, so we must add 225 two more bytes to account for it. */ 226 #define COND12_F 4100 227 #define COND12_M -4090 228 #define COND12_LENGTH 6 229 230 #define COND12_DELAY_LENGTH 4 231 232 /* ??? The minimum and maximum values are wrong, but this does not matter 233 since this relocation type is not supported yet. */ 234 #define COND32_F (1<<30) 235 #define COND32_M -(1<<30) 236 #define COND32_LENGTH 14 237 238 #define UNCOND12_F 4098 239 #define UNCOND12_M -4092 240 #define UNCOND12_LENGTH 2 241 242 /* ??? The minimum and maximum values are wrong, but this does not matter 243 since this relocation type is not supported yet. */ 244 #define UNCOND32_F (1<<30) 245 #define UNCOND32_M -(1<<30) 246 #define UNCOND32_LENGTH 14 247 248 #ifdef HAVE_SH64 249 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, 250 TRd" as is the current insn, so no extra length. Note that the "reach" 251 is calculated from the address *after* that insn, but the offset in the 252 insn is calculated from the beginning of the insn. We also need to 253 take into account the implicit 1 coded as the "A" in PTA when counting 254 forward. If PTB reaches an odd address, we trap that as an error 255 elsewhere, so we don't have to have different relaxation entries. We 256 don't add a one to the negative range, since PTB would then have the 257 farthest backward-reaching value skipped, not generated at relaxation. */ 258 #define SH64PCREL16_F (32767 * 4 - 4 + 1) 259 #define SH64PCREL16_M (-32768 * 4 - 4) 260 #define SH64PCREL16_LENGTH 0 261 262 /* The next step is to change that PT insn into 263 MOVI ((label - datalabel Ln) >> 16) & 65535, R25 264 SHORI (label - datalabel Ln) & 65535, R25 265 Ln: 266 PTREL R25,TRd 267 which means two extra insns, 8 extra bytes. This is the limit for the 268 32-bit ABI. 269 270 The expressions look a bit bad since we have to adjust this to avoid overflow on a 271 32-bit host. */ 272 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 273 #define SH64PCREL32_LENGTH (2 * 4) 274 275 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit 276 expansion. */ 277 #if BFD_HOST_64BIT_LONG 278 /* The "reach" type is long, so we can only do this for a 64-bit-long 279 host. */ 280 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) 281 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) 282 #define SH64PCREL48_M (((long) -1 << 47) - 4) 283 #define SH64PCREL48_LENGTH (3 * 4) 284 #else 285 /* If the host does not have 64-bit longs, just make this state identical 286 in reach to the 32-bit state. Note that we have a slightly incorrect 287 reach, but the correct one above will overflow a 32-bit number. */ 288 #define SH64PCREL32_M (((long) -1 << 30) * 2) 289 #define SH64PCREL48_F SH64PCREL32_F 290 #define SH64PCREL48_M SH64PCREL32_M 291 #define SH64PCREL48_LENGTH (3 * 4) 292 #endif /* BFD_HOST_64BIT_LONG */ 293 294 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI 295 + PTREL sequence. */ 296 #define SH64PCREL64_LENGTH (4 * 4) 297 298 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the 299 SH64PCREL expansions. The PCREL one is similar, but the other has no 300 pc-relative reach; it must be fully expanded in 301 shmedia_md_estimate_size_before_relax. */ 302 #define MOVI_16_LENGTH 0 303 #define MOVI_16_F (32767 - 4) 304 #define MOVI_16_M (-32768 - 4) 305 #define MOVI_32_LENGTH 4 306 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 307 #define MOVI_48_LENGTH 8 308 309 #if BFD_HOST_64BIT_LONG 310 /* The "reach" type is long, so we can only do this for a 64-bit-long 311 host. */ 312 #define MOVI_32_M (((long) -1 << 30) * 2 - 4) 313 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) 314 #define MOVI_48_M (((long) -1 << 47) - 4) 315 #else 316 /* If the host does not have 64-bit longs, just make this state identical 317 in reach to the 32-bit state. Note that we have a slightly incorrect 318 reach, but the correct one above will overflow a 32-bit number. */ 319 #define MOVI_32_M (((long) -1 << 30) * 2) 320 #define MOVI_48_F MOVI_32_F 321 #define MOVI_48_M MOVI_32_M 322 #endif /* BFD_HOST_64BIT_LONG */ 323 324 #define MOVI_64_LENGTH 12 325 #endif /* HAVE_SH64 */ 326 327 #define EMPTY { 0, 0, 0, 0 } 328 329 const relax_typeS md_relax_table[C (END, 0)] = { 330 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 331 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 332 333 EMPTY, 334 /* C (COND_JUMP, COND8) */ 335 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 336 /* C (COND_JUMP, COND12) */ 337 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 338 /* C (COND_JUMP, COND32) */ 339 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 340 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 341 { 0, 0, COND32_LENGTH, 0, }, 342 EMPTY, EMPTY, EMPTY, 343 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 344 345 EMPTY, 346 /* C (COND_JUMP_DELAY, COND8) */ 347 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 348 /* C (COND_JUMP_DELAY, COND12) */ 349 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 350 /* C (COND_JUMP_DELAY, COND32) */ 351 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 352 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 353 { 0, 0, COND32_LENGTH, 0, }, 354 EMPTY, EMPTY, EMPTY, 355 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 356 357 EMPTY, 358 /* C (UNCOND_JUMP, UNCOND12) */ 359 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 360 /* C (UNCOND_JUMP, UNCOND32) */ 361 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 362 EMPTY, 363 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 364 { 0, 0, UNCOND32_LENGTH, 0, }, 365 EMPTY, EMPTY, EMPTY, 366 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 367 368 #ifdef HAVE_SH64 369 /* C (SH64PCREL16_32, SH64PCREL16) */ 370 EMPTY, 371 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, 372 /* C (SH64PCREL16_32, SH64PCREL32) */ 373 { 0, 0, SH64PCREL32_LENGTH, 0 }, 374 EMPTY, EMPTY, 375 /* C (SH64PCREL16_32, SH64PCRELPLT) */ 376 { 0, 0, SH64PCREL32_LENGTH, 0 }, 377 EMPTY, EMPTY, 378 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 379 380 /* C (SH64PCREL16_64, SH64PCREL16) */ 381 EMPTY, 382 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, 383 /* C (SH64PCREL16_64, SH64PCREL32) */ 384 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, 385 /* C (SH64PCREL16_64, SH64PCREL48) */ 386 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, 387 /* C (SH64PCREL16_64, SH64PCREL64) */ 388 { 0, 0, SH64PCREL64_LENGTH, 0 }, 389 /* C (SH64PCREL16_64, SH64PCRELPLT) */ 390 { 0, 0, SH64PCREL64_LENGTH, 0 }, 391 EMPTY, EMPTY, 392 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 393 394 /* C (SH64PCREL16PT_32, SH64PCREL16) */ 395 EMPTY, 396 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, 397 /* C (SH64PCREL16PT_32, SH64PCREL32) */ 398 { 0, 0, SH64PCREL32_LENGTH, 0 }, 399 EMPTY, EMPTY, 400 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ 401 { 0, 0, SH64PCREL32_LENGTH, 0 }, 402 EMPTY, EMPTY, 403 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 404 405 /* C (SH64PCREL16PT_64, SH64PCREL16) */ 406 EMPTY, 407 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, 408 /* C (SH64PCREL16PT_64, SH64PCREL32) */ 409 { SH64PCREL32_F, 410 SH64PCREL32_M, 411 SH64PCREL32_LENGTH, 412 C (SH64PCREL16PT_64, SH64PCREL48) }, 413 /* C (SH64PCREL16PT_64, SH64PCREL48) */ 414 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, 415 /* C (SH64PCREL16PT_64, SH64PCREL64) */ 416 { 0, 0, SH64PCREL64_LENGTH, 0 }, 417 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ 418 { 0, 0, SH64PCREL64_LENGTH, 0}, 419 EMPTY, EMPTY, 420 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 421 422 /* C (MOVI_IMM_32, UNDEF_MOVI) */ 423 { 0, 0, MOVI_32_LENGTH, 0 }, 424 /* C (MOVI_IMM_32, MOVI_16) */ 425 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, 426 /* C (MOVI_IMM_32, MOVI_32) */ 427 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, 428 EMPTY, EMPTY, EMPTY, 429 /* C (MOVI_IMM_32, MOVI_GOTOFF) */ 430 { 0, 0, MOVI_32_LENGTH, 0 }, 431 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 432 433 /* C (MOVI_IMM_32_PCREL, MOVI_16) */ 434 EMPTY, 435 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, 436 /* C (MOVI_IMM_32_PCREL, MOVI_32) */ 437 { 0, 0, MOVI_32_LENGTH, 0 }, 438 EMPTY, EMPTY, 439 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ 440 { 0, 0, MOVI_32_LENGTH, 0 }, 441 EMPTY, 442 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ 443 { 0, 0, MOVI_32_LENGTH, 0 }, 444 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 445 446 /* C (MOVI_IMM_64, UNDEF_MOVI) */ 447 { 0, 0, MOVI_64_LENGTH, 0 }, 448 /* C (MOVI_IMM_64, MOVI_16) */ 449 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, 450 /* C (MOVI_IMM_64, MOVI_32) */ 451 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, 452 /* C (MOVI_IMM_64, MOVI_48) */ 453 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, 454 /* C (MOVI_IMM_64, MOVI_64) */ 455 { 0, 0, MOVI_64_LENGTH, 0 }, 456 EMPTY, 457 /* C (MOVI_IMM_64, MOVI_GOTOFF) */ 458 { 0, 0, MOVI_64_LENGTH, 0 }, 459 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 460 461 /* C (MOVI_IMM_64_PCREL, MOVI_16) */ 462 EMPTY, 463 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, 464 /* C (MOVI_IMM_64_PCREL, MOVI_32) */ 465 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, 466 /* C (MOVI_IMM_64_PCREL, MOVI_48) */ 467 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, 468 /* C (MOVI_IMM_64_PCREL, MOVI_64) */ 469 { 0, 0, MOVI_64_LENGTH, 0 }, 470 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ 471 { 0, 0, MOVI_64_LENGTH, 0 }, 472 EMPTY, 473 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ 474 { 0, 0, MOVI_64_LENGTH, 0 }, 475 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 476 477 #endif /* HAVE_SH64 */ 478 479 }; 480 481 #undef EMPTY 482 483 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ 484 485 486 #ifdef OBJ_ELF 487 /* Determinet whether the symbol needs any kind of PIC relocation. */ 488 489 inline static int 490 sh_PIC_related_p (symbolS *sym) 491 { 492 expressionS *exp; 493 494 if (! sym) 495 return 0; 496 497 if (sym == GOT_symbol) 498 return 1; 499 500 #ifdef HAVE_SH64 501 if (sh_PIC_related_p (*symbol_get_tc (sym))) 502 return 1; 503 #endif 504 505 exp = symbol_get_value_expression (sym); 506 507 return (exp->X_op == O_PIC_reloc 508 || sh_PIC_related_p (exp->X_add_symbol) 509 || sh_PIC_related_p (exp->X_op_symbol)); 510 } 511 512 /* Determine the relocation type to be used to represent the 513 expression, that may be rearranged. */ 514 515 static int 516 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 517 { 518 expressionS *exp = main_exp; 519 520 /* This is here for backward-compatibility only. GCC used to generated: 521 522 f@PLT + . - (.LPCS# + 2) 523 524 but we'd rather be able to handle this as a PIC-related reference 525 plus/minus a symbol. However, gas' parser gives us: 526 527 O_subtract (O_add (f@PLT, .), .LPCS#+2) 528 529 so we attempt to transform this into: 530 531 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 532 533 which we can handle simply below. */ 534 if (exp->X_op == O_subtract) 535 { 536 if (sh_PIC_related_p (exp->X_op_symbol)) 537 return 1; 538 539 exp = symbol_get_value_expression (exp->X_add_symbol); 540 541 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 542 return 1; 543 544 if (exp && exp->X_op == O_add 545 && sh_PIC_related_p (exp->X_add_symbol)) 546 { 547 symbolS *sym = exp->X_add_symbol; 548 549 exp->X_op = O_subtract; 550 exp->X_add_symbol = main_exp->X_op_symbol; 551 552 main_exp->X_op_symbol = main_exp->X_add_symbol; 553 main_exp->X_add_symbol = sym; 554 555 main_exp->X_add_number += exp->X_add_number; 556 exp->X_add_number = 0; 557 } 558 559 exp = main_exp; 560 } 561 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 562 return 1; 563 564 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 565 { 566 #ifdef HAVE_SH64 567 if (exp->X_add_symbol 568 && (exp->X_add_symbol == GOT_symbol 569 || (GOT_symbol 570 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) 571 { 572 switch (*r_type_p) 573 { 574 case BFD_RELOC_SH_IMM_LOW16: 575 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; 576 break; 577 578 case BFD_RELOC_SH_IMM_MEDLOW16: 579 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; 580 break; 581 582 case BFD_RELOC_SH_IMM_MEDHI16: 583 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; 584 break; 585 586 case BFD_RELOC_SH_IMM_HI16: 587 *r_type_p = BFD_RELOC_SH_GOTPC_HI16; 588 break; 589 590 case BFD_RELOC_NONE: 591 case BFD_RELOC_UNUSED: 592 *r_type_p = BFD_RELOC_SH_GOTPC; 593 break; 594 595 default: 596 abort (); 597 } 598 return 0; 599 } 600 #else 601 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 602 { 603 *r_type_p = BFD_RELOC_SH_GOTPC; 604 return 0; 605 } 606 #endif 607 exp = symbol_get_value_expression (exp->X_add_symbol); 608 if (! exp) 609 return 0; 610 } 611 612 if (exp->X_op == O_PIC_reloc) 613 { 614 #ifdef HAVE_SH64 615 switch (*r_type_p) 616 { 617 case BFD_RELOC_NONE: 618 case BFD_RELOC_UNUSED: 619 *r_type_p = exp->X_md; 620 break; 621 622 case BFD_RELOC_SH_IMM_LOW16: 623 switch (exp->X_md) 624 { 625 case BFD_RELOC_32_GOTOFF: 626 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; 627 break; 628 629 case BFD_RELOC_SH_GOTPLT32: 630 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; 631 break; 632 633 case BFD_RELOC_32_GOT_PCREL: 634 *r_type_p = BFD_RELOC_SH_GOT_LOW16; 635 break; 636 637 case BFD_RELOC_32_PLT_PCREL: 638 *r_type_p = BFD_RELOC_SH_PLT_LOW16; 639 break; 640 641 default: 642 abort (); 643 } 644 break; 645 646 case BFD_RELOC_SH_IMM_MEDLOW16: 647 switch (exp->X_md) 648 { 649 case BFD_RELOC_32_GOTOFF: 650 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; 651 break; 652 653 case BFD_RELOC_SH_GOTPLT32: 654 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; 655 break; 656 657 case BFD_RELOC_32_GOT_PCREL: 658 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; 659 break; 660 661 case BFD_RELOC_32_PLT_PCREL: 662 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; 663 break; 664 665 default: 666 abort (); 667 } 668 break; 669 670 case BFD_RELOC_SH_IMM_MEDHI16: 671 switch (exp->X_md) 672 { 673 case BFD_RELOC_32_GOTOFF: 674 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; 675 break; 676 677 case BFD_RELOC_SH_GOTPLT32: 678 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; 679 break; 680 681 case BFD_RELOC_32_GOT_PCREL: 682 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; 683 break; 684 685 case BFD_RELOC_32_PLT_PCREL: 686 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; 687 break; 688 689 default: 690 abort (); 691 } 692 break; 693 694 case BFD_RELOC_SH_IMM_HI16: 695 switch (exp->X_md) 696 { 697 case BFD_RELOC_32_GOTOFF: 698 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; 699 break; 700 701 case BFD_RELOC_SH_GOTPLT32: 702 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; 703 break; 704 705 case BFD_RELOC_32_GOT_PCREL: 706 *r_type_p = BFD_RELOC_SH_GOT_HI16; 707 break; 708 709 case BFD_RELOC_32_PLT_PCREL: 710 *r_type_p = BFD_RELOC_SH_PLT_HI16; 711 break; 712 713 default: 714 abort (); 715 } 716 break; 717 718 default: 719 abort (); 720 } 721 #else 722 *r_type_p = exp->X_md; 723 #endif 724 if (exp == main_exp) 725 exp->X_op = O_symbol; 726 else 727 { 728 main_exp->X_add_symbol = exp->X_add_symbol; 729 main_exp->X_add_number += exp->X_add_number; 730 } 731 } 732 else 733 return (sh_PIC_related_p (exp->X_add_symbol) 734 || sh_PIC_related_p (exp->X_op_symbol)); 735 736 return 0; 737 } 738 739 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 740 741 void 742 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) 743 { 744 bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; 745 746 if (sh_check_fixup (exp, &r_type)) 747 as_bad (_("Invalid PIC expression.")); 748 749 if (r_type == BFD_RELOC_UNUSED) 750 switch (size) 751 { 752 case 1: 753 r_type = BFD_RELOC_8; 754 break; 755 756 case 2: 757 r_type = BFD_RELOC_16; 758 break; 759 760 case 4: 761 r_type = BFD_RELOC_32; 762 break; 763 764 #ifdef HAVE_SH64 765 case 8: 766 r_type = BFD_RELOC_64; 767 break; 768 #endif 769 770 default: 771 goto error; 772 } 773 else if (size != 4) 774 { 775 error: 776 as_bad (_("unsupported BFD relocation size %u"), size); 777 r_type = BFD_RELOC_UNUSED; 778 } 779 780 fix_new_exp (frag, off, size, exp, 0, r_type); 781 } 782 783 /* The regular cons() function, that reads constants, doesn't support 784 suffixes such as @GOT, @GOTOFF and @PLT, that generate 785 machine-specific relocation types. So we must define it here. */ 786 /* Clobbers input_line_pointer, checks end-of-line. */ 787 /* NBYTES 1=.byte, 2=.word, 4=.long */ 788 static void 789 sh_elf_cons (register int nbytes) 790 { 791 expressionS exp; 792 793 #ifdef HAVE_SH64 794 795 /* Update existing range to include a previous insn, if there was one. */ 796 sh64_update_contents_mark (TRUE); 797 798 /* We need to make sure the contents type is set to data. */ 799 sh64_flag_output (); 800 801 #endif /* HAVE_SH64 */ 802 803 if (is_it_end_of_statement ()) 804 { 805 demand_empty_rest_of_line (); 806 return; 807 } 808 809 #ifdef md_cons_align 810 md_cons_align (nbytes); 811 #endif 812 813 do 814 { 815 expression (&exp); 816 emit_expr (&exp, (unsigned int) nbytes); 817 } 818 while (*input_line_pointer++ == ','); 819 820 input_line_pointer--; /* Put terminator back into stream. */ 821 if (*input_line_pointer == '#' || *input_line_pointer == '!') 822 { 823 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 824 } 825 else 826 demand_empty_rest_of_line (); 827 } 828 #endif /* OBJ_ELF */ 829 830 831 /* This function is called once, at assembler startup time. This should 832 set up all the tables, etc that the MD part of the assembler needs. */ 833 834 void 835 md_begin (void) 836 { 837 const sh_opcode_info *opcode; 838 char *prev_name = ""; 839 int target_arch; 840 841 target_arch 842 = preset_target_arch ? preset_target_arch : arch_sh1_up & ~arch_sh_dsp_up; 843 valid_arch = target_arch; 844 845 #ifdef HAVE_SH64 846 shmedia_md_begin (); 847 #endif 848 849 opcode_hash_control = hash_new (); 850 851 /* Insert unique names into hash table. */ 852 for (opcode = sh_table; opcode->name; opcode++) 853 { 854 if (strcmp (prev_name, opcode->name) != 0) 855 { 856 if (! (opcode->arch & target_arch)) 857 continue; 858 prev_name = opcode->name; 859 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 860 } 861 } 862 } 863 864 static int reg_m; 865 static int reg_n; 866 static int reg_x, reg_y; 867 static int reg_efg; 868 static int reg_b; 869 870 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 871 872 /* Try to parse a reg name. Return the number of chars consumed. */ 873 874 static int 875 parse_reg (char *src, int *mode, int *reg) 876 { 877 char l0 = TOLOWER (src[0]); 878 char l1 = l0 ? TOLOWER (src[1]) : 0; 879 880 /* We use ! IDENT_CHAR for the next character after the register name, to 881 make sure that we won't accidentally recognize a symbol name such as 882 'sram' or sr_ram as being a reference to the register 'sr'. */ 883 884 if (l0 == 'r') 885 { 886 if (l1 == '1') 887 { 888 if (src[2] >= '0' && src[2] <= '5' 889 && ! IDENT_CHAR ((unsigned char) src[3])) 890 { 891 *mode = A_REG_N; 892 *reg = 10 + src[2] - '0'; 893 return 3; 894 } 895 } 896 if (l1 >= '0' && l1 <= '9' 897 && ! IDENT_CHAR ((unsigned char) src[2])) 898 { 899 *mode = A_REG_N; 900 *reg = (l1 - '0'); 901 return 2; 902 } 903 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 904 && ! IDENT_CHAR ((unsigned char) src[7])) 905 { 906 *mode = A_REG_B; 907 *reg = (l1 - '0'); 908 return 7; 909 } 910 911 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 912 { 913 *mode = A_RE; 914 return 2; 915 } 916 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 917 { 918 *mode = A_RS; 919 return 2; 920 } 921 } 922 923 if (l0 == 'a') 924 { 925 if (l1 == '0') 926 { 927 if (! IDENT_CHAR ((unsigned char) src[2])) 928 { 929 *mode = DSP_REG_N; 930 *reg = A_A0_NUM; 931 return 2; 932 } 933 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 934 { 935 *mode = DSP_REG_N; 936 *reg = A_A0G_NUM; 937 return 3; 938 } 939 } 940 if (l1 == '1') 941 { 942 if (! IDENT_CHAR ((unsigned char) src[2])) 943 { 944 *mode = DSP_REG_N; 945 *reg = A_A1_NUM; 946 return 2; 947 } 948 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 949 { 950 *mode = DSP_REG_N; 951 *reg = A_A1G_NUM; 952 return 3; 953 } 954 } 955 956 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 957 && ! IDENT_CHAR ((unsigned char) src[3])) 958 { 959 *mode = A_REG_N; 960 *reg = 4 + (l1 - '0'); 961 return 3; 962 } 963 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 964 && ! IDENT_CHAR ((unsigned char) src[3])) 965 { 966 *mode = A_REG_N; 967 *reg = 6 + (l1 - '0'); 968 return 3; 969 } 970 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 971 && ! IDENT_CHAR ((unsigned char) src[3])) 972 { 973 int n = l1 - '0'; 974 975 *mode = A_REG_N; 976 *reg = n | ((~n & 2) << 1); 977 return 3; 978 } 979 } 980 981 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 982 { 983 if (l1 == 's') 984 { 985 *mode = A_REG_N; 986 *reg = 8; 987 return 2; 988 } 989 if (l1 == 'x') 990 { 991 *mode = A_REG_N; 992 *reg = 8; 993 return 2; 994 } 995 if (l1 == 'y') 996 { 997 *mode = A_REG_N; 998 *reg = 9; 999 return 2; 1000 } 1001 } 1002 1003 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 1004 && ! IDENT_CHAR ((unsigned char) src[2])) 1005 { 1006 *mode = DSP_REG_N; 1007 *reg = A_X0_NUM + l1 - '0'; 1008 return 2; 1009 } 1010 1011 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 1012 && ! IDENT_CHAR ((unsigned char) src[2])) 1013 { 1014 *mode = DSP_REG_N; 1015 *reg = A_Y0_NUM + l1 - '0'; 1016 return 2; 1017 } 1018 1019 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 1020 && ! IDENT_CHAR ((unsigned char) src[2])) 1021 { 1022 *mode = DSP_REG_N; 1023 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 1024 return 2; 1025 } 1026 1027 if (l0 == 's' 1028 && l1 == 's' 1029 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 1030 { 1031 *mode = A_SSR; 1032 return 3; 1033 } 1034 1035 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 1036 && ! IDENT_CHAR ((unsigned char) src[3])) 1037 { 1038 *mode = A_SPC; 1039 return 3; 1040 } 1041 1042 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 1043 && ! IDENT_CHAR ((unsigned char) src[3])) 1044 { 1045 *mode = A_SGR; 1046 return 3; 1047 } 1048 1049 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 1050 && ! IDENT_CHAR ((unsigned char) src[3])) 1051 { 1052 *mode = A_DSR; 1053 return 3; 1054 } 1055 1056 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1057 && ! IDENT_CHAR ((unsigned char) src[3])) 1058 { 1059 *mode = A_DBR; 1060 return 3; 1061 } 1062 1063 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1064 { 1065 *mode = A_SR; 1066 return 2; 1067 } 1068 1069 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 1070 { 1071 *mode = A_REG_N; 1072 *reg = 15; 1073 return 2; 1074 } 1075 1076 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1077 { 1078 *mode = A_PR; 1079 return 2; 1080 } 1081 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 1082 { 1083 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 1084 and use an uninitialized immediate. */ 1085 *mode = A_PC; 1086 return 2; 1087 } 1088 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1089 && ! IDENT_CHAR ((unsigned char) src[3])) 1090 { 1091 *mode = A_GBR; 1092 return 3; 1093 } 1094 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1095 && ! IDENT_CHAR ((unsigned char) src[3])) 1096 { 1097 *mode = A_VBR; 1098 return 3; 1099 } 1100 1101 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 1102 && ! IDENT_CHAR ((unsigned char) src[4])) 1103 { 1104 if (TOLOWER (src[3]) == 'l') 1105 { 1106 *mode = A_MACL; 1107 return 4; 1108 } 1109 if (TOLOWER (src[3]) == 'h') 1110 { 1111 *mode = A_MACH; 1112 return 4; 1113 } 1114 } 1115 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 1116 && ! IDENT_CHAR ((unsigned char) src[3])) 1117 { 1118 *mode = A_MOD; 1119 return 3; 1120 } 1121 if (l0 == 'f' && l1 == 'r') 1122 { 1123 if (src[2] == '1') 1124 { 1125 if (src[3] >= '0' && src[3] <= '5' 1126 && ! IDENT_CHAR ((unsigned char) src[4])) 1127 { 1128 *mode = F_REG_N; 1129 *reg = 10 + src[3] - '0'; 1130 return 4; 1131 } 1132 } 1133 if (src[2] >= '0' && src[2] <= '9' 1134 && ! IDENT_CHAR ((unsigned char) src[3])) 1135 { 1136 *mode = F_REG_N; 1137 *reg = (src[2] - '0'); 1138 return 3; 1139 } 1140 } 1141 if (l0 == 'd' && l1 == 'r') 1142 { 1143 if (src[2] == '1') 1144 { 1145 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1146 && ! IDENT_CHAR ((unsigned char) src[4])) 1147 { 1148 *mode = D_REG_N; 1149 *reg = 10 + src[3] - '0'; 1150 return 4; 1151 } 1152 } 1153 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1154 && ! IDENT_CHAR ((unsigned char) src[3])) 1155 { 1156 *mode = D_REG_N; 1157 *reg = (src[2] - '0'); 1158 return 3; 1159 } 1160 } 1161 if (l0 == 'x' && l1 == 'd') 1162 { 1163 if (src[2] == '1') 1164 { 1165 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1166 && ! IDENT_CHAR ((unsigned char) src[4])) 1167 { 1168 *mode = X_REG_N; 1169 *reg = 11 + src[3] - '0'; 1170 return 4; 1171 } 1172 } 1173 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1174 && ! IDENT_CHAR ((unsigned char) src[3])) 1175 { 1176 *mode = X_REG_N; 1177 *reg = (src[2] - '0') + 1; 1178 return 3; 1179 } 1180 } 1181 if (l0 == 'f' && l1 == 'v') 1182 { 1183 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 1184 { 1185 *mode = V_REG_N; 1186 *reg = 12; 1187 return 4; 1188 } 1189 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 1190 && ! IDENT_CHAR ((unsigned char) src[3])) 1191 { 1192 *mode = V_REG_N; 1193 *reg = (src[2] - '0'); 1194 return 3; 1195 } 1196 } 1197 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 1198 && TOLOWER (src[3]) == 'l' 1199 && ! IDENT_CHAR ((unsigned char) src[4])) 1200 { 1201 *mode = FPUL_N; 1202 return 4; 1203 } 1204 1205 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 1206 && TOLOWER (src[3]) == 'c' 1207 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 1208 { 1209 *mode = FPSCR_N; 1210 return 5; 1211 } 1212 1213 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 1214 && TOLOWER (src[3]) == 'r' 1215 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 1216 { 1217 *mode = XMTRX_M4; 1218 return 5; 1219 } 1220 1221 return 0; 1222 } 1223 1224 static char * 1225 parse_exp (char *s, sh_operand_info *op) 1226 { 1227 char *save; 1228 char *new; 1229 1230 save = input_line_pointer; 1231 input_line_pointer = s; 1232 expression (&op->immediate); 1233 if (op->immediate.X_op == O_absent) 1234 as_bad (_("missing operand")); 1235 #ifdef OBJ_ELF 1236 else if (op->immediate.X_op == O_PIC_reloc 1237 || sh_PIC_related_p (op->immediate.X_add_symbol) 1238 || sh_PIC_related_p (op->immediate.X_op_symbol)) 1239 as_bad (_("misplaced PIC operand")); 1240 #endif 1241 new = input_line_pointer; 1242 input_line_pointer = save; 1243 return new; 1244 } 1245 1246 /* The many forms of operand: 1247 1248 Rn Register direct 1249 @Rn Register indirect 1250 @Rn+ Autoincrement 1251 @-Rn Autodecrement 1252 @(disp:4,Rn) 1253 @(disp:8,GBR) 1254 @(disp:8,PC) 1255 1256 @(R0,Rn) 1257 @(R0,GBR) 1258 1259 disp:8 1260 disp:12 1261 #imm8 1262 pr, gbr, vbr, macl, mach 1263 */ 1264 1265 static char * 1266 parse_at (char *src, sh_operand_info *op) 1267 { 1268 int len; 1269 int mode; 1270 src++; 1271 if (src[0] == '-') 1272 { 1273 /* Must be predecrement. */ 1274 src++; 1275 1276 len = parse_reg (src, &mode, &(op->reg)); 1277 if (mode != A_REG_N) 1278 as_bad (_("illegal register after @-")); 1279 1280 op->type = A_DEC_N; 1281 src += len; 1282 } 1283 else if (src[0] == '(') 1284 { 1285 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1286 @(r0, rn). */ 1287 src++; 1288 len = parse_reg (src, &mode, &(op->reg)); 1289 if (len && mode == A_REG_N) 1290 { 1291 src += len; 1292 if (op->reg != 0) 1293 { 1294 as_bad (_("must be @(r0,...)")); 1295 } 1296 if (src[0] == ',') 1297 { 1298 src++; 1299 /* Now can be rn or gbr. */ 1300 len = parse_reg (src, &mode, &(op->reg)); 1301 } 1302 else 1303 { 1304 len = 0; 1305 } 1306 if (len) 1307 { 1308 if (mode == A_GBR) 1309 { 1310 op->type = A_R0_GBR; 1311 } 1312 else if (mode == A_REG_N) 1313 { 1314 op->type = A_IND_R0_REG_N; 1315 } 1316 else 1317 { 1318 as_bad (_("syntax error in @(r0,...)")); 1319 } 1320 } 1321 else 1322 { 1323 as_bad (_("syntax error in @(r0...)")); 1324 } 1325 } 1326 else 1327 { 1328 /* Must be an @(disp,.. thing). */ 1329 src = parse_exp (src, op); 1330 if (src[0] == ',') 1331 src++; 1332 /* Now can be rn, gbr or pc. */ 1333 len = parse_reg (src, &mode, &op->reg); 1334 if (len) 1335 { 1336 if (mode == A_REG_N) 1337 { 1338 op->type = A_DISP_REG_N; 1339 } 1340 else if (mode == A_GBR) 1341 { 1342 op->type = A_DISP_GBR; 1343 } 1344 else if (mode == A_PC) 1345 { 1346 /* We want @(expr, pc) to uniformly address . + expr, 1347 no matter if expr is a constant, or a more complex 1348 expression, e.g. sym-. or sym1-sym2. 1349 However, we also used to accept @(sym,pc) 1350 as addressing sym, i.e. meaning the same as plain sym. 1351 Some existing code does use the @(sym,pc) syntax, so 1352 we give it the old semantics for now, but warn about 1353 its use, so that users have some time to fix their code. 1354 1355 Note that due to this backward compatibility hack, 1356 we'll get unexpected results when @(offset, pc) is used, 1357 and offset is a symbol that is set later to an an address 1358 difference, or an external symbol that is set to an 1359 address difference in another source file, so we want to 1360 eventually remove it. */ 1361 if (op->immediate.X_op == O_symbol) 1362 { 1363 op->type = A_DISP_PC; 1364 as_warn (_("Deprecated syntax.")); 1365 } 1366 else 1367 { 1368 op->type = A_DISP_PC_ABS; 1369 /* Such operands don't get corrected for PC==.+4, so 1370 make the correction here. */ 1371 op->immediate.X_add_number -= 4; 1372 } 1373 } 1374 else 1375 { 1376 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1377 } 1378 } 1379 else 1380 { 1381 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1382 } 1383 } 1384 src += len; 1385 if (src[0] != ')') 1386 as_bad (_("expecting )")); 1387 else 1388 src++; 1389 } 1390 else 1391 { 1392 src += parse_reg (src, &mode, &(op->reg)); 1393 if (mode != A_REG_N) 1394 as_bad (_("illegal register after @")); 1395 1396 if (src[0] == '+') 1397 { 1398 char l0, l1; 1399 1400 src++; 1401 l0 = TOLOWER (src[0]); 1402 l1 = TOLOWER (src[1]); 1403 1404 if ((l0 == 'r' && l1 == '8') 1405 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1406 { 1407 src += 2; 1408 op->type = AX_PMOD_N; 1409 } 1410 else if ( (l0 == 'r' && l1 == '9') 1411 || (l0 == 'i' && l1 == 'y')) 1412 { 1413 src += 2; 1414 op->type = AY_PMOD_N; 1415 } 1416 else 1417 op->type = A_INC_N; 1418 } 1419 else 1420 op->type = A_IND_N; 1421 } 1422 return src; 1423 } 1424 1425 static void 1426 get_operand (char **ptr, sh_operand_info *op) 1427 { 1428 char *src = *ptr; 1429 int mode = -1; 1430 unsigned int len; 1431 1432 if (src[0] == '#') 1433 { 1434 src++; 1435 *ptr = parse_exp (src, op); 1436 op->type = A_IMM; 1437 return; 1438 } 1439 1440 else if (src[0] == '@') 1441 { 1442 *ptr = parse_at (src, op); 1443 return; 1444 } 1445 len = parse_reg (src, &mode, &(op->reg)); 1446 if (len) 1447 { 1448 *ptr = src + len; 1449 op->type = mode; 1450 return; 1451 } 1452 else 1453 { 1454 /* Not a reg, the only thing left is a displacement. */ 1455 *ptr = parse_exp (src, op); 1456 op->type = A_DISP_PC; 1457 return; 1458 } 1459 } 1460 1461 static char * 1462 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1463 { 1464 char *ptr = args; 1465 if (info->arg[0]) 1466 { 1467 /* The pre-processor will eliminate whitespace in front of '@' 1468 after the first argument; we may be called multiple times 1469 from assemble_ppi, so don't insist on finding whitespace here. */ 1470 if (*ptr == ' ') 1471 ptr++; 1472 1473 get_operand (&ptr, operand + 0); 1474 if (info->arg[1]) 1475 { 1476 if (*ptr == ',') 1477 { 1478 ptr++; 1479 } 1480 get_operand (&ptr, operand + 1); 1481 /* ??? Hack: psha/pshl have a varying operand number depending on 1482 the type of the first operand. We handle this by having the 1483 three-operand version first and reducing the number of operands 1484 parsed to two if we see that the first operand is an immediate. 1485 This works because no insn with three operands has an immediate 1486 as first operand. */ 1487 if (info->arg[2] && operand[0].type != A_IMM) 1488 { 1489 if (*ptr == ',') 1490 { 1491 ptr++; 1492 } 1493 get_operand (&ptr, operand + 2); 1494 } 1495 else 1496 { 1497 operand[2].type = 0; 1498 } 1499 } 1500 else 1501 { 1502 operand[1].type = 0; 1503 operand[2].type = 0; 1504 } 1505 } 1506 else 1507 { 1508 operand[0].type = 0; 1509 operand[1].type = 0; 1510 operand[2].type = 0; 1511 } 1512 return ptr; 1513 } 1514 1515 /* Passed a pointer to a list of opcodes which use different 1516 addressing modes, return the opcode which matches the opcodes 1517 provided. */ 1518 1519 static sh_opcode_info * 1520 get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1521 { 1522 sh_opcode_info *this_try = opcode; 1523 char *name = opcode->name; 1524 int n = 0; 1525 1526 while (opcode->name) 1527 { 1528 this_try = opcode++; 1529 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1530 { 1531 /* We've looked so far down the table that we've run out of 1532 opcodes with the same name. */ 1533 return 0; 1534 } 1535 1536 /* Look at both operands needed by the opcodes and provided by 1537 the user - since an arg test will often fail on the same arg 1538 again and again, we'll try and test the last failing arg the 1539 first on each opcode try. */ 1540 for (n = 0; this_try->arg[n]; n++) 1541 { 1542 sh_operand_info *user = operands + n; 1543 sh_arg_type arg = this_try->arg[n]; 1544 1545 switch (arg) 1546 { 1547 case A_DISP_PC: 1548 if (user->type == A_DISP_PC_ABS) 1549 break; 1550 /* Fall through. */ 1551 case A_IMM: 1552 case A_BDISP12: 1553 case A_BDISP8: 1554 case A_DISP_GBR: 1555 case A_MACH: 1556 case A_PR: 1557 case A_MACL: 1558 if (user->type != arg) 1559 goto fail; 1560 break; 1561 case A_R0: 1562 /* opcode needs r0 */ 1563 if (user->type != A_REG_N || user->reg != 0) 1564 goto fail; 1565 break; 1566 case A_R0_GBR: 1567 if (user->type != A_R0_GBR || user->reg != 0) 1568 goto fail; 1569 break; 1570 case F_FR0: 1571 if (user->type != F_REG_N || user->reg != 0) 1572 goto fail; 1573 break; 1574 1575 case A_REG_N: 1576 case A_INC_N: 1577 case A_DEC_N: 1578 case A_IND_N: 1579 case A_IND_R0_REG_N: 1580 case A_DISP_REG_N: 1581 case F_REG_N: 1582 case D_REG_N: 1583 case X_REG_N: 1584 case V_REG_N: 1585 case FPUL_N: 1586 case FPSCR_N: 1587 case DSP_REG_N: 1588 /* Opcode needs rn */ 1589 if (user->type != arg) 1590 goto fail; 1591 reg_n = user->reg; 1592 break; 1593 case DX_REG_N: 1594 if (user->type != D_REG_N && user->type != X_REG_N) 1595 goto fail; 1596 reg_n = user->reg; 1597 break; 1598 case A_GBR: 1599 case A_SR: 1600 case A_VBR: 1601 case A_DSR: 1602 case A_MOD: 1603 case A_RE: 1604 case A_RS: 1605 case A_SSR: 1606 case A_SPC: 1607 case A_SGR: 1608 case A_DBR: 1609 if (user->type != arg) 1610 goto fail; 1611 break; 1612 1613 case A_REG_B: 1614 if (user->type != arg) 1615 goto fail; 1616 reg_b = user->reg; 1617 break; 1618 1619 case A_REG_M: 1620 case A_INC_M: 1621 case A_DEC_M: 1622 case A_IND_M: 1623 case A_IND_R0_REG_M: 1624 case A_DISP_REG_M: 1625 case DSP_REG_M: 1626 /* Opcode needs rn */ 1627 if (user->type != arg - A_REG_M + A_REG_N) 1628 goto fail; 1629 reg_m = user->reg; 1630 break; 1631 1632 case AS_DEC_N: 1633 if (user->type != A_DEC_N) 1634 goto fail; 1635 if (user->reg < 2 || user->reg > 5) 1636 goto fail; 1637 reg_n = user->reg; 1638 break; 1639 1640 case AS_INC_N: 1641 if (user->type != A_INC_N) 1642 goto fail; 1643 if (user->reg < 2 || user->reg > 5) 1644 goto fail; 1645 reg_n = user->reg; 1646 break; 1647 1648 case AS_IND_N: 1649 if (user->type != A_IND_N) 1650 goto fail; 1651 if (user->reg < 2 || user->reg > 5) 1652 goto fail; 1653 reg_n = user->reg; 1654 break; 1655 1656 case AS_PMOD_N: 1657 if (user->type != AX_PMOD_N) 1658 goto fail; 1659 if (user->reg < 2 || user->reg > 5) 1660 goto fail; 1661 reg_n = user->reg; 1662 break; 1663 1664 case AX_INC_N: 1665 if (user->type != A_INC_N) 1666 goto fail; 1667 if (user->reg < 4 || user->reg > 5) 1668 goto fail; 1669 reg_n = user->reg; 1670 break; 1671 1672 case AX_IND_N: 1673 if (user->type != A_IND_N) 1674 goto fail; 1675 if (user->reg < 4 || user->reg > 5) 1676 goto fail; 1677 reg_n = user->reg; 1678 break; 1679 1680 case AX_PMOD_N: 1681 if (user->type != AX_PMOD_N) 1682 goto fail; 1683 if (user->reg < 4 || user->reg > 5) 1684 goto fail; 1685 reg_n = user->reg; 1686 break; 1687 1688 case AXY_INC_N: 1689 if (user->type != A_INC_N) 1690 goto fail; 1691 if ((user->reg < 4 || user->reg > 5) 1692 && (user->reg < 0 || user->reg > 1)) 1693 goto fail; 1694 reg_n = user->reg; 1695 break; 1696 1697 case AXY_IND_N: 1698 if (user->type != A_IND_N) 1699 goto fail; 1700 if ((user->reg < 4 || user->reg > 5) 1701 && (user->reg < 0 || user->reg > 1)) 1702 goto fail; 1703 reg_n = user->reg; 1704 break; 1705 1706 case AXY_PMOD_N: 1707 if (user->type != AX_PMOD_N) 1708 goto fail; 1709 if ((user->reg < 4 || user->reg > 5) 1710 && (user->reg < 0 || user->reg > 1)) 1711 goto fail; 1712 reg_n = user->reg; 1713 break; 1714 1715 case AY_INC_N: 1716 if (user->type != A_INC_N) 1717 goto fail; 1718 if (user->reg < 6 || user->reg > 7) 1719 goto fail; 1720 reg_n = user->reg; 1721 break; 1722 1723 case AY_IND_N: 1724 if (user->type != A_IND_N) 1725 goto fail; 1726 if (user->reg < 6 || user->reg > 7) 1727 goto fail; 1728 reg_n = user->reg; 1729 break; 1730 1731 case AY_PMOD_N: 1732 if (user->type != AY_PMOD_N) 1733 goto fail; 1734 if (user->reg < 6 || user->reg > 7) 1735 goto fail; 1736 reg_n = user->reg; 1737 break; 1738 1739 case AYX_INC_N: 1740 if (user->type != A_INC_N) 1741 goto fail; 1742 if ((user->reg < 6 || user->reg > 7) 1743 && (user->reg < 2 || user->reg > 3)) 1744 goto fail; 1745 reg_n = user->reg; 1746 break; 1747 1748 case AYX_IND_N: 1749 if (user->type != A_IND_N) 1750 goto fail; 1751 if ((user->reg < 6 || user->reg > 7) 1752 && (user->reg < 2 || user->reg > 3)) 1753 goto fail; 1754 reg_n = user->reg; 1755 break; 1756 1757 case AYX_PMOD_N: 1758 if (user->type != AY_PMOD_N) 1759 goto fail; 1760 if ((user->reg < 6 || user->reg > 7) 1761 && (user->reg < 2 || user->reg > 3)) 1762 goto fail; 1763 reg_n = user->reg; 1764 break; 1765 1766 case DSP_REG_A_M: 1767 if (user->type != DSP_REG_N) 1768 goto fail; 1769 if (user->reg != A_A0_NUM 1770 && user->reg != A_A1_NUM) 1771 goto fail; 1772 reg_m = user->reg; 1773 break; 1774 1775 case DSP_REG_AX: 1776 if (user->type != DSP_REG_N) 1777 goto fail; 1778 switch (user->reg) 1779 { 1780 case A_A0_NUM: 1781 reg_x = 0; 1782 break; 1783 case A_A1_NUM: 1784 reg_x = 2; 1785 break; 1786 case A_X0_NUM: 1787 reg_x = 1; 1788 break; 1789 case A_X1_NUM: 1790 reg_x = 3; 1791 break; 1792 default: 1793 goto fail; 1794 } 1795 break; 1796 1797 case DSP_REG_XY: 1798 if (user->type != DSP_REG_N) 1799 goto fail; 1800 switch (user->reg) 1801 { 1802 case A_X0_NUM: 1803 reg_x = 0; 1804 break; 1805 case A_X1_NUM: 1806 reg_x = 2; 1807 break; 1808 case A_Y0_NUM: 1809 reg_x = 1; 1810 break; 1811 case A_Y1_NUM: 1812 reg_x = 3; 1813 break; 1814 default: 1815 goto fail; 1816 } 1817 break; 1818 1819 case DSP_REG_AY: 1820 if (user->type != DSP_REG_N) 1821 goto fail; 1822 switch (user->reg) 1823 { 1824 case A_A0_NUM: 1825 reg_y = 0; 1826 break; 1827 case A_A1_NUM: 1828 reg_y = 1; 1829 break; 1830 case A_Y0_NUM: 1831 reg_y = 2; 1832 break; 1833 case A_Y1_NUM: 1834 reg_y = 3; 1835 break; 1836 default: 1837 goto fail; 1838 } 1839 break; 1840 1841 case DSP_REG_YX: 1842 if (user->type != DSP_REG_N) 1843 goto fail; 1844 switch (user->reg) 1845 { 1846 case A_Y0_NUM: 1847 reg_y = 0; 1848 break; 1849 case A_Y1_NUM: 1850 reg_y = 1; 1851 break; 1852 case A_X0_NUM: 1853 reg_y = 2; 1854 break; 1855 case A_X1_NUM: 1856 reg_y = 3; 1857 break; 1858 default: 1859 goto fail; 1860 } 1861 break; 1862 1863 case DSP_REG_X: 1864 if (user->type != DSP_REG_N) 1865 goto fail; 1866 switch (user->reg) 1867 { 1868 case A_X0_NUM: 1869 reg_x = 0; 1870 break; 1871 case A_X1_NUM: 1872 reg_x = 1; 1873 break; 1874 case A_A0_NUM: 1875 reg_x = 2; 1876 break; 1877 case A_A1_NUM: 1878 reg_x = 3; 1879 break; 1880 default: 1881 goto fail; 1882 } 1883 break; 1884 1885 case DSP_REG_Y: 1886 if (user->type != DSP_REG_N) 1887 goto fail; 1888 switch (user->reg) 1889 { 1890 case A_Y0_NUM: 1891 reg_y = 0; 1892 break; 1893 case A_Y1_NUM: 1894 reg_y = 1; 1895 break; 1896 case A_M0_NUM: 1897 reg_y = 2; 1898 break; 1899 case A_M1_NUM: 1900 reg_y = 3; 1901 break; 1902 default: 1903 goto fail; 1904 } 1905 break; 1906 1907 case DSP_REG_E: 1908 if (user->type != DSP_REG_N) 1909 goto fail; 1910 switch (user->reg) 1911 { 1912 case A_X0_NUM: 1913 reg_efg = 0 << 10; 1914 break; 1915 case A_X1_NUM: 1916 reg_efg = 1 << 10; 1917 break; 1918 case A_Y0_NUM: 1919 reg_efg = 2 << 10; 1920 break; 1921 case A_A1_NUM: 1922 reg_efg = 3 << 10; 1923 break; 1924 default: 1925 goto fail; 1926 } 1927 break; 1928 1929 case DSP_REG_F: 1930 if (user->type != DSP_REG_N) 1931 goto fail; 1932 switch (user->reg) 1933 { 1934 case A_Y0_NUM: 1935 reg_efg |= 0 << 8; 1936 break; 1937 case A_Y1_NUM: 1938 reg_efg |= 1 << 8; 1939 break; 1940 case A_X0_NUM: 1941 reg_efg |= 2 << 8; 1942 break; 1943 case A_A1_NUM: 1944 reg_efg |= 3 << 8; 1945 break; 1946 default: 1947 goto fail; 1948 } 1949 break; 1950 1951 case DSP_REG_G: 1952 if (user->type != DSP_REG_N) 1953 goto fail; 1954 switch (user->reg) 1955 { 1956 case A_M0_NUM: 1957 reg_efg |= 0 << 2; 1958 break; 1959 case A_M1_NUM: 1960 reg_efg |= 1 << 2; 1961 break; 1962 case A_A0_NUM: 1963 reg_efg |= 2 << 2; 1964 break; 1965 case A_A1_NUM: 1966 reg_efg |= 3 << 2; 1967 break; 1968 default: 1969 goto fail; 1970 } 1971 break; 1972 1973 case A_A0: 1974 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 1975 goto fail; 1976 break; 1977 case A_X0: 1978 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 1979 goto fail; 1980 break; 1981 case A_X1: 1982 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 1983 goto fail; 1984 break; 1985 case A_Y0: 1986 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 1987 goto fail; 1988 break; 1989 case A_Y1: 1990 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 1991 goto fail; 1992 break; 1993 1994 case F_REG_M: 1995 case D_REG_M: 1996 case X_REG_M: 1997 case V_REG_M: 1998 case FPUL_M: 1999 case FPSCR_M: 2000 /* Opcode needs rn */ 2001 if (user->type != arg - F_REG_M + F_REG_N) 2002 goto fail; 2003 reg_m = user->reg; 2004 break; 2005 case DX_REG_M: 2006 if (user->type != D_REG_N && user->type != X_REG_N) 2007 goto fail; 2008 reg_m = user->reg; 2009 break; 2010 case XMTRX_M4: 2011 if (user->type != XMTRX_M4) 2012 goto fail; 2013 reg_m = 4; 2014 break; 2015 2016 default: 2017 printf (_("unhandled %d\n"), arg); 2018 goto fail; 2019 } 2020 } 2021 if ( !(valid_arch & this_try->arch)) 2022 goto fail; 2023 valid_arch &= this_try->arch; 2024 return this_try; 2025 fail: 2026 ; 2027 } 2028 2029 return 0; 2030 } 2031 2032 static void 2033 insert (char *where, int how, int pcrel, sh_operand_info *op) 2034 { 2035 fix_new_exp (frag_now, 2036 where - frag_now->fr_literal, 2037 2, 2038 &op->immediate, 2039 pcrel, 2040 how); 2041 } 2042 2043 static void 2044 build_relax (sh_opcode_info *opcode, sh_operand_info *op) 2045 { 2046 int high_byte = target_big_endian ? 0 : 1; 2047 char *p; 2048 2049 if (opcode->arg[0] == A_BDISP8) 2050 { 2051 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 2052 p = frag_var (rs_machine_dependent, 2053 md_relax_table[C (what, COND32)].rlx_length, 2054 md_relax_table[C (what, COND8)].rlx_length, 2055 C (what, 0), 2056 op->immediate.X_add_symbol, 2057 op->immediate.X_add_number, 2058 0); 2059 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 2060 } 2061 else if (opcode->arg[0] == A_BDISP12) 2062 { 2063 p = frag_var (rs_machine_dependent, 2064 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 2065 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 2066 C (UNCOND_JUMP, 0), 2067 op->immediate.X_add_symbol, 2068 op->immediate.X_add_number, 2069 0); 2070 p[high_byte] = (opcode->nibbles[0] << 4); 2071 } 2072 2073 } 2074 2075 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 2076 2077 static char * 2078 insert_loop_bounds (char *output, sh_operand_info *operand) 2079 { 2080 char *name; 2081 symbolS *end_sym; 2082 2083 /* Since the low byte of the opcode will be overwritten by the reloc, we 2084 can just stash the high byte into both bytes and ignore endianness. */ 2085 output[0] = 0x8c; 2086 output[1] = 0x8c; 2087 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2088 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2089 2090 if (sh_relax) 2091 { 2092 static int count = 0; 2093 2094 /* If the last loop insn is a two-byte-insn, it is in danger of being 2095 swapped with the insn after it. To prevent this, create a new 2096 symbol - complete with SH_LABEL reloc - after the last loop insn. 2097 If the last loop insn is four bytes long, the symbol will be 2098 right in the middle, but four byte insns are not swapped anyways. */ 2099 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 2100 Hence a 9 digit number should be enough to count all REPEATs. */ 2101 name = alloca (11); 2102 sprintf (name, "_R%x", count++ & 0x3fffffff); 2103 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); 2104 /* Make this a local symbol. */ 2105 #ifdef OBJ_COFF 2106 SF_SET_LOCAL (end_sym); 2107 #endif /* OBJ_COFF */ 2108 symbol_table_insert (end_sym); 2109 end_sym->sy_value = operand[1].immediate; 2110 end_sym->sy_value.X_add_number += 2; 2111 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 2112 } 2113 2114 output = frag_more (2); 2115 output[0] = 0x8e; 2116 output[1] = 0x8e; 2117 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2118 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2119 2120 return frag_more (2); 2121 } 2122 2123 /* Now we know what sort of opcodes it is, let's build the bytes. */ 2124 2125 static unsigned int 2126 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 2127 { 2128 int index; 2129 char nbuf[4]; 2130 char *output = frag_more (2); 2131 unsigned int size = 2; 2132 int low_byte = target_big_endian ? 1 : 0; 2133 nbuf[0] = 0; 2134 nbuf[1] = 0; 2135 nbuf[2] = 0; 2136 nbuf[3] = 0; 2137 2138 for (index = 0; index < 4; index++) 2139 { 2140 sh_nibble_type i = opcode->nibbles[index]; 2141 if (i < 16) 2142 { 2143 nbuf[index] = i; 2144 } 2145 else 2146 { 2147 switch (i) 2148 { 2149 case REG_N: 2150 case REG_N_D: 2151 nbuf[index] = reg_n; 2152 break; 2153 case REG_M: 2154 nbuf[index] = reg_m; 2155 break; 2156 case SDT_REG_N: 2157 if (reg_n < 2 || reg_n > 5) 2158 as_bad (_("Invalid register: 'r%d'"), reg_n); 2159 nbuf[index] = (reg_n & 3) | 4; 2160 break; 2161 case REG_NM: 2162 nbuf[index] = reg_n | (reg_m >> 2); 2163 break; 2164 case REG_B: 2165 nbuf[index] = reg_b | 0x08; 2166 break; 2167 case REG_N_B01: 2168 nbuf[index] = reg_n | 0x01; 2169 break; 2170 case IMM0_4BY4: 2171 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2172 break; 2173 case IMM0_4BY2: 2174 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2175 break; 2176 case IMM0_4: 2177 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2178 break; 2179 case IMM1_4BY4: 2180 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2181 break; 2182 case IMM1_4BY2: 2183 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2184 break; 2185 case IMM1_4: 2186 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2187 break; 2188 case IMM0_8BY4: 2189 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2190 break; 2191 case IMM0_8BY2: 2192 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2193 break; 2194 case IMM0_8: 2195 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2196 break; 2197 case IMM1_8BY4: 2198 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2199 break; 2200 case IMM1_8BY2: 2201 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2202 break; 2203 case IMM1_8: 2204 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2205 break; 2206 case PCRELIMM_8BY4: 2207 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2208 operand->type != A_DISP_PC_ABS, operand); 2209 break; 2210 case PCRELIMM_8BY2: 2211 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2212 operand->type != A_DISP_PC_ABS, operand); 2213 break; 2214 case REPEAT: 2215 output = insert_loop_bounds (output, operand); 2216 nbuf[index] = opcode->nibbles[3]; 2217 operand += 2; 2218 break; 2219 default: 2220 printf (_("failed for %d\n"), i); 2221 } 2222 } 2223 } 2224 if (!target_big_endian) 2225 { 2226 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2227 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2228 } 2229 else 2230 { 2231 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2232 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2233 } 2234 return size; 2235 } 2236 2237 /* Find an opcode at the start of *STR_P in the hash table, and set 2238 *STR_P to the first character after the last one read. */ 2239 2240 static sh_opcode_info * 2241 find_cooked_opcode (char **str_p) 2242 { 2243 char *str = *str_p; 2244 unsigned char *op_start; 2245 unsigned char *op_end; 2246 char name[20]; 2247 int nlen = 0; 2248 2249 /* Drop leading whitespace. */ 2250 while (*str == ' ') 2251 str++; 2252 2253 /* Find the op code end. 2254 The pre-processor will eliminate whitespace in front of 2255 any '@' after the first argument; we may be called from 2256 assemble_ppi, so the opcode might be terminated by an '@'. */ 2257 for (op_start = op_end = (unsigned char *) (str); 2258 *op_end 2259 && nlen < 20 2260 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2261 op_end++) 2262 { 2263 unsigned char c = op_start[nlen]; 2264 2265 /* The machine independent code will convert CMP/EQ into cmp/EQ 2266 because it thinks the '/' is the end of the symbol. Moreover, 2267 all but the first sub-insn is a parallel processing insn won't 2268 be capitalized. Instead of hacking up the machine independent 2269 code, we just deal with it here. */ 2270 c = TOLOWER (c); 2271 name[nlen] = c; 2272 nlen++; 2273 } 2274 2275 name[nlen] = 0; 2276 *str_p = op_end; 2277 2278 if (nlen == 0) 2279 as_bad (_("can't find opcode ")); 2280 2281 return (sh_opcode_info *) hash_find (opcode_hash_control, name); 2282 } 2283 2284 /* Assemble a parallel processing insn. */ 2285 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2286 2287 static unsigned int 2288 assemble_ppi (char *op_end, sh_opcode_info *opcode) 2289 { 2290 int movx = 0; 2291 int movy = 0; 2292 int cond = 0; 2293 int field_b = 0; 2294 char *output; 2295 int move_code; 2296 unsigned int size; 2297 2298 for (;;) 2299 { 2300 sh_operand_info operand[3]; 2301 2302 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2303 Make sure we encode a defined insn pattern. */ 2304 reg_x = 0; 2305 reg_y = 0; 2306 reg_n = 0; 2307 2308 if (opcode->arg[0] != A_END) 2309 op_end = get_operands (opcode, op_end, operand); 2310 try_another_opcode: 2311 opcode = get_specific (opcode, operand); 2312 if (opcode == 0) 2313 { 2314 /* Couldn't find an opcode which matched the operands. */ 2315 char *where = frag_more (2); 2316 size = 2; 2317 2318 where[0] = 0x0; 2319 where[1] = 0x0; 2320 as_bad (_("invalid operands for opcode")); 2321 return size; 2322 } 2323 2324 if (opcode->nibbles[0] != PPI) 2325 as_bad (_("insn can't be combined with parallel processing insn")); 2326 2327 switch (opcode->nibbles[1]) 2328 { 2329 2330 case NOPX: 2331 if (movx) 2332 as_bad (_("multiple movx specifications")); 2333 movx = DDT_BASE; 2334 break; 2335 case NOPY: 2336 if (movy) 2337 as_bad (_("multiple movy specifications")); 2338 movy = DDT_BASE; 2339 break; 2340 2341 case MOVX_NOPY: 2342 if (movx) 2343 as_bad (_("multiple movx specifications")); 2344 if ((reg_n < 4 || reg_n > 5) 2345 && (reg_n < 0 || reg_n > 1)) 2346 as_bad (_("invalid movx address register")); 2347 if (movy && movy != DDT_BASE) 2348 as_bad (_("insn cannot be combined with non-nopy")); 2349 movx = ((((reg_n & 1) != 0) << 9) 2350 + (((reg_n & 4) == 0) << 8) 2351 + (reg_x << 6) 2352 + (opcode->nibbles[2] << 4) 2353 + opcode->nibbles[3] 2354 + DDT_BASE); 2355 break; 2356 2357 case MOVY_NOPX: 2358 if (movy) 2359 as_bad (_("multiple movy specifications")); 2360 if ((reg_n < 6 || reg_n > 7) 2361 && (reg_n < 2 || reg_n > 3)) 2362 as_bad (_("invalid movy address register")); 2363 if (movx && movx != DDT_BASE) 2364 as_bad (_("insn cannot be combined with non-nopx")); 2365 movy = ((((reg_n & 1) != 0) << 8) 2366 + (((reg_n & 4) == 0) << 9) 2367 + (reg_y << 6) 2368 + (opcode->nibbles[2] << 4) 2369 + opcode->nibbles[3] 2370 + DDT_BASE); 2371 break; 2372 2373 case MOVX: 2374 if (movx) 2375 as_bad (_("multiple movx specifications")); 2376 if (movy & 0x2ac) 2377 as_bad (_("previous movy requires nopx")); 2378 if (reg_n < 4 || reg_n > 5) 2379 as_bad (_("invalid movx address register")); 2380 if (opcode->nibbles[2] & 8) 2381 { 2382 if (reg_m == A_A1_NUM) 2383 movx = 1 << 7; 2384 else if (reg_m != A_A0_NUM) 2385 as_bad (_("invalid movx dsp register")); 2386 } 2387 else 2388 { 2389 if (reg_x > 1) 2390 as_bad (_("invalid movx dsp register")); 2391 movx = reg_x << 7; 2392 } 2393 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2394 break; 2395 2396 case MOVY: 2397 if (movy) 2398 as_bad (_("multiple movy specifications")); 2399 if (movx & 0x153) 2400 as_bad (_("previous movx requires nopy")); 2401 if (opcode->nibbles[2] & 8) 2402 { 2403 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2404 so add 8 more. */ 2405 movy = 8; 2406 if (reg_m == A_A1_NUM) 2407 movy += 1 << 6; 2408 else if (reg_m != A_A0_NUM) 2409 as_bad (_("invalid movy dsp register")); 2410 } 2411 else 2412 { 2413 if (reg_y > 1) 2414 as_bad (_("invalid movy dsp register")); 2415 movy = reg_y << 6; 2416 } 2417 if (reg_n < 6 || reg_n > 7) 2418 as_bad (_("invalid movy address register")); 2419 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2420 break; 2421 2422 case PSH: 2423 if (operand[0].immediate.X_op != O_constant) 2424 as_bad (_("dsp immediate shift value not constant")); 2425 field_b = ((opcode->nibbles[2] << 12) 2426 | (operand[0].immediate.X_add_number & 127) << 4 2427 | reg_n); 2428 break; 2429 case PPI3NC: 2430 if (cond) 2431 { 2432 opcode++; 2433 goto try_another_opcode; 2434 } 2435 /* Fall through. */ 2436 case PPI3: 2437 if (field_b) 2438 as_bad (_("multiple parallel processing specifications")); 2439 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2440 + (reg_x << 6) + (reg_y << 4) + reg_n); 2441 switch (opcode->nibbles[4]) 2442 { 2443 case HEX_0: 2444 case HEX_XX00: 2445 case HEX_00YY: 2446 break; 2447 case HEX_1: 2448 case HEX_4: 2449 field_b += opcode->nibbles[4] << 4; 2450 break; 2451 default: 2452 abort (); 2453 } 2454 break; 2455 case PDC: 2456 if (cond) 2457 as_bad (_("multiple condition specifications")); 2458 cond = opcode->nibbles[2] << 8; 2459 if (*op_end) 2460 goto skip_cond_check; 2461 break; 2462 case PPIC: 2463 if (field_b) 2464 as_bad (_("multiple parallel processing specifications")); 2465 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2466 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2467 cond = 0; 2468 switch (opcode->nibbles[4]) 2469 { 2470 case HEX_0: 2471 case HEX_XX00: 2472 case HEX_00YY: 2473 break; 2474 case HEX_1: 2475 case HEX_4: 2476 field_b += opcode->nibbles[4] << 4; 2477 break; 2478 default: 2479 abort (); 2480 } 2481 break; 2482 case PMUL: 2483 if (field_b) 2484 { 2485 if ((field_b & 0xef00) == 0xa100) 2486 field_b -= 0x8100; 2487 /* pclr Dz pmuls Se,Sf,Dg */ 2488 else if ((field_b & 0xff00) == 0x8d00 2489 && (valid_arch & arch_sh4al_dsp_up)) 2490 { 2491 valid_arch &= arch_sh4al_dsp_up; 2492 field_b -= 0x8cf0; 2493 } 2494 else 2495 as_bad (_("insn cannot be combined with pmuls")); 2496 switch (field_b & 0xf) 2497 { 2498 case A_X0_NUM: 2499 field_b += 0 - A_X0_NUM; 2500 break; 2501 case A_Y0_NUM: 2502 field_b += 1 - A_Y0_NUM; 2503 break; 2504 case A_A0_NUM: 2505 field_b += 2 - A_A0_NUM; 2506 break; 2507 case A_A1_NUM: 2508 field_b += 3 - A_A1_NUM; 2509 break; 2510 default: 2511 as_bad (_("bad combined pmuls output operand")); 2512 } 2513 /* Generate warning if the destination register for padd / psub 2514 and pmuls is the same ( only for A0 or A1 ). 2515 If the last nibble is 1010 then A0 is used in both 2516 padd / psub and pmuls. If it is 1111 then A1 is used 2517 as destination register in both padd / psub and pmuls. */ 2518 2519 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2520 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2521 as_warn (_("destination register is same for parallel insns")); 2522 } 2523 field_b += 0x4000 + reg_efg; 2524 break; 2525 default: 2526 abort (); 2527 } 2528 if (cond) 2529 { 2530 as_bad (_("condition not followed by conditionalizable insn")); 2531 cond = 0; 2532 } 2533 if (! *op_end) 2534 break; 2535 skip_cond_check: 2536 opcode = find_cooked_opcode (&op_end); 2537 if (opcode == NULL) 2538 { 2539 (as_bad 2540 (_("unrecognized characters at end of parallel processing insn"))); 2541 break; 2542 } 2543 } 2544 2545 move_code = movx | movy; 2546 if (field_b) 2547 { 2548 /* Parallel processing insn. */ 2549 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2550 2551 output = frag_more (4); 2552 size = 4; 2553 if (! target_big_endian) 2554 { 2555 output[3] = ppi_code >> 8; 2556 output[2] = ppi_code; 2557 } 2558 else 2559 { 2560 output[2] = ppi_code >> 8; 2561 output[3] = ppi_code; 2562 } 2563 move_code |= 0xf800; 2564 } 2565 else 2566 { 2567 /* Just a double data transfer. */ 2568 output = frag_more (2); 2569 size = 2; 2570 } 2571 if (! target_big_endian) 2572 { 2573 output[1] = move_code >> 8; 2574 output[0] = move_code; 2575 } 2576 else 2577 { 2578 output[0] = move_code >> 8; 2579 output[1] = move_code; 2580 } 2581 return size; 2582 } 2583 2584 /* This is the guts of the machine-dependent assembler. STR points to a 2585 machine dependent instruction. This function is supposed to emit 2586 the frags/bytes it assembles to. */ 2587 2588 void 2589 md_assemble (char *str) 2590 { 2591 unsigned char *op_end; 2592 sh_operand_info operand[3]; 2593 sh_opcode_info *opcode; 2594 unsigned int size = 0; 2595 2596 #ifdef HAVE_SH64 2597 if (sh64_isa_mode == sh64_isa_shmedia) 2598 { 2599 shmedia_md_assemble (str); 2600 return; 2601 } 2602 else 2603 { 2604 /* If we've seen pseudo-directives, make sure any emitted data or 2605 frags are marked as data. */ 2606 if (!seen_insn) 2607 { 2608 sh64_update_contents_mark (TRUE); 2609 sh64_set_contents_type (CRT_SH5_ISA16); 2610 } 2611 2612 seen_insn = TRUE; 2613 } 2614 #endif /* HAVE_SH64 */ 2615 2616 opcode = find_cooked_opcode (&str); 2617 op_end = str; 2618 2619 if (opcode == NULL) 2620 { 2621 as_bad (_("unknown opcode")); 2622 return; 2623 } 2624 2625 if (sh_relax 2626 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2627 { 2628 /* Output a CODE reloc to tell the linker that the following 2629 bytes are instructions, not data. */ 2630 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2631 BFD_RELOC_SH_CODE); 2632 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2633 } 2634 2635 if (opcode->nibbles[0] == PPI) 2636 { 2637 size = assemble_ppi (op_end, opcode); 2638 } 2639 else 2640 { 2641 if (opcode->arg[0] == A_BDISP12 2642 || opcode->arg[0] == A_BDISP8) 2643 { 2644 /* Since we skip get_specific here, we have to check & update 2645 valid_arch now. */ 2646 if (valid_arch & opcode->arch) 2647 valid_arch &= opcode->arch; 2648 else 2649 as_bad (_("Delayed branches not available on SH1")); 2650 parse_exp (op_end + 1, &operand[0]); 2651 build_relax (opcode, &operand[0]); 2652 } 2653 else 2654 { 2655 if (opcode->arg[0] == A_END) 2656 { 2657 /* Ignore trailing whitespace. If there is any, it has already 2658 been compressed to a single space. */ 2659 if (*op_end == ' ') 2660 op_end++; 2661 } 2662 else 2663 { 2664 op_end = get_operands (opcode, op_end, operand); 2665 } 2666 opcode = get_specific (opcode, operand); 2667 2668 if (opcode == 0) 2669 { 2670 /* Couldn't find an opcode which matched the operands. */ 2671 char *where = frag_more (2); 2672 size = 2; 2673 2674 where[0] = 0x0; 2675 where[1] = 0x0; 2676 as_bad (_("invalid operands for opcode")); 2677 } 2678 else 2679 { 2680 if (*op_end) 2681 as_bad (_("excess operands: '%s'"), op_end); 2682 2683 size = build_Mytes (opcode, operand); 2684 } 2685 } 2686 } 2687 2688 #ifdef BFD_ASSEMBLER 2689 dwarf2_emit_insn (size); 2690 #endif 2691 } 2692 2693 /* This routine is called each time a label definition is seen. It 2694 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 2695 2696 void 2697 sh_frob_label (void) 2698 { 2699 static fragS *last_label_frag; 2700 static int last_label_offset; 2701 2702 if (sh_relax 2703 && seg_info (now_seg)->tc_segment_info_data.in_code) 2704 { 2705 int offset; 2706 2707 offset = frag_now_fix (); 2708 if (frag_now != last_label_frag 2709 || offset != last_label_offset) 2710 { 2711 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 2712 last_label_frag = frag_now; 2713 last_label_offset = offset; 2714 } 2715 } 2716 } 2717 2718 /* This routine is called when the assembler is about to output some 2719 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 2720 2721 void 2722 sh_flush_pending_output (void) 2723 { 2724 if (sh_relax 2725 && seg_info (now_seg)->tc_segment_info_data.in_code) 2726 { 2727 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2728 BFD_RELOC_SH_DATA); 2729 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 2730 } 2731 } 2732 2733 symbolS * 2734 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 2735 { 2736 return 0; 2737 } 2738 2739 #ifdef OBJ_COFF 2740 #ifndef BFD_ASSEMBLER 2741 2742 void 2743 tc_crawl_symbol_chain (object_headers *headers ATTRIBUTE_UNUSED) 2744 { 2745 printf (_("call to tc_crawl_symbol_chain \n")); 2746 } 2747 2748 void 2749 tc_headers_hook (object_headers *headers ATTRIBUTE_UNUSED) 2750 { 2751 printf (_("call to tc_headers_hook \n")); 2752 } 2753 2754 #endif 2755 #endif 2756 2757 /* Various routines to kill one day. */ 2758 /* Equal to MAX_PRECISION in atof-ieee.c. */ 2759 #define MAX_LITTLENUMS 6 2760 2761 /* Turn a string in input_line_pointer into a floating point constant 2762 of type TYPE, and store the appropriate bytes in *LITP. The number 2763 of LITTLENUMS emitted is stored in *SIZEP . An error message is 2764 returned, or NULL on OK. */ 2765 2766 char * 2767 md_atof (int type, char *litP, int *sizeP) 2768 { 2769 int prec; 2770 LITTLENUM_TYPE words[4]; 2771 char *t; 2772 int i; 2773 2774 switch (type) 2775 { 2776 case 'f': 2777 prec = 2; 2778 break; 2779 2780 case 'd': 2781 prec = 4; 2782 break; 2783 2784 default: 2785 *sizeP = 0; 2786 return _("bad call to md_atof"); 2787 } 2788 2789 t = atof_ieee (input_line_pointer, type, words); 2790 if (t) 2791 input_line_pointer = t; 2792 2793 *sizeP = prec * 2; 2794 2795 if (! target_big_endian) 2796 { 2797 for (i = prec - 1; i >= 0; i--) 2798 { 2799 md_number_to_chars (litP, (valueT) words[i], 2); 2800 litP += 2; 2801 } 2802 } 2803 else 2804 { 2805 for (i = 0; i < prec; i++) 2806 { 2807 md_number_to_chars (litP, (valueT) words[i], 2); 2808 litP += 2; 2809 } 2810 } 2811 2812 return NULL; 2813 } 2814 2815 /* Handle the .uses pseudo-op. This pseudo-op is used just before a 2816 call instruction. It refers to a label of the instruction which 2817 loads the register which the call uses. We use it to generate a 2818 special reloc for the linker. */ 2819 2820 static void 2821 s_uses (int ignore ATTRIBUTE_UNUSED) 2822 { 2823 expressionS ex; 2824 2825 if (! sh_relax) 2826 as_warn (_(".uses pseudo-op seen when not relaxing")); 2827 2828 expression (&ex); 2829 2830 if (ex.X_op != O_symbol || ex.X_add_number != 0) 2831 { 2832 as_bad (_("bad .uses format")); 2833 ignore_rest_of_line (); 2834 return; 2835 } 2836 2837 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 2838 2839 demand_empty_rest_of_line (); 2840 } 2841 2842 const char *md_shortopts = ""; 2843 struct option md_longopts[] = 2844 { 2845 #define OPTION_RELAX (OPTION_MD_BASE) 2846 #define OPTION_BIG (OPTION_MD_BASE + 1) 2847 #define OPTION_LITTLE (OPTION_BIG + 1) 2848 #define OPTION_SMALL (OPTION_LITTLE + 1) 2849 #define OPTION_DSP (OPTION_SMALL + 1) 2850 #define OPTION_ISA (OPTION_DSP + 1) 2851 #define OPTION_RENESAS (OPTION_ISA + 1) 2852 2853 {"relax", no_argument, NULL, OPTION_RELAX}, 2854 {"big", no_argument, NULL, OPTION_BIG}, 2855 {"little", no_argument, NULL, OPTION_LITTLE}, 2856 {"small", no_argument, NULL, OPTION_SMALL}, 2857 {"dsp", no_argument, NULL, OPTION_DSP}, 2858 {"isa", required_argument, NULL, OPTION_ISA}, 2859 {"renesas", no_argument, NULL, OPTION_RENESAS}, 2860 2861 #ifdef HAVE_SH64 2862 #define OPTION_ABI (OPTION_RENESAS + 1) 2863 #define OPTION_NO_MIX (OPTION_ABI + 1) 2864 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1) 2865 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1) 2866 #define OPTION_PT32 (OPTION_NO_EXPAND + 1) 2867 {"abi", required_argument, NULL, OPTION_ABI}, 2868 {"no-mix", no_argument, NULL, OPTION_NO_MIX}, 2869 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, 2870 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, 2871 {"expand-pt32", no_argument, NULL, OPTION_PT32}, 2872 #endif /* HAVE_SH64 */ 2873 2874 {NULL, no_argument, NULL, 0} 2875 }; 2876 size_t md_longopts_size = sizeof (md_longopts); 2877 2878 int 2879 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) 2880 { 2881 switch (c) 2882 { 2883 case OPTION_RELAX: 2884 sh_relax = 1; 2885 break; 2886 2887 case OPTION_BIG: 2888 target_big_endian = 1; 2889 break; 2890 2891 case OPTION_LITTLE: 2892 target_big_endian = 0; 2893 break; 2894 2895 case OPTION_SMALL: 2896 sh_small = 1; 2897 break; 2898 2899 case OPTION_DSP: 2900 preset_target_arch = arch_sh1_up & ~arch_sh2e_up; 2901 break; 2902 2903 case OPTION_RENESAS: 2904 dont_adjust_reloc_32 = 1; 2905 break; 2906 2907 case OPTION_ISA: 2908 if (strcasecmp (arg, "sh4") == 0) 2909 preset_target_arch = arch_sh4; 2910 else if (strcasecmp (arg, "sh4a") == 0) 2911 preset_target_arch = arch_sh4a; 2912 else if (strcasecmp (arg, "dsp") == 0) 2913 preset_target_arch = arch_sh1_up & ~arch_sh2e_up; 2914 else if (strcasecmp (arg, "fp") == 0) 2915 preset_target_arch = arch_sh2e_up; 2916 else if (strcasecmp (arg, "any") == 0) 2917 preset_target_arch = arch_sh1_up; 2918 #ifdef HAVE_SH64 2919 else if (strcasecmp (arg, "shmedia") == 0) 2920 { 2921 if (sh64_isa_mode == sh64_isa_shcompact) 2922 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); 2923 sh64_isa_mode = sh64_isa_shmedia; 2924 } 2925 else if (strcasecmp (arg, "shcompact") == 0) 2926 { 2927 if (sh64_isa_mode == sh64_isa_shmedia) 2928 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); 2929 if (sh64_abi == sh64_abi_64) 2930 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); 2931 sh64_isa_mode = sh64_isa_shcompact; 2932 } 2933 #endif /* HAVE_SH64 */ 2934 else 2935 as_bad ("Invalid argument to --isa option: %s", arg); 2936 break; 2937 2938 #ifdef HAVE_SH64 2939 case OPTION_ABI: 2940 if (strcmp (arg, "32") == 0) 2941 { 2942 if (sh64_abi == sh64_abi_64) 2943 as_bad (_("Invalid combination: --abi=32 with --abi=64")); 2944 sh64_abi = sh64_abi_32; 2945 } 2946 else if (strcmp (arg, "64") == 0) 2947 { 2948 if (sh64_abi == sh64_abi_32) 2949 as_bad (_("Invalid combination: --abi=64 with --abi=32")); 2950 if (sh64_isa_mode == sh64_isa_shcompact) 2951 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); 2952 sh64_abi = sh64_abi_64; 2953 } 2954 else 2955 as_bad ("Invalid argument to --abi option: %s", arg); 2956 break; 2957 2958 case OPTION_NO_MIX: 2959 sh64_mix = FALSE; 2960 break; 2961 2962 case OPTION_SHCOMPACT_CONST_CRANGE: 2963 sh64_shcompact_const_crange = TRUE; 2964 break; 2965 2966 case OPTION_NO_EXPAND: 2967 sh64_expand = FALSE; 2968 break; 2969 2970 case OPTION_PT32: 2971 sh64_pt32 = TRUE; 2972 break; 2973 #endif /* HAVE_SH64 */ 2974 2975 default: 2976 return 0; 2977 } 2978 2979 return 1; 2980 } 2981 2982 void 2983 md_show_usage (FILE *stream) 2984 { 2985 fprintf (stream, _("\ 2986 SH options:\n\ 2987 -little generate little endian code\n\ 2988 -big generate big endian code\n\ 2989 -relax alter jump instructions for long displacements\n\ 2990 -renesas disable optimization with section symbol for\n\ 2991 compatibility with Renesas assembler.\n\ 2992 -small align sections to 4 byte boundaries, not 16\n\ 2993 -dsp enable sh-dsp insns, and disable floating-point ISAs.\n")); 2994 #ifdef HAVE_SH64 2995 fprintf (stream, _("\ 2996 -isa=[sh4\n\ 2997 | sh4a\n\ 2998 | dsp same as '-dsp'\n\ 2999 | fp\n\ 3000 | shmedia set as the default instruction set for SH64\n\ 3001 | SHmedia\n\ 3002 | shcompact\n\ 3003 | SHcompact\n")); 3004 fprintf (stream, _("\ 3005 -abi=[32|64] set size of expanded SHmedia operands and object\n\ 3006 file type\n\ 3007 -shcompact-const-crange emit code-range descriptors for constants in\n\ 3008 SHcompact code sections\n\ 3009 -no-mix disallow SHmedia code in the same section as\n\ 3010 constants and SHcompact code\n\ 3011 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ 3012 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ 3013 to 32 bits only\n")); 3014 #else 3015 fprintf (stream, _("\ 3016 -isa=[sh4\n\ 3017 | sh4a\n\ 3018 | dsp same as '-dsp'\n\ 3019 | fp\n\ 3020 | any]\n")); 3021 #endif /* HAVE_SH64 */ 3022 } 3023 3024 /* This struct is used to pass arguments to sh_count_relocs through 3025 bfd_map_over_sections. */ 3026 3027 struct sh_count_relocs 3028 { 3029 /* Symbol we are looking for. */ 3030 symbolS *sym; 3031 /* Count of relocs found. */ 3032 int count; 3033 }; 3034 3035 /* Count the number of fixups in a section which refer to a particular 3036 symbol. When using BFD_ASSEMBLER, this is called via 3037 bfd_map_over_sections. */ 3038 3039 static void 3040 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 3041 { 3042 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 3043 segment_info_type *seginfo; 3044 symbolS *sym; 3045 fixS *fix; 3046 3047 seginfo = seg_info (sec); 3048 if (seginfo == NULL) 3049 return; 3050 3051 sym = info->sym; 3052 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3053 { 3054 if (fix->fx_addsy == sym) 3055 { 3056 ++info->count; 3057 fix->fx_tcbit = 1; 3058 } 3059 } 3060 } 3061 3062 /* Handle the count relocs for a particular section. When using 3063 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ 3064 3065 static void 3066 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 3067 void *ignore ATTRIBUTE_UNUSED) 3068 { 3069 segment_info_type *seginfo; 3070 fixS *fix; 3071 3072 seginfo = seg_info (sec); 3073 if (seginfo == NULL) 3074 return; 3075 3076 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3077 { 3078 symbolS *sym; 3079 bfd_vma val; 3080 fixS *fscan; 3081 struct sh_count_relocs info; 3082 3083 if (fix->fx_r_type != BFD_RELOC_SH_USES) 3084 continue; 3085 3086 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 3087 symbol in the same section. */ 3088 sym = fix->fx_addsy; 3089 if (sym == NULL 3090 || fix->fx_subsy != NULL 3091 || fix->fx_addnumber != 0 3092 || S_GET_SEGMENT (sym) != sec 3093 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) 3094 || S_GET_STORAGE_CLASS (sym) == C_EXT 3095 #endif 3096 || S_IS_EXTERNAL (sym)) 3097 { 3098 as_warn_where (fix->fx_file, fix->fx_line, 3099 _(".uses does not refer to a local symbol in the same section")); 3100 continue; 3101 } 3102 3103 /* Look through the fixups again, this time looking for one 3104 at the same location as sym. */ 3105 val = S_GET_VALUE (sym); 3106 for (fscan = seginfo->fix_root; 3107 fscan != NULL; 3108 fscan = fscan->fx_next) 3109 if (val == fscan->fx_frag->fr_address + fscan->fx_where 3110 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 3111 && fscan->fx_r_type != BFD_RELOC_SH_CODE 3112 && fscan->fx_r_type != BFD_RELOC_SH_DATA 3113 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 3114 break; 3115 if (fscan == NULL) 3116 { 3117 as_warn_where (fix->fx_file, fix->fx_line, 3118 _("can't find fixup pointed to by .uses")); 3119 continue; 3120 } 3121 3122 if (fscan->fx_tcbit) 3123 { 3124 /* We've already done this one. */ 3125 continue; 3126 } 3127 3128 /* The variable fscan should also be a fixup to a local symbol 3129 in the same section. */ 3130 sym = fscan->fx_addsy; 3131 if (sym == NULL 3132 || fscan->fx_subsy != NULL 3133 || fscan->fx_addnumber != 0 3134 || S_GET_SEGMENT (sym) != sec 3135 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) 3136 || S_GET_STORAGE_CLASS (sym) == C_EXT 3137 #endif 3138 || S_IS_EXTERNAL (sym)) 3139 { 3140 as_warn_where (fix->fx_file, fix->fx_line, 3141 _(".uses target does not refer to a local symbol in the same section")); 3142 continue; 3143 } 3144 3145 /* Now we look through all the fixups of all the sections, 3146 counting the number of times we find a reference to sym. */ 3147 info.sym = sym; 3148 info.count = 0; 3149 #ifdef BFD_ASSEMBLER 3150 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 3151 #else 3152 { 3153 int iscan; 3154 3155 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) 3156 sh_count_relocs ((bfd *) NULL, iscan, &info); 3157 } 3158 #endif 3159 3160 if (info.count < 1) 3161 abort (); 3162 3163 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 3164 We have already adjusted the value of sym to include the 3165 fragment address, so we undo that adjustment here. */ 3166 subseg_change (sec, 0); 3167 fix_new (fscan->fx_frag, 3168 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 3169 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 3170 } 3171 } 3172 3173 /* This function is called after the symbol table has been completed, 3174 but before the relocs or section contents have been written out. 3175 If we have seen any .uses pseudo-ops, they point to an instruction 3176 which loads a register with the address of a function. We look 3177 through the fixups to find where the function address is being 3178 loaded from. We then generate a COUNT reloc giving the number of 3179 times that function address is referred to. The linker uses this 3180 information when doing relaxing, to decide when it can eliminate 3181 the stored function address entirely. */ 3182 3183 void 3184 sh_frob_file (void) 3185 { 3186 #ifdef HAVE_SH64 3187 shmedia_frob_file_before_adjust (); 3188 #endif 3189 3190 if (! sh_relax) 3191 return; 3192 3193 #ifdef BFD_ASSEMBLER 3194 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3195 #else 3196 { 3197 int iseg; 3198 3199 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) 3200 sh_frob_section ((bfd *) NULL, iseg, NULL); 3201 } 3202 #endif 3203 } 3204 3205 /* Called after relaxing. Set the correct sizes of the fragments, and 3206 create relocs so that md_apply_fix3 will fill in the correct values. */ 3207 3208 void 3209 #ifdef BFD_ASSEMBLER 3210 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3211 #else 3212 md_convert_frag (object_headers *headers ATTRIBUTE_UNUSED, segT seg, 3213 fragS *fragP) 3214 #endif 3215 { 3216 int donerelax = 0; 3217 3218 switch (fragP->fr_subtype) 3219 { 3220 case C (COND_JUMP, COND8): 3221 case C (COND_JUMP_DELAY, COND8): 3222 subseg_change (seg, 0); 3223 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3224 1, BFD_RELOC_SH_PCDISP8BY2); 3225 fragP->fr_fix += 2; 3226 fragP->fr_var = 0; 3227 break; 3228 3229 case C (UNCOND_JUMP, UNCOND12): 3230 subseg_change (seg, 0); 3231 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3232 1, BFD_RELOC_SH_PCDISP12BY2); 3233 fragP->fr_fix += 2; 3234 fragP->fr_var = 0; 3235 break; 3236 3237 case C (UNCOND_JUMP, UNCOND32): 3238 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3239 if (fragP->fr_symbol == NULL) 3240 as_bad_where (fragP->fr_file, fragP->fr_line, 3241 _("displacement overflows 12-bit field")); 3242 else if (S_IS_DEFINED (fragP->fr_symbol)) 3243 as_bad_where (fragP->fr_file, fragP->fr_line, 3244 _("displacement to defined symbol %s overflows 12-bit field"), 3245 S_GET_NAME (fragP->fr_symbol)); 3246 else 3247 as_bad_where (fragP->fr_file, fragP->fr_line, 3248 _("displacement to undefined symbol %s overflows 12-bit field"), 3249 S_GET_NAME (fragP->fr_symbol)); 3250 /* Stabilize this frag, so we don't trip an assert. */ 3251 fragP->fr_fix += fragP->fr_var; 3252 fragP->fr_var = 0; 3253 break; 3254 3255 case C (COND_JUMP, COND12): 3256 case C (COND_JUMP_DELAY, COND12): 3257 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3258 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3259 was due to gas incorrectly relaxing an out-of-range conditional 3260 branch with delay slot. It turned: 3261 bf.s L6 (slot mov.l r12,@(44,r0)) 3262 into: 3263 3264 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 3265 30: 00 09 nop 3266 32: 10 cb mov.l r12,@(44,r0) 3267 Therefore, branches with delay slots have to be handled 3268 differently from ones without delay slots. */ 3269 { 3270 unsigned char *buffer = 3271 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 3272 int highbyte = target_big_endian ? 0 : 1; 3273 int lowbyte = target_big_endian ? 1 : 0; 3274 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3275 3276 /* Toggle the true/false bit of the bcond. */ 3277 buffer[highbyte] ^= 0x2; 3278 3279 /* If this is a delayed branch, we may not put the bra in the 3280 slot. So we change it to a non-delayed branch, like that: 3281 b! cond slot_label; bra disp; slot_label: slot_insn 3282 ??? We should try if swapping the conditional branch and 3283 its delay-slot insn already makes the branch reach. */ 3284 3285 /* Build a relocation to six / four bytes farther on. */ 3286 subseg_change (seg, 0); 3287 fix_new (fragP, fragP->fr_fix, 2, 3288 #ifdef BFD_ASSEMBLER 3289 section_symbol (seg), 3290 #else 3291 seg_info (seg)->dot, 3292 #endif 3293 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3294 1, BFD_RELOC_SH_PCDISP8BY2); 3295 3296 /* Set up a jump instruction. */ 3297 buffer[highbyte + 2] = 0xa0; 3298 buffer[lowbyte + 2] = 0; 3299 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3300 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3301 3302 if (delay) 3303 { 3304 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3305 fragP->fr_fix += 4; 3306 } 3307 else 3308 { 3309 /* Fill in a NOP instruction. */ 3310 buffer[highbyte + 4] = 0x0; 3311 buffer[lowbyte + 4] = 0x9; 3312 3313 fragP->fr_fix += 6; 3314 } 3315 fragP->fr_var = 0; 3316 donerelax = 1; 3317 } 3318 break; 3319 3320 case C (COND_JUMP, COND32): 3321 case C (COND_JUMP_DELAY, COND32): 3322 case C (COND_JUMP, UNDEF_WORD_DISP): 3323 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3324 if (fragP->fr_symbol == NULL) 3325 as_bad_where (fragP->fr_file, fragP->fr_line, 3326 _("displacement overflows 8-bit field")); 3327 else if (S_IS_DEFINED (fragP->fr_symbol)) 3328 as_bad_where (fragP->fr_file, fragP->fr_line, 3329 _("displacement to defined symbol %s overflows 8-bit field"), 3330 S_GET_NAME (fragP->fr_symbol)); 3331 else 3332 as_bad_where (fragP->fr_file, fragP->fr_line, 3333 _("displacement to undefined symbol %s overflows 8-bit field "), 3334 S_GET_NAME (fragP->fr_symbol)); 3335 /* Stabilize this frag, so we don't trip an assert. */ 3336 fragP->fr_fix += fragP->fr_var; 3337 fragP->fr_var = 0; 3338 break; 3339 3340 default: 3341 #ifdef HAVE_SH64 3342 shmedia_md_convert_frag (headers, seg, fragP, TRUE); 3343 #else 3344 abort (); 3345 #endif 3346 } 3347 3348 if (donerelax && !sh_relax) 3349 as_warn_where (fragP->fr_file, fragP->fr_line, 3350 _("overflow in branch to %s; converted into longer instruction sequence"), 3351 (fragP->fr_symbol != NULL 3352 ? S_GET_NAME (fragP->fr_symbol) 3353 : "")); 3354 } 3355 3356 valueT 3357 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3358 { 3359 #ifdef BFD_ASSEMBLER 3360 #ifdef OBJ_ELF 3361 return size; 3362 #else /* ! OBJ_ELF */ 3363 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) 3364 & (-1 << bfd_get_section_alignment (stdoutput, seg))); 3365 #endif /* ! OBJ_ELF */ 3366 #else /* ! BFD_ASSEMBLER */ 3367 return ((size + (1 << section_alignment[(int) seg]) - 1) 3368 & (-1 << section_alignment[(int) seg])); 3369 #endif /* ! BFD_ASSEMBLER */ 3370 } 3371 3372 /* This static variable is set by s_uacons to tell sh_cons_align that 3373 the expression does not need to be aligned. */ 3374 3375 static int sh_no_align_cons = 0; 3376 3377 /* This handles the unaligned space allocation pseudo-ops, such as 3378 .uaword. .uaword is just like .word, but the value does not need 3379 to be aligned. */ 3380 3381 static void 3382 s_uacons (int bytes) 3383 { 3384 /* Tell sh_cons_align not to align this value. */ 3385 sh_no_align_cons = 1; 3386 cons (bytes); 3387 } 3388 3389 /* If a .word, et. al., pseud-op is seen, warn if the value is not 3390 aligned correctly. Note that this can cause warnings to be issued 3391 when assembling initialized structured which were declared with the 3392 packed attribute. FIXME: Perhaps we should require an option to 3393 enable this warning? */ 3394 3395 void 3396 sh_cons_align (int nbytes) 3397 { 3398 int nalign; 3399 char *p; 3400 3401 if (sh_no_align_cons) 3402 { 3403 /* This is an unaligned pseudo-op. */ 3404 sh_no_align_cons = 0; 3405 return; 3406 } 3407 3408 nalign = 0; 3409 while ((nbytes & 1) == 0) 3410 { 3411 ++nalign; 3412 nbytes >>= 1; 3413 } 3414 3415 if (nalign == 0) 3416 return; 3417 3418 if (now_seg == absolute_section) 3419 { 3420 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3421 as_warn (_("misaligned data")); 3422 return; 3423 } 3424 3425 p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3426 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3427 3428 record_alignment (now_seg, nalign); 3429 } 3430 3431 /* When relaxing, we need to output a reloc for any .align directive 3432 that requests alignment to a four byte boundary or larger. This is 3433 also where we check for misaligned data. */ 3434 3435 void 3436 sh_handle_align (fragS *frag) 3437 { 3438 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3439 3440 if (frag->fr_type == rs_align_code) 3441 { 3442 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3443 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3444 3445 char *p = frag->fr_literal + frag->fr_fix; 3446 3447 if (bytes & 1) 3448 { 3449 *p++ = 0; 3450 bytes--; 3451 frag->fr_fix += 1; 3452 } 3453 3454 if (target_big_endian) 3455 { 3456 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3457 frag->fr_var = sizeof big_nop_pattern; 3458 } 3459 else 3460 { 3461 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3462 frag->fr_var = sizeof little_nop_pattern; 3463 } 3464 } 3465 else if (frag->fr_type == rs_align_test) 3466 { 3467 if (bytes != 0) 3468 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3469 } 3470 3471 if (sh_relax 3472 && (frag->fr_type == rs_align 3473 || frag->fr_type == rs_align_code) 3474 && frag->fr_address + frag->fr_fix > 0 3475 && frag->fr_offset > 1 3476 && now_seg != bss_section) 3477 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3478 BFD_RELOC_SH_ALIGN); 3479 } 3480 3481 /* See whether the relocation should be resolved locally. */ 3482 3483 static bfd_boolean 3484 sh_local_pcrel (fixS *fix) 3485 { 3486 return (! sh_relax 3487 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3488 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3489 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3490 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3491 || fix->fx_r_type == BFD_RELOC_8_PCREL 3492 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3493 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3494 } 3495 3496 /* See whether we need to force a relocation into the output file. 3497 This is used to force out switch and PC relative relocations when 3498 relaxing. */ 3499 3500 int 3501 sh_force_relocation (fixS *fix) 3502 { 3503 /* These relocations can't make it into a DSO, so no use forcing 3504 them for global symbols. */ 3505 if (sh_local_pcrel (fix)) 3506 return 0; 3507 3508 /* Make sure some relocations get emitted. */ 3509 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3510 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3511 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3512 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3513 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3514 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3515 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3516 || generic_force_reloc (fix)) 3517 return 1; 3518 3519 if (! sh_relax) 3520 return 0; 3521 3522 return (fix->fx_pcrel 3523 || SWITCH_TABLE (fix) 3524 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3525 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3526 || fix->fx_r_type == BFD_RELOC_SH_CODE 3527 || fix->fx_r_type == BFD_RELOC_SH_DATA 3528 #ifdef HAVE_SH64 3529 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE 3530 #endif 3531 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3532 } 3533 3534 #ifdef OBJ_ELF 3535 bfd_boolean 3536 sh_fix_adjustable (fixS *fixP) 3537 { 3538 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3539 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3540 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3541 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3542 || fixP->fx_r_type == BFD_RELOC_RVA) 3543 return 0; 3544 3545 /* We need the symbol name for the VTABLE entries */ 3546 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3547 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3548 return 0; 3549 3550 return 1; 3551 } 3552 3553 void 3554 sh_elf_final_processing (void) 3555 { 3556 int val; 3557 3558 /* Set file-specific flags to indicate if this code needs 3559 a processor with the sh-dsp / sh2e ISA to execute. */ 3560 #ifdef HAVE_SH64 3561 /* SH5 and above don't know about the valid_arch arch_sh* bits defined 3562 in sh-opc.h, so check SH64 mode before checking valid_arch. */ 3563 if (sh64_isa_mode != sh64_isa_unspecified) 3564 val = EF_SH5; 3565 else 3566 #endif /* HAVE_SH64 */ 3567 if (valid_arch & arch_sh1) 3568 val = EF_SH1; 3569 else if (valid_arch & arch_sh2) 3570 val = EF_SH2; 3571 else if (valid_arch & arch_sh2e) 3572 val = EF_SH2E; 3573 else if (valid_arch & arch_sh_dsp) 3574 val = EF_SH_DSP; 3575 else if (valid_arch & arch_sh3) 3576 val = EF_SH3; 3577 else if (valid_arch & arch_sh3_dsp) 3578 val = EF_SH3_DSP; 3579 else if (valid_arch & arch_sh3e) 3580 val = EF_SH3E; 3581 else if (valid_arch & arch_sh4_nofpu) 3582 val = EF_SH4_NOFPU; 3583 else if (valid_arch & arch_sh4) 3584 val = EF_SH4; 3585 else if (valid_arch & arch_sh4a_nofpu) 3586 val = EF_SH4A_NOFPU; 3587 else if (valid_arch & arch_sh4a) 3588 val = EF_SH4A; 3589 else if (valid_arch & arch_sh4al_dsp) 3590 val = EF_SH4AL_DSP; 3591 else 3592 abort (); 3593 3594 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3595 elf_elfheader (stdoutput)->e_flags |= val; 3596 } 3597 #endif 3598 3599 /* Apply a fixup to the object file. */ 3600 3601 void 3602 md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3603 { 3604 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3605 int lowbyte = target_big_endian ? 1 : 0; 3606 int highbyte = target_big_endian ? 0 : 1; 3607 long val = (long) *valP; 3608 long max, min; 3609 int shift; 3610 3611 #ifdef BFD_ASSEMBLER 3612 /* A difference between two symbols, the second of which is in the 3613 current section, is transformed in a PC-relative relocation to 3614 the other symbol. We have to adjust the relocation type here. */ 3615 if (fixP->fx_pcrel) 3616 { 3617 switch (fixP->fx_r_type) 3618 { 3619 default: 3620 break; 3621 3622 case BFD_RELOC_32: 3623 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3624 break; 3625 3626 /* Currently, we only support 32-bit PCREL relocations. 3627 We'd need a new reloc type to handle 16_PCREL, and 3628 8_PCREL is already taken for R_SH_SWITCH8, which 3629 apparently does something completely different than what 3630 we need. FIXME. */ 3631 case BFD_RELOC_16: 3632 bfd_set_error (bfd_error_bad_value); 3633 return; 3634 3635 case BFD_RELOC_8: 3636 bfd_set_error (bfd_error_bad_value); 3637 return; 3638 } 3639 } 3640 3641 /* The function adjust_reloc_syms won't convert a reloc against a weak 3642 symbol into a reloc against a section, but bfd_install_relocation 3643 will screw up if the symbol is defined, so we have to adjust val here 3644 to avoid the screw up later. 3645 3646 For ordinary relocs, this does not happen for ELF, since for ELF, 3647 bfd_install_relocation uses the "special function" field of the 3648 howto, and does not execute the code that needs to be undone, as long 3649 as the special function does not return bfd_reloc_continue. 3650 It can happen for GOT- and PLT-type relocs the way they are 3651 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 3652 doesn't matter here since those relocs don't use VAL; see below. */ 3653 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 3654 && fixP->fx_addsy != NULL 3655 && S_IS_WEAK (fixP->fx_addsy)) 3656 val -= S_GET_VALUE (fixP->fx_addsy); 3657 #endif 3658 3659 #ifdef BFD_ASSEMBLER 3660 if (SWITCH_TABLE (fixP)) 3661 val -= S_GET_VALUE (fixP->fx_subsy); 3662 #else 3663 if (fixP->fx_r_type == 0) 3664 { 3665 if (fixP->fx_size == 2) 3666 fixP->fx_r_type = BFD_RELOC_16; 3667 else if (fixP->fx_size == 4) 3668 fixP->fx_r_type = BFD_RELOC_32; 3669 else if (fixP->fx_size == 1) 3670 fixP->fx_r_type = BFD_RELOC_8; 3671 else 3672 abort (); 3673 } 3674 #endif 3675 3676 max = min = 0; 3677 shift = 0; 3678 switch (fixP->fx_r_type) 3679 { 3680 case BFD_RELOC_SH_IMM4: 3681 max = 0xf; 3682 *buf = (*buf & 0xf0) | (val & 0xf); 3683 break; 3684 3685 case BFD_RELOC_SH_IMM4BY2: 3686 max = 0xf; 3687 shift = 1; 3688 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 3689 break; 3690 3691 case BFD_RELOC_SH_IMM4BY4: 3692 max = 0xf; 3693 shift = 2; 3694 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 3695 break; 3696 3697 case BFD_RELOC_SH_IMM8BY2: 3698 max = 0xff; 3699 shift = 1; 3700 *buf = val >> 1; 3701 break; 3702 3703 case BFD_RELOC_SH_IMM8BY4: 3704 max = 0xff; 3705 shift = 2; 3706 *buf = val >> 2; 3707 break; 3708 3709 case BFD_RELOC_8: 3710 case BFD_RELOC_SH_IMM8: 3711 /* Sometimes the 8 bit value is sign extended (e.g., add) and 3712 sometimes it is not (e.g., and). We permit any 8 bit value. 3713 Note that adding further restrictions may invalidate 3714 reasonable looking assembly code, such as ``and -0x1,r0''. */ 3715 max = 0xff; 3716 min = -0xff; 3717 *buf++ = val; 3718 break; 3719 3720 case BFD_RELOC_SH_PCRELIMM8BY4: 3721 /* The lower two bits of the PC are cleared before the 3722 displacement is added in. We can assume that the destination 3723 is on a 4 byte boundary. If this instruction is also on a 4 3724 byte boundary, then we want 3725 (target - here) / 4 3726 and target - here is a multiple of 4. 3727 Otherwise, we are on a 2 byte boundary, and we want 3728 (target - (here - 2)) / 4 3729 and target - here is not a multiple of 4. Computing 3730 (target - (here - 2)) / 4 == (target - here + 2) / 4 3731 works for both cases, since in the first case the addition of 3732 2 will be removed by the division. target - here is in the 3733 variable val. */ 3734 val = (val + 2) / 4; 3735 if (val & ~0xff) 3736 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3737 buf[lowbyte] = val; 3738 break; 3739 3740 case BFD_RELOC_SH_PCRELIMM8BY2: 3741 val /= 2; 3742 if (val & ~0xff) 3743 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3744 buf[lowbyte] = val; 3745 break; 3746 3747 case BFD_RELOC_SH_PCDISP8BY2: 3748 val /= 2; 3749 if (val < -0x80 || val > 0x7f) 3750 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3751 buf[lowbyte] = val; 3752 break; 3753 3754 case BFD_RELOC_SH_PCDISP12BY2: 3755 val /= 2; 3756 if (val < -0x800 || val > 0x7ff) 3757 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3758 buf[lowbyte] = val & 0xff; 3759 buf[highbyte] |= (val >> 8) & 0xf; 3760 break; 3761 3762 case BFD_RELOC_32: 3763 case BFD_RELOC_32_PCREL: 3764 md_number_to_chars (buf, val, 4); 3765 break; 3766 3767 case BFD_RELOC_16: 3768 md_number_to_chars (buf, val, 2); 3769 break; 3770 3771 case BFD_RELOC_SH_USES: 3772 /* Pass the value into sh_coff_reloc_mangle. */ 3773 fixP->fx_addnumber = val; 3774 break; 3775 3776 case BFD_RELOC_SH_COUNT: 3777 case BFD_RELOC_SH_ALIGN: 3778 case BFD_RELOC_SH_CODE: 3779 case BFD_RELOC_SH_DATA: 3780 case BFD_RELOC_SH_LABEL: 3781 /* Nothing to do here. */ 3782 break; 3783 3784 case BFD_RELOC_SH_LOOP_START: 3785 case BFD_RELOC_SH_LOOP_END: 3786 3787 case BFD_RELOC_VTABLE_INHERIT: 3788 case BFD_RELOC_VTABLE_ENTRY: 3789 fixP->fx_done = 0; 3790 return; 3791 3792 #ifdef OBJ_ELF 3793 case BFD_RELOC_32_PLT_PCREL: 3794 /* Make the jump instruction point to the address of the operand. At 3795 runtime we merely add the offset to the actual PLT entry. */ 3796 * valP = 0xfffffffc; 3797 val = fixP->fx_offset; 3798 if (fixP->fx_subsy) 3799 val -= S_GET_VALUE (fixP->fx_subsy); 3800 fixP->fx_addnumber = val; 3801 md_number_to_chars (buf, val, 4); 3802 break; 3803 3804 case BFD_RELOC_SH_GOTPC: 3805 /* This is tough to explain. We end up with this one if we have 3806 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 3807 The goal here is to obtain the absolute address of the GOT, 3808 and it is strongly preferable from a performance point of 3809 view to avoid using a runtime relocation for this. There are 3810 cases where you have something like: 3811 3812 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 3813 3814 and here no correction would be required. Internally in the 3815 assembler we treat operands of this form as not being pcrel 3816 since the '.' is explicitly mentioned, and I wonder whether 3817 it would simplify matters to do it this way. Who knows. In 3818 earlier versions of the PIC patches, the pcrel_adjust field 3819 was used to store the correction, but since the expression is 3820 not pcrel, I felt it would be confusing to do it this way. */ 3821 * valP -= 1; 3822 md_number_to_chars (buf, val, 4); 3823 break; 3824 3825 case BFD_RELOC_SH_TLS_GD_32: 3826 case BFD_RELOC_SH_TLS_LD_32: 3827 case BFD_RELOC_SH_TLS_IE_32: 3828 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3829 /* Fallthrough */ 3830 case BFD_RELOC_32_GOT_PCREL: 3831 case BFD_RELOC_SH_GOTPLT32: 3832 * valP = 0; /* Fully resolved at runtime. No addend. */ 3833 md_number_to_chars (buf, 0, 4); 3834 break; 3835 3836 case BFD_RELOC_SH_TLS_LDO_32: 3837 case BFD_RELOC_SH_TLS_LE_32: 3838 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3839 /* Fallthrough */ 3840 case BFD_RELOC_32_GOTOFF: 3841 md_number_to_chars (buf, val, 4); 3842 break; 3843 #endif 3844 3845 default: 3846 #ifdef HAVE_SH64 3847 shmedia_md_apply_fix3 (fixP, valP); 3848 return; 3849 #else 3850 abort (); 3851 #endif 3852 } 3853 3854 if (shift != 0) 3855 { 3856 if ((val & ((1 << shift) - 1)) != 0) 3857 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 3858 if (val >= 0) 3859 val >>= shift; 3860 else 3861 val = ((val >> shift) 3862 | ((long) -1 & ~ ((long) -1 >> shift))); 3863 } 3864 if (max != 0 && (val < min || val > max)) 3865 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 3866 3867 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 3868 fixP->fx_done = 1; 3869 } 3870 3871 /* Called just before address relaxation. Return the length 3872 by which a fragment must grow to reach it's destination. */ 3873 3874 int 3875 md_estimate_size_before_relax (fragS *fragP, segT segment_type) 3876 { 3877 int what; 3878 3879 switch (fragP->fr_subtype) 3880 { 3881 default: 3882 #ifdef HAVE_SH64 3883 return shmedia_md_estimate_size_before_relax (fragP, segment_type); 3884 #else 3885 abort (); 3886 #endif 3887 3888 3889 case C (UNCOND_JUMP, UNDEF_DISP): 3890 /* Used to be a branch to somewhere which was unknown. */ 3891 if (!fragP->fr_symbol) 3892 { 3893 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3894 } 3895 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3896 { 3897 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3898 } 3899 else 3900 { 3901 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 3902 } 3903 break; 3904 3905 case C (COND_JUMP, UNDEF_DISP): 3906 case C (COND_JUMP_DELAY, UNDEF_DISP): 3907 what = GET_WHAT (fragP->fr_subtype); 3908 /* Used to be a branch to somewhere which was unknown. */ 3909 if (fragP->fr_symbol 3910 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3911 { 3912 /* Got a symbol and it's defined in this segment, become byte 3913 sized - maybe it will fix up. */ 3914 fragP->fr_subtype = C (what, COND8); 3915 } 3916 else if (fragP->fr_symbol) 3917 { 3918 /* Its got a segment, but its not ours, so it will always be long. */ 3919 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 3920 } 3921 else 3922 { 3923 /* We know the abs value. */ 3924 fragP->fr_subtype = C (what, COND8); 3925 } 3926 break; 3927 3928 case C (UNCOND_JUMP, UNCOND12): 3929 case C (UNCOND_JUMP, UNCOND32): 3930 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3931 case C (COND_JUMP, COND8): 3932 case C (COND_JUMP, COND12): 3933 case C (COND_JUMP, COND32): 3934 case C (COND_JUMP, UNDEF_WORD_DISP): 3935 case C (COND_JUMP_DELAY, COND8): 3936 case C (COND_JUMP_DELAY, COND12): 3937 case C (COND_JUMP_DELAY, COND32): 3938 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3939 /* When relaxing a section for the second time, we don't need to 3940 do anything besides return the current size. */ 3941 break; 3942 } 3943 3944 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 3945 return fragP->fr_var; 3946 } 3947 3948 /* Put number into target byte order. */ 3949 3950 void 3951 md_number_to_chars (char *ptr, valueT use, int nbytes) 3952 { 3953 #ifdef HAVE_SH64 3954 /* We might need to set the contents type to data. */ 3955 sh64_flag_output (); 3956 #endif 3957 3958 if (! target_big_endian) 3959 number_to_chars_littleendian (ptr, use, nbytes); 3960 else 3961 number_to_chars_bigendian (ptr, use, nbytes); 3962 } 3963 3964 /* This version is used in obj-coff.c when not using BFD_ASSEMBLER. 3965 eg for the sh-hms target. */ 3966 3967 long 3968 md_pcrel_from (fixS *fixP) 3969 { 3970 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 3971 } 3972 3973 long 3974 md_pcrel_from_section (fixS *fixP, segT sec) 3975 { 3976 if (! sh_local_pcrel (fixP) 3977 && fixP->fx_addsy != (symbolS *) NULL 3978 && (generic_force_reloc (fixP) 3979 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 3980 { 3981 /* The symbol is undefined (or is defined but not in this section, 3982 or we're not sure about it being the final definition). Let the 3983 linker figure it out. We need to adjust the subtraction of a 3984 symbol to the position of the relocated data, though. */ 3985 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 3986 } 3987 3988 return md_pcrel_from (fixP); 3989 } 3990 3991 #ifdef OBJ_COFF 3992 3993 int 3994 tc_coff_sizemachdep (fragS *frag) 3995 { 3996 return md_relax_table[frag->fr_subtype].rlx_length; 3997 } 3998 3999 #endif /* OBJ_COFF */ 4000 4001 #ifndef BFD_ASSEMBLER 4002 #ifdef OBJ_COFF 4003 4004 /* Map BFD relocs to SH COFF relocs. */ 4005 4006 struct reloc_map 4007 { 4008 bfd_reloc_code_real_type bfd_reloc; 4009 int sh_reloc; 4010 }; 4011 4012 static const struct reloc_map coff_reloc_map[] = 4013 { 4014 { BFD_RELOC_32, R_SH_IMM32 }, 4015 { BFD_RELOC_16, R_SH_IMM16 }, 4016 { BFD_RELOC_8, R_SH_IMM8 }, 4017 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, 4018 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, 4019 { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, 4020 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, 4021 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, 4022 { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, 4023 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, 4024 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, 4025 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, 4026 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, 4027 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, 4028 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, 4029 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, 4030 { BFD_RELOC_SH_USES, R_SH_USES }, 4031 { BFD_RELOC_SH_COUNT, R_SH_COUNT }, 4032 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, 4033 { BFD_RELOC_SH_CODE, R_SH_CODE }, 4034 { BFD_RELOC_SH_DATA, R_SH_DATA }, 4035 { BFD_RELOC_SH_LABEL, R_SH_LABEL }, 4036 { BFD_RELOC_UNUSED, 0 } 4037 }; 4038 4039 /* Adjust a reloc for the SH. This is similar to the generic code, 4040 but does some minor tweaking. */ 4041 4042 void 4043 sh_coff_reloc_mangle (segment_info_type *seg, fixS *fix, 4044 struct internal_reloc *intr, unsigned int paddr) 4045 { 4046 symbolS *symbol_ptr = fix->fx_addsy; 4047 symbolS *dot; 4048 4049 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; 4050 4051 if (! SWITCH_TABLE (fix)) 4052 { 4053 const struct reloc_map *rm; 4054 4055 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) 4056 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) 4057 break; 4058 if (rm->bfd_reloc == BFD_RELOC_UNUSED) 4059 as_bad_where (fix->fx_file, fix->fx_line, 4060 _("Can not represent %s relocation in this object file format"), 4061 bfd_get_reloc_code_name (fix->fx_r_type)); 4062 intr->r_type = rm->sh_reloc; 4063 intr->r_offset = 0; 4064 } 4065 else 4066 { 4067 know (sh_relax); 4068 4069 if (fix->fx_r_type == BFD_RELOC_16) 4070 intr->r_type = R_SH_SWITCH16; 4071 else if (fix->fx_r_type == BFD_RELOC_8) 4072 intr->r_type = R_SH_SWITCH8; 4073 else if (fix->fx_r_type == BFD_RELOC_32) 4074 intr->r_type = R_SH_SWITCH32; 4075 else 4076 abort (); 4077 4078 /* For a switch reloc, we set r_offset to the difference between 4079 the reloc address and the subtrahend. When the linker is 4080 doing relaxing, it can use the determine the starting and 4081 ending points of the switch difference expression. */ 4082 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); 4083 } 4084 4085 /* PC relative relocs are always against the current section. */ 4086 if (symbol_ptr == NULL) 4087 { 4088 switch (fix->fx_r_type) 4089 { 4090 case BFD_RELOC_SH_PCRELIMM8BY2: 4091 case BFD_RELOC_SH_PCRELIMM8BY4: 4092 case BFD_RELOC_SH_PCDISP8BY2: 4093 case BFD_RELOC_SH_PCDISP12BY2: 4094 case BFD_RELOC_SH_USES: 4095 symbol_ptr = seg->dot; 4096 break; 4097 default: 4098 break; 4099 } 4100 } 4101 4102 if (fix->fx_r_type == BFD_RELOC_SH_USES) 4103 { 4104 /* We can't store the offset in the object file, since this 4105 reloc does not take up any space, so we store it in r_offset. 4106 The fx_addnumber field was set in md_apply_fix3. */ 4107 intr->r_offset = fix->fx_addnumber; 4108 } 4109 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) 4110 { 4111 /* We can't store the count in the object file, since this reloc 4112 does not take up any space, so we store it in r_offset. The 4113 fx_offset field was set when the fixup was created in 4114 sh_coff_frob_file. */ 4115 intr->r_offset = fix->fx_offset; 4116 /* This reloc is always absolute. */ 4117 symbol_ptr = NULL; 4118 } 4119 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) 4120 { 4121 /* Store the alignment in the r_offset field. */ 4122 intr->r_offset = fix->fx_offset; 4123 /* This reloc is always absolute. */ 4124 symbol_ptr = NULL; 4125 } 4126 else if (fix->fx_r_type == BFD_RELOC_SH_CODE 4127 || fix->fx_r_type == BFD_RELOC_SH_DATA 4128 || fix->fx_r_type == BFD_RELOC_SH_LABEL) 4129 { 4130 /* These relocs are always absolute. */ 4131 symbol_ptr = NULL; 4132 } 4133 4134 /* Turn the segment of the symbol into an offset. */ 4135 if (symbol_ptr != NULL) 4136 { 4137 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; 4138 if (dot != NULL) 4139 intr->r_symndx = dot->sy_number; 4140 else 4141 intr->r_symndx = symbol_ptr->sy_number; 4142 } 4143 else 4144 intr->r_symndx = -1; 4145 } 4146 4147 #endif /* OBJ_COFF */ 4148 #endif /* ! BFD_ASSEMBLER */ 4149 4150 #ifdef BFD_ASSEMBLER 4151 4152 /* Create a reloc. */ 4153 4154 arelent * 4155 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 4156 { 4157 arelent *rel; 4158 bfd_reloc_code_real_type r_type; 4159 4160 rel = (arelent *) xmalloc (sizeof (arelent)); 4161 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 4162 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 4163 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 4164 4165 r_type = fixp->fx_r_type; 4166 4167 if (SWITCH_TABLE (fixp)) 4168 { 4169 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 4170 rel->addend = 0; 4171 if (r_type == BFD_RELOC_16) 4172 r_type = BFD_RELOC_SH_SWITCH16; 4173 else if (r_type == BFD_RELOC_8) 4174 r_type = BFD_RELOC_8_PCREL; 4175 else if (r_type == BFD_RELOC_32) 4176 r_type = BFD_RELOC_SH_SWITCH32; 4177 else 4178 abort (); 4179 } 4180 else if (r_type == BFD_RELOC_SH_USES) 4181 rel->addend = fixp->fx_addnumber; 4182 else if (r_type == BFD_RELOC_SH_COUNT) 4183 rel->addend = fixp->fx_offset; 4184 else if (r_type == BFD_RELOC_SH_ALIGN) 4185 rel->addend = fixp->fx_offset; 4186 else if (r_type == BFD_RELOC_VTABLE_INHERIT 4187 || r_type == BFD_RELOC_VTABLE_ENTRY) 4188 rel->addend = fixp->fx_offset; 4189 else if (r_type == BFD_RELOC_SH_LOOP_START 4190 || r_type == BFD_RELOC_SH_LOOP_END) 4191 rel->addend = fixp->fx_offset; 4192 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 4193 { 4194 rel->addend = 0; 4195 rel->address = rel->addend = fixp->fx_offset; 4196 } 4197 #ifdef HAVE_SH64 4198 else if (shmedia_init_reloc (rel, fixp)) 4199 ; 4200 #endif 4201 else if (fixp->fx_pcrel) 4202 rel->addend = fixp->fx_addnumber; 4203 else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) 4204 rel->addend = fixp->fx_addnumber; 4205 else 4206 rel->addend = 0; 4207 4208 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 4209 4210 if (rel->howto == NULL) 4211 { 4212 as_bad_where (fixp->fx_file, fixp->fx_line, 4213 _("Cannot represent relocation type %s"), 4214 bfd_get_reloc_code_name (r_type)); 4215 /* Set howto to a garbage value so that we can keep going. */ 4216 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 4217 assert (rel->howto != NULL); 4218 } 4219 #ifdef OBJ_ELF 4220 else if (rel->howto->type == R_SH_IND12W) 4221 rel->addend += fixp->fx_offset - 4; 4222 #endif 4223 4224 return rel; 4225 } 4226 4227 #ifdef OBJ_ELF 4228 inline static char * 4229 sh_end_of_match (char *cont, char *what) 4230 { 4231 int len = strlen (what); 4232 4233 if (strncasecmp (cont, what, strlen (what)) == 0 4234 && ! is_part_of_name (cont[len])) 4235 return cont + len; 4236 4237 return NULL; 4238 } 4239 4240 int 4241 sh_parse_name (char const *name, expressionS *exprP, char *nextcharP) 4242 { 4243 char *next = input_line_pointer; 4244 char *next_end; 4245 int reloc_type; 4246 segT segment; 4247 4248 exprP->X_op_symbol = NULL; 4249 4250 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 4251 { 4252 if (! GOT_symbol) 4253 GOT_symbol = symbol_find_or_make (name); 4254 4255 exprP->X_add_symbol = GOT_symbol; 4256 no_suffix: 4257 /* If we have an absolute symbol or a reg, then we know its 4258 value now. */ 4259 segment = S_GET_SEGMENT (exprP->X_add_symbol); 4260 if (segment == absolute_section) 4261 { 4262 exprP->X_op = O_constant; 4263 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4264 exprP->X_add_symbol = NULL; 4265 } 4266 else if (segment == reg_section) 4267 { 4268 exprP->X_op = O_register; 4269 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4270 exprP->X_add_symbol = NULL; 4271 } 4272 else 4273 { 4274 exprP->X_op = O_symbol; 4275 exprP->X_add_number = 0; 4276 } 4277 4278 return 1; 4279 } 4280 4281 exprP->X_add_symbol = symbol_find_or_make (name); 4282 4283 if (*nextcharP != '@') 4284 goto no_suffix; 4285 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 4286 reloc_type = BFD_RELOC_32_GOTOFF; 4287 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 4288 reloc_type = BFD_RELOC_SH_GOTPLT32; 4289 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 4290 reloc_type = BFD_RELOC_32_GOT_PCREL; 4291 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 4292 reloc_type = BFD_RELOC_32_PLT_PCREL; 4293 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 4294 reloc_type = BFD_RELOC_SH_TLS_GD_32; 4295 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 4296 reloc_type = BFD_RELOC_SH_TLS_LD_32; 4297 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 4298 reloc_type = BFD_RELOC_SH_TLS_IE_32; 4299 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 4300 reloc_type = BFD_RELOC_SH_TLS_LE_32; 4301 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 4302 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 4303 else 4304 goto no_suffix; 4305 4306 *input_line_pointer = *nextcharP; 4307 input_line_pointer = next_end; 4308 *nextcharP = *input_line_pointer; 4309 *input_line_pointer = '\0'; 4310 4311 exprP->X_op = O_PIC_reloc; 4312 exprP->X_add_number = 0; 4313 exprP->X_md = reloc_type; 4314 4315 return 1; 4316 } 4317 #endif 4318 4319 void 4320 sh_cfi_frame_initial_instructions (void) 4321 { 4322 cfi_add_CFA_def_cfa (15, 0); 4323 } 4324 4325 int 4326 sh_regname_to_dw2regnum (const char *regname) 4327 { 4328 unsigned int regnum = -1; 4329 unsigned int i; 4330 const char *p; 4331 char *q; 4332 static struct { char *name; int dw2regnum; } regnames[] = 4333 { 4334 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4335 { "macl", 21 }, { "fpul", 23 } 4336 }; 4337 4338 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4339 if (strcmp (regnames[i].name, regname) == 0) 4340 return regnames[i].dw2regnum; 4341 4342 if (regname[0] == 'r') 4343 { 4344 p = regname + 1; 4345 regnum = strtoul (p, &q, 10); 4346 if (p == q || *q || regnum >= 16) 4347 return -1; 4348 } 4349 else if (regname[0] == 'f' && regname[1] == 'r') 4350 { 4351 p = regname + 2; 4352 regnum = strtoul (p, &q, 10); 4353 if (p == q || *q || regnum >= 16) 4354 return -1; 4355 regnum += 25; 4356 } 4357 else if (regname[0] == 'x' && regname[1] == 'd') 4358 { 4359 p = regname + 2; 4360 regnum = strtoul (p, &q, 10); 4361 if (p == q || *q || regnum >= 8) 4362 return -1; 4363 regnum += 87; 4364 } 4365 return regnum; 4366 } 4367 #endif /* BFD_ASSEMBLER */ 4368