1@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1999
2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5@ifset GENERIC
6@page
7@node Sparc-Dependent
8@chapter SPARC Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter SPARC Dependent Features
13@end ifclear
14
15@cindex SPARC support
16@menu
17* Sparc-Opts::                  Options
18* Sparc-Aligned-Data::		Option to enforce aligned data
19* Sparc-Float::                 Floating Point
20* Sparc-Directives::            Sparc Machine Directives
21@end menu
22
23@node Sparc-Opts
24@section Options
25
26@cindex options for SPARC
27@cindex SPARC options
28@cindex architectures, SPARC
29@cindex SPARC architectures
30The SPARC chip family includes several successive levels, using the same
31core instruction set, but including a few additional instructions at
32each level.  There are exceptions to this however.  For details on what
33instructions each variant supports, please see the chip's architecture
34reference manual.
35
36By default, @code{@value{AS}} assumes the core instruction set (SPARC
37v6), but ``bumps'' the architecture level as needed: it switches to
38successively higher architectures as it encounters instructions that
39only exist in the higher levels.
40
41If not configured for SPARC v9 (@code{sparc64-*-*}) GAS will not bump
42passed sparclite by default, an option must be passed to enable the
43v9 instructions.
44
45GAS treats sparclite as being compatible with v8, unless an architecture
46is explicitly requested.  SPARC v9 is always incompatible with sparclite.
47
48@c The order here is the same as the order of enum sparc_opcode_arch_val
49@c to give the user a sense of the order of the "bumping".
50
51@table @code
52@kindex -Av6
53@kindex Av7
54@kindex -Av8
55@kindex -Asparclet
56@kindex -Asparclite
57@kindex -Av9
58@kindex -Av9a
59@item -Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
60@itemx -Av8plus | -Av8plusa | -Av9 | -Av9a
61Use one of the @samp{-A} options to select one of the SPARC
62architectures explicitly.  If you select an architecture explicitly,
63@code{@value{AS}} reports a fatal error if it encounters an instruction
64or feature requiring an incompatible or higher level.
65
66@samp{-Av8plus} and @samp{-Av8plusa} select a 32 bit environment.
67
68@samp{-Av9} and @samp{-Av9a} select a 64 bit environment and are not
69available unless GAS is explicitly configured with 64 bit environment
70support.
71
72@samp{-Av8plusa} and @samp{-Av9a} enable the SPARC V9 instruction set with
73UltraSPARC extensions.
74
75@item -xarch=v8plus | -xarch=v8plusa
76For compatibility with the Solaris v9 assembler.  These options are
77equivalent to -Av8plus and -Av8plusa, respectively.
78
79@item -bump
80Warn whenever it is necessary to switch to another level.
81If an architecture level is explicitly requested, GAS will not issue
82warnings until that level is reached, and will then bump the level
83as required (except between incompatible levels).
84
85@item -32 | -64
86Select the word size, either 32 bits or 64 bits.
87These options are only available with the ELF object file format,
88and require that the necessary BFD support has been included.
89@end table
90
91@node Sparc-Aligned-Data
92@section Enforcing aligned data
93
94@cindex data alignment on SPARC
95@cindex SPARC data alignment
96SPARC GAS normally permits data to be misaligned.  For example, it
97permits the @code{.long} pseudo-op to be used on a byte boundary.
98However, the native SunOS and Solaris assemblers issue an error when
99they see misaligned data.
100
101@kindex --enforce-aligned-data
102You can use the @code{--enforce-aligned-data} option to make SPARC GAS
103also issue an error about misaligned data, just as the SunOS and Solaris
104assemblers do.
105
106The @code{--enforce-aligned-data} option is not the default because gcc
107issues misaligned data pseudo-ops when it initializes certain packed
108data structures (structures defined using the @code{packed} attribute).
109You may have to assemble with GAS in order to initialize packed data
110structures in your own code.
111
112@ignore
113@c FIXME: (sparc) Fill in "syntax" section!
114@c subsection syntax
115I don't know anything about Sparc syntax.  Someone who does
116will have to write this section.
117@end ignore
118
119@node Sparc-Float
120@section Floating Point
121
122@cindex floating point, SPARC (@sc{ieee})
123@cindex SPARC floating point (@sc{ieee})
124The Sparc uses @sc{ieee} floating-point numbers.
125
126@node Sparc-Directives
127@section Sparc Machine Directives
128
129@cindex SPARC machine directives
130@cindex machine directives, SPARC
131The Sparc version of @code{@value{AS}} supports the following additional
132machine directives:
133
134@table @code
135@cindex @code{align} directive, SPARC
136@item .align
137This must be followed by the desired alignment in bytes.
138
139@cindex @code{common} directive, SPARC
140@item .common
141This must be followed by a symbol name, a positive number, and
142@code{"bss"}.  This behaves somewhat like @code{.comm}, but the
143syntax is different.
144
145@cindex @code{half} directive, SPARC
146@item .half
147This is functionally identical to @code{.short}.
148
149@cindex @code{nword} directive, SPARC
150@item .nword
151On the Sparc, the @code{.nword} directive produces native word sized value,
152ie. if assembling with -32 it is equivalent to @code{.word}, if assembling
153with -64 it is equivalent to @code{.xword}.
154
155@cindex @code{proc} directive, SPARC
156@item .proc
157This directive is ignored.  Any text following it on the same
158line is also ignored.
159
160@cindex @code{register} directive, SPARC
161@item .register
162This directive declares use of a global application or system register.
163It must be followed by a register name %g2, %g3, %g6 or %g7, comma and
164the symbol name for that register.  If symbol name is @code{#scratch},
165it is a scratch register, if it is @code{#ignore}, it just suppresses any
166errors about using undeclared global register, but does not emit any
167information about it into the object file.  This can be useful e.g. if you
168save the register before use and restore it after.
169
170@cindex @code{reserve} directive, SPARC
171@item .reserve
172This must be followed by a symbol name, a positive number, and
173@code{"bss"}.  This behaves somewhat like @code{.lcomm}, but the
174syntax is different.
175
176@cindex @code{seg} directive, SPARC
177@item .seg
178This must be followed by @code{"text"}, @code{"data"}, or
179@code{"data1"}.  It behaves like @code{.text}, @code{.data}, or
180@code{.data 1}.
181
182@cindex @code{skip} directive, SPARC
183@item .skip
184This is functionally identical to the @code{.space} directive.
185
186@cindex @code{word} directive, SPARC
187@item .word
188On the Sparc, the @code{.word} directive produces 32 bit values,
189instead of the 16 bit values it produces on many other machines.
190
191@cindex @code{xword} directive, SPARC
192@item .xword
193On the Sparc V9 processor, the @code{.xword} directive produces
19464 bit values.
195@end table
196