1*b725ae77Skettenis /* Common target dependent code for GDB on ARM systems. 2*b725ae77Skettenis Copyright 2002, 2003 Free Software Foundation, Inc. 3*b725ae77Skettenis 4*b725ae77Skettenis This file is part of GDB. 5*b725ae77Skettenis 6*b725ae77Skettenis This program is free software; you can redistribute it and/or modify 7*b725ae77Skettenis it under the terms of the GNU General Public License as published by 8*b725ae77Skettenis the Free Software Foundation; either version 2 of the License, or 9*b725ae77Skettenis (at your option) any later version. 10*b725ae77Skettenis 11*b725ae77Skettenis This program is distributed in the hope that it will be useful, 12*b725ae77Skettenis but WITHOUT ANY WARRANTY; without even the implied warranty of 13*b725ae77Skettenis MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*b725ae77Skettenis GNU General Public License for more details. 15*b725ae77Skettenis 16*b725ae77Skettenis You should have received a copy of the GNU General Public License 17*b725ae77Skettenis along with this program; if not, write to the Free Software 18*b725ae77Skettenis Foundation, Inc., 59 Temple Place - Suite 330, 19*b725ae77Skettenis Boston, MA 02111-1307, USA. */ 20*b725ae77Skettenis 21*b725ae77Skettenis /* Register numbers of various important registers. Note that some of 22*b725ae77Skettenis these values are "real" register numbers, and correspond to the 23*b725ae77Skettenis general registers of the machine, and some are "phony" register 24*b725ae77Skettenis numbers which are too large to be actual register numbers as far as 25*b725ae77Skettenis the user is concerned but do serve to get the desired values when 26*b725ae77Skettenis passed to read_register. */ 27*b725ae77Skettenis 28*b725ae77Skettenis enum gdb_regnum { 29*b725ae77Skettenis ARM_A1_REGNUM = 0, /* first integer-like argument */ 30*b725ae77Skettenis ARM_A4_REGNUM = 3, /* last integer-like argument */ 31*b725ae77Skettenis ARM_AP_REGNUM = 11, 32*b725ae77Skettenis ARM_SP_REGNUM = 13, /* Contains address of top of stack */ 33*b725ae77Skettenis ARM_LR_REGNUM = 14, /* address to return to from a function call */ 34*b725ae77Skettenis ARM_PC_REGNUM = 15, /* Contains program counter */ 35*b725ae77Skettenis ARM_F0_REGNUM = 16, /* first floating point register */ 36*b725ae77Skettenis ARM_F3_REGNUM = 19, /* last floating point argument register */ 37*b725ae77Skettenis ARM_F7_REGNUM = 23, /* last floating point register */ 38*b725ae77Skettenis ARM_FPS_REGNUM = 24, /* floating point status register */ 39*b725ae77Skettenis ARM_PS_REGNUM = 25, /* Contains processor status */ 40*b725ae77Skettenis ARM_FP_REGNUM = 11, /* Frame register in ARM code, if used. */ 41*b725ae77Skettenis THUMB_FP_REGNUM = 7, /* Frame register in Thumb code, if used. */ 42*b725ae77Skettenis ARM_NUM_ARG_REGS = 4, 43*b725ae77Skettenis ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM, 44*b725ae77Skettenis ARM_NUM_FP_ARG_REGS = 4, 45*b725ae77Skettenis ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM 46*b725ae77Skettenis }; 47*b725ae77Skettenis 48*b725ae77Skettenis /* Size of integer registers. */ 49*b725ae77Skettenis #define INT_REGISTER_SIZE 4 50*b725ae77Skettenis 51*b725ae77Skettenis /* Say how long FP registers are. Used for documentation purposes and 52*b725ae77Skettenis code readability in this header. IEEE extended doubles are 80 53*b725ae77Skettenis bits. DWORD aligned they use 96 bits. */ 54*b725ae77Skettenis #define FP_REGISTER_SIZE 12 55*b725ae77Skettenis 56*b725ae77Skettenis /* Status registers are the same size as general purpose registers. 57*b725ae77Skettenis Used for documentation purposes and code readability in this 58*b725ae77Skettenis header. */ 59*b725ae77Skettenis #define STATUS_REGISTER_SIZE 4 60*b725ae77Skettenis 61*b725ae77Skettenis /* Number of machine registers. The only define actually required 62*b725ae77Skettenis is NUM_REGS. The other definitions are used for documentation 63*b725ae77Skettenis purposes and code readability. */ 64*b725ae77Skettenis /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS) 65*b725ae77Skettenis (and called PS for processor status) so the status bits can be cleared 66*b725ae77Skettenis from the PC (register 15). For 32 bit ARM code, a copy of CPSR is placed 67*b725ae77Skettenis in PS. */ 68*b725ae77Skettenis #define NUM_FREGS 8 /* Number of floating point registers. */ 69*b725ae77Skettenis #define NUM_SREGS 2 /* Number of status registers. */ 70*b725ae77Skettenis #define NUM_GREGS 16 /* Number of general purpose registers. */ 71*b725ae77Skettenis 72*b725ae77Skettenis 73*b725ae77Skettenis /* Instruction condition field values. */ 74*b725ae77Skettenis #define INST_EQ 0x0 75*b725ae77Skettenis #define INST_NE 0x1 76*b725ae77Skettenis #define INST_CS 0x2 77*b725ae77Skettenis #define INST_CC 0x3 78*b725ae77Skettenis #define INST_MI 0x4 79*b725ae77Skettenis #define INST_PL 0x5 80*b725ae77Skettenis #define INST_VS 0x6 81*b725ae77Skettenis #define INST_VC 0x7 82*b725ae77Skettenis #define INST_HI 0x8 83*b725ae77Skettenis #define INST_LS 0x9 84*b725ae77Skettenis #define INST_GE 0xa 85*b725ae77Skettenis #define INST_LT 0xb 86*b725ae77Skettenis #define INST_GT 0xc 87*b725ae77Skettenis #define INST_LE 0xd 88*b725ae77Skettenis #define INST_AL 0xe 89*b725ae77Skettenis #define INST_NV 0xf 90*b725ae77Skettenis 91*b725ae77Skettenis #define FLAG_N 0x80000000 92*b725ae77Skettenis #define FLAG_Z 0x40000000 93*b725ae77Skettenis #define FLAG_C 0x20000000 94*b725ae77Skettenis #define FLAG_V 0x10000000 95*b725ae77Skettenis 96*b725ae77Skettenis /* Type of floating-point code in use by inferior. There are really 3 models 97*b725ae77Skettenis that are traditionally supported (plus the endianness issue), but gcc can 98*b725ae77Skettenis only generate 2 of those. The third is APCS_FLOAT, where arguments to 99*b725ae77Skettenis functions are passed in floating-point registers. 100*b725ae77Skettenis 101*b725ae77Skettenis In addition to the traditional models, VFP adds two more. 102*b725ae77Skettenis 103*b725ae77Skettenis If you update this enum, don't forget to update fp_model_strings in 104*b725ae77Skettenis arm-tdep.c. */ 105*b725ae77Skettenis 106*b725ae77Skettenis enum arm_float_model 107*b725ae77Skettenis { 108*b725ae77Skettenis ARM_FLOAT_AUTO, /* Automatic detection. Do not set in tdep. */ 109*b725ae77Skettenis ARM_FLOAT_SOFT_FPA, /* Traditional soft-float (mixed-endian on LE ARM). */ 110*b725ae77Skettenis ARM_FLOAT_FPA, /* FPA co-processor. GCC calling convention. */ 111*b725ae77Skettenis ARM_FLOAT_SOFT_VFP, /* Soft-float with pure-endian doubles. */ 112*b725ae77Skettenis ARM_FLOAT_VFP, /* Full VFP calling convention. */ 113*b725ae77Skettenis ARM_FLOAT_LAST /* Keep at end. */ 114*b725ae77Skettenis }; 115*b725ae77Skettenis 116*b725ae77Skettenis /* A method to the setting based on user's choice and ABI setting. */ 117*b725ae77Skettenis enum arm_float_model arm_get_fp_model (struct gdbarch *); 118*b725ae77Skettenis 119*b725ae77Skettenis /* Target-dependent structure in gdbarch. */ 120*b725ae77Skettenis struct gdbarch_tdep 121*b725ae77Skettenis { 122*b725ae77Skettenis enum arm_float_model fp_model; /* Floating point calling conventions. */ 123*b725ae77Skettenis 124*b725ae77Skettenis CORE_ADDR lowest_pc; /* Lowest address at which instructions 125*b725ae77Skettenis will appear. */ 126*b725ae77Skettenis 127*b725ae77Skettenis const char *arm_breakpoint; /* Breakpoint pattern for an ARM insn. */ 128*b725ae77Skettenis int arm_breakpoint_size; /* And its size. */ 129*b725ae77Skettenis const char *thumb_breakpoint; /* Breakpoint pattern for an ARM insn. */ 130*b725ae77Skettenis int thumb_breakpoint_size; /* And its size. */ 131*b725ae77Skettenis 132*b725ae77Skettenis int jb_pc; /* Offset to PC value in jump buffer. 133*b725ae77Skettenis If this is negative, longjmp support 134*b725ae77Skettenis will be disabled. */ 135*b725ae77Skettenis size_t jb_elt_size; /* And the size of each entry in the buf. */ 136*b725ae77Skettenis }; 137*b725ae77Skettenis 138*b725ae77Skettenis #ifndef LOWEST_PC 139*b725ae77Skettenis #define LOWEST_PC (gdbarch_tdep (current_gdbarch)->lowest_pc) 140*b725ae77Skettenis #endif 141*b725ae77Skettenis 142*b725ae77Skettenis /* Prototypes for internal interfaces needed by more than one MD file. */ 143*b725ae77Skettenis int arm_pc_is_thumb_dummy (CORE_ADDR); 144*b725ae77Skettenis 145*b725ae77Skettenis int arm_pc_is_thumb (CORE_ADDR); 146*b725ae77Skettenis 147*b725ae77Skettenis CORE_ADDR thumb_get_next_pc (CORE_ADDR); 148*b725ae77Skettenis 149*b725ae77Skettenis CORE_ADDR arm_get_next_pc (CORE_ADDR); 150