1 /* Target-dependent code for Atmel AVR, for GDB. 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 3 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22 /* Contributed by Theodore A. Roth, troth@openavr.org */ 23 24 /* Portions of this file were taken from the original gdb-4.18 patch developed 25 by Denis Chertykov, denisc@overta.ru */ 26 27 #include "defs.h" 28 #include "frame.h" 29 #include "frame-unwind.h" 30 #include "frame-base.h" 31 #include "trad-frame.h" 32 #include "gdbcmd.h" 33 #include "gdbcore.h" 34 #include "inferior.h" 35 #include "symfile.h" 36 #include "arch-utils.h" 37 #include "regcache.h" 38 #include "gdb_string.h" 39 #include "dis-asm.h" 40 41 /* AVR Background: 42 43 (AVR micros are pure Harvard Architecture processors.) 44 45 The AVR family of microcontrollers have three distinctly different memory 46 spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for 47 the most part to store program instructions. The sram is 8 bits wide and is 48 used for the stack and the heap. Some devices lack sram and some can have 49 an additional external sram added on as a peripheral. 50 51 The eeprom is 8 bits wide and is used to store data when the device is 52 powered down. Eeprom is not directly accessible, it can only be accessed 53 via io-registers using a special algorithm. Accessing eeprom via gdb's 54 remote serial protocol ('m' or 'M' packets) looks difficult to do and is 55 not included at this time. 56 57 [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or 58 written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to 59 work, the remote target must be able to handle eeprom accesses and perform 60 the address translation.] 61 62 All three memory spaces have physical addresses beginning at 0x0. In 63 addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit 64 bytes instead of the 16 bit wide words used by the real device for the 65 Program Counter. 66 67 In order for remote targets to work correctly, extra bits must be added to 68 addresses before they are send to the target or received from the target 69 via the remote serial protocol. The extra bits are the MSBs and are used to 70 decode which memory space the address is referring to. */ 71 72 #undef XMALLOC 73 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE))) 74 75 #undef EXTRACT_INSN 76 #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2) 77 78 /* Constants: prefixed with AVR_ to avoid name space clashes */ 79 80 enum 81 { 82 AVR_REG_W = 24, 83 AVR_REG_X = 26, 84 AVR_REG_Y = 28, 85 AVR_FP_REGNUM = 28, 86 AVR_REG_Z = 30, 87 88 AVR_SREG_REGNUM = 32, 89 AVR_SP_REGNUM = 33, 90 AVR_PC_REGNUM = 34, 91 92 AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/, 93 AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/, 94 95 AVR_PC_REG_INDEX = 35, /* index into array of registers */ 96 97 AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */ 98 99 /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */ 100 AVR_MAX_PUSHES = 18, 101 102 /* Number of the last pushed register. r17 for current avr-gcc */ 103 AVR_LAST_PUSHED_REGNUM = 17, 104 105 AVR_ARG1_REGNUM = 24, /* Single byte argument */ 106 AVR_ARGN_REGNUM = 25, /* Multi byte argments */ 107 108 AVR_RET1_REGNUM = 24, /* Single byte return value */ 109 AVR_RETN_REGNUM = 25, /* Multi byte return value */ 110 111 /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8 112 bits? Do these have to match the bfd vma values?. It sure would make 113 things easier in the future if they didn't need to match. 114 115 Note: I chose these values so as to be consistent with bfd vma 116 addresses. 117 118 TRoth/2002-04-08: There is already a conflict with very large programs 119 in the mega128. The mega128 has 128K instruction bytes (64K words), 120 thus the Most Significant Bit is 0x10000 which gets masked off my 121 AVR_MEM_MASK. 122 123 The problem manifests itself when trying to set a breakpoint in a 124 function which resides in the upper half of the instruction space and 125 thus requires a 17-bit address. 126 127 For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK 128 from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet, 129 but could be for some remote targets by just adding the correct offset 130 to the address and letting the remote target handle the low-level 131 details of actually accessing the eeprom. */ 132 133 AVR_IMEM_START = 0x00000000, /* INSN memory */ 134 AVR_SMEM_START = 0x00800000, /* SRAM memory */ 135 #if 1 136 /* No eeprom mask defined */ 137 AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */ 138 #else 139 AVR_EMEM_START = 0x00810000, /* EEPROM memory */ 140 AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */ 141 #endif 142 }; 143 144 /* Prologue types: 145 146 NORMAL and CALL are the typical types (the -mcall-prologues gcc option 147 causes the generation of the CALL type prologues). */ 148 149 enum { 150 AVR_PROLOGUE_NONE, /* No prologue */ 151 AVR_PROLOGUE_NORMAL, 152 AVR_PROLOGUE_CALL, /* -mcall-prologues */ 153 AVR_PROLOGUE_MAIN, 154 AVR_PROLOGUE_INTR, /* interrupt handler */ 155 AVR_PROLOGUE_SIG, /* signal handler */ 156 }; 157 158 /* Any function with a frame looks like this 159 ....... <-SP POINTS HERE 160 LOCALS1 <-FP POINTS HERE 161 LOCALS0 162 SAVED FP 163 SAVED R3 164 SAVED R2 165 RET PC 166 FIRST ARG 167 SECOND ARG */ 168 169 struct avr_unwind_cache 170 { 171 /* The previous frame's inner most stack address. Used as this 172 frame ID's stack_addr. */ 173 CORE_ADDR prev_sp; 174 /* The frame's base, optionally used by the high-level debug info. */ 175 CORE_ADDR base; 176 int size; 177 int prologue_type; 178 /* Table indicating the location of each and every register. */ 179 struct trad_frame_saved_reg *saved_regs; 180 }; 181 182 struct gdbarch_tdep 183 { 184 /* FIXME: TRoth: is there anything to put here? */ 185 int foo; 186 }; 187 188 /* Lookup the name of a register given it's number. */ 189 190 static const char * 191 avr_register_name (int regnum) 192 { 193 static char *register_names[] = { 194 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 196 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 197 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 198 "SREG", "SP", "PC" 199 }; 200 if (regnum < 0) 201 return NULL; 202 if (regnum >= (sizeof (register_names) / sizeof (*register_names))) 203 return NULL; 204 return register_names[regnum]; 205 } 206 207 /* Return the GDB type object for the "standard" data type 208 of data in register N. */ 209 210 static struct type * 211 avr_register_type (struct gdbarch *gdbarch, int reg_nr) 212 { 213 if (reg_nr == AVR_PC_REGNUM) 214 return builtin_type_uint32; 215 if (reg_nr == AVR_SP_REGNUM) 216 return builtin_type_void_data_ptr; 217 else 218 return builtin_type_uint8; 219 } 220 221 /* Instruction address checks and convertions. */ 222 223 static CORE_ADDR 224 avr_make_iaddr (CORE_ADDR x) 225 { 226 return ((x) | AVR_IMEM_START); 227 } 228 229 /* FIXME: TRoth: Really need to use a larger mask for instructions. Some 230 devices are already up to 128KBytes of flash space. 231 232 TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */ 233 234 static CORE_ADDR 235 avr_convert_iaddr_to_raw (CORE_ADDR x) 236 { 237 return ((x) & 0xffffffff); 238 } 239 240 /* SRAM address checks and convertions. */ 241 242 static CORE_ADDR 243 avr_make_saddr (CORE_ADDR x) 244 { 245 return ((x) | AVR_SMEM_START); 246 } 247 248 static CORE_ADDR 249 avr_convert_saddr_to_raw (CORE_ADDR x) 250 { 251 return ((x) & 0xffffffff); 252 } 253 254 /* EEPROM address checks and convertions. I don't know if these will ever 255 actually be used, but I've added them just the same. TRoth */ 256 257 /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large 258 programs in the mega128. */ 259 260 /* static CORE_ADDR */ 261 /* avr_make_eaddr (CORE_ADDR x) */ 262 /* { */ 263 /* return ((x) | AVR_EMEM_START); */ 264 /* } */ 265 266 /* static int */ 267 /* avr_eaddr_p (CORE_ADDR x) */ 268 /* { */ 269 /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */ 270 /* } */ 271 272 /* static CORE_ADDR */ 273 /* avr_convert_eaddr_to_raw (CORE_ADDR x) */ 274 /* { */ 275 /* return ((x) & 0xffffffff); */ 276 /* } */ 277 278 /* Convert from address to pointer and vice-versa. */ 279 280 static void 281 avr_address_to_pointer (struct type *type, void *buf, CORE_ADDR addr) 282 { 283 /* Is it a code address? */ 284 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC 285 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD) 286 { 287 store_unsigned_integer (buf, TYPE_LENGTH (type), 288 avr_convert_iaddr_to_raw (addr >> 1)); 289 } 290 else 291 { 292 /* Strip off any upper segment bits. */ 293 store_unsigned_integer (buf, TYPE_LENGTH (type), 294 avr_convert_saddr_to_raw (addr)); 295 } 296 } 297 298 static CORE_ADDR 299 avr_pointer_to_address (struct type *type, const void *buf) 300 { 301 CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type)); 302 303 /* Is it a code address? */ 304 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC 305 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD 306 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) 307 return avr_make_iaddr (addr << 1); 308 else 309 return avr_make_saddr (addr); 310 } 311 312 static CORE_ADDR 313 avr_read_pc (ptid_t ptid) 314 { 315 ptid_t save_ptid; 316 ULONGEST pc; 317 CORE_ADDR retval; 318 319 save_ptid = inferior_ptid; 320 inferior_ptid = ptid; 321 regcache_cooked_read_unsigned (current_regcache, AVR_PC_REGNUM, &pc); 322 inferior_ptid = save_ptid; 323 retval = avr_make_iaddr (pc); 324 return retval; 325 } 326 327 static void 328 avr_write_pc (CORE_ADDR val, ptid_t ptid) 329 { 330 ptid_t save_ptid; 331 332 save_ptid = inferior_ptid; 333 inferior_ptid = ptid; 334 write_register (AVR_PC_REGNUM, avr_convert_iaddr_to_raw (val)); 335 inferior_ptid = save_ptid; 336 } 337 338 static CORE_ADDR 339 avr_read_sp (void) 340 { 341 ULONGEST sp; 342 343 regcache_cooked_read_unsigned (current_regcache, AVR_SP_REGNUM, &sp); 344 return (avr_make_saddr (sp)); 345 } 346 347 static int 348 avr_scan_arg_moves (int vpc, unsigned char *prologue) 349 { 350 unsigned short insn; 351 352 for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) 353 { 354 insn = EXTRACT_INSN (&prologue[vpc]); 355 if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */ 356 continue; 357 else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */ 358 continue; 359 else 360 break; 361 } 362 363 return vpc; 364 } 365 366 /* Function: avr_scan_prologue 367 368 This function decodes an AVR function prologue to determine: 369 1) the size of the stack frame 370 2) which registers are saved on it 371 3) the offsets of saved regs 372 This information is stored in the avr_unwind_cache structure. 373 374 Some devices lack the sbiw instruction, so on those replace this: 375 sbiw r28, XX 376 with this: 377 subi r28,lo8(XX) 378 sbci r29,hi8(XX) 379 380 A typical AVR function prologue with a frame pointer might look like this: 381 push rXX ; saved regs 382 ... 383 push r28 384 push r29 385 in r28,__SP_L__ 386 in r29,__SP_H__ 387 sbiw r28,<LOCALS_SIZE> 388 in __tmp_reg__,__SREG__ 389 cli 390 out __SP_H__,r29 391 out __SREG__,__tmp_reg__ 392 out __SP_L__,r28 393 394 A typical AVR function prologue without a frame pointer might look like 395 this: 396 push rXX ; saved regs 397 ... 398 399 A main function prologue looks like this: 400 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) 401 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) 402 out __SP_H__,r29 403 out __SP_L__,r28 404 405 A signal handler prologue looks like this: 406 push __zero_reg__ 407 push __tmp_reg__ 408 in __tmp_reg__, __SREG__ 409 push __tmp_reg__ 410 clr __zero_reg__ 411 push rXX ; save registers r18:r27, r30:r31 412 ... 413 push r28 ; save frame pointer 414 push r29 415 in r28, __SP_L__ 416 in r29, __SP_H__ 417 sbiw r28, <LOCALS_SIZE> 418 out __SP_H__, r29 419 out __SP_L__, r28 420 421 A interrupt handler prologue looks like this: 422 sei 423 push __zero_reg__ 424 push __tmp_reg__ 425 in __tmp_reg__, __SREG__ 426 push __tmp_reg__ 427 clr __zero_reg__ 428 push rXX ; save registers r18:r27, r30:r31 429 ... 430 push r28 ; save frame pointer 431 push r29 432 in r28, __SP_L__ 433 in r29, __SP_H__ 434 sbiw r28, <LOCALS_SIZE> 435 cli 436 out __SP_H__, r29 437 sei 438 out __SP_L__, r28 439 440 A `-mcall-prologues' prologue looks like this (Note that the megas use a 441 jmp instead of a rjmp, thus the prologue is one word larger since jmp is a 442 32 bit insn and rjmp is a 16 bit insn): 443 ldi r26,lo8(<LOCALS_SIZE>) 444 ldi r27,hi8(<LOCALS_SIZE>) 445 ldi r30,pm_lo8(.L_foo_body) 446 ldi r31,pm_hi8(.L_foo_body) 447 rjmp __prologue_saves__+RRR 448 .L_foo_body: */ 449 450 /* Not really part of a prologue, but still need to scan for it, is when a 451 function prologue moves values passed via registers as arguments to new 452 registers. In this case, all local variables live in registers, so there 453 may be some register saves. This is what it looks like: 454 movw rMM, rNN 455 ... 456 457 There could be multiple movw's. If the target doesn't have a movw insn, it 458 will use two mov insns. This could be done after any of the above prologue 459 types. */ 460 461 static CORE_ADDR 462 avr_scan_prologue (CORE_ADDR pc, struct avr_unwind_cache *info) 463 { 464 int i; 465 unsigned short insn; 466 int scan_stage = 0; 467 struct minimal_symbol *msymbol; 468 unsigned char prologue[AVR_MAX_PROLOGUE_SIZE]; 469 int vpc = 0; 470 471 /* FIXME: TRoth/2003-06-11: This could be made more efficient by only 472 reading in the bytes of the prologue. The problem is that the figuring 473 out where the end of the prologue is is a bit difficult. The old code 474 tried to do that, but failed quite often. */ 475 read_memory (pc, prologue, AVR_MAX_PROLOGUE_SIZE); 476 477 /* Scanning main()'s prologue 478 ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) 479 ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) 480 out __SP_H__,r29 481 out __SP_L__,r28 */ 482 483 if (1) 484 { 485 CORE_ADDR locals; 486 unsigned char img[] = { 487 0xde, 0xbf, /* out __SP_H__,r29 */ 488 0xcd, 0xbf /* out __SP_L__,r28 */ 489 }; 490 491 insn = EXTRACT_INSN (&prologue[vpc]); 492 /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */ 493 if ((insn & 0xf0f0) == 0xe0c0) 494 { 495 locals = (insn & 0xf) | ((insn & 0x0f00) >> 4); 496 insn = EXTRACT_INSN (&prologue[vpc + 2]); 497 /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */ 498 if ((insn & 0xf0f0) == 0xe0d0) 499 { 500 locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; 501 if (memcmp (prologue + vpc + 4, img, sizeof (img)) == 0) 502 { 503 info->prologue_type = AVR_PROLOGUE_MAIN; 504 info->base = locals; 505 return pc + 4; 506 } 507 } 508 } 509 } 510 511 /* Scanning `-mcall-prologues' prologue 512 Classic prologue is 10 bytes, mega prologue is a 12 bytes long */ 513 514 while (1) /* Using a while to avoid many goto's */ 515 { 516 int loc_size; 517 int body_addr; 518 unsigned num_pushes; 519 int pc_offset = 0; 520 521 insn = EXTRACT_INSN (&prologue[vpc]); 522 /* ldi r26,<LOCALS_SIZE> */ 523 if ((insn & 0xf0f0) != 0xe0a0) 524 break; 525 loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4); 526 pc_offset += 2; 527 528 insn = EXTRACT_INSN (&prologue[vpc + 2]); 529 /* ldi r27,<LOCALS_SIZE> / 256 */ 530 if ((insn & 0xf0f0) != 0xe0b0) 531 break; 532 loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; 533 pc_offset += 2; 534 535 insn = EXTRACT_INSN (&prologue[vpc + 4]); 536 /* ldi r30,pm_lo8(.L_foo_body) */ 537 if ((insn & 0xf0f0) != 0xe0e0) 538 break; 539 body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4); 540 pc_offset += 2; 541 542 insn = EXTRACT_INSN (&prologue[vpc + 6]); 543 /* ldi r31,pm_hi8(.L_foo_body) */ 544 if ((insn & 0xf0f0) != 0xe0f0) 545 break; 546 body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; 547 pc_offset += 2; 548 549 msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL); 550 if (!msymbol) 551 break; 552 553 insn = EXTRACT_INSN (&prologue[vpc + 8]); 554 /* rjmp __prologue_saves__+RRR */ 555 if ((insn & 0xf000) == 0xc000) 556 { 557 /* Extract PC relative offset from RJMP */ 558 i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0); 559 /* Convert offset to byte addressable mode */ 560 i *= 2; 561 /* Destination address */ 562 i += pc + 10; 563 564 if (body_addr != (pc + 10)/2) 565 break; 566 567 pc_offset += 2; 568 } 569 else if ((insn & 0xfe0e) == 0x940c) 570 { 571 /* Extract absolute PC address from JMP */ 572 i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16) 573 | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff)); 574 /* Convert address to byte addressable mode */ 575 i *= 2; 576 577 if (body_addr != (pc + 12)/2) 578 break; 579 580 pc_offset += 4; 581 } 582 else 583 break; 584 585 /* Resolve offset (in words) from __prologue_saves__ symbol. 586 Which is a pushes count in `-mcall-prologues' mode */ 587 num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2; 588 589 if (num_pushes > AVR_MAX_PUSHES) 590 { 591 fprintf_unfiltered (gdb_stderr, "Num pushes too large: %d\n", 592 num_pushes); 593 num_pushes = 0; 594 } 595 596 if (num_pushes) 597 { 598 int from; 599 600 info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes; 601 if (num_pushes >= 2) 602 info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1; 603 604 i = 0; 605 for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2); 606 from <= AVR_LAST_PUSHED_REGNUM; ++from) 607 info->saved_regs [from].addr = ++i; 608 } 609 info->size = loc_size + num_pushes; 610 info->prologue_type = AVR_PROLOGUE_CALL; 611 612 return pc + pc_offset; 613 } 614 615 /* Scan for the beginning of the prologue for an interrupt or signal 616 function. Note that we have to set the prologue type here since the 617 third stage of the prologue may not be present (e.g. no saved registered 618 or changing of the SP register). */ 619 620 if (1) 621 { 622 unsigned char img[] = { 623 0x78, 0x94, /* sei */ 624 0x1f, 0x92, /* push r1 */ 625 0x0f, 0x92, /* push r0 */ 626 0x0f, 0xb6, /* in r0,0x3f SREG */ 627 0x0f, 0x92, /* push r0 */ 628 0x11, 0x24 /* clr r1 */ 629 }; 630 if (memcmp (prologue, img, sizeof (img)) == 0) 631 { 632 info->prologue_type = AVR_PROLOGUE_INTR; 633 vpc += sizeof (img); 634 info->saved_regs[AVR_SREG_REGNUM].addr = 3; 635 info->saved_regs[0].addr = 2; 636 info->saved_regs[1].addr = 1; 637 info->size += 3; 638 } 639 else if (memcmp (img + 2, prologue, sizeof (img) - 2) == 0) 640 { 641 info->prologue_type = AVR_PROLOGUE_SIG; 642 vpc += sizeof (img) - 2; 643 info->saved_regs[AVR_SREG_REGNUM].addr = 3; 644 info->saved_regs[0].addr = 2; 645 info->saved_regs[1].addr = 1; 646 info->size += 3; 647 } 648 } 649 650 /* First stage of the prologue scanning. 651 Scan pushes (saved registers) */ 652 653 for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) 654 { 655 insn = EXTRACT_INSN (&prologue[vpc]); 656 if ((insn & 0xfe0f) == 0x920f) /* push rXX */ 657 { 658 /* Bits 4-9 contain a mask for registers R0-R32. */ 659 int regno = (insn & 0x1f0) >> 4; 660 info->size++; 661 info->saved_regs[regno].addr = info->size; 662 scan_stage = 1; 663 } 664 else 665 break; 666 } 667 668 if (vpc >= AVR_MAX_PROLOGUE_SIZE) 669 fprintf_unfiltered (gdb_stderr, 670 "Hit end of prologue while scanning pushes\n"); 671 672 /* Second stage of the prologue scanning. 673 Scan: 674 in r28,__SP_L__ 675 in r29,__SP_H__ */ 676 677 if (scan_stage == 1 && vpc < AVR_MAX_PROLOGUE_SIZE) 678 { 679 unsigned char img[] = { 680 0xcd, 0xb7, /* in r28,__SP_L__ */ 681 0xde, 0xb7 /* in r29,__SP_H__ */ 682 }; 683 unsigned short insn1; 684 685 if (memcmp (prologue + vpc, img, sizeof (img)) == 0) 686 { 687 vpc += 4; 688 scan_stage = 2; 689 } 690 } 691 692 /* Third stage of the prologue scanning. (Really two stages) 693 Scan for: 694 sbiw r28,XX or subi r28,lo8(XX) 695 sbci r29,hi8(XX) 696 in __tmp_reg__,__SREG__ 697 cli 698 out __SP_H__,r29 699 out __SREG__,__tmp_reg__ 700 out __SP_L__,r28 */ 701 702 if (scan_stage == 2 && vpc < AVR_MAX_PROLOGUE_SIZE) 703 { 704 int locals_size = 0; 705 unsigned char img[] = { 706 0x0f, 0xb6, /* in r0,0x3f */ 707 0xf8, 0x94, /* cli */ 708 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ 709 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */ 710 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ 711 }; 712 unsigned char img_sig[] = { 713 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ 714 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ 715 }; 716 unsigned char img_int[] = { 717 0xf8, 0x94, /* cli */ 718 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ 719 0x78, 0x94, /* sei */ 720 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ 721 }; 722 723 insn = EXTRACT_INSN (&prologue[vpc]); 724 vpc += 2; 725 if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */ 726 locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2); 727 else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */ 728 { 729 locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4); 730 insn = EXTRACT_INSN (&prologue[vpc]); 731 vpc += 2; 732 locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8); 733 } 734 else 735 return pc + vpc; 736 737 /* Scan the last part of the prologue. May not be present for interrupt 738 or signal handler functions, which is why we set the prologue type 739 when we saw the beginning of the prologue previously. */ 740 741 if (memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0) 742 { 743 vpc += sizeof (img_sig); 744 } 745 else if (memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0) 746 { 747 vpc += sizeof (img_int); 748 } 749 if (memcmp (prologue + vpc, img, sizeof (img)) == 0) 750 { 751 info->prologue_type = AVR_PROLOGUE_NORMAL; 752 vpc += sizeof (img); 753 } 754 755 info->size += locals_size; 756 757 return pc + avr_scan_arg_moves (vpc, prologue); 758 } 759 760 /* If we got this far, we could not scan the prologue, so just return the pc 761 of the frame plus an adjustment for argument move insns. */ 762 763 return pc + avr_scan_arg_moves (vpc, prologue);; 764 } 765 766 static CORE_ADDR 767 avr_skip_prologue (CORE_ADDR pc) 768 { 769 CORE_ADDR func_addr, func_end; 770 CORE_ADDR prologue_end = pc; 771 772 /* See what the symbol table says */ 773 774 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) 775 { 776 struct symtab_and_line sal; 777 struct avr_unwind_cache info = {0}; 778 struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS]; 779 780 info.saved_regs = saved_regs; 781 782 /* Need to run the prologue scanner to figure out if the function has a 783 prologue and possibly skip over moving arguments passed via registers 784 to other registers. */ 785 786 prologue_end = avr_scan_prologue (pc, &info); 787 788 if (info.prologue_type == AVR_PROLOGUE_NONE) 789 return pc; 790 else 791 { 792 sal = find_pc_line (func_addr, 0); 793 794 if (sal.line != 0 && sal.end < func_end) 795 return sal.end; 796 } 797 } 798 799 /* Either we didn't find the start of this function (nothing we can do), 800 or there's no line info, or the line after the prologue is after 801 the end of the function (there probably isn't a prologue). */ 802 803 return prologue_end; 804 } 805 806 /* Not all avr devices support the BREAK insn. Those that don't should treat 807 it as a NOP. Thus, it should be ok. Since the avr is currently a remote 808 only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */ 809 810 static const unsigned char * 811 avr_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr) 812 { 813 static unsigned char avr_break_insn [] = { 0x98, 0x95 }; 814 *lenptr = sizeof (avr_break_insn); 815 return avr_break_insn; 816 } 817 818 /* Given a return value in `regbuf' with a type `valtype', 819 extract and copy its value into `valbuf'. 820 821 Return values are always passed via registers r25:r24:... */ 822 823 static void 824 avr_extract_return_value (struct type *type, struct regcache *regcache, 825 void *valbuf) 826 { 827 ULONGEST r24, r25; 828 ULONGEST c; 829 int len; 830 if (TYPE_LENGTH (type) == 1) 831 { 832 regcache_cooked_read_unsigned (regcache, 24, &c); 833 store_unsigned_integer (valbuf, 1, c); 834 } 835 else 836 { 837 int i; 838 /* The MSB of the return value is always in r25, calculate which 839 register holds the LSB. */ 840 int lsb_reg = 25 - TYPE_LENGTH (type) + 1; 841 842 for (i=0; i< TYPE_LENGTH (type); i++) 843 { 844 regcache_cooked_read (regcache, lsb_reg + i, 845 (bfd_byte *) valbuf + i); 846 } 847 } 848 } 849 850 /* Put here the code to store, into fi->saved_regs, the addresses of 851 the saved registers of frame described by FRAME_INFO. This 852 includes special registers such as pc and fp saved in special ways 853 in the stack frame. sp is even more special: the address we return 854 for it IS the sp for the next frame. */ 855 856 struct avr_unwind_cache * 857 avr_frame_unwind_cache (struct frame_info *next_frame, 858 void **this_prologue_cache) 859 { 860 CORE_ADDR pc; 861 ULONGEST prev_sp; 862 ULONGEST this_base; 863 struct avr_unwind_cache *info; 864 int i; 865 866 if ((*this_prologue_cache)) 867 return (*this_prologue_cache); 868 869 info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache); 870 (*this_prologue_cache) = info; 871 info->saved_regs = trad_frame_alloc_saved_regs (next_frame); 872 873 info->size = 0; 874 info->prologue_type = AVR_PROLOGUE_NONE; 875 876 pc = frame_func_unwind (next_frame); 877 878 if ((pc > 0) && (pc < frame_pc_unwind (next_frame))) 879 avr_scan_prologue (pc, info); 880 881 if ((info->prologue_type != AVR_PROLOGUE_NONE) 882 && (info->prologue_type != AVR_PROLOGUE_MAIN)) 883 { 884 ULONGEST high_base; /* High byte of FP */ 885 886 /* The SP was moved to the FP. This indicates that a new frame 887 was created. Get THIS frame's FP value by unwinding it from 888 the next frame. */ 889 frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM, &this_base); 890 frame_unwind_unsigned_register (next_frame, AVR_FP_REGNUM+1, &high_base); 891 this_base += (high_base << 8); 892 893 /* The FP points at the last saved register. Adjust the FP back 894 to before the first saved register giving the SP. */ 895 prev_sp = this_base + info->size; 896 } 897 else 898 { 899 /* Assume that the FP is this frame's SP but with that pushed 900 stack space added back. */ 901 frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &this_base); 902 prev_sp = this_base + info->size; 903 } 904 905 /* Add 1 here to adjust for the post-decrement nature of the push 906 instruction.*/ 907 info->prev_sp = avr_make_saddr (prev_sp+1); 908 909 info->base = avr_make_saddr (this_base); 910 911 /* Adjust all the saved registers so that they contain addresses and not 912 offsets. */ 913 for (i = 0; i < NUM_REGS - 1; i++) 914 if (info->saved_regs[i].addr) 915 { 916 info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr); 917 } 918 919 /* Except for the main and startup code, the return PC is always saved on 920 the stack and is at the base of the frame. */ 921 922 if (info->prologue_type != AVR_PROLOGUE_MAIN) 923 { 924 info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp; 925 } 926 927 /* The previous frame's SP needed to be computed. Save the computed 928 value. */ 929 trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, info->prev_sp+1); 930 931 return info; 932 } 933 934 static CORE_ADDR 935 avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 936 { 937 ULONGEST pc; 938 939 frame_unwind_unsigned_register (next_frame, AVR_PC_REGNUM, &pc); 940 941 return avr_make_iaddr (pc); 942 } 943 944 /* Given a GDB frame, determine the address of the calling function's 945 frame. This will be used to create a new GDB frame struct. */ 946 947 static void 948 avr_frame_this_id (struct frame_info *next_frame, 949 void **this_prologue_cache, 950 struct frame_id *this_id) 951 { 952 struct avr_unwind_cache *info 953 = avr_frame_unwind_cache (next_frame, this_prologue_cache); 954 CORE_ADDR base; 955 CORE_ADDR func; 956 struct frame_id id; 957 958 /* The FUNC is easy. */ 959 func = frame_func_unwind (next_frame); 960 961 /* Hopefully the prologue analysis either correctly determined the 962 frame's base (which is the SP from the previous frame), or set 963 that base to "NULL". */ 964 base = info->prev_sp; 965 if (base == 0) 966 return; 967 968 id = frame_id_build (base, func); 969 (*this_id) = id; 970 } 971 972 static void 973 avr_frame_prev_register (struct frame_info *next_frame, 974 void **this_prologue_cache, 975 int regnum, int *optimizedp, 976 enum lval_type *lvalp, CORE_ADDR *addrp, 977 int *realnump, void *bufferp) 978 { 979 struct avr_unwind_cache *info 980 = avr_frame_unwind_cache (next_frame, this_prologue_cache); 981 982 if (regnum == AVR_PC_REGNUM) 983 { 984 if (trad_frame_addr_p (info->saved_regs, regnum)) 985 { 986 *optimizedp = 0; 987 *lvalp = lval_memory; 988 *addrp = info->saved_regs[regnum].addr; 989 *realnump = -1; 990 if (bufferp != NULL) 991 { 992 /* Reading the return PC from the PC register is slightly 993 abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes, 994 but in reality, only two bytes (3 in upcoming mega256) are 995 stored on the stack. 996 997 Also, note that the value on the stack is an addr to a word 998 not a byte, so we will need to multiply it by two at some 999 point. 1000 1001 And to confuse matters even more, the return address stored 1002 on the stack is in big endian byte order, even though most 1003 everything else about the avr is little endian. Ick! */ 1004 1005 /* FIXME: number of bytes read here will need updated for the 1006 mega256 when it is available. */ 1007 1008 ULONGEST pc; 1009 unsigned char tmp; 1010 unsigned char buf[2]; 1011 1012 read_memory (info->saved_regs[regnum].addr, buf, 2); 1013 1014 /* Convert the PC read from memory as a big-endian to 1015 little-endian order. */ 1016 tmp = buf[0]; 1017 buf[0] = buf[1]; 1018 buf[1] = tmp; 1019 1020 pc = (extract_unsigned_integer (buf, 2) * 2); 1021 store_unsigned_integer (bufferp, 1022 register_size (current_gdbarch, regnum), 1023 pc); 1024 } 1025 } 1026 } 1027 else 1028 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, 1029 optimizedp, lvalp, addrp, realnump, bufferp); 1030 } 1031 1032 static const struct frame_unwind avr_frame_unwind = { 1033 NORMAL_FRAME, 1034 avr_frame_this_id, 1035 avr_frame_prev_register 1036 }; 1037 1038 const struct frame_unwind * 1039 avr_frame_sniffer (struct frame_info *next_frame) 1040 { 1041 return &avr_frame_unwind; 1042 } 1043 1044 static CORE_ADDR 1045 avr_frame_base_address (struct frame_info *next_frame, void **this_cache) 1046 { 1047 struct avr_unwind_cache *info 1048 = avr_frame_unwind_cache (next_frame, this_cache); 1049 1050 return info->base; 1051 } 1052 1053 static const struct frame_base avr_frame_base = { 1054 &avr_frame_unwind, 1055 avr_frame_base_address, 1056 avr_frame_base_address, 1057 avr_frame_base_address 1058 }; 1059 1060 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that 1061 dummy frame. The frame ID's base needs to match the TOS value 1062 saved by save_dummy_frame_tos(), and the PC match the dummy frame's 1063 breakpoint. */ 1064 1065 static struct frame_id 1066 avr_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) 1067 { 1068 ULONGEST base; 1069 1070 frame_unwind_unsigned_register (next_frame, AVR_SP_REGNUM, &base); 1071 return frame_id_build (avr_make_saddr (base), frame_pc_unwind (next_frame)); 1072 } 1073 1074 /* When arguments must be pushed onto the stack, they go on in reverse 1075 order. The below implements a FILO (stack) to do this. */ 1076 1077 struct stack_item 1078 { 1079 int len; 1080 struct stack_item *prev; 1081 void *data; 1082 }; 1083 1084 static struct stack_item *push_stack_item (struct stack_item *prev, 1085 void *contents, int len); 1086 static struct stack_item * 1087 push_stack_item (struct stack_item *prev, void *contents, int len) 1088 { 1089 struct stack_item *si; 1090 si = xmalloc (sizeof (struct stack_item)); 1091 si->data = xmalloc (len); 1092 si->len = len; 1093 si->prev = prev; 1094 memcpy (si->data, contents, len); 1095 return si; 1096 } 1097 1098 static struct stack_item *pop_stack_item (struct stack_item *si); 1099 static struct stack_item * 1100 pop_stack_item (struct stack_item *si) 1101 { 1102 struct stack_item *dead = si; 1103 si = si->prev; 1104 xfree (dead->data); 1105 xfree (dead); 1106 return si; 1107 } 1108 1109 /* Setup the function arguments for calling a function in the inferior. 1110 1111 On the AVR architecture, there are 18 registers (R25 to R8) which are 1112 dedicated for passing function arguments. Up to the first 18 arguments 1113 (depending on size) may go into these registers. The rest go on the stack. 1114 1115 All arguments are aligned to start in even-numbered registers (odd-sized 1116 arguments, including char, have one free register above them). For example, 1117 an int in arg1 and a char in arg2 would be passed as such: 1118 1119 arg1 -> r25:r24 1120 arg2 -> r22 1121 1122 Arguments that are larger than 2 bytes will be split between two or more 1123 registers as available, but will NOT be split between a register and the 1124 stack. Arguments that go onto the stack are pushed last arg first (this is 1125 similar to the d10v). */ 1126 1127 /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be 1128 inaccurate. 1129 1130 An exceptional case exists for struct arguments (and possibly other 1131 aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but 1132 not a multiple of WORDSIZE bytes. In this case the argument is never split 1133 between the registers and the stack, but instead is copied in its entirety 1134 onto the stack, AND also copied into as many registers as there is room 1135 for. In other words, space in registers permitting, two copies of the same 1136 argument are passed in. As far as I can tell, only the one on the stack is 1137 used, although that may be a function of the level of compiler 1138 optimization. I suspect this is a compiler bug. Arguments of these odd 1139 sizes are left-justified within the word (as opposed to arguments smaller 1140 than WORDSIZE bytes, which are right-justified). 1141 1142 If the function is to return an aggregate type such as a struct, the caller 1143 must allocate space into which the callee will copy the return value. In 1144 this case, a pointer to the return value location is passed into the callee 1145 in register R0, which displaces one of the other arguments passed in via 1146 registers R0 to R2. */ 1147 1148 static CORE_ADDR 1149 avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 1150 struct regcache *regcache, CORE_ADDR bp_addr, 1151 int nargs, struct value **args, CORE_ADDR sp, 1152 int struct_return, CORE_ADDR struct_addr) 1153 { 1154 int i; 1155 unsigned char buf[2]; 1156 CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr); 1157 int regnum = AVR_ARGN_REGNUM; 1158 struct stack_item *si = NULL; 1159 1160 #if 0 1161 /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */ 1162 if (struct_return) 1163 { 1164 fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr); 1165 write_register (argreg--, struct_addr & 0xff); 1166 write_register (argreg--, (struct_addr >>8) & 0xff); 1167 } 1168 #endif 1169 1170 for (i = 0; i < nargs; i++) 1171 { 1172 int last_regnum; 1173 int j; 1174 struct value *arg = args[i]; 1175 struct type *type = check_typedef (VALUE_TYPE (arg)); 1176 char *contents = VALUE_CONTENTS (arg); 1177 int len = TYPE_LENGTH (type); 1178 1179 /* Calculate the potential last register needed. */ 1180 last_regnum = regnum - (len + (len & 1)); 1181 1182 /* If there are registers available, use them. Once we start putting 1183 stuff on the stack, all subsequent args go on stack. */ 1184 if ((si == NULL) && (last_regnum >= 8)) 1185 { 1186 ULONGEST val; 1187 1188 /* Skip a register for odd length args. */ 1189 if (len & 1) 1190 regnum--; 1191 1192 val = extract_unsigned_integer (contents, len); 1193 for (j=0; j<len; j++) 1194 { 1195 regcache_cooked_write_unsigned (regcache, regnum--, 1196 val >> (8*(len-j-1))); 1197 } 1198 } 1199 /* No registers available, push the args onto the stack. */ 1200 else 1201 { 1202 /* From here on, we don't care about regnum. */ 1203 si = push_stack_item (si, contents, len); 1204 } 1205 } 1206 1207 /* Push args onto the stack. */ 1208 while (si) 1209 { 1210 sp -= si->len; 1211 /* Add 1 to sp here to account for post decr nature of pushes. */ 1212 write_memory (sp+1, si->data, si->len); 1213 si = pop_stack_item (si); 1214 } 1215 1216 /* Set the return address. For the avr, the return address is the BP_ADDR. 1217 Need to push the return address onto the stack noting that it needs to be 1218 in big-endian order on the stack. */ 1219 buf[0] = (return_pc >> 8) & 0xff; 1220 buf[1] = return_pc & 0xff; 1221 1222 sp -= 2; 1223 write_memory (sp+1, buf, 2); /* Add one since pushes are post decr ops. */ 1224 1225 /* Finally, update the SP register. */ 1226 regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM, 1227 avr_convert_saddr_to_raw (sp)); 1228 1229 return sp; 1230 } 1231 1232 /* Initialize the gdbarch structure for the AVR's. */ 1233 1234 static struct gdbarch * 1235 avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 1236 { 1237 struct gdbarch *gdbarch; 1238 struct gdbarch_tdep *tdep; 1239 1240 /* Find a candidate among the list of pre-declared architectures. */ 1241 arches = gdbarch_list_lookup_by_info (arches, &info); 1242 if (arches != NULL) 1243 return arches->gdbarch; 1244 1245 /* None found, create a new architecture from the information provided. */ 1246 tdep = XMALLOC (struct gdbarch_tdep); 1247 gdbarch = gdbarch_alloc (&info, tdep); 1248 1249 /* If we ever need to differentiate the device types, do it here. */ 1250 switch (info.bfd_arch_info->mach) 1251 { 1252 case bfd_mach_avr1: 1253 case bfd_mach_avr2: 1254 case bfd_mach_avr3: 1255 case bfd_mach_avr4: 1256 case bfd_mach_avr5: 1257 break; 1258 } 1259 1260 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1261 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1262 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1263 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); 1264 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1265 set_gdbarch_addr_bit (gdbarch, 32); 1266 1267 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1268 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1269 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1270 1271 set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little); 1272 set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little); 1273 set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_single_little); 1274 1275 set_gdbarch_read_pc (gdbarch, avr_read_pc); 1276 set_gdbarch_write_pc (gdbarch, avr_write_pc); 1277 set_gdbarch_read_sp (gdbarch, avr_read_sp); 1278 1279 set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS); 1280 1281 set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM); 1282 set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM); 1283 1284 set_gdbarch_register_name (gdbarch, avr_register_name); 1285 set_gdbarch_register_type (gdbarch, avr_register_type); 1286 1287 set_gdbarch_extract_return_value (gdbarch, avr_extract_return_value); 1288 set_gdbarch_print_insn (gdbarch, print_insn_avr); 1289 1290 set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call); 1291 1292 set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer); 1293 set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address); 1294 1295 set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue); 1296 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1297 1298 set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc); 1299 1300 frame_unwind_append_sniffer (gdbarch, avr_frame_sniffer); 1301 frame_base_set_default (gdbarch, &avr_frame_base); 1302 1303 set_gdbarch_unwind_dummy_id (gdbarch, avr_unwind_dummy_id); 1304 1305 set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc); 1306 1307 return gdbarch; 1308 } 1309 1310 /* Send a query request to the avr remote target asking for values of the io 1311 registers. If args parameter is not NULL, then the user has requested info 1312 on a specific io register [This still needs implemented and is ignored for 1313 now]. The query string should be one of these forms: 1314 1315 "Ravr.io_reg" -> reply is "NN" number of io registers 1316 1317 "Ravr.io_reg:addr,len" where addr is first register and len is number of 1318 registers to be read. The reply should be "<NAME>,VV;" for each io register 1319 where, <NAME> is a string, and VV is the hex value of the register. 1320 1321 All io registers are 8-bit. */ 1322 1323 static void 1324 avr_io_reg_read_command (char *args, int from_tty) 1325 { 1326 LONGEST bufsiz = 0; 1327 char buf[400]; 1328 char query[400]; 1329 char *p; 1330 unsigned int nreg = 0; 1331 unsigned int val; 1332 int i, j, k, step; 1333 1334 /* Just get the maximum buffer size. */ 1335 bufsiz = target_read_partial (¤t_target, TARGET_OBJECT_AVR, 1336 NULL, NULL, 0, 0); 1337 if (bufsiz < 0) 1338 { 1339 fprintf_unfiltered (gdb_stderr, 1340 "ERR: info io_registers NOT supported by current " 1341 "target\n"); 1342 return; 1343 } 1344 if (bufsiz > sizeof (buf)) 1345 bufsiz = sizeof (buf); 1346 1347 /* Find out how many io registers the target has. */ 1348 strcpy (query, "avr.io_reg"); 1349 target_read_partial (¤t_target, TARGET_OBJECT_AVR, query, buf, 0, 1350 bufsiz); 1351 1352 if (strncmp (buf, "", bufsiz) == 0) 1353 { 1354 fprintf_unfiltered (gdb_stderr, 1355 "info io_registers NOT supported by target\n"); 1356 return; 1357 } 1358 1359 if (sscanf (buf, "%x", &nreg) != 1) 1360 { 1361 fprintf_unfiltered (gdb_stderr, 1362 "Error fetching number of io registers\n"); 1363 return; 1364 } 1365 1366 reinitialize_more_filter (); 1367 1368 printf_unfiltered ("Target has %u io registers:\n\n", nreg); 1369 1370 /* only fetch up to 8 registers at a time to keep the buffer small */ 1371 step = 8; 1372 1373 for (i = 0; i < nreg; i += step) 1374 { 1375 /* how many registers this round? */ 1376 j = step; 1377 if ((i+j) >= nreg) 1378 j = nreg - i; /* last block is less than 8 registers */ 1379 1380 snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j); 1381 target_read_partial (¤t_target, TARGET_OBJECT_AVR, query, buf, 1382 0, bufsiz); 1383 1384 p = buf; 1385 for (k = i; k < (i + j); k++) 1386 { 1387 if (sscanf (p, "%[^,],%x;", query, &val) == 2) 1388 { 1389 printf_filtered ("[%02x] %-15s : %02x\n", k, query, val); 1390 while ((*p != ';') && (*p != '\0')) 1391 p++; 1392 p++; /* skip over ';' */ 1393 if (*p == '\0') 1394 break; 1395 } 1396 } 1397 } 1398 } 1399 1400 extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */ 1401 1402 void 1403 _initialize_avr_tdep (void) 1404 { 1405 register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init); 1406 1407 /* Add a new command to allow the user to query the avr remote target for 1408 the values of the io space registers in a saner way than just using 1409 `x/NNNb ADDR`. */ 1410 1411 /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr 1412 io_registers' to signify it is not available on other platforms. */ 1413 1414 add_cmd ("io_registers", class_info, avr_io_reg_read_command, 1415 "query remote avr target for io space register values", &infolist); 1416 } 1417