1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB. 2 Copyright 1995, 1996, 1998, 1999, 2000, 2001, 2002 3 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22 #include "server.h" 23 #include "linux-low.h" 24 25 #ifdef HAVE_SYS_REG_H 26 #include <sys/reg.h> 27 #endif 28 29 #define mips_num_regs 90 30 31 #include <asm/ptrace.h> 32 33 /* Return the ptrace ``address'' of register REGNO. */ 34 35 /* Matches mips_generic32_regs */ 36 static int mips_regmap[] = { 37 0, 1, 2, 3, 4, 5, 6, 7, 38 8, 9, 10, 11, 12, 13, 14, 15, 39 16, 17, 18, 19, 20, 21, 22, 23, 40 24, 25, 26, 27, 28, 29, 30, 31, 41 42 -1, MMLO, MMHI, BADVADDR, CAUSE, PC, 43 44 FPR_BASE, FPR_BASE + 1, FPR_BASE + 2, FPR_BASE + 3, 45 FPR_BASE + 4, FPR_BASE + 5, FPR_BASE + 6, FPR_BASE + 7, 46 FPR_BASE + 8, FPR_BASE + 8, FPR_BASE + 10, FPR_BASE + 11, 47 FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15, 48 FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19, 49 FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23, 50 FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27, 51 FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31, 52 FPC_CSR, FPC_EIR, 53 54 -1, -1, 55 -1, -1, -1, -1, -1, -1, -1, -1, 56 -1, -1, -1, -1, -1, -1, -1, -1, 57 }; 58 59 /* From mips-linux-nat.c. */ 60 61 /* Pseudo registers can not be read. ptrace does not provide a way to 62 read (or set) PS_REGNUM, and there's no point in reading or setting 63 ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR via 64 ptrace(). */ 65 66 static int 67 mips_cannot_fetch_register (int regno) 68 { 69 if (mips_regmap[regno] == -1) 70 return 1; 71 72 if (find_regno ("zero") == regno) 73 return 1; 74 75 return 0; 76 } 77 78 static int 79 mips_cannot_store_register (int regno) 80 { 81 if (mips_regmap[regno] == -1) 82 return 1; 83 84 if (find_regno ("zero") == regno) 85 return 1; 86 87 if (find_regno ("cause") == regno) 88 return 1; 89 90 if (find_regno ("bad") == regno) 91 return 1; 92 93 if (find_regno ("fir") == regno) 94 return 1; 95 96 return 0; 97 } 98 99 static CORE_ADDR 100 mips_get_pc () 101 { 102 unsigned long pc; 103 collect_register_by_name ("pc", &pc); 104 return pc; 105 } 106 107 static void 108 mips_set_pc (CORE_ADDR pc) 109 { 110 unsigned long newpc = pc; 111 supply_register_by_name ("pc", &newpc); 112 } 113 114 /* Correct in either endianness. */ 115 static const unsigned long mips_breakpoint = 0x0005000d; 116 #define mips_breakpoint_len 4 117 118 /* We only place breakpoints in empty marker functions, and thread locking 119 is outside of the function. So rather than importing software single-step, 120 we can just run until exit. */ 121 static CORE_ADDR 122 mips_reinsert_addr () 123 { 124 unsigned long pc; 125 collect_register_by_name ("ra", &pc); 126 return pc; 127 } 128 129 static int 130 mips_breakpoint_at (CORE_ADDR where) 131 { 132 unsigned long insn; 133 134 (*the_target->read_memory) (where, (char *) &insn, 4); 135 if (insn == mips_breakpoint) 136 return 1; 137 138 /* If necessary, recognize more trap instructions here. GDB only uses the 139 one. */ 140 return 0; 141 } 142 143 struct linux_target_ops the_low_target = { 144 mips_num_regs, 145 mips_regmap, 146 mips_cannot_fetch_register, 147 mips_cannot_store_register, 148 mips_get_pc, 149 mips_set_pc, 150 (const char *) &mips_breakpoint, 151 mips_breakpoint_len, 152 mips_reinsert_addr, 153 0, 154 mips_breakpoint_at, 155 }; 156