1 /* Target-dependent code for the SPARC for GDB, the GNU debugger. 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996 3 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 20 21 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */ 22 23 #include "defs.h" 24 #include "frame.h" 25 #include "inferior.h" 26 #include "obstack.h" 27 #include "target.h" 28 #include "value.h" 29 #include "bfd.h" 30 #include "gdb_string.h" 31 32 #ifdef USE_PROC_FS 33 #include <sys/procfs.h> 34 #endif 35 36 #include "gdbcore.h" 37 38 #ifdef GDB_TARGET_IS_SPARC64 39 #define FP_REGISTER_BYTES (64 * 4) 40 #else 41 #define FP_REGISTER_BYTES (32 * 4) 42 #endif 43 44 /* If not defined, assume 32 bit sparc. */ 45 #ifndef FP_MAX_REGNUM 46 #define FP_MAX_REGNUM (FP0_REGNUM + 32) 47 #endif 48 49 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM)) 50 51 /* From infrun.c */ 52 extern int stop_after_trap; 53 54 /* We don't store all registers immediately when requested, since they 55 get sent over in large chunks anyway. Instead, we accumulate most 56 of the changes and send them over once. "deferred_stores" keeps 57 track of which sets of registers we have locally-changed copies of, 58 so we only need send the groups that have changed. */ 59 60 int deferred_stores = 0; /* Cumulates stores we want to do eventually. */ 61 62 /* Branches with prediction are treated like their non-predicting cousins. */ 63 /* FIXME: What about floating point branches? */ 64 65 /* Macros to extract fields from sparc instructions. */ 66 #define X_OP(i) (((i) >> 30) & 0x3) 67 #define X_RD(i) (((i) >> 25) & 0x1f) 68 #define X_A(i) (((i) >> 29) & 1) 69 #define X_COND(i) (((i) >> 25) & 0xf) 70 #define X_OP2(i) (((i) >> 22) & 0x7) 71 #define X_IMM22(i) ((i) & 0x3fffff) 72 #define X_OP3(i) (((i) >> 19) & 0x3f) 73 #define X_RS1(i) (((i) >> 14) & 0x1f) 74 #define X_I(i) (((i) >> 13) & 1) 75 #define X_IMM13(i) ((i) & 0x1fff) 76 /* Sign extension macros. */ 77 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000) 78 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000) 79 #ifdef GDB_TARGET_IS_SPARC64 80 #define X_CC(i) (((i) >> 20) & 3) 81 #define X_P(i) (((i) >> 19) & 1) 82 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000) 83 #define X_RCOND(i) (((i) >> 25) & 7) 84 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000) 85 #define X_FCN(i) (((i) >> 25) & 31) 86 #endif 87 88 typedef enum 89 { 90 Error, not_branch, bicc, bicca, ba, baa, ticc, ta, 91 #ifdef GDB_TARGET_IS_SPARC64 92 done_retry 93 #endif 94 } branch_type; 95 96 /* Simulate single-step ptrace call for sun4. Code written by Gary 97 Beihl (beihl@mcc.com). */ 98 99 /* npc4 and next_pc describe the situation at the time that the 100 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */ 101 static CORE_ADDR next_pc, npc4, target; 102 static int brknpc4, brktrg; 103 typedef char binsn_quantum[BREAKPOINT_MAX]; 104 static binsn_quantum break_mem[3]; 105 106 /* Non-zero if we just simulated a single-step ptrace call. This is 107 needed because we cannot remove the breakpoints in the inferior 108 process until after the `wait' in `wait_for_inferior'. Used for 109 sun4. */ 110 111 int one_stepped; 112 113 static branch_type isbranch PARAMS ((long, CORE_ADDR, CORE_ADDR *)); 114 115 /* single_step() is called just before we want to resume the inferior, 116 if we want to single-step it but there is no hardware or kernel single-step 117 support (as on all SPARCs). We find all the possible targets of the 118 coming instruction and breakpoint them. 119 120 single_step is also called just after the inferior stops. If we had 121 set up a simulated single-step, we undo our damage. */ 122 123 void 124 single_step (ignore) 125 enum target_signal ignore; /* pid, but we don't need it */ 126 { 127 branch_type br; 128 CORE_ADDR pc; 129 long pc_instruction; 130 131 if (!one_stepped) 132 { 133 /* Always set breakpoint for NPC. */ 134 next_pc = read_register (NPC_REGNUM); 135 npc4 = next_pc + 4; /* branch not taken */ 136 137 target_insert_breakpoint (next_pc, break_mem[0]); 138 /* printf_unfiltered ("set break at %x\n",next_pc); */ 139 140 pc = read_register (PC_REGNUM); 141 pc_instruction = read_memory_integer (pc, 4); 142 br = isbranch (pc_instruction, pc, &target); 143 brknpc4 = brktrg = 0; 144 145 if (br == bicca) 146 { 147 /* Conditional annulled branch will either end up at 148 npc (if taken) or at npc+4 (if not taken). 149 Trap npc+4. */ 150 brknpc4 = 1; 151 target_insert_breakpoint (npc4, break_mem[1]); 152 } 153 else if (br == baa && target != next_pc) 154 { 155 /* Unconditional annulled branch will always end up at 156 the target. */ 157 brktrg = 1; 158 target_insert_breakpoint (target, break_mem[2]); 159 } 160 #ifdef GDB_TARGET_IS_SPARC64 161 else if (br == done_retry) 162 { 163 brktrg = 1; 164 target_insert_breakpoint (target, break_mem[2]); 165 } 166 #endif 167 168 /* We are ready to let it go */ 169 one_stepped = 1; 170 return; 171 } 172 else 173 { 174 /* Remove breakpoints */ 175 target_remove_breakpoint (next_pc, break_mem[0]); 176 177 if (brknpc4) 178 target_remove_breakpoint (npc4, break_mem[1]); 179 180 if (brktrg) 181 target_remove_breakpoint (target, break_mem[2]); 182 183 one_stepped = 0; 184 } 185 } 186 187 /* Call this for each newly created frame. For SPARC, we need to calculate 188 the bottom of the frame, and do some extra work if the prologue 189 has been generated via the -mflat option to GCC. In particular, 190 we need to know where the previous fp and the pc have been stashed, 191 since their exact position within the frame may vary. */ 192 193 void 194 sparc_init_extra_frame_info (fromleaf, fi) 195 int fromleaf; 196 struct frame_info *fi; 197 { 198 char *name; 199 CORE_ADDR addr; 200 int insn; 201 202 fi->bottom = 203 (fi->next ? 204 (fi->frame == fi->next->frame ? fi->next->bottom : fi->next->frame) : 205 read_register (SP_REGNUM)); 206 207 /* If fi->next is NULL, then we already set ->frame by passing read_fp() 208 to create_new_frame. */ 209 if (fi->next) 210 { 211 char buf[MAX_REGISTER_RAW_SIZE]; 212 int err; 213 214 /* Compute ->frame as if not flat. If it is flat, we'll change 215 it later. */ 216 /* FIXME: If error reading memory, should just stop backtracing, rather 217 than error(). */ 218 get_saved_register (buf, 0, 0, fi, FP_REGNUM, 0); 219 fi->frame = extract_address (buf, REGISTER_RAW_SIZE (FP_REGNUM)); 220 } 221 222 /* Decide whether this is a function with a ``flat register window'' 223 frame. For such functions, the frame pointer is actually in %i7. */ 224 fi->flat = 0; 225 if (find_pc_partial_function (fi->pc, &name, &addr, NULL)) 226 { 227 /* See if the function starts with an add (which will be of a 228 negative number if a flat frame) to the sp. FIXME: Does not 229 handle large frames which will need more than one instruction 230 to adjust the sp. */ 231 insn = read_memory_integer (addr, 4); 232 if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0 233 && X_I (insn) && X_SIMM13 (insn) < 0) 234 { 235 int offset = X_SIMM13 (insn); 236 237 /* Then look for a save of %i7 into the frame. */ 238 insn = read_memory_integer (addr + 4, 4); 239 if (X_OP (insn) == 3 240 && X_RD (insn) == 31 241 && X_OP3 (insn) == 4 242 && X_RS1 (insn) == 14) 243 { 244 char buf[MAX_REGISTER_RAW_SIZE]; 245 246 /* We definitely have a flat frame now. */ 247 fi->flat = 1; 248 249 fi->sp_offset = offset; 250 251 /* Overwrite the frame's address with the value in %i7. */ 252 get_saved_register (buf, 0, 0, fi, I7_REGNUM, 0); 253 fi->frame = extract_address (buf, REGISTER_RAW_SIZE (I7_REGNUM)); 254 255 /* Record where the fp got saved. */ 256 fi->fp_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn); 257 258 /* Also try to collect where the pc got saved to. */ 259 fi->pc_addr = 0; 260 insn = read_memory_integer (addr + 12, 4); 261 if (X_OP (insn) == 3 262 && X_RD (insn) == 15 263 && X_OP3 (insn) == 4 264 && X_RS1 (insn) == 14) 265 fi->pc_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn); 266 } 267 } 268 } 269 if (fi->next && fi->frame == 0) 270 { 271 /* Kludge to cause init_prev_frame_info to destroy the new frame. */ 272 fi->frame = fi->next->frame; 273 fi->pc = fi->next->pc; 274 } 275 } 276 277 CORE_ADDR 278 sparc_frame_chain (frame) 279 struct frame_info *frame; 280 { 281 /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain 282 value. If it realy is zero, we detect it later in 283 sparc_init_prev_frame. */ 284 return (CORE_ADDR)1; 285 } 286 287 CORE_ADDR 288 sparc_extract_struct_value_address (regbuf) 289 char regbuf[REGISTER_BYTES]; 290 { 291 #ifdef GDB_TARGET_IS_SPARC64 292 return extract_address (regbuf + REGISTER_BYTE (O0_REGNUM), 293 REGISTER_RAW_SIZE (O0_REGNUM)); 294 #else 295 return read_memory_integer (((int *)(regbuf)) [SP_REGNUM] + (16 * SPARC_INTREG_SIZE), 296 TARGET_PTR_BIT / TARGET_CHAR_BIT); 297 #endif 298 } 299 300 /* Find the pc saved in frame FRAME. */ 301 302 CORE_ADDR 303 sparc_frame_saved_pc (frame) 304 struct frame_info *frame; 305 { 306 char buf[MAX_REGISTER_RAW_SIZE]; 307 CORE_ADDR addr; 308 309 if (frame->signal_handler_caller) 310 { 311 /* This is the signal trampoline frame. 312 Get the saved PC from the sigcontext structure. */ 313 314 #ifndef SIGCONTEXT_PC_OFFSET 315 #define SIGCONTEXT_PC_OFFSET 12 316 #endif 317 318 CORE_ADDR sigcontext_addr; 319 char scbuf[TARGET_PTR_BIT / HOST_CHAR_BIT]; 320 int saved_pc_offset = SIGCONTEXT_PC_OFFSET; 321 char *name = NULL; 322 323 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext 324 as the third parameter. The offset to the saved pc is 12. */ 325 find_pc_partial_function (frame->pc, &name, 326 (CORE_ADDR *)NULL,(CORE_ADDR *)NULL); 327 if (name && STREQ (name, "ucbsigvechandler")) 328 saved_pc_offset = 12; 329 330 /* The sigcontext address is contained in register O2. */ 331 get_saved_register (buf, (int *)NULL, (CORE_ADDR *)NULL, 332 frame, O0_REGNUM + 2, (enum lval_type *)NULL); 333 sigcontext_addr = extract_address (buf, REGISTER_RAW_SIZE (O0_REGNUM + 2)); 334 335 /* Don't cause a memory_error when accessing sigcontext in case the 336 stack layout has changed or the stack is corrupt. */ 337 target_read_memory (sigcontext_addr + saved_pc_offset, 338 scbuf, sizeof (scbuf)); 339 return extract_address (scbuf, sizeof (scbuf)); 340 } 341 if (frame->flat) 342 addr = frame->pc_addr; 343 else 344 addr = frame->bottom + FRAME_SAVED_I0 + 345 SPARC_INTREG_SIZE * (I7_REGNUM - I0_REGNUM); 346 347 if (addr == 0) 348 /* A flat frame leaf function might not save the PC anywhere, 349 just leave it in %o7. */ 350 return PC_ADJUST (read_register (O7_REGNUM)); 351 352 read_memory (addr, buf, SPARC_INTREG_SIZE); 353 return PC_ADJUST (extract_address (buf, SPARC_INTREG_SIZE)); 354 } 355 356 /* Since an individual frame in the frame cache is defined by two 357 arguments (a frame pointer and a stack pointer), we need two 358 arguments to get info for an arbitrary stack frame. This routine 359 takes two arguments and makes the cached frames look as if these 360 two arguments defined a frame on the cache. This allows the rest 361 of info frame to extract the important arguments without 362 difficulty. */ 363 364 struct frame_info * 365 setup_arbitrary_frame (argc, argv) 366 int argc; 367 CORE_ADDR *argv; 368 { 369 struct frame_info *frame; 370 371 if (argc != 2) 372 error ("Sparc frame specifications require two arguments: fp and sp"); 373 374 frame = create_new_frame (argv[0], 0); 375 376 if (!frame) 377 fatal ("internal: create_new_frame returned invalid frame"); 378 379 frame->bottom = argv[1]; 380 frame->pc = FRAME_SAVED_PC (frame); 381 return frame; 382 } 383 384 /* Given a pc value, skip it forward past the function prologue by 385 disassembling instructions that appear to be a prologue. 386 387 If FRAMELESS_P is set, we are only testing to see if the function 388 is frameless. This allows a quicker answer. 389 390 This routine should be more specific in its actions; making sure 391 that it uses the same register in the initial prologue section. */ 392 393 static CORE_ADDR examine_prologue PARAMS ((CORE_ADDR, int, struct frame_info *, 394 struct frame_saved_regs *)); 395 396 static CORE_ADDR 397 examine_prologue (start_pc, frameless_p, fi, saved_regs) 398 CORE_ADDR start_pc; 399 int frameless_p; 400 struct frame_info *fi; 401 struct frame_saved_regs *saved_regs; 402 { 403 int insn; 404 int dest = -1; 405 CORE_ADDR pc = start_pc; 406 int is_flat = 0; 407 408 insn = read_memory_integer (pc, 4); 409 410 /* Recognize the `sethi' insn and record its destination. */ 411 if (X_OP (insn) == 0 && X_OP2 (insn) == 4) 412 { 413 dest = X_RD (insn); 414 pc += 4; 415 insn = read_memory_integer (pc, 4); 416 } 417 418 /* Recognize an add immediate value to register to either %g1 or 419 the destination register recorded above. Actually, this might 420 well recognize several different arithmetic operations. 421 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1" 422 followed by "save %sp, %g1, %sp" is a valid prologue (Not that 423 I imagine any compiler really does that, however). */ 424 if (X_OP (insn) == 2 425 && X_I (insn) 426 && (X_RD (insn) == 1 || X_RD (insn) == dest)) 427 { 428 pc += 4; 429 insn = read_memory_integer (pc, 4); 430 } 431 432 /* Recognize any SAVE insn. */ 433 if (X_OP (insn) == 2 && X_OP3 (insn) == 60) 434 { 435 pc += 4; 436 if (frameless_p) /* If the save is all we care about, */ 437 return pc; /* return before doing more work */ 438 insn = read_memory_integer (pc, 4); 439 } 440 /* Recognize add to %sp. */ 441 else if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0) 442 { 443 pc += 4; 444 if (frameless_p) /* If the add is all we care about, */ 445 return pc; /* return before doing more work */ 446 is_flat = 1; 447 insn = read_memory_integer (pc, 4); 448 /* Recognize store of frame pointer (i7). */ 449 if (X_OP (insn) == 3 450 && X_RD (insn) == 31 451 && X_OP3 (insn) == 4 452 && X_RS1 (insn) == 14) 453 { 454 pc += 4; 455 insn = read_memory_integer (pc, 4); 456 457 /* Recognize sub %sp, <anything>, %i7. */ 458 if (X_OP (insn) == 2 459 && X_OP3 (insn) == 4 460 && X_RS1 (insn) == 14 461 && X_RD (insn) == 31) 462 { 463 pc += 4; 464 insn = read_memory_integer (pc, 4); 465 } 466 else 467 return pc; 468 } 469 else 470 return pc; 471 } 472 else 473 /* Without a save or add instruction, it's not a prologue. */ 474 return start_pc; 475 476 while (1) 477 { 478 /* Recognize stores into the frame from the input registers. 479 This recognizes all non alternate stores of input register, 480 into a location offset from the frame pointer. */ 481 if ((X_OP (insn) == 3 482 && (X_OP3 (insn) & 0x3c) == 4 /* Store, non-alternate. */ 483 && (X_RD (insn) & 0x18) == 0x18 /* Input register. */ 484 && X_I (insn) /* Immediate mode. */ 485 && X_RS1 (insn) == 30 /* Off of frame pointer. */ 486 /* Into reserved stack space. */ 487 && X_SIMM13 (insn) >= 0x44 488 && X_SIMM13 (insn) < 0x5b)) 489 ; 490 else if (is_flat 491 && X_OP (insn) == 3 492 && X_OP3 (insn) == 4 493 && X_RS1 (insn) == 14 494 ) 495 { 496 if (saved_regs && X_I (insn)) 497 saved_regs->regs[X_RD (insn)] = 498 fi->frame + fi->sp_offset + X_SIMM13 (insn); 499 } 500 else 501 break; 502 pc += 4; 503 insn = read_memory_integer (pc, 4); 504 } 505 506 return pc; 507 } 508 509 CORE_ADDR 510 skip_prologue (start_pc, frameless_p) 511 CORE_ADDR start_pc; 512 int frameless_p; 513 { 514 return examine_prologue (start_pc, frameless_p, NULL, NULL); 515 } 516 517 /* Check instruction at ADDR to see if it is a branch. 518 All non-annulled instructions will go to NPC or will trap. 519 Set *TARGET if we find a candidate branch; set to zero if not. 520 521 This isn't static as it's used by remote-sa.sparc.c. */ 522 523 static branch_type 524 isbranch (instruction, addr, target) 525 long instruction; 526 CORE_ADDR addr, *target; 527 { 528 branch_type val = not_branch; 529 long int offset; /* Must be signed for sign-extend. */ 530 531 *target = 0; 532 533 if (X_OP (instruction) == 0 534 && (X_OP2 (instruction) == 2 535 || X_OP2 (instruction) == 6 536 #ifdef GDB_TARGET_IS_SPARC64 537 || X_OP2 (instruction) == 1 538 || X_OP2 (instruction) == 3 539 || X_OP2 (instruction) == 5 540 #else 541 || X_OP2 (instruction) == 7 542 #endif 543 )) 544 { 545 if (X_COND (instruction) == 8) 546 val = X_A (instruction) ? baa : ba; 547 else 548 val = X_A (instruction) ? bicca : bicc; 549 switch (X_OP2 (instruction)) 550 { 551 case 2: 552 case 6: 553 #ifndef GDB_TARGET_IS_SPARC64 554 case 7: 555 #endif 556 offset = 4 * X_DISP22 (instruction); 557 break; 558 #ifdef GDB_TARGET_IS_SPARC64 559 case 1: 560 case 5: 561 offset = 4 * X_DISP19 (instruction); 562 break; 563 case 3: 564 offset = 4 * X_DISP16 (instruction); 565 break; 566 #endif 567 } 568 *target = addr + offset; 569 } 570 #ifdef GDB_TARGET_IS_SPARC64 571 else if (X_OP (instruction) == 2 572 && X_OP3 (instruction) == 62) 573 { 574 if (X_FCN (instruction) == 0) 575 { 576 /* done */ 577 *target = read_register (TNPC_REGNUM); 578 val = done_retry; 579 } 580 else if (X_FCN (instruction) == 1) 581 { 582 /* retry */ 583 *target = read_register (TPC_REGNUM); 584 val = done_retry; 585 } 586 } 587 #endif 588 589 return val; 590 } 591 592 /* Find register number REGNUM relative to FRAME and put its 593 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable 594 was optimized out (and thus can't be fetched). If the variable 595 was fetched from memory, set *ADDRP to where it was fetched from, 596 otherwise it was fetched from a register. 597 598 The argument RAW_BUFFER must point to aligned memory. */ 599 600 void 601 get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) 602 char *raw_buffer; 603 int *optimized; 604 CORE_ADDR *addrp; 605 struct frame_info *frame; 606 int regnum; 607 enum lval_type *lval; 608 { 609 struct frame_info *frame1; 610 CORE_ADDR addr; 611 612 if (!target_has_registers) 613 error ("No registers."); 614 615 if (optimized) 616 *optimized = 0; 617 618 addr = 0; 619 620 /* FIXME This code extracted from infcmd.c; should put elsewhere! */ 621 if (frame == NULL) 622 { 623 /* error ("No selected frame."); */ 624 if (!target_has_registers) 625 error ("The program has no registers now."); 626 if (selected_frame == NULL) 627 error ("No selected frame."); 628 /* Try to use selected frame */ 629 frame = get_prev_frame (selected_frame); 630 if (frame == 0) 631 error ("Cmd not meaningful in the outermost frame."); 632 } 633 634 635 frame1 = frame->next; 636 637 /* Get saved PC from the frame info if not in innermost frame. */ 638 if (regnum == PC_REGNUM && frame1 != NULL) 639 { 640 if (lval != NULL) 641 *lval = not_lval; 642 if (raw_buffer != NULL) 643 { 644 /* Put it back in target format. */ 645 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc); 646 } 647 if (addrp != NULL) 648 *addrp = 0; 649 return; 650 } 651 652 while (frame1 != NULL) 653 { 654 if (frame1->pc >= (frame1->bottom ? frame1->bottom : 655 read_register (SP_REGNUM)) 656 && frame1->pc <= FRAME_FP (frame1)) 657 { 658 /* Dummy frame. All but the window regs are in there somewhere. 659 The window registers are saved on the stack, just like in a 660 normal frame. */ 661 if (regnum >= G1_REGNUM && regnum < G1_REGNUM + 7) 662 addr = frame1->frame + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE 663 - (FP_REGISTER_BYTES + 8 * SPARC_INTREG_SIZE); 664 else if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8) 665 addr = (frame1->prev->bottom 666 + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE 667 + FRAME_SAVED_I0); 668 else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8) 669 addr = (frame1->prev->bottom 670 + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE 671 + FRAME_SAVED_L0); 672 else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8) 673 addr = frame1->frame + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE 674 - (FP_REGISTER_BYTES + 16 * SPARC_INTREG_SIZE); 675 #ifdef FP0_REGNUM 676 else if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM + 32) 677 addr = frame1->frame + (regnum - FP0_REGNUM) * 4 678 - (FP_REGISTER_BYTES); 679 #ifdef GDB_TARGET_IS_SPARC64 680 else if (regnum >= FP0_REGNUM + 32 && regnum < FP_MAX_REGNUM) 681 addr = frame1->frame + 32 * 4 + (regnum - FP0_REGNUM - 32) * 8 682 - (FP_REGISTER_BYTES); 683 #endif 684 #endif /* FP0_REGNUM */ 685 else if (regnum >= Y_REGNUM && regnum < NUM_REGS) 686 addr = frame1->frame + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE 687 - (FP_REGISTER_BYTES + 24 * SPARC_INTREG_SIZE); 688 } 689 else if (frame1->flat) 690 { 691 692 if (regnum == RP_REGNUM) 693 addr = frame1->pc_addr; 694 else if (regnum == I7_REGNUM) 695 addr = frame1->fp_addr; 696 else 697 { 698 CORE_ADDR func_start; 699 struct frame_saved_regs regs; 700 memset (®s, 0, sizeof (regs)); 701 702 find_pc_partial_function (frame1->pc, NULL, &func_start, NULL); 703 examine_prologue (func_start, 0, frame1, ®s); 704 addr = regs.regs[regnum]; 705 } 706 } 707 else 708 { 709 /* Normal frame. Local and In registers are saved on stack. */ 710 if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8) 711 addr = (frame1->prev->bottom 712 + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE 713 + FRAME_SAVED_I0); 714 else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8) 715 addr = (frame1->prev->bottom 716 + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE 717 + FRAME_SAVED_L0); 718 else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8) 719 { 720 /* Outs become ins. */ 721 get_saved_register (raw_buffer, optimized, addrp, frame1, 722 (regnum - O0_REGNUM + I0_REGNUM), lval); 723 return; 724 } 725 } 726 if (addr != 0) 727 break; 728 frame1 = frame1->next; 729 } 730 if (addr != 0) 731 { 732 if (lval != NULL) 733 *lval = lval_memory; 734 if (regnum == SP_REGNUM) 735 { 736 if (raw_buffer != NULL) 737 { 738 /* Put it back in target format. */ 739 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), addr); 740 } 741 if (addrp != NULL) 742 *addrp = 0; 743 return; 744 } 745 if (raw_buffer != NULL) 746 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum)); 747 } 748 else 749 { 750 if (lval != NULL) 751 *lval = lval_register; 752 addr = REGISTER_BYTE (regnum); 753 if (raw_buffer != NULL) 754 read_register_gen (regnum, raw_buffer); 755 } 756 if (addrp != NULL) 757 *addrp = addr; 758 } 759 760 /* Push an empty stack frame, and record in it the current PC, regs, etc. 761 762 We save the non-windowed registers and the ins. The locals and outs 763 are new; they don't need to be saved. The i's and l's of 764 the last frame were already saved on the stack. */ 765 766 /* Definitely see tm-sparc.h for more doc of the frame format here. */ 767 768 #ifdef GDB_TARGET_IS_SPARC64 769 #define DUMMY_REG_SAVE_OFFSET (128 + 16) 770 #else 771 #define DUMMY_REG_SAVE_OFFSET 0x60 772 #endif 773 774 /* See tm-sparc.h for how this is calculated. */ 775 #ifdef FP0_REGNUM 776 #define DUMMY_STACK_REG_BUF_SIZE \ 777 (((8+8+8) * SPARC_INTREG_SIZE) + (32 * REGISTER_RAW_SIZE (FP0_REGNUM))) 778 #else 779 #define DUMMY_STACK_REG_BUF_SIZE \ 780 (((8+8+8) * SPARC_INTREG_SIZE) ) 781 #endif /* FP0_REGNUM */ 782 #define DUMMY_STACK_SIZE (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET) 783 784 void 785 sparc_push_dummy_frame () 786 { 787 CORE_ADDR sp, old_sp; 788 char register_temp[DUMMY_STACK_SIZE]; 789 790 old_sp = sp = read_register (SP_REGNUM); 791 792 #ifdef GDB_TARGET_IS_SPARC64 793 /* FIXME: not sure what needs to be saved here. */ 794 #else 795 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */ 796 read_register_bytes (REGISTER_BYTE (Y_REGNUM), ®ister_temp[0], 797 REGISTER_RAW_SIZE (Y_REGNUM) * 8); 798 #endif 799 800 read_register_bytes (REGISTER_BYTE (O0_REGNUM), 801 ®ister_temp[8 * SPARC_INTREG_SIZE], 802 SPARC_INTREG_SIZE * 8); 803 804 read_register_bytes (REGISTER_BYTE (G0_REGNUM), 805 ®ister_temp[16 * SPARC_INTREG_SIZE], 806 SPARC_INTREG_SIZE * 8); 807 808 #ifdef FP0_REGNUM 809 read_register_bytes (REGISTER_BYTE (FP0_REGNUM), 810 ®ister_temp[24 * SPARC_INTREG_SIZE], 811 FP_REGISTER_BYTES); 812 #endif /* FP0_REGNUM */ 813 814 sp -= DUMMY_STACK_SIZE; 815 816 write_register (SP_REGNUM, sp); 817 818 write_memory (sp + DUMMY_REG_SAVE_OFFSET, ®ister_temp[0], 819 DUMMY_STACK_REG_BUF_SIZE); 820 821 write_register (FP_REGNUM, old_sp); 822 823 /* Set return address register for the call dummy to the current PC. */ 824 write_register (I7_REGNUM, read_pc() - 8); 825 } 826 827 /* sparc_frame_find_saved_regs (). This function is here only because 828 pop_frame uses it. Note there is an interesting corner case which 829 I think few ports of GDB get right--if you are popping a frame 830 which does not save some register that *is* saved by a more inner 831 frame (such a frame will never be a dummy frame because dummy 832 frames save all registers). Rewriting pop_frame to use 833 get_saved_register would solve this problem and also get rid of the 834 ugly duplication between sparc_frame_find_saved_regs and 835 get_saved_register. 836 837 Stores, into a struct frame_saved_regs, 838 the addresses of the saved registers of frame described by FRAME_INFO. 839 This includes special registers such as pc and fp saved in special 840 ways in the stack frame. sp is even more special: 841 the address we return for it IS the sp for the next frame. 842 843 Note that on register window machines, we are currently making the 844 assumption that window registers are being saved somewhere in the 845 frame in which they are being used. If they are stored in an 846 inferior frame, find_saved_register will break. 847 848 On the Sun 4, the only time all registers are saved is when 849 a dummy frame is involved. Otherwise, the only saved registers 850 are the LOCAL and IN registers which are saved as a result 851 of the "save/restore" opcodes. This condition is determined 852 by address rather than by value. 853 854 The "pc" is not stored in a frame on the SPARC. (What is stored 855 is a return address minus 8.) sparc_pop_frame knows how to 856 deal with that. Other routines might or might not. 857 858 See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information 859 about how this works. */ 860 861 static void sparc_frame_find_saved_regs PARAMS ((struct frame_info *, 862 struct frame_saved_regs *)); 863 864 static void 865 sparc_frame_find_saved_regs (fi, saved_regs_addr) 866 struct frame_info *fi; 867 struct frame_saved_regs *saved_regs_addr; 868 { 869 register int regnum; 870 CORE_ADDR frame_addr = FRAME_FP (fi); 871 872 if (!fi) 873 fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS"); 874 875 memset (saved_regs_addr, 0, sizeof (*saved_regs_addr)); 876 877 if (fi->pc >= (fi->bottom ? fi->bottom : 878 read_register (SP_REGNUM)) 879 && fi->pc <= FRAME_FP(fi)) 880 { 881 /* Dummy frame. All but the window regs are in there somewhere. */ 882 for (regnum = G1_REGNUM; regnum < G1_REGNUM+7; regnum++) 883 saved_regs_addr->regs[regnum] = 884 frame_addr + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE 885 - (FP_REGISTER_BYTES + 8 * SPARC_INTREG_SIZE); 886 for (regnum = I0_REGNUM; regnum < I0_REGNUM+8; regnum++) 887 saved_regs_addr->regs[regnum] = 888 frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE 889 - (FP_REGISTER_BYTES + 16 * SPARC_INTREG_SIZE); 890 #ifdef FP0_REGNUM 891 for (regnum = FP0_REGNUM; regnum < FP0_REGNUM + 32; regnum++) 892 saved_regs_addr->regs[regnum] = 893 frame_addr + (regnum - FP0_REGNUM) * 4 894 - (FP_REGISTER_BYTES); 895 #ifdef GDB_TARGET_IS_SPARC64 896 for (regnum = FP0_REGNUM + 32; regnum < FP_MAX_REGNUM; regnum++) 897 saved_regs_addr->regs[regnum] = 898 frame_addr + 32 * 4 + (regnum - FP0_REGNUM - 32) * 8 899 - (FP_REGISTER_BYTES); 900 #endif 901 #endif /* FP0_REGNUM */ 902 for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++) 903 saved_regs_addr->regs[regnum] = 904 frame_addr + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE - 0xe0; 905 - (FP_REGISTER_BYTES + 24 * SPARC_INTREG_SIZE); 906 frame_addr = fi->bottom ? 907 fi->bottom : read_register (SP_REGNUM); 908 } 909 else if (fi->flat) 910 { 911 CORE_ADDR func_start; 912 find_pc_partial_function (fi->pc, NULL, &func_start, NULL); 913 examine_prologue (func_start, 0, fi, saved_regs_addr); 914 915 /* Flat register window frame. */ 916 saved_regs_addr->regs[RP_REGNUM] = fi->pc_addr; 917 saved_regs_addr->regs[I7_REGNUM] = fi->fp_addr; 918 } 919 else 920 { 921 /* Normal frame. Just Local and In registers */ 922 frame_addr = fi->bottom ? 923 fi->bottom : read_register (SP_REGNUM); 924 for (regnum = L0_REGNUM; regnum < L0_REGNUM+8; regnum++) 925 saved_regs_addr->regs[regnum] = 926 (frame_addr + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE 927 + FRAME_SAVED_L0); 928 for (regnum = I0_REGNUM; regnum < I0_REGNUM+8; regnum++) 929 saved_regs_addr->regs[regnum] = 930 (frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE 931 + FRAME_SAVED_I0); 932 } 933 if (fi->next) 934 { 935 if (fi->flat) 936 { 937 saved_regs_addr->regs[O7_REGNUM] = fi->pc_addr; 938 } 939 else 940 { 941 /* Pull off either the next frame pointer or the stack pointer */ 942 CORE_ADDR next_next_frame_addr = 943 (fi->next->bottom ? 944 fi->next->bottom : 945 read_register (SP_REGNUM)); 946 for (regnum = O0_REGNUM; regnum < O0_REGNUM+8; regnum++) 947 saved_regs_addr->regs[regnum] = 948 (next_next_frame_addr 949 + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE 950 + FRAME_SAVED_I0); 951 } 952 } 953 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */ 954 saved_regs_addr->regs[SP_REGNUM] = FRAME_FP (fi); 955 } 956 957 /* Discard from the stack the innermost frame, restoring all saved registers. 958 959 Note that the values stored in fsr by get_frame_saved_regs are *in 960 the context of the called frame*. What this means is that the i 961 regs of fsr must be restored into the o regs of the (calling) frame that 962 we pop into. We don't care about the output regs of the calling frame, 963 since unless it's a dummy frame, it won't have any output regs in it. 964 965 We never have to bother with %l (local) regs, since the called routine's 966 locals get tossed, and the calling routine's locals are already saved 967 on its stack. */ 968 969 /* Definitely see tm-sparc.h for more doc of the frame format here. */ 970 971 void 972 sparc_pop_frame () 973 { 974 register struct frame_info *frame = get_current_frame (); 975 register CORE_ADDR pc; 976 struct frame_saved_regs fsr; 977 char raw_buffer[REGISTER_BYTES]; 978 int regnum; 979 980 sparc_frame_find_saved_regs (frame, &fsr); 981 #ifdef FP0_REGNUM 982 if (fsr.regs[FP0_REGNUM]) 983 { 984 read_memory (fsr.regs[FP0_REGNUM], raw_buffer, FP_REGISTER_BYTES); 985 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), 986 raw_buffer, FP_REGISTER_BYTES); 987 } 988 #ifndef GDB_TARGET_IS_SPARC64 989 if (fsr.regs[FPS_REGNUM]) 990 { 991 read_memory (fsr.regs[FPS_REGNUM], raw_buffer, 4); 992 write_register_bytes (REGISTER_BYTE (FPS_REGNUM), raw_buffer, 4); 993 } 994 if (fsr.regs[CPS_REGNUM]) 995 { 996 read_memory (fsr.regs[CPS_REGNUM], raw_buffer, 4); 997 write_register_bytes (REGISTER_BYTE (CPS_REGNUM), raw_buffer, 4); 998 } 999 #endif 1000 #endif /* FP0_REGNUM */ 1001 if (fsr.regs[G1_REGNUM]) 1002 { 1003 read_memory (fsr.regs[G1_REGNUM], raw_buffer, 7 * SPARC_INTREG_SIZE); 1004 write_register_bytes (REGISTER_BYTE (G1_REGNUM), raw_buffer, 1005 7 * SPARC_INTREG_SIZE); 1006 } 1007 1008 if (frame->flat) 1009 { 1010 /* Each register might or might not have been saved, need to test 1011 individually. */ 1012 for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; ++regnum) 1013 if (fsr.regs[regnum]) 1014 write_register (regnum, read_memory_integer (fsr.regs[regnum], 1015 SPARC_INTREG_SIZE)); 1016 for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; ++regnum) 1017 if (fsr.regs[regnum]) 1018 write_register (regnum, read_memory_integer (fsr.regs[regnum], 1019 SPARC_INTREG_SIZE)); 1020 1021 /* Handle all outs except stack pointer (o0-o5; o7). */ 1022 for (regnum = O0_REGNUM; regnum < O0_REGNUM + 6; ++regnum) 1023 if (fsr.regs[regnum]) 1024 write_register (regnum, read_memory_integer (fsr.regs[regnum], 1025 SPARC_INTREG_SIZE)); 1026 if (fsr.regs[O0_REGNUM + 7]) 1027 write_register (O0_REGNUM + 7, 1028 read_memory_integer (fsr.regs[O0_REGNUM + 7], 1029 SPARC_INTREG_SIZE)); 1030 1031 write_register (SP_REGNUM, frame->frame); 1032 } 1033 else if (fsr.regs[I0_REGNUM]) 1034 { 1035 CORE_ADDR sp; 1036 1037 char reg_temp[REGISTER_BYTES]; 1038 1039 read_memory (fsr.regs[I0_REGNUM], raw_buffer, 8 * SPARC_INTREG_SIZE); 1040 1041 /* Get the ins and locals which we are about to restore. Just 1042 moving the stack pointer is all that is really needed, except 1043 store_inferior_registers is then going to write the ins and 1044 locals from the registers array, so we need to muck with the 1045 registers array. */ 1046 sp = fsr.regs[SP_REGNUM]; 1047 read_memory (sp, reg_temp, SPARC_INTREG_SIZE * 16); 1048 1049 /* Restore the out registers. 1050 Among other things this writes the new stack pointer. */ 1051 write_register_bytes (REGISTER_BYTE (O0_REGNUM), raw_buffer, 1052 SPARC_INTREG_SIZE * 8); 1053 1054 write_register_bytes (REGISTER_BYTE (L0_REGNUM), reg_temp, 1055 SPARC_INTREG_SIZE * 16); 1056 } 1057 #ifndef GDB_TARGET_IS_SPARC64 1058 if (fsr.regs[PS_REGNUM]) 1059 write_register (PS_REGNUM, read_memory_integer (fsr.regs[PS_REGNUM], 4)); 1060 #endif 1061 if (fsr.regs[Y_REGNUM]) 1062 write_register (Y_REGNUM, read_memory_integer (fsr.regs[Y_REGNUM], REGISTER_RAW_SIZE (Y_REGNUM))); 1063 if (fsr.regs[PC_REGNUM]) 1064 { 1065 /* Explicitly specified PC (and maybe NPC) -- just restore them. */ 1066 write_register (PC_REGNUM, read_memory_integer (fsr.regs[PC_REGNUM], 1067 REGISTER_RAW_SIZE (PC_REGNUM))); 1068 if (fsr.regs[NPC_REGNUM]) 1069 write_register (NPC_REGNUM, 1070 read_memory_integer (fsr.regs[NPC_REGNUM], 1071 REGISTER_RAW_SIZE (NPC_REGNUM))); 1072 } 1073 else if (frame->flat) 1074 { 1075 if (frame->pc_addr) 1076 pc = PC_ADJUST ((CORE_ADDR) 1077 read_memory_integer (frame->pc_addr, 1078 REGISTER_RAW_SIZE (PC_REGNUM))); 1079 else 1080 { 1081 /* I think this happens only in the innermost frame, if so then 1082 it is a complicated way of saying 1083 "pc = read_register (O7_REGNUM);". */ 1084 char buf[MAX_REGISTER_RAW_SIZE]; 1085 get_saved_register (buf, 0, 0, frame, O7_REGNUM, 0); 1086 pc = PC_ADJUST (extract_address 1087 (buf, REGISTER_RAW_SIZE (O7_REGNUM))); 1088 } 1089 1090 write_register (PC_REGNUM, pc); 1091 write_register (NPC_REGNUM, pc + 4); 1092 } 1093 else if (fsr.regs[I7_REGNUM]) 1094 { 1095 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */ 1096 pc = PC_ADJUST ((CORE_ADDR) read_memory_integer (fsr.regs[I7_REGNUM], 1097 SPARC_INTREG_SIZE)); 1098 write_register (PC_REGNUM, pc); 1099 write_register (NPC_REGNUM, pc + 4); 1100 } 1101 flush_cached_frames (); 1102 } 1103 1104 /* On the Sun 4 under SunOS, the compile will leave a fake insn which 1105 encodes the structure size being returned. If we detect such 1106 a fake insn, step past it. */ 1107 1108 CORE_ADDR 1109 sparc_pc_adjust(pc) 1110 CORE_ADDR pc; 1111 { 1112 unsigned long insn; 1113 char buf[4]; 1114 int err; 1115 1116 err = target_read_memory (pc + 8, buf, sizeof(long)); 1117 insn = extract_unsigned_integer (buf, 4); 1118 if ((err == 0) && (insn & 0xffc00000) == 0) 1119 return pc+12; 1120 else 1121 return pc+8; 1122 } 1123 1124 /* If pc is in a shared library trampoline, return its target. 1125 The SunOs 4.x linker rewrites the jump table entries for PIC 1126 compiled modules in the main executable to bypass the dynamic linker 1127 with jumps of the form 1128 sethi %hi(addr),%g1 1129 jmp %g1+%lo(addr) 1130 and removes the corresponding jump table relocation entry in the 1131 dynamic relocations. 1132 find_solib_trampoline_target relies on the presence of the jump 1133 table relocation entry, so we have to detect these jump instructions 1134 by hand. */ 1135 1136 CORE_ADDR 1137 sunos4_skip_trampoline_code (pc) 1138 CORE_ADDR pc; 1139 { 1140 unsigned long insn1; 1141 char buf[4]; 1142 int err; 1143 1144 err = target_read_memory (pc, buf, 4); 1145 insn1 = extract_unsigned_integer (buf, 4); 1146 if (err == 0 && (insn1 & 0xffc00000) == 0x03000000) 1147 { 1148 unsigned long insn2; 1149 1150 err = target_read_memory (pc + 4, buf, 4); 1151 insn2 = extract_unsigned_integer (buf, 4); 1152 if (err == 0 && (insn2 & 0xffffe000) == 0x81c06000) 1153 { 1154 CORE_ADDR target_pc = (insn1 & 0x3fffff) << 10; 1155 int delta = insn2 & 0x1fff; 1156 1157 /* Sign extend the displacement. */ 1158 if (delta & 0x1000) 1159 delta |= ~0x1fff; 1160 return target_pc + delta; 1161 } 1162 } 1163 return find_solib_trampoline_target (pc); 1164 } 1165 1166 #ifdef USE_PROC_FS /* Target dependent support for /proc */ 1167 1168 /* The /proc interface divides the target machine's register set up into 1169 two different sets, the general register set (gregset) and the floating 1170 point register set (fpregset). For each set, there is an ioctl to get 1171 the current register set and another ioctl to set the current values. 1172 1173 The actual structure passed through the ioctl interface is, of course, 1174 naturally machine dependent, and is different for each set of registers. 1175 For the sparc for example, the general register set is typically defined 1176 by: 1177 1178 typedef int gregset_t[38]; 1179 1180 #define R_G0 0 1181 ... 1182 #define R_TBR 37 1183 1184 and the floating point set by: 1185 1186 typedef struct prfpregset { 1187 union { 1188 u_long pr_regs[32]; 1189 double pr_dregs[16]; 1190 } pr_fr; 1191 void * pr_filler; 1192 u_long pr_fsr; 1193 u_char pr_qcnt; 1194 u_char pr_q_entrysize; 1195 u_char pr_en; 1196 u_long pr_q[64]; 1197 } prfpregset_t; 1198 1199 These routines provide the packing and unpacking of gregset_t and 1200 fpregset_t formatted data. 1201 1202 */ 1203 1204 /* Given a pointer to a general register set in /proc format (gregset_t *), 1205 unpack the register contents and supply them as gdb's idea of the current 1206 register values. */ 1207 1208 void 1209 supply_gregset (gregsetp) 1210 prgregset_t *gregsetp; 1211 { 1212 register int regi; 1213 register prgreg_t *regp = (prgreg_t *) gregsetp; 1214 static char zerobuf[MAX_REGISTER_RAW_SIZE] = {0}; 1215 1216 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */ 1217 for (regi = G0_REGNUM ; regi <= I7_REGNUM ; regi++) 1218 { 1219 supply_register (regi, (char *) (regp + regi)); 1220 } 1221 1222 /* These require a bit more care. */ 1223 supply_register (PS_REGNUM, (char *) (regp + R_PS)); 1224 supply_register (PC_REGNUM, (char *) (regp + R_PC)); 1225 supply_register (NPC_REGNUM,(char *) (regp + R_nPC)); 1226 supply_register (Y_REGNUM, (char *) (regp + R_Y)); 1227 1228 /* Fill inaccessible registers with zero. */ 1229 supply_register (WIM_REGNUM, zerobuf); 1230 supply_register (TBR_REGNUM, zerobuf); 1231 supply_register (CPS_REGNUM, zerobuf); 1232 } 1233 1234 void 1235 fill_gregset (gregsetp, regno) 1236 prgregset_t *gregsetp; 1237 int regno; 1238 { 1239 int regi; 1240 register prgreg_t *regp = (prgreg_t *) gregsetp; 1241 1242 for (regi = 0 ; regi <= R_I7 ; regi++) 1243 { 1244 if ((regno == -1) || (regno == regi)) 1245 { 1246 *(regp + regi) = *(int *) ®isters[REGISTER_BYTE (regi)]; 1247 } 1248 } 1249 if ((regno == -1) || (regno == PS_REGNUM)) 1250 { 1251 *(regp + R_PS) = *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)]; 1252 } 1253 if ((regno == -1) || (regno == PC_REGNUM)) 1254 { 1255 *(regp + R_PC) = *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)]; 1256 } 1257 if ((regno == -1) || (regno == NPC_REGNUM)) 1258 { 1259 *(regp + R_nPC) = *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)]; 1260 } 1261 if ((regno == -1) || (regno == Y_REGNUM)) 1262 { 1263 *(regp + R_Y) = *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)]; 1264 } 1265 } 1266 1267 #if defined (FP0_REGNUM) 1268 1269 /* Given a pointer to a floating point register set in /proc format 1270 (fpregset_t *), unpack the register contents and supply them as gdb's 1271 idea of the current floating point register values. */ 1272 1273 void 1274 supply_fpregset (fpregsetp) 1275 prfpregset_t *fpregsetp; 1276 { 1277 register int regi; 1278 char *from; 1279 1280 for (regi = FP0_REGNUM ; regi < FP_MAX_REGNUM ; regi++) 1281 { 1282 from = (char *) &fpregsetp->pr_fr.pr_regs[regi-FP0_REGNUM]; 1283 supply_register (regi, from); 1284 } 1285 supply_register (FPS_REGNUM, (char *) &(fpregsetp->pr_fsr)); 1286 } 1287 1288 /* Given a pointer to a floating point register set in /proc format 1289 (fpregset_t *), update the register specified by REGNO from gdb's idea 1290 of the current floating point register set. If REGNO is -1, update 1291 them all. */ 1292 /* ??? This will probably need some changes for sparc64. */ 1293 1294 void 1295 fill_fpregset (fpregsetp, regno) 1296 prfpregset_t *fpregsetp; 1297 int regno; 1298 { 1299 int regi; 1300 char *to; 1301 char *from; 1302 1303 for (regi = FP0_REGNUM ; regi < FP_MAX_REGNUM ; regi++) 1304 { 1305 if ((regno == -1) || (regno == regi)) 1306 { 1307 from = (char *) ®isters[REGISTER_BYTE (regi)]; 1308 to = (char *) &fpregsetp->pr_fr.pr_regs[regi-FP0_REGNUM]; 1309 memcpy (to, from, REGISTER_RAW_SIZE (regi)); 1310 } 1311 } 1312 if ((regno == -1) || (regno == FPS_REGNUM)) 1313 { 1314 fpregsetp->pr_fsr = *(int *) ®isters[REGISTER_BYTE (FPS_REGNUM)]; 1315 } 1316 } 1317 1318 #endif /* defined (FP0_REGNUM) */ 1319 1320 #endif /* USE_PROC_FS */ 1321 1322 1323 #ifdef GET_LONGJMP_TARGET 1324 1325 /* Figure out where the longjmp will land. We expect that we have just entered 1326 longjmp and haven't yet setup the stack frame, so the args are still in the 1327 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we 1328 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. 1329 This routine returns true on success */ 1330 1331 int 1332 get_longjmp_target (pc) 1333 CORE_ADDR *pc; 1334 { 1335 CORE_ADDR jb_addr; 1336 #define LONGJMP_TARGET_SIZE 4 1337 char buf[LONGJMP_TARGET_SIZE]; 1338 1339 jb_addr = read_register (O0_REGNUM); 1340 1341 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf, 1342 LONGJMP_TARGET_SIZE)) 1343 return 0; 1344 1345 *pc = extract_address (buf, LONGJMP_TARGET_SIZE); 1346 1347 return 1; 1348 } 1349 #endif /* GET_LONGJMP_TARGET */ 1350 1351 #ifdef STATIC_TRANSFORM_NAME 1352 /* SunPRO (3.0 at least), encodes the static variables. This is not 1353 related to C++ mangling, it is done for C too. */ 1354 1355 char * 1356 sunpro_static_transform_name (name) 1357 char *name; 1358 { 1359 char *p; 1360 if (name[0] == '$') 1361 { 1362 /* For file-local statics there will be a dollar sign, a bunch 1363 of junk (the contents of which match a string given in the 1364 N_OPT), a period and the name. For function-local statics 1365 there will be a bunch of junk (which seems to change the 1366 second character from 'A' to 'B'), a period, the name of the 1367 function, and the name. So just skip everything before the 1368 last period. */ 1369 p = strrchr (name, '.'); 1370 if (p != NULL) 1371 name = p + 1; 1372 } 1373 return name; 1374 } 1375 #endif /* STATIC_TRANSFORM_NAME */ 1376 1377 #ifdef GDB_TARGET_IS_SPARC64 1378 1379 /* Utilities for printing registers. 1380 Page numbers refer to the SPARC Architecture Manual. */ 1381 1382 static void dump_ccreg PARAMS ((char *, int)); 1383 1384 static void 1385 dump_ccreg (reg, val) 1386 char *reg; 1387 int val; 1388 { 1389 /* page 41 */ 1390 printf_unfiltered ("%s:%s,%s,%s,%s", reg, 1391 val & 8 ? "N" : "NN", 1392 val & 4 ? "Z" : "NZ", 1393 val & 2 ? "O" : "NO", 1394 val & 1 ? "C" : "NC" 1395 ); 1396 } 1397 1398 static char * 1399 decode_asi (val) 1400 int val; 1401 { 1402 /* page 72 */ 1403 switch (val) 1404 { 1405 case 4 : return "ASI_NUCLEUS"; 1406 case 0x0c : return "ASI_NUCLEUS_LITTLE"; 1407 case 0x10 : return "ASI_AS_IF_USER_PRIMARY"; 1408 case 0x11 : return "ASI_AS_IF_USER_SECONDARY"; 1409 case 0x18 : return "ASI_AS_IF_USER_PRIMARY_LITTLE"; 1410 case 0x19 : return "ASI_AS_IF_USER_SECONDARY_LITTLE"; 1411 case 0x80 : return "ASI_PRIMARY"; 1412 case 0x81 : return "ASI_SECONDARY"; 1413 case 0x82 : return "ASI_PRIMARY_NOFAULT"; 1414 case 0x83 : return "ASI_SECONDARY_NOFAULT"; 1415 case 0x88 : return "ASI_PRIMARY_LITTLE"; 1416 case 0x89 : return "ASI_SECONDARY_LITTLE"; 1417 case 0x8a : return "ASI_PRIMARY_NOFAULT_LITTLE"; 1418 case 0x8b : return "ASI_SECONDARY_NOFAULT_LITTLE"; 1419 default : return NULL; 1420 } 1421 } 1422 1423 /* PRINT_REGISTER_HOOK routine. 1424 Pretty print various registers. */ 1425 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */ 1426 1427 void 1428 sparc_print_register_hook (regno) 1429 int regno; 1430 { 1431 unsigned LONGEST val; 1432 1433 /* Handle double/quad versions of lower 32 fp regs. */ 1434 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32 1435 && (regno & 1) == 0) 1436 { 1437 char value[16]; 1438 1439 if (!read_relative_register_raw_bytes (regno, value) 1440 && !read_relative_register_raw_bytes (regno + 1, value + 4)) 1441 { 1442 printf_unfiltered ("\t"); 1443 print_floating (value, builtin_type_double, gdb_stdout); 1444 } 1445 #if 0 /* FIXME: gdb doesn't handle long doubles */ 1446 if ((regno & 3) == 0) 1447 { 1448 if (!read_relative_register_raw_bytes (regno + 2, value + 8) 1449 && !read_relative_register_raw_bytes (regno + 3, value + 12)) 1450 { 1451 printf_unfiltered ("\t"); 1452 print_floating (value, builtin_type_long_double, gdb_stdout); 1453 } 1454 } 1455 #endif 1456 return; 1457 } 1458 1459 #if 0 /* FIXME: gdb doesn't handle long doubles */ 1460 /* Print upper fp regs as long double if appropriate. */ 1461 if (regno >= FP0_REGNUM + 32 && regno < FP_MAX_REGNUM 1462 /* We test for even numbered regs and not a multiple of 4 because 1463 the upper fp regs are recorded as doubles. */ 1464 && (regno & 1) == 0) 1465 { 1466 char value[16]; 1467 1468 if (!read_relative_register_raw_bytes (regno, value) 1469 && !read_relative_register_raw_bytes (regno + 1, value + 8)) 1470 { 1471 printf_unfiltered ("\t"); 1472 print_floating (value, builtin_type_long_double, gdb_stdout); 1473 } 1474 return; 1475 } 1476 #endif 1477 1478 /* FIXME: Some of these are priviledged registers. 1479 Not sure how they should be handled. */ 1480 1481 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask))) 1482 1483 val = read_register (regno); 1484 1485 /* pages 40 - 60 */ 1486 switch (regno) 1487 { 1488 case CCR_REGNUM : 1489 printf_unfiltered("\t"); 1490 dump_ccreg ("xcc", val >> 4); 1491 printf_unfiltered(", "); 1492 dump_ccreg ("icc", val & 15); 1493 break; 1494 case FPRS_REGNUM : 1495 printf ("\tfef:%d, du:%d, dl:%d", 1496 BITS (2, 1), BITS (1, 1), BITS (0, 1)); 1497 break; 1498 case FSR_REGNUM : 1499 { 1500 static char *fcc[4] = { "=", "<", ">", "?" }; 1501 static char *rd[4] = { "N", "0", "+", "-" }; 1502 /* Long, yes, but I'd rather leave it as is and use a wide screen. */ 1503 printf ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d", 1504 fcc[BITS (10, 3)], fcc[BITS (32, 3)], 1505 fcc[BITS (34, 3)], fcc[BITS (36, 3)], 1506 rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7), 1507 BITS (14, 7), BITS (13, 1), BITS (5, 31), BITS (0, 31)); 1508 break; 1509 } 1510 case ASI_REGNUM : 1511 { 1512 char *asi = decode_asi (val); 1513 if (asi != NULL) 1514 printf ("\t%s", asi); 1515 break; 1516 } 1517 case VER_REGNUM : 1518 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d", 1519 BITS (48, 0xffff), BITS (32, 0xffff), 1520 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31)); 1521 break; 1522 case PSTATE_REGNUM : 1523 { 1524 static char *mm[4] = { "tso", "pso", "rso", "?" }; 1525 printf ("\tcle:%d, tle:%d, mm:%s, red:%d, pef:%d, am:%d, priv:%d, ie:%d, ag:%d", 1526 BITS (9, 1), BITS (8, 1), mm[BITS (6, 3)], BITS (5, 1), 1527 BITS (4, 1), BITS (3, 1), BITS (2, 1), BITS (1, 1), 1528 BITS (0, 1)); 1529 break; 1530 } 1531 case TSTATE_REGNUM : 1532 /* FIXME: print all 4? */ 1533 break; 1534 case TT_REGNUM : 1535 /* FIXME: print all 4? */ 1536 break; 1537 case TPC_REGNUM : 1538 /* FIXME: print all 4? */ 1539 break; 1540 case TNPC_REGNUM : 1541 /* FIXME: print all 4? */ 1542 break; 1543 case WSTATE_REGNUM : 1544 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7)); 1545 break; 1546 case CWP_REGNUM : 1547 printf ("\t%d", BITS (0, 31)); 1548 break; 1549 case CANSAVE_REGNUM : 1550 printf ("\t%-2d before spill", BITS (0, 31)); 1551 break; 1552 case CANRESTORE_REGNUM : 1553 printf ("\t%-2d before fill", BITS (0, 31)); 1554 break; 1555 case CLEANWIN_REGNUM : 1556 printf ("\t%-2d before clean", BITS (0, 31)); 1557 break; 1558 case OTHERWIN_REGNUM : 1559 printf ("\t%d", BITS (0, 31)); 1560 break; 1561 } 1562 1563 #undef BITS 1564 } 1565 1566 #endif 1567 1568 void 1569 _initialize_sparc_tdep () 1570 { 1571 tm_print_insn = print_insn_sparc; 1572 tm_print_insn_info.mach = TM_PRINT_INSN_MACH; /* Selects sparc/sparclite */ 1573 } 1574