1 /* Disassembler code for CRIS. 2 Copyright 2000, 2001, 2002 Free Software Foundation, Inc. 3 Contributed by Axis Communications AB, Lund, Sweden. 4 Written by Hans-Peter Nilsson. 5 6 This file is part of the GNU binutils and GDB, the GNU debugger. 7 8 This program is free software; you can redistribute it and/or modify it under 9 the terms of the GNU General Public License as published by the Free 10 Software Foundation; either version 2, or (at your option) 11 any later version. 12 13 This program is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 16 more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 21 22 #include "dis-asm.h" 23 #include "sysdep.h" 24 #include "opcode/cris.h" 25 #include "libiberty.h" 26 27 /* No instruction will be disassembled longer than this. In theory, and 28 in silicon, address prefixes can be cascaded. In practice, cascading 29 is not used by GCC, and not supported by the assembler. */ 30 #ifndef MAX_BYTES_PER_CRIS_INSN 31 #define MAX_BYTES_PER_CRIS_INSN 8 32 #endif 33 34 /* Whether or not to decode prefixes, folding it into the following 35 instruction. FIXME: Make this optional later. */ 36 #ifndef PARSE_PREFIX 37 #define PARSE_PREFIX 1 38 #endif 39 40 /* Sometimes we prefix all registers with this character. */ 41 #define REGISTER_PREFIX_CHAR '$' 42 43 /* Whether or not to trace the following sequence: 44 sub* X,r%d 45 bound* Y,r%d 46 adds.w [pc+r%d.w],pc 47 48 This is the assembly form of a switch-statement in C. 49 The "sub is optional. If there is none, then X will be zero. 50 X is the value of the first case, 51 Y is the number of cases (including default). 52 53 This results in case offsets printed on the form: 54 case N: -> case_address 55 where N is an estimation on the corresponding 'case' operand in C, 56 and case_address is where execution of that case continues after the 57 sequence presented above. 58 59 The old style of output was to print the offsets as instructions, 60 which made it hard to follow "case"-constructs in the disassembly, 61 and caused a lot of annoying warnings about undefined instructions. 62 63 FIXME: Make this optional later. */ 64 #ifndef TRACE_CASE 65 #define TRACE_CASE 1 66 #endif 67 68 /* Value of first element in switch. */ 69 static long case_offset = 0; 70 71 /* How many more case-offsets to print. */ 72 static long case_offset_counter = 0; 73 74 /* Number of case offsets. */ 75 static long no_of_case_offsets = 0; 76 77 /* Candidate for next case_offset. */ 78 static long last_immediate = 0; 79 80 static int number_of_bits 81 PARAMS ((unsigned int)); 82 static char *format_hex 83 PARAMS ((unsigned long, char *)); 84 static char *format_dec 85 PARAMS ((long, char *, int)); 86 static char *format_reg 87 PARAMS ((int, char *, bfd_boolean)); 88 static int cris_constraint 89 PARAMS ((const char *, unsigned int, unsigned int)); 90 static unsigned bytes_to_skip 91 PARAMS ((unsigned int, const struct cris_opcode *)); 92 static char *print_flags 93 PARAMS ((unsigned int, char *)); 94 static void print_with_operands 95 PARAMS ((const struct cris_opcode *, unsigned int, unsigned char *, 96 bfd_vma, disassemble_info *, const struct cris_opcode *, 97 unsigned int, unsigned char *, bfd_boolean)); 98 static const struct cris_spec_reg *spec_reg_info 99 PARAMS ((unsigned int)); 100 static int print_insn_cris_generic 101 PARAMS ((bfd_vma, disassemble_info *, bfd_boolean)); 102 static int print_insn_cris_with_register_prefix 103 PARAMS ((bfd_vma, disassemble_info *)); 104 static int print_insn_cris_without_register_prefix 105 PARAMS ((bfd_vma, disassemble_info *)); 106 static const struct cris_opcode *get_opcode_entry 107 PARAMS ((unsigned int, unsigned int)); 108 109 /* Return the descriptor of a special register. 110 FIXME: Depend on a CPU-version specific argument when all machinery 111 is in place. */ 112 113 static const struct cris_spec_reg * 114 spec_reg_info (sreg) 115 unsigned int sreg; 116 { 117 int i; 118 for (i = 0; cris_spec_regs[i].name != NULL; i++) 119 { 120 if (cris_spec_regs[i].number == sreg) 121 return &cris_spec_regs[i]; 122 } 123 124 return NULL; 125 } 126 127 /* Return the number of bits in the argument. */ 128 129 static int 130 number_of_bits (val) 131 unsigned int val; 132 { 133 int bits; 134 135 for (bits = 0; val != 0; val &= val - 1) 136 bits++; 137 138 return bits; 139 } 140 141 /* Get an entry in the opcode-table. */ 142 143 static const struct cris_opcode * 144 get_opcode_entry (insn, prefix_insn) 145 unsigned int insn; 146 unsigned int prefix_insn; 147 { 148 /* For non-prefixed insns, we keep a table of pointers, indexed by the 149 insn code. Each entry is initialized when found to be NULL. */ 150 static const struct cris_opcode **opc_table = NULL; 151 152 const struct cris_opcode *max_matchedp = NULL; 153 const struct cris_opcode **prefix_opc_table = NULL; 154 155 /* We hold a table for each prefix that need to be handled differently. */ 156 static const struct cris_opcode **dip_prefixes = NULL; 157 static const struct cris_opcode **bdapq_m1_prefixes = NULL; 158 static const struct cris_opcode **bdapq_m2_prefixes = NULL; 159 static const struct cris_opcode **bdapq_m4_prefixes = NULL; 160 static const struct cris_opcode **rest_prefixes = NULL; 161 162 /* Allocate and clear the opcode-table. */ 163 if (opc_table == NULL) 164 { 165 opc_table = xmalloc (65536 * sizeof (opc_table[0])); 166 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *)); 167 168 dip_prefixes 169 = xmalloc (65536 * sizeof (const struct cris_opcode **)); 170 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0])); 171 172 bdapq_m1_prefixes 173 = xmalloc (65536 * sizeof (const struct cris_opcode **)); 174 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0])); 175 176 bdapq_m2_prefixes 177 = xmalloc (65536 * sizeof (const struct cris_opcode **)); 178 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0])); 179 180 bdapq_m4_prefixes 181 = xmalloc (65536 * sizeof (const struct cris_opcode **)); 182 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0])); 183 184 rest_prefixes 185 = xmalloc (65536 * sizeof (const struct cris_opcode **)); 186 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0])); 187 } 188 189 /* Get the right table if this is a prefix. 190 This code is connected to cris_constraints in that it knows what 191 prefixes play a role in recognition of patterns; the necessary 192 state is reflected by which table is used. If constraints 193 involving match or non-match of prefix insns are changed, then this 194 probably needs changing too. */ 195 if (prefix_insn != NO_CRIS_PREFIX) 196 { 197 const struct cris_opcode *popcodep 198 = (opc_table[prefix_insn] != NULL 199 ? opc_table[prefix_insn] 200 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX)); 201 202 if (popcodep == NULL) 203 return NULL; 204 205 if (popcodep->match == BDAP_QUICK_OPCODE) 206 { 207 /* Since some offsets are recognized with "push" macros, we 208 have to have different tables for them. */ 209 int offset = (prefix_insn & 255); 210 211 if (offset > 127) 212 offset -= 256; 213 214 switch (offset) 215 { 216 case -4: 217 prefix_opc_table = bdapq_m4_prefixes; 218 break; 219 220 case -2: 221 prefix_opc_table = bdapq_m2_prefixes; 222 break; 223 224 case -1: 225 prefix_opc_table = bdapq_m1_prefixes; 226 break; 227 228 default: 229 prefix_opc_table = rest_prefixes; 230 break; 231 } 232 } 233 else if (popcodep->match == DIP_OPCODE) 234 /* We don't allow postincrement when the prefix is DIP, so use a 235 different table for DIP. */ 236 prefix_opc_table = dip_prefixes; 237 else 238 prefix_opc_table = rest_prefixes; 239 } 240 241 if (prefix_insn != NO_CRIS_PREFIX 242 && prefix_opc_table[insn] != NULL) 243 max_matchedp = prefix_opc_table[insn]; 244 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL) 245 max_matchedp = opc_table[insn]; 246 else 247 { 248 const struct cris_opcode *opcodep; 249 int max_level_of_match = -1; 250 251 for (opcodep = cris_opcodes; 252 opcodep->name != NULL; 253 opcodep++) 254 { 255 int level_of_match; 256 257 /* We give a double lead for bits matching the template in 258 cris_opcodes. Not even, because then "move p8,r10" would 259 be given 2 bits lead over "clear.d r10". When there's a 260 tie, the first entry in the table wins. This is 261 deliberate, to avoid a more complicated recognition 262 formula. */ 263 if ((opcodep->match & insn) == opcodep->match 264 && (opcodep->lose & insn) == 0 265 && ((level_of_match 266 = cris_constraint (opcodep->args, 267 insn, 268 prefix_insn)) 269 >= 0) 270 && ((level_of_match 271 += 2 * number_of_bits (opcodep->match 272 | opcodep->lose)) 273 > max_level_of_match)) 274 { 275 max_matchedp = opcodep; 276 max_level_of_match = level_of_match; 277 278 /* If there was a full match, never mind looking 279 further. */ 280 if (level_of_match >= 2 * 16) 281 break; 282 } 283 } 284 /* Fill in the new entry. 285 286 If there are changes to the opcode-table involving prefixes, and 287 disassembly then does not work correctly, try removing the 288 else-clause below that fills in the prefix-table. If that 289 helps, you need to change the prefix_opc_table setting above, or 290 something related. */ 291 if (prefix_insn == NO_CRIS_PREFIX) 292 opc_table[insn] = max_matchedp; 293 else 294 prefix_opc_table[insn] = max_matchedp; 295 } 296 297 return max_matchedp; 298 } 299 300 /* Format number as hex with a leading "0x" into outbuffer. */ 301 302 static char * 303 format_hex (number, outbuffer) 304 unsigned long number; 305 char *outbuffer; 306 { 307 /* Obfuscate to avoid warning on 32-bit host, but properly truncate 308 negative numbers on >32-bit hosts. */ 309 if (sizeof (number) > 4) 310 number &= (1 << (sizeof (number) > 4 ? 32 : 1)) - 1; 311 312 sprintf (outbuffer, "0x%lx", number); 313 314 /* Save this value for the "case" support. */ 315 if (TRACE_CASE) 316 last_immediate = number; 317 318 return outbuffer + strlen (outbuffer); 319 } 320 321 /* Format number as decimal into outbuffer. Parameter signedp says 322 whether the number should be formatted as signed (!= 0) or 323 unsigned (== 0). */ 324 325 static char * 326 format_dec (number, outbuffer, signedp) 327 long number; 328 char *outbuffer; 329 int signedp; 330 { 331 last_immediate = number; 332 sprintf (outbuffer, signedp ? "%ld" : "%lu", number); 333 334 return outbuffer + strlen (outbuffer); 335 } 336 337 /* Format the name of the general register regno into outbuffer. */ 338 339 static char * 340 format_reg (regno, outbuffer_start, with_reg_prefix) 341 int regno; 342 char *outbuffer_start; 343 bfd_boolean with_reg_prefix; 344 { 345 char *outbuffer = outbuffer_start; 346 347 if (with_reg_prefix) 348 *outbuffer++ = REGISTER_PREFIX_CHAR; 349 350 switch (regno) 351 { 352 case 15: 353 strcpy (outbuffer, "pc"); 354 break; 355 356 case 14: 357 strcpy (outbuffer, "sp"); 358 break; 359 360 default: 361 sprintf (outbuffer, "r%d", regno); 362 break; 363 } 364 365 return outbuffer_start + strlen (outbuffer_start); 366 } 367 368 /* Return -1 if the constraints of a bitwise-matched instruction say 369 that there is no match. Otherwise return a nonnegative number 370 indicating the confidence in the match (higher is better). */ 371 372 static int 373 cris_constraint (cs, insn, prefix_insn) 374 const char *cs; 375 unsigned int insn; 376 unsigned int prefix_insn; 377 { 378 int retval = 0; 379 int tmp; 380 int prefix_ok = 0; 381 382 const char *s; 383 for (s = cs; *s; s++) 384 switch (*s) 385 { 386 case '!': 387 /* Do not recognize "pop" if there's a prefix. */ 388 if (prefix_insn != NO_CRIS_PREFIX) 389 return -1; 390 break; 391 392 case 'M': 393 /* Size modifier for "clear", i.e. special register 0, 4 or 8. 394 Check that it is one of them. Only special register 12 could 395 be mismatched, but checking for matches is more logical than 396 checking for mismatches when there are only a few cases. */ 397 tmp = ((insn >> 12) & 0xf); 398 if (tmp != 0 && tmp != 4 && tmp != 8) 399 return -1; 400 break; 401 402 case 'm': 403 if ((insn & 0x30) == 0x30) 404 return -1; 405 break; 406 407 case 'S': 408 /* A prefix operand without side-effect. */ 409 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0) 410 { 411 prefix_ok = 1; 412 break; 413 } 414 else 415 return -1; 416 417 case 's': 418 case 'y': 419 /* If this is a prefixed insn with postincrement (side-effect), 420 the prefix must not be DIP. */ 421 if (prefix_insn != NO_CRIS_PREFIX) 422 { 423 if (insn & 0x400) 424 { 425 const struct cris_opcode *prefix_opcodep 426 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX); 427 428 if (prefix_opcodep->match == DIP_OPCODE) 429 return -1; 430 } 431 432 prefix_ok = 1; 433 } 434 break; 435 436 case 'B': 437 /* If we don't fall through, then the prefix is ok. */ 438 prefix_ok = 1; 439 440 /* A "push" prefix. Check for valid "push" size. 441 In case of special register, it may be != 4. */ 442 if (prefix_insn != NO_CRIS_PREFIX) 443 { 444 /* Match the prefix insn to BDAPQ. */ 445 const struct cris_opcode *prefix_opcodep 446 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX); 447 448 if (prefix_opcodep->match == BDAP_QUICK_OPCODE) 449 { 450 int pushsize = (prefix_insn & 255); 451 452 if (pushsize > 127) 453 pushsize -= 256; 454 455 if (s[1] == 'P') 456 { 457 unsigned int spec_reg = (insn >> 12) & 15; 458 const struct cris_spec_reg *sregp 459 = spec_reg_info (spec_reg); 460 461 /* For a special-register, the "prefix size" must 462 match the size of the register. */ 463 if (sregp && sregp->reg_size == (unsigned int) -pushsize) 464 break; 465 } 466 else if (s[1] == 'R') 467 { 468 if ((insn & 0x30) == 0x20 && pushsize == -4) 469 break; 470 } 471 /* FIXME: Should abort here; next constraint letter 472 *must* be 'P' or 'R'. */ 473 } 474 } 475 return -1; 476 477 case 'D': 478 retval = (((insn >> 12) & 15) == (insn & 15)); 479 if (!retval) 480 return -1; 481 else 482 retval += 4; 483 break; 484 485 case 'P': 486 { 487 const struct cris_spec_reg *sregp 488 = spec_reg_info ((insn >> 12) & 15); 489 490 /* Since we match four bits, we will give a value of 4-1 = 3 491 in a match. If there is a corresponding exact match of a 492 special register in another pattern, it will get a value of 493 4, which will be higher. This should be correct in that an 494 exact pattern would match better than a general pattern. 495 496 Note that there is a reason for not returning zero; the 497 pattern for "clear" is partly matched in the bit-pattern 498 (the two lower bits must be zero), while the bit-pattern 499 for a move from a special register is matched in the 500 register constraint. */ 501 502 if (sregp != NULL) 503 { 504 retval += 3; 505 break; 506 } 507 else 508 return -1; 509 } 510 } 511 512 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok) 513 return -1; 514 515 return retval; 516 } 517 518 /* Return the length of an instruction. */ 519 520 static unsigned 521 bytes_to_skip (insn, matchedp) 522 unsigned int insn; 523 const struct cris_opcode *matchedp; 524 { 525 /* Each insn is a word plus "immediate" operands. */ 526 unsigned to_skip = 2; 527 const char *template = matchedp->args; 528 const char *s; 529 530 for (s = template; *s; s++) 531 if (*s == 's' && (insn & 0x400) && (insn & 15) == 15) 532 { 533 /* Immediate via [pc+], so we have to check the size of the 534 operand. */ 535 int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3)); 536 537 if (matchedp->imm_oprnd_size == SIZE_FIX_32) 538 to_skip += 4; 539 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG) 540 { 541 const struct cris_spec_reg *sregp 542 = spec_reg_info ((insn >> 12) & 15); 543 544 /* FIXME: Improve error handling; should have been caught 545 earlier. */ 546 if (sregp == NULL) 547 return 2; 548 549 /* PC is incremented by two, not one, for a byte. */ 550 to_skip += (sregp->reg_size + 1) & ~1; 551 } 552 else 553 to_skip += (mode_size + 1) & ~1; 554 } 555 else if (*s == 'b') 556 to_skip += 2; 557 558 return to_skip; 559 } 560 561 /* Print condition code flags. */ 562 563 static char * 564 print_flags (insn, cp) 565 unsigned int insn; 566 char *cp; 567 { 568 /* Use the v8 (Etrax 100) flag definitions for disassembly. 569 The differences with v0 (Etrax 1..4) vs. Svinto are: 570 v0 'd' <=> v8 'm' 571 v0 'e' <=> v8 'b'. */ 572 static const char fnames[] = "cvznxibm"; 573 574 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15)); 575 int i; 576 577 for (i = 0; i < 8; i++) 578 if (flagbits & (1 << i)) 579 *cp++ = fnames[i]; 580 581 return cp; 582 } 583 584 /* Print out an insn with its operands, and update the info->insn_type 585 fields. The prefix_opcodep and the rest hold a prefix insn that is 586 supposed to be output as an address mode. */ 587 588 static void 589 print_with_operands (opcodep, insn, buffer, addr, info, prefix_opcodep, 590 prefix_insn, prefix_buffer, with_reg_prefix) 591 const struct cris_opcode *opcodep; 592 unsigned int insn; 593 unsigned char *buffer; 594 bfd_vma addr; 595 disassemble_info *info; 596 597 /* If a prefix insn was before this insn (and is supposed to be 598 output as an address), here is a description of it. */ 599 const struct cris_opcode *prefix_opcodep; 600 unsigned int prefix_insn; 601 unsigned char *prefix_buffer; 602 bfd_boolean with_reg_prefix; 603 { 604 /* Get a buffer of somewhat reasonable size where we store 605 intermediate parts of the insn. */ 606 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2]; 607 char *tp = temp; 608 static const char mode_char[] = "bwd?"; 609 const char *s; 610 const char *cs; 611 612 /* Print out the name first thing we do. */ 613 (*info->fprintf_func) (info->stream, "%s", opcodep->name); 614 615 cs = opcodep->args; 616 s = cs; 617 618 /* Ignore any prefix indicator. */ 619 if (*s == 'p') 620 s++; 621 622 if (*s == 'm' || *s == 'M' || *s == 'z') 623 { 624 *tp++ = '.'; 625 626 /* Get the size-letter. */ 627 *tp++ = *s == 'M' 628 ? (insn & 0x8000 ? 'd' 629 : insn & 0x4000 ? 'w' : 'b') 630 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)]; 631 632 /* Ignore the size and the space character that follows. */ 633 s += 2; 634 } 635 636 /* Add a space if this isn't a long-branch, because for those will add 637 the condition part of the name later. */ 638 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256)) 639 *tp++ = ' '; 640 641 /* Fill in the insn-type if deducible from the name (and there's no 642 better way). */ 643 if (opcodep->name[0] == 'j') 644 { 645 if (strncmp (opcodep->name, "jsr", 3) == 0) 646 /* It's "jsr" or "jsrc". */ 647 info->insn_type = dis_jsr; 648 else 649 /* Any other jump-type insn is considered a branch. */ 650 info->insn_type = dis_branch; 651 } 652 653 /* We might know some more fields right now. */ 654 info->branch_delay_insns = opcodep->delayed; 655 656 /* Handle operands. */ 657 for (; *s; s++) 658 { 659 switch (*s) 660 { 661 case ',': 662 *tp++ = *s; 663 break; 664 665 case '!': 666 /* Ignore at this point; used at earlier stages to avoid recognition 667 if there's a prefixes at something that in other ways looks like 668 a "pop". */ 669 break; 670 671 case 'B': 672 /* This was the prefix that made this a "push". We've already 673 handled it by recognizing it, so signal that the prefix is 674 handled by setting it to NULL. */ 675 prefix_opcodep = NULL; 676 break; 677 678 case 'D': 679 case 'r': 680 tp = format_reg (insn & 15, tp, with_reg_prefix); 681 break; 682 683 case 'R': 684 tp = format_reg ((insn >> 12) & 15, tp, with_reg_prefix); 685 break; 686 687 case 'y': 688 case 'S': 689 case 's': 690 /* Any "normal" memory operand. */ 691 if ((insn & 0x400) && (insn & 15) == 15) 692 { 693 /* We're looking at [pc+], i.e. we need to output an immediate 694 number, where the size can depend on different things. */ 695 long number; 696 int signedp 697 = ((*cs == 'z' && (insn & 0x20)) 698 || opcodep->match == BDAP_QUICK_OPCODE); 699 int nbytes; 700 701 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 702 nbytes = 4; 703 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 704 { 705 const struct cris_spec_reg *sregp 706 = spec_reg_info ((insn >> 12) & 15); 707 708 /* A NULL return should have been as a non-match earlier, 709 so catch it as an internal error in the error-case 710 below. */ 711 if (sregp == NULL) 712 /* Whatever non-valid size. */ 713 nbytes = 42; 714 else 715 /* PC is always incremented by a multiple of two. */ 716 nbytes = (sregp->reg_size + 1) & ~1; 717 } 718 else 719 { 720 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3)); 721 722 if (mode_size == 1) 723 nbytes = 2; 724 else 725 nbytes = mode_size; 726 } 727 728 switch (nbytes) 729 { 730 case 1: 731 number = buffer[2]; 732 if (signedp && number > 127) 733 number -= 256; 734 break; 735 736 case 2: 737 number = buffer[2] + buffer[3] * 256; 738 if (signedp && number > 32767) 739 number -= 65536; 740 break; 741 742 case 4: 743 number 744 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536 745 + buffer[5] * 0x1000000; 746 break; 747 748 default: 749 strcpy (tp, "bug"); 750 tp += 3; 751 number = 42; 752 } 753 754 if ((*cs == 'z' && (insn & 0x20)) 755 || (opcodep->match == BDAP_QUICK_OPCODE 756 && (nbytes <= 2 || buffer[1 + nbytes] == 0))) 757 tp = format_dec (number, tp, signedp); 758 else 759 { 760 unsigned int highbyte = (number >> 24) & 0xff; 761 762 /* Either output this as an address or as a number. If it's 763 a dword with the same high-byte as the address of the 764 insn, assume it's an address, and also if it's a non-zero 765 non-0xff high-byte. If this is a jsr or a jump, then 766 it's definitely an address. */ 767 if (nbytes == 4 768 && (highbyte == ((addr >> 24) & 0xff) 769 || (highbyte != 0 && highbyte != 0xff) 770 || info->insn_type == dis_branch 771 || info->insn_type == dis_jsr)) 772 { 773 /* Finish off and output previous formatted bytes. */ 774 *tp = 0; 775 tp = temp; 776 if (temp[0]) 777 (*info->fprintf_func) (info->stream, "%s", temp); 778 779 (*info->print_address_func) ((bfd_vma) number, info); 780 781 info->target = number; 782 } 783 else 784 tp = format_hex (number, tp); 785 } 786 } 787 else 788 { 789 /* Not an immediate number. Then this is a (possibly 790 prefixed) memory operand. */ 791 if (info->insn_type != dis_nonbranch) 792 { 793 int mode_size 794 = 1 << ((insn >> 4) 795 & (opcodep->args[0] == 'z' ? 1 : 3)); 796 int size; 797 info->insn_type = dis_dref; 798 info->flags |= CRIS_DIS_FLAG_MEMREF; 799 800 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 801 size = 4; 802 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 803 { 804 const struct cris_spec_reg *sregp 805 = spec_reg_info ((insn >> 12) & 15); 806 807 /* FIXME: Improve error handling; should have been caught 808 earlier. */ 809 if (sregp == NULL) 810 size = 4; 811 else 812 size = sregp->reg_size; 813 } 814 else 815 size = mode_size; 816 817 info->data_size = size; 818 } 819 820 *tp++ = '['; 821 822 if (prefix_opcodep 823 /* We don't match dip with a postincremented field 824 as a side-effect address mode. */ 825 && ((insn & 0x400) == 0 826 || prefix_opcodep->match != DIP_OPCODE)) 827 { 828 if (insn & 0x400) 829 { 830 tp = format_reg (insn & 15, tp, with_reg_prefix); 831 *tp++ = '='; 832 } 833 834 835 /* We mainly ignore the prefix format string when the 836 address-mode syntax is output. */ 837 switch (prefix_opcodep->match) 838 { 839 case DIP_OPCODE: 840 /* It's [r], [r+] or [pc+]. */ 841 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 842 { 843 /* It's [pc+]. This cannot possibly be anything 844 but an address. */ 845 unsigned long number 846 = prefix_buffer[2] + prefix_buffer[3] * 256 847 + prefix_buffer[4] * 65536 848 + prefix_buffer[5] * 0x1000000; 849 850 info->target = (bfd_vma) number; 851 852 /* Finish off and output previous formatted 853 data. */ 854 *tp = 0; 855 tp = temp; 856 if (temp[0]) 857 (*info->fprintf_func) (info->stream, "%s", temp); 858 859 (*info->print_address_func) ((bfd_vma) number, info); 860 } 861 else 862 { 863 /* For a memref in an address, we use target2. 864 In this case, target is zero. */ 865 info->flags 866 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 867 | CRIS_DIS_FLAG_MEM_TARGET2_MEM); 868 869 info->target2 = prefix_insn & 15; 870 871 *tp++ = '['; 872 tp = format_reg (prefix_insn & 15, tp, 873 with_reg_prefix); 874 if (prefix_insn & 0x400) 875 *tp++ = '+'; 876 *tp++ = ']'; 877 } 878 break; 879 880 case BDAP_QUICK_OPCODE: 881 { 882 int number; 883 884 number = prefix_buffer[0]; 885 if (number > 127) 886 number -= 256; 887 888 /* Output "reg+num" or, if num < 0, "reg-num". */ 889 tp = format_reg ((prefix_insn >> 12) & 15, tp, 890 with_reg_prefix); 891 if (number >= 0) 892 *tp++ = '+'; 893 tp = format_dec (number, tp, 1); 894 895 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 896 info->target = (prefix_insn >> 12) & 15; 897 info->target2 = (bfd_vma) number; 898 break; 899 } 900 901 case BIAP_OPCODE: 902 /* Output "r+R.m". */ 903 tp = format_reg (prefix_insn & 15, tp, with_reg_prefix); 904 *tp++ = '+'; 905 tp = format_reg ((prefix_insn >> 12) & 15, tp, 906 with_reg_prefix); 907 *tp++ = '.'; 908 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 909 910 info->flags 911 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 912 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 913 914 | ((prefix_insn & 0x8000) 915 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4 916 : ((prefix_insn & 0x8000) 917 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0))); 918 919 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */ 920 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f) 921 /* Then start interpreting data as offsets. */ 922 case_offset_counter = no_of_case_offsets; 923 break; 924 925 case BDAP_INDIR_OPCODE: 926 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or 927 "r-s". */ 928 tp = format_reg ((prefix_insn >> 12) & 15, tp, 929 with_reg_prefix); 930 931 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 932 { 933 long number; 934 unsigned int nbytes; 935 936 /* It's a value. Get its size. */ 937 int mode_size = 1 << ((prefix_insn >> 4) & 3); 938 939 if (mode_size == 1) 940 nbytes = 2; 941 else 942 nbytes = mode_size; 943 944 switch (nbytes) 945 { 946 case 1: 947 number = prefix_buffer[2]; 948 if (number > 127) 949 number -= 256; 950 break; 951 952 case 2: 953 number = prefix_buffer[2] + prefix_buffer[3] * 256; 954 if (number > 32767) 955 number -= 65536; 956 break; 957 958 case 4: 959 number 960 = prefix_buffer[2] + prefix_buffer[3] * 256 961 + prefix_buffer[4] * 65536 962 + prefix_buffer[5] * 0x1000000; 963 break; 964 965 default: 966 strcpy (tp, "bug"); 967 tp += 3; 968 number = 42; 969 } 970 971 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 972 info->target2 = (bfd_vma) number; 973 974 /* If the size is dword, then assume it's an 975 address. */ 976 if (nbytes == 4) 977 { 978 /* Finish off and output previous formatted 979 bytes. */ 980 *tp++ = '+'; 981 *tp = 0; 982 tp = temp; 983 (*info->fprintf_func) (info->stream, "%s", temp); 984 985 (*info->print_address_func) ((bfd_vma) number, info); 986 } 987 else 988 { 989 if (number >= 0) 990 *tp++ = '+'; 991 tp = format_dec (number, tp, 1); 992 } 993 } 994 else 995 { 996 /* Output "r+[R].m" or "r+[R+].m". */ 997 *tp++ = '+'; 998 *tp++ = '['; 999 tp = format_reg (prefix_insn & 15, tp, 1000 with_reg_prefix); 1001 if (prefix_insn & 0x400) 1002 *tp++ = '+'; 1003 *tp++ = ']'; 1004 *tp++ = '.'; 1005 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1006 1007 info->flags 1008 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1009 | CRIS_DIS_FLAG_MEM_TARGET2_MEM 1010 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1011 1012 | (((prefix_insn >> 4) == 2) 1013 ? 0 1014 : (((prefix_insn >> 4) & 3) == 1 1015 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD 1016 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE))); 1017 } 1018 break; 1019 1020 default: 1021 (*info->fprintf_func) (info->stream, "?prefix-bug"); 1022 } 1023 1024 /* To mark that the prefix is used, reset it. */ 1025 prefix_opcodep = NULL; 1026 } 1027 else 1028 { 1029 tp = format_reg (insn & 15, tp, with_reg_prefix); 1030 1031 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1032 info->target = insn & 15; 1033 1034 if (insn & 0x400) 1035 *tp++ = '+'; 1036 } 1037 *tp++ = ']'; 1038 } 1039 break; 1040 1041 case 'x': 1042 tp = format_reg ((insn >> 12) & 15, tp, with_reg_prefix); 1043 *tp++ = '.'; 1044 *tp++ = mode_char[(insn >> 4) & 3]; 1045 break; 1046 1047 case 'I': 1048 tp = format_dec (insn & 63, tp, 0); 1049 break; 1050 1051 case 'b': 1052 { 1053 int where = buffer[2] + buffer[3] * 256; 1054 1055 if (where > 32767) 1056 where -= 65536; 1057 1058 where += addr + 4; 1059 1060 if (insn == BA_PC_INCR_OPCODE) 1061 info->insn_type = dis_branch; 1062 else 1063 info->insn_type = dis_condbranch; 1064 1065 info->target = (bfd_vma) where; 1066 1067 *tp = 0; 1068 tp = temp; 1069 (*info->fprintf_func) (info->stream, "%s%s ", 1070 temp, cris_cc_strings[insn >> 12]); 1071 1072 (*info->print_address_func) ((bfd_vma) where, info); 1073 } 1074 break; 1075 1076 case 'c': 1077 tp = format_dec (insn & 31, tp, 0); 1078 break; 1079 1080 case 'C': 1081 tp = format_dec (insn & 15, tp, 0); 1082 break; 1083 1084 case 'o': 1085 { 1086 long offset = insn & 0xfe; 1087 1088 if (insn & 1) 1089 offset |= ~0xff; 1090 1091 if (opcodep->match == BA_QUICK_OPCODE) 1092 info->insn_type = dis_branch; 1093 else 1094 info->insn_type = dis_condbranch; 1095 1096 info->target = (bfd_vma) (addr + 2 + offset); 1097 *tp = 0; 1098 tp = temp; 1099 (*info->fprintf_func) (info->stream, "%s", temp); 1100 1101 (*info->print_address_func) ((bfd_vma) (addr + 2 + offset), info); 1102 } 1103 break; 1104 1105 case 'O': 1106 { 1107 long number = buffer[0]; 1108 1109 if (number > 127) 1110 number = number - 256; 1111 1112 tp = format_dec (number, tp, 1); 1113 *tp++ = ','; 1114 tp = format_reg ((insn >> 12) & 15, tp, with_reg_prefix); 1115 } 1116 break; 1117 1118 case 'f': 1119 tp = print_flags (insn, tp); 1120 break; 1121 1122 case 'i': 1123 tp = format_dec ((insn & 32) ? (insn & 31) | ~31 : insn & 31, tp, 1); 1124 break; 1125 1126 case 'P': 1127 { 1128 const struct cris_spec_reg *sregp 1129 = spec_reg_info ((insn >> 12) & 15); 1130 1131 if (sregp->name == NULL) 1132 /* Should have been caught as a non-match eariler. */ 1133 *tp++ = '?'; 1134 else 1135 { 1136 if (with_reg_prefix) 1137 *tp++ = REGISTER_PREFIX_CHAR; 1138 strcpy (tp, sregp->name); 1139 tp += strlen (tp); 1140 } 1141 } 1142 break; 1143 1144 default: 1145 strcpy (tp, "???"); 1146 tp += 3; 1147 } 1148 } 1149 1150 *tp = 0; 1151 1152 if (prefix_opcodep) 1153 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")", 1154 prefix_opcodep->name, prefix_opcodep->args); 1155 1156 (*info->fprintf_func) (info->stream, "%s", temp); 1157 1158 /* Get info for matching case-tables, if we don't have any active. 1159 We assume that the last constant seen is used; either in the insn 1160 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */ 1161 if (TRACE_CASE && case_offset_counter == 0) 1162 { 1163 if (strncmp (opcodep->name, "sub", 3) == 0) 1164 case_offset = last_immediate; 1165 1166 /* It could also be an "add", if there are negative case-values. */ 1167 else if (strncmp (opcodep->name, "add", 3) == 0) 1168 { 1169 /* The first case is the negated operand to the add. */ 1170 case_offset = -last_immediate; 1171 } 1172 /* A bound insn will tell us the number of cases. */ 1173 else if (strncmp (opcodep->name, "bound", 5) == 0) 1174 { 1175 no_of_case_offsets = last_immediate + 1; 1176 } 1177 /* A jump or jsr or branch breaks the chain of insns for a 1178 case-table, so assume default first-case again. */ 1179 else if (info->insn_type == dis_jsr 1180 || info->insn_type == dis_branch 1181 || info->insn_type == dis_condbranch) 1182 case_offset = 0; 1183 } 1184 } 1185 1186 1187 /* Print the CRIS instruction at address memaddr on stream. Returns 1188 length of the instruction, in bytes. Prefix register names with `$' if 1189 WITH_REG_PREFIX. */ 1190 1191 static int 1192 print_insn_cris_generic (memaddr, info, with_reg_prefix) 1193 bfd_vma memaddr; 1194 disassemble_info *info; 1195 bfd_boolean with_reg_prefix; 1196 { 1197 int nbytes; 1198 unsigned int insn; 1199 const struct cris_opcode *matchedp; 1200 int advance = 0; 1201 1202 /* No instruction will be disassembled as longer than this number of 1203 bytes; stacked prefixes will not be expanded. */ 1204 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN]; 1205 unsigned char *bufp; 1206 int status = 0; 1207 bfd_vma addr; 1208 1209 /* There will be an "out of range" error after the last instruction. 1210 Reading pairs of bytes in decreasing number, we hope that we will get 1211 at least the amount that we will consume. 1212 1213 If we can't get any data, or we do not get enough data, we print 1214 the error message. */ 1215 1216 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2) 1217 { 1218 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info); 1219 if (status == 0) 1220 break; 1221 } 1222 1223 /* If we did not get all we asked for, then clear the rest. 1224 Hopefully this makes a reproducible result in case of errors. */ 1225 if (nbytes != MAX_BYTES_PER_CRIS_INSN) 1226 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes); 1227 1228 addr = memaddr; 1229 bufp = buffer; 1230 1231 /* Set some defaults for the insn info. */ 1232 info->insn_info_valid = 1; 1233 info->branch_delay_insns = 0; 1234 info->data_size = 0; 1235 info->insn_type = dis_nonbranch; 1236 info->flags = 0; 1237 info->target = 0; 1238 info->target2 = 0; 1239 1240 /* If we got any data, disassemble it. */ 1241 if (nbytes != 0) 1242 { 1243 matchedp = NULL; 1244 1245 insn = bufp[0] + bufp[1] * 256; 1246 1247 /* If we're in a case-table, don't disassemble the offsets. */ 1248 if (TRACE_CASE && case_offset_counter != 0) 1249 { 1250 info->insn_type = dis_noninsn; 1251 advance += 2; 1252 1253 /* If to print data as offsets, then shortcut here. */ 1254 (*info->fprintf_func) (info->stream, "case %d%s: -> ", 1255 case_offset + no_of_case_offsets 1256 - case_offset_counter, 1257 case_offset_counter == 1 ? "/default" : 1258 ""); 1259 1260 (*info->print_address_func) ((bfd_vma) 1261 ((short) (insn) 1262 + (long) (addr 1263 - (no_of_case_offsets 1264 - case_offset_counter) 1265 * 2)), info); 1266 case_offset_counter--; 1267 1268 /* The default case start (without a "sub" or "add") must be 1269 zero. */ 1270 if (case_offset_counter == 0) 1271 case_offset = 0; 1272 } 1273 else if (insn == 0) 1274 { 1275 /* We're often called to disassemble zeroes. While this is a 1276 valid "bcc .+2" insn, it is also useless enough and enough 1277 of a nuiscance that we will just output "bcc .+2" for it 1278 and signal it as a noninsn. */ 1279 (*info->fprintf_func) (info->stream, "bcc .+2"); 1280 info->insn_type = dis_noninsn; 1281 advance += 2; 1282 } 1283 else 1284 { 1285 const struct cris_opcode *prefix_opcodep = NULL; 1286 unsigned char *prefix_buffer = bufp; 1287 unsigned int prefix_insn = insn; 1288 int prefix_size = 0; 1289 1290 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX); 1291 1292 /* Check if we're supposed to write out prefixes as address 1293 modes and if this was a prefix. */ 1294 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p') 1295 { 1296 /* If it's a prefix, put it into the prefix vars and get the 1297 main insn. */ 1298 prefix_size = bytes_to_skip (prefix_insn, matchedp); 1299 prefix_opcodep = matchedp; 1300 1301 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256; 1302 matchedp = get_opcode_entry (insn, prefix_insn); 1303 1304 if (matchedp != NULL) 1305 { 1306 addr += prefix_size; 1307 bufp += prefix_size; 1308 advance += prefix_size; 1309 } 1310 else 1311 { 1312 /* The "main" insn wasn't valid, at least not when 1313 prefixed. Put back things enough to output the 1314 prefix insn only, as a normal insn. */ 1315 matchedp = prefix_opcodep; 1316 insn = prefix_insn; 1317 prefix_opcodep = NULL; 1318 } 1319 } 1320 1321 if (matchedp == NULL) 1322 { 1323 (*info->fprintf_func) (info->stream, "??0x%lx", insn); 1324 advance += 2; 1325 1326 info->insn_type = dis_noninsn; 1327 } 1328 else 1329 { 1330 advance += bytes_to_skip (insn, matchedp); 1331 1332 /* The info_type and assorted fields will be set according 1333 to the operands. */ 1334 print_with_operands (matchedp, insn, bufp, addr, info, 1335 prefix_opcodep, prefix_insn, 1336 prefix_buffer, with_reg_prefix); 1337 } 1338 } 1339 } 1340 else 1341 info->insn_type = dis_noninsn; 1342 1343 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error 1344 status when reading that much, and the insn decoding indicated a 1345 length exceeding what we read, there is an error. */ 1346 if (status != 0 && (nbytes == 0 || advance > nbytes)) 1347 { 1348 (*info->memory_error_func) (status, memaddr, info); 1349 return -1; 1350 } 1351 1352 /* Max supported insn size with one folded prefix insn. */ 1353 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN; 1354 1355 /* I would like to set this to a fixed value larger than the actual 1356 number of bytes to print in order to avoid spaces between bytes, 1357 but objdump.c (2.9.1) does not like that, so we print 16-bit 1358 chunks, which is the next choice. */ 1359 info->bytes_per_chunk = 2; 1360 1361 /* Printing bytes in order of increasing addresses makes sense, 1362 especially on a little-endian target. 1363 This is completely the opposite of what you think; setting this to 1364 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N 1365 we want. */ 1366 info->display_endian = BFD_ENDIAN_BIG; 1367 1368 return advance; 1369 } 1370 1371 /* Disassemble, prefixing register names with `$'. */ 1372 1373 static int 1374 print_insn_cris_with_register_prefix (vma, info) 1375 bfd_vma vma; 1376 disassemble_info *info; 1377 { 1378 return print_insn_cris_generic (vma, info, TRUE); 1379 } 1380 1381 /* Disassemble, no prefixes on register names. */ 1382 1383 static int 1384 print_insn_cris_without_register_prefix (vma, info) 1385 bfd_vma vma; 1386 disassemble_info *info; 1387 { 1388 return print_insn_cris_generic (vma, info, FALSE); 1389 } 1390 1391 /* Return a disassembler-function that prints registers with a `$' prefix, 1392 or one that prints registers without a prefix. */ 1393 1394 disassembler_ftype 1395 cris_get_disassembler (abfd) 1396 bfd *abfd; 1397 { 1398 /* If there's no bfd in sight, we return what is valid as input in all 1399 contexts if fed back to the assembler: disassembly *with* register 1400 prefix. */ 1401 if (abfd == NULL || bfd_get_symbol_leading_char (abfd) == 0) 1402 return print_insn_cris_with_register_prefix; 1403 1404 return print_insn_cris_without_register_prefix; 1405 } 1406 1407 /* 1408 * Local variables: 1409 * eval: (c-set-style "gnu") 1410 * indent-tabs-mode: t 1411 * End: 1412 */ 1413