1 /* Print i386 instructions for GDB, the GNU debugger. 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 20 21 /* 22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) 23 * July 1988 24 * modified by John Hassey (hassey@dg-rtp.dg.com) 25 * x86-64 support added by Jan Hubicka (jh@suse.cz) 26 * VIA PadLock support by Michal Ludvig (mludvig@suse.cz) 27 */ 28 29 /* 30 * The main tables describing the instructions is essentially a copy 31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386 32 * Programmers Manual. Usually, there is a capital letter, followed 33 * by a small letter. The capital letter tell the addressing mode, 34 * and the small letter tells about the operand size. Refer to 35 * the Intel manual for details. 36 */ 37 38 #include "dis-asm.h" 39 #include "sysdep.h" 40 #include "opintl.h" 41 42 #define MAXLEN 20 43 44 #include <setjmp.h> 45 46 #ifndef UNIXWARE_COMPAT 47 /* Set non-zero for broken, compatible instructions. Set to zero for 48 non-broken opcodes. */ 49 #define UNIXWARE_COMPAT 1 50 #endif 51 52 static int fetch_data (struct disassemble_info *, bfd_byte *); 53 static void ckprefix (void); 54 static const char *prefix_name (int, int); 55 static int print_insn (bfd_vma, disassemble_info *); 56 static void dofloat (int); 57 static void OP_ST (int, int); 58 static void OP_STi (int, int); 59 static int putop (const char *, int); 60 static void oappend (const char *); 61 static void append_seg (void); 62 static void OP_indirE (int, int); 63 static void print_operand_value (char *, int, bfd_vma); 64 static void OP_E (int, int); 65 static void OP_G (int, int); 66 static bfd_vma get64 (void); 67 static bfd_signed_vma get32 (void); 68 static bfd_signed_vma get32s (void); 69 static int get16 (void); 70 static void set_op (bfd_vma, int); 71 static void OP_REG (int, int); 72 static void OP_IMREG (int, int); 73 static void OP_I (int, int); 74 static void OP_I64 (int, int); 75 static void OP_sI (int, int); 76 static void OP_J (int, int); 77 static void OP_SEG (int, int); 78 static void OP_DIR (int, int); 79 static void OP_OFF (int, int); 80 static void OP_OFF64 (int, int); 81 static void ptr_reg (int, int); 82 static void OP_ESreg (int, int); 83 static void OP_DSreg (int, int); 84 static void OP_C (int, int); 85 static void OP_D (int, int); 86 static void OP_T (int, int); 87 static void OP_Rd (int, int); 88 static void OP_MMX (int, int); 89 static void OP_XMM (int, int); 90 static void OP_EM (int, int); 91 static void OP_EX (int, int); 92 static void OP_MS (int, int); 93 static void OP_XS (int, int); 94 static void OP_M (int, int); 95 static void OP_0fae (int, int); 96 static void NOP_Fixup (int, int); 97 static void OP_3DNowSuffix (int, int); 98 static void OP_xcrypt2 (int, int); 99 static void OP_xcrypt (int, int); 100 static void OP_SIMD_Suffix (int, int); 101 static void SIMD_Fixup (int, int); 102 static void PNI_Fixup (int, int); 103 static void INVLPG_Fixup (int, int); 104 static void BadOp (void); 105 106 struct dis_private { 107 /* Points to first byte not fetched. */ 108 bfd_byte *max_fetched; 109 bfd_byte the_buffer[MAXLEN]; 110 bfd_vma insn_start; 111 int orig_sizeflag; 112 jmp_buf bailout; 113 }; 114 115 /* The opcode for the fwait instruction, which we treat as a prefix 116 when we can. */ 117 #define FWAIT_OPCODE (0x9b) 118 119 /* Set to 1 for 64bit mode disassembly. */ 120 static int mode_64bit; 121 122 /* Flags for the prefixes for the current instruction. See below. */ 123 static int prefixes; 124 125 /* REX prefix the current instruction. See below. */ 126 static int rex; 127 /* Bits of REX we've already used. */ 128 static int rex_used; 129 #define REX_MODE64 8 130 #define REX_EXTX 4 131 #define REX_EXTY 2 132 #define REX_EXTZ 1 133 /* Mark parts used in the REX prefix. When we are testing for 134 empty prefix (for 8bit register REX extension), just mask it 135 out. Otherwise test for REX bit is excuse for existence of REX 136 only in case value is nonzero. */ 137 #define USED_REX(value) \ 138 { \ 139 if (value) \ 140 rex_used |= (rex & value) ? (value) | 0x40 : 0; \ 141 else \ 142 rex_used |= 0x40; \ 143 } 144 145 /* Flags for prefixes which we somehow handled when printing the 146 current instruction. */ 147 static int used_prefixes; 148 149 /* Flags stored in PREFIXES. */ 150 #define PREFIX_REPZ 1 151 #define PREFIX_REPNZ 2 152 #define PREFIX_LOCK 4 153 #define PREFIX_CS 8 154 #define PREFIX_SS 0x10 155 #define PREFIX_DS 0x20 156 #define PREFIX_ES 0x40 157 #define PREFIX_FS 0x80 158 #define PREFIX_GS 0x100 159 #define PREFIX_DATA 0x200 160 #define PREFIX_ADDR 0x400 161 #define PREFIX_FWAIT 0x800 162 163 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 164 to ADDR (exclusive) are valid. Returns 1 for success, longjmps 165 on error. */ 166 #define FETCH_DATA(info, addr) \ 167 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \ 168 ? 1 : fetch_data ((info), (addr))) 169 170 static int 171 fetch_data (struct disassemble_info *info, bfd_byte *addr) 172 { 173 int status; 174 struct dis_private *priv = (struct dis_private *) info->private_data; 175 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 176 177 status = (*info->read_memory_func) (start, 178 priv->max_fetched, 179 addr - priv->max_fetched, 180 info); 181 if (status != 0) 182 { 183 /* If we did manage to read at least one byte, then 184 print_insn_i386 will do something sensible. Otherwise, print 185 an error. We do that here because this is where we know 186 STATUS. */ 187 if (priv->max_fetched == priv->the_buffer) 188 (*info->memory_error_func) (status, start, info); 189 longjmp (priv->bailout, 1); 190 } 191 else 192 priv->max_fetched = addr; 193 return 1; 194 } 195 196 #define XX NULL, 0 197 198 #define Eb OP_E, b_mode 199 #define Ev OP_E, v_mode 200 #define Ed OP_E, d_mode 201 #define Edq OP_E, dq_mode 202 #define indirEb OP_indirE, b_mode 203 #define indirEv OP_indirE, v_mode 204 #define Ew OP_E, w_mode 205 #define Ma OP_E, v_mode 206 #define M OP_M, 0 /* lea, lgdt, etc. */ 207 #define Mp OP_M, 0 /* 32 or 48 bit memory operand for LDS, LES etc */ 208 #define Gb OP_G, b_mode 209 #define Gv OP_G, v_mode 210 #define Gd OP_G, d_mode 211 #define Gw OP_G, w_mode 212 #define Rd OP_Rd, d_mode 213 #define Rm OP_Rd, m_mode 214 #define Ib OP_I, b_mode 215 #define sIb OP_sI, b_mode /* sign extened byte */ 216 #define Iv OP_I, v_mode 217 #define Iq OP_I, q_mode 218 #define Iv64 OP_I64, v_mode 219 #define Iw OP_I, w_mode 220 #define Jb OP_J, b_mode 221 #define Jv OP_J, v_mode 222 #define Cm OP_C, m_mode 223 #define Dm OP_D, m_mode 224 #define Td OP_T, d_mode 225 226 #define RMeAX OP_REG, eAX_reg 227 #define RMeBX OP_REG, eBX_reg 228 #define RMeCX OP_REG, eCX_reg 229 #define RMeDX OP_REG, eDX_reg 230 #define RMeSP OP_REG, eSP_reg 231 #define RMeBP OP_REG, eBP_reg 232 #define RMeSI OP_REG, eSI_reg 233 #define RMeDI OP_REG, eDI_reg 234 #define RMrAX OP_REG, rAX_reg 235 #define RMrBX OP_REG, rBX_reg 236 #define RMrCX OP_REG, rCX_reg 237 #define RMrDX OP_REG, rDX_reg 238 #define RMrSP OP_REG, rSP_reg 239 #define RMrBP OP_REG, rBP_reg 240 #define RMrSI OP_REG, rSI_reg 241 #define RMrDI OP_REG, rDI_reg 242 #define RMAL OP_REG, al_reg 243 #define RMAL OP_REG, al_reg 244 #define RMCL OP_REG, cl_reg 245 #define RMDL OP_REG, dl_reg 246 #define RMBL OP_REG, bl_reg 247 #define RMAH OP_REG, ah_reg 248 #define RMCH OP_REG, ch_reg 249 #define RMDH OP_REG, dh_reg 250 #define RMBH OP_REG, bh_reg 251 #define RMAX OP_REG, ax_reg 252 #define RMDX OP_REG, dx_reg 253 254 #define eAX OP_IMREG, eAX_reg 255 #define eBX OP_IMREG, eBX_reg 256 #define eCX OP_IMREG, eCX_reg 257 #define eDX OP_IMREG, eDX_reg 258 #define eSP OP_IMREG, eSP_reg 259 #define eBP OP_IMREG, eBP_reg 260 #define eSI OP_IMREG, eSI_reg 261 #define eDI OP_IMREG, eDI_reg 262 #define AL OP_IMREG, al_reg 263 #define AL OP_IMREG, al_reg 264 #define CL OP_IMREG, cl_reg 265 #define DL OP_IMREG, dl_reg 266 #define BL OP_IMREG, bl_reg 267 #define AH OP_IMREG, ah_reg 268 #define CH OP_IMREG, ch_reg 269 #define DH OP_IMREG, dh_reg 270 #define BH OP_IMREG, bh_reg 271 #define AX OP_IMREG, ax_reg 272 #define DX OP_IMREG, dx_reg 273 #define indirDX OP_IMREG, indir_dx_reg 274 275 #define Sw OP_SEG, w_mode 276 #define Ap OP_DIR, 0 277 #define Ob OP_OFF, b_mode 278 #define Ob64 OP_OFF64, b_mode 279 #define Ov OP_OFF, v_mode 280 #define Ov64 OP_OFF64, v_mode 281 #define Xb OP_DSreg, eSI_reg 282 #define Xv OP_DSreg, eSI_reg 283 #define Yb OP_ESreg, eDI_reg 284 #define Yv OP_ESreg, eDI_reg 285 #define DSBX OP_DSreg, eBX_reg 286 287 #define es OP_REG, es_reg 288 #define ss OP_REG, ss_reg 289 #define cs OP_REG, cs_reg 290 #define ds OP_REG, ds_reg 291 #define fs OP_REG, fs_reg 292 #define gs OP_REG, gs_reg 293 294 #define MX OP_MMX, 0 295 #define XM OP_XMM, 0 296 #define EM OP_EM, v_mode 297 #define EX OP_EX, v_mode 298 #define MS OP_MS, v_mode 299 #define XS OP_XS, v_mode 300 #define OPSUF OP_3DNowSuffix, 0 301 #define OPXCRYPT OP_xcrypt, 0 302 #define OPXCRYPT2 OP_xcrypt2, 0 303 #define OPSIMD OP_SIMD_Suffix, 0 304 305 #define cond_jump_flag NULL, cond_jump_mode 306 #define loop_jcxz_flag NULL, loop_jcxz_mode 307 308 /* bits in sizeflag */ 309 #define SUFFIX_ALWAYS 4 310 #define AFLAG 2 311 #define DFLAG 1 312 313 #define b_mode 1 /* byte operand */ 314 #define v_mode 2 /* operand size depends on prefixes */ 315 #define w_mode 3 /* word operand */ 316 #define d_mode 4 /* double word operand */ 317 #define q_mode 5 /* quad word operand */ 318 #define x_mode 6 319 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */ 320 #define cond_jump_mode 8 321 #define loop_jcxz_mode 9 322 #define dq_mode 10 /* operand size depends on REX prefixes. */ 323 324 #define es_reg 100 325 #define cs_reg 101 326 #define ss_reg 102 327 #define ds_reg 103 328 #define fs_reg 104 329 #define gs_reg 105 330 331 #define eAX_reg 108 332 #define eCX_reg 109 333 #define eDX_reg 110 334 #define eBX_reg 111 335 #define eSP_reg 112 336 #define eBP_reg 113 337 #define eSI_reg 114 338 #define eDI_reg 115 339 340 #define al_reg 116 341 #define cl_reg 117 342 #define dl_reg 118 343 #define bl_reg 119 344 #define ah_reg 120 345 #define ch_reg 121 346 #define dh_reg 122 347 #define bh_reg 123 348 349 #define ax_reg 124 350 #define cx_reg 125 351 #define dx_reg 126 352 #define bx_reg 127 353 #define sp_reg 128 354 #define bp_reg 129 355 #define si_reg 130 356 #define di_reg 131 357 358 #define rAX_reg 132 359 #define rCX_reg 133 360 #define rDX_reg 134 361 #define rBX_reg 135 362 #define rSP_reg 136 363 #define rBP_reg 137 364 #define rSI_reg 138 365 #define rDI_reg 139 366 367 #define indir_dx_reg 150 368 369 #define FLOATCODE 1 370 #define USE_GROUPS 2 371 #define USE_PREFIX_USER_TABLE 3 372 #define X86_64_SPECIAL 4 373 374 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 375 376 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0 377 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0 378 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0 379 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0 380 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0 381 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0 382 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0 383 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0 384 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0 385 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0 386 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0 387 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0 388 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0 389 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0 390 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0 391 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0 392 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0 393 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0 394 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0 395 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0 396 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0 397 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0 398 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0 399 400 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0 401 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0 402 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0 403 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0 404 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0 405 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0 406 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0 407 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0 408 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0 409 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0 410 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0 411 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0 412 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0 413 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0 414 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0 415 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0 416 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0 417 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0 418 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0 419 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0 420 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0 421 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0 422 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0 423 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0 424 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0 425 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0 426 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0 427 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0 428 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0 429 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0 430 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0 431 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0 432 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0 433 434 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0 435 436 typedef void (*op_rtn) (int bytemode, int sizeflag); 437 438 struct dis386 { 439 const char *name; 440 op_rtn op1; 441 int bytemode1; 442 op_rtn op2; 443 int bytemode2; 444 op_rtn op3; 445 int bytemode3; 446 }; 447 448 /* Upper case letters in the instruction names here are macros. 449 'A' => print 'b' if no register operands or suffix_always is true 450 'B' => print 'b' if suffix_always is true 451 'E' => print 'e' if 32-bit form of jcxz 452 'F' => print 'w' or 'l' depending on address size prefix (loop insns) 453 'H' => print ",pt" or ",pn" branch hint 454 'L' => print 'l' if suffix_always is true 455 'N' => print 'n' if instruction has no wait "prefix" 456 'O' => print 'd', or 'o' 457 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, 458 . or suffix_always is true. print 'q' if rex prefix is present. 459 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always 460 . is true 461 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode) 462 'S' => print 'w', 'l' or 'q' if suffix_always is true 463 'T' => print 'q' in 64bit mode and behave as 'P' otherwise 464 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise 465 'X' => print 's', 'd' depending on data16 prefix (for XMM) 466 'W' => print 'b' or 'w' ("w" or "de" in intel mode) 467 'Y' => 'q' if instruction has an REX 64bit overwrite prefix 468 469 Many of the above letters print nothing in Intel mode. See "putop" 470 for the details. 471 472 Braces '{' and '}', and vertical bars '|', indicate alternative 473 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel 474 modes. In cases where there are only two alternatives, the X86_64 475 instruction is reserved, and "(bad)" is printed. 476 */ 477 478 static const struct dis386 dis386[] = { 479 /* 00 */ 480 { "addB", Eb, Gb, XX }, 481 { "addS", Ev, Gv, XX }, 482 { "addB", Gb, Eb, XX }, 483 { "addS", Gv, Ev, XX }, 484 { "addB", AL, Ib, XX }, 485 { "addS", eAX, Iv, XX }, 486 { "push{T|}", es, XX, XX }, 487 { "pop{T|}", es, XX, XX }, 488 /* 08 */ 489 { "orB", Eb, Gb, XX }, 490 { "orS", Ev, Gv, XX }, 491 { "orB", Gb, Eb, XX }, 492 { "orS", Gv, Ev, XX }, 493 { "orB", AL, Ib, XX }, 494 { "orS", eAX, Iv, XX }, 495 { "push{T|}", cs, XX, XX }, 496 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ 497 /* 10 */ 498 { "adcB", Eb, Gb, XX }, 499 { "adcS", Ev, Gv, XX }, 500 { "adcB", Gb, Eb, XX }, 501 { "adcS", Gv, Ev, XX }, 502 { "adcB", AL, Ib, XX }, 503 { "adcS", eAX, Iv, XX }, 504 { "push{T|}", ss, XX, XX }, 505 { "popT|}", ss, XX, XX }, 506 /* 18 */ 507 { "sbbB", Eb, Gb, XX }, 508 { "sbbS", Ev, Gv, XX }, 509 { "sbbB", Gb, Eb, XX }, 510 { "sbbS", Gv, Ev, XX }, 511 { "sbbB", AL, Ib, XX }, 512 { "sbbS", eAX, Iv, XX }, 513 { "push{T|}", ds, XX, XX }, 514 { "pop{T|}", ds, XX, XX }, 515 /* 20 */ 516 { "andB", Eb, Gb, XX }, 517 { "andS", Ev, Gv, XX }, 518 { "andB", Gb, Eb, XX }, 519 { "andS", Gv, Ev, XX }, 520 { "andB", AL, Ib, XX }, 521 { "andS", eAX, Iv, XX }, 522 { "(bad)", XX, XX, XX }, /* SEG ES prefix */ 523 { "daa{|}", XX, XX, XX }, 524 /* 28 */ 525 { "subB", Eb, Gb, XX }, 526 { "subS", Ev, Gv, XX }, 527 { "subB", Gb, Eb, XX }, 528 { "subS", Gv, Ev, XX }, 529 { "subB", AL, Ib, XX }, 530 { "subS", eAX, Iv, XX }, 531 { "(bad)", XX, XX, XX }, /* SEG CS prefix */ 532 { "das{|}", XX, XX, XX }, 533 /* 30 */ 534 { "xorB", Eb, Gb, XX }, 535 { "xorS", Ev, Gv, XX }, 536 { "xorB", Gb, Eb, XX }, 537 { "xorS", Gv, Ev, XX }, 538 { "xorB", AL, Ib, XX }, 539 { "xorS", eAX, Iv, XX }, 540 { "(bad)", XX, XX, XX }, /* SEG SS prefix */ 541 { "aaa{|}", XX, XX, XX }, 542 /* 38 */ 543 { "cmpB", Eb, Gb, XX }, 544 { "cmpS", Ev, Gv, XX }, 545 { "cmpB", Gb, Eb, XX }, 546 { "cmpS", Gv, Ev, XX }, 547 { "cmpB", AL, Ib, XX }, 548 { "cmpS", eAX, Iv, XX }, 549 { "(bad)", XX, XX, XX }, /* SEG DS prefix */ 550 { "aas{|}", XX, XX, XX }, 551 /* 40 */ 552 { "inc{S|}", RMeAX, XX, XX }, 553 { "inc{S|}", RMeCX, XX, XX }, 554 { "inc{S|}", RMeDX, XX, XX }, 555 { "inc{S|}", RMeBX, XX, XX }, 556 { "inc{S|}", RMeSP, XX, XX }, 557 { "inc{S|}", RMeBP, XX, XX }, 558 { "inc{S|}", RMeSI, XX, XX }, 559 { "inc{S|}", RMeDI, XX, XX }, 560 /* 48 */ 561 { "dec{S|}", RMeAX, XX, XX }, 562 { "dec{S|}", RMeCX, XX, XX }, 563 { "dec{S|}", RMeDX, XX, XX }, 564 { "dec{S|}", RMeBX, XX, XX }, 565 { "dec{S|}", RMeSP, XX, XX }, 566 { "dec{S|}", RMeBP, XX, XX }, 567 { "dec{S|}", RMeSI, XX, XX }, 568 { "dec{S|}", RMeDI, XX, XX }, 569 /* 50 */ 570 { "pushS", RMrAX, XX, XX }, 571 { "pushS", RMrCX, XX, XX }, 572 { "pushS", RMrDX, XX, XX }, 573 { "pushS", RMrBX, XX, XX }, 574 { "pushS", RMrSP, XX, XX }, 575 { "pushS", RMrBP, XX, XX }, 576 { "pushS", RMrSI, XX, XX }, 577 { "pushS", RMrDI, XX, XX }, 578 /* 58 */ 579 { "popS", RMrAX, XX, XX }, 580 { "popS", RMrCX, XX, XX }, 581 { "popS", RMrDX, XX, XX }, 582 { "popS", RMrBX, XX, XX }, 583 { "popS", RMrSP, XX, XX }, 584 { "popS", RMrBP, XX, XX }, 585 { "popS", RMrSI, XX, XX }, 586 { "popS", RMrDI, XX, XX }, 587 /* 60 */ 588 { "pusha{P|}", XX, XX, XX }, 589 { "popa{P|}", XX, XX, XX }, 590 { "bound{S|}", Gv, Ma, XX }, 591 { X86_64_0 }, 592 { "(bad)", XX, XX, XX }, /* seg fs */ 593 { "(bad)", XX, XX, XX }, /* seg gs */ 594 { "(bad)", XX, XX, XX }, /* op size prefix */ 595 { "(bad)", XX, XX, XX }, /* adr size prefix */ 596 /* 68 */ 597 { "pushT", Iq, XX, XX }, 598 { "imulS", Gv, Ev, Iv }, 599 { "pushT", sIb, XX, XX }, 600 { "imulS", Gv, Ev, sIb }, 601 { "ins{b||b|}", Yb, indirDX, XX }, 602 { "ins{R||R|}", Yv, indirDX, XX }, 603 { "outs{b||b|}", indirDX, Xb, XX }, 604 { "outs{R||R|}", indirDX, Xv, XX }, 605 /* 70 */ 606 { "joH", Jb, XX, cond_jump_flag }, 607 { "jnoH", Jb, XX, cond_jump_flag }, 608 { "jbH", Jb, XX, cond_jump_flag }, 609 { "jaeH", Jb, XX, cond_jump_flag }, 610 { "jeH", Jb, XX, cond_jump_flag }, 611 { "jneH", Jb, XX, cond_jump_flag }, 612 { "jbeH", Jb, XX, cond_jump_flag }, 613 { "jaH", Jb, XX, cond_jump_flag }, 614 /* 78 */ 615 { "jsH", Jb, XX, cond_jump_flag }, 616 { "jnsH", Jb, XX, cond_jump_flag }, 617 { "jpH", Jb, XX, cond_jump_flag }, 618 { "jnpH", Jb, XX, cond_jump_flag }, 619 { "jlH", Jb, XX, cond_jump_flag }, 620 { "jgeH", Jb, XX, cond_jump_flag }, 621 { "jleH", Jb, XX, cond_jump_flag }, 622 { "jgH", Jb, XX, cond_jump_flag }, 623 /* 80 */ 624 { GRP1b }, 625 { GRP1S }, 626 { "(bad)", XX, XX, XX }, 627 { GRP1Ss }, 628 { "testB", Eb, Gb, XX }, 629 { "testS", Ev, Gv, XX }, 630 { "xchgB", Eb, Gb, XX }, 631 { "xchgS", Ev, Gv, XX }, 632 /* 88 */ 633 { "movB", Eb, Gb, XX }, 634 { "movS", Ev, Gv, XX }, 635 { "movB", Gb, Eb, XX }, 636 { "movS", Gv, Ev, XX }, 637 { "movQ", Ev, Sw, XX }, 638 { "leaS", Gv, M, XX }, 639 { "movQ", Sw, Ev, XX }, 640 { "popU", Ev, XX, XX }, 641 /* 90 */ 642 { "nop", NOP_Fixup, 0, XX, XX }, 643 { "xchgS", RMeCX, eAX, XX }, 644 { "xchgS", RMeDX, eAX, XX }, 645 { "xchgS", RMeBX, eAX, XX }, 646 { "xchgS", RMeSP, eAX, XX }, 647 { "xchgS", RMeBP, eAX, XX }, 648 { "xchgS", RMeSI, eAX, XX }, 649 { "xchgS", RMeDI, eAX, XX }, 650 /* 98 */ 651 { "cW{tR||tR|}", XX, XX, XX }, 652 { "cR{tO||tO|}", XX, XX, XX }, 653 { "lcall{T|}", Ap, XX, XX }, 654 { "(bad)", XX, XX, XX }, /* fwait */ 655 { "pushfT", XX, XX, XX }, 656 { "popfT", XX, XX, XX }, 657 { "sahf{|}", XX, XX, XX }, 658 { "lahf{|}", XX, XX, XX }, 659 /* a0 */ 660 { "movB", AL, Ob64, XX }, 661 { "movS", eAX, Ov64, XX }, 662 { "movB", Ob64, AL, XX }, 663 { "movS", Ov64, eAX, XX }, 664 { "movs{b||b|}", Yb, Xb, XX }, 665 { "movs{R||R|}", Yv, Xv, XX }, 666 { "cmps{b||b|}", Xb, Yb, XX }, 667 { "cmps{R||R|}", Xv, Yv, XX }, 668 /* a8 */ 669 { "testB", AL, Ib, XX }, 670 { "testS", eAX, Iv, XX }, 671 { "stosB", Yb, AL, XX }, 672 { "stosS", Yv, eAX, XX }, 673 { "lodsB", AL, Xb, XX }, 674 { "lodsS", eAX, Xv, XX }, 675 { "scasB", AL, Yb, XX }, 676 { "scasS", eAX, Yv, XX }, 677 /* b0 */ 678 { "movB", RMAL, Ib, XX }, 679 { "movB", RMCL, Ib, XX }, 680 { "movB", RMDL, Ib, XX }, 681 { "movB", RMBL, Ib, XX }, 682 { "movB", RMAH, Ib, XX }, 683 { "movB", RMCH, Ib, XX }, 684 { "movB", RMDH, Ib, XX }, 685 { "movB", RMBH, Ib, XX }, 686 /* b8 */ 687 { "movS", RMeAX, Iv64, XX }, 688 { "movS", RMeCX, Iv64, XX }, 689 { "movS", RMeDX, Iv64, XX }, 690 { "movS", RMeBX, Iv64, XX }, 691 { "movS", RMeSP, Iv64, XX }, 692 { "movS", RMeBP, Iv64, XX }, 693 { "movS", RMeSI, Iv64, XX }, 694 { "movS", RMeDI, Iv64, XX }, 695 /* c0 */ 696 { GRP2b }, 697 { GRP2S }, 698 { "retT", Iw, XX, XX }, 699 { "retT", XX, XX, XX }, 700 { "les{S|}", Gv, Mp, XX }, 701 { "ldsS", Gv, Mp, XX }, 702 { "movA", Eb, Ib, XX }, 703 { "movQ", Ev, Iv, XX }, 704 /* c8 */ 705 { "enterT", Iw, Ib, XX }, 706 { "leaveT", XX, XX, XX }, 707 { "lretP", Iw, XX, XX }, 708 { "lretP", XX, XX, XX }, 709 { "int3", XX, XX, XX }, 710 { "int", Ib, XX, XX }, 711 { "into{|}", XX, XX, XX }, 712 { "iretP", XX, XX, XX }, 713 /* d0 */ 714 { GRP2b_one }, 715 { GRP2S_one }, 716 { GRP2b_cl }, 717 { GRP2S_cl }, 718 { "aam{|}", sIb, XX, XX }, 719 { "aad{|}", sIb, XX, XX }, 720 { "(bad)", XX, XX, XX }, 721 { "xlat", DSBX, XX, XX }, 722 /* d8 */ 723 { FLOAT }, 724 { FLOAT }, 725 { FLOAT }, 726 { FLOAT }, 727 { FLOAT }, 728 { FLOAT }, 729 { FLOAT }, 730 { FLOAT }, 731 /* e0 */ 732 { "loopneFH", Jb, XX, loop_jcxz_flag }, 733 { "loopeFH", Jb, XX, loop_jcxz_flag }, 734 { "loopFH", Jb, XX, loop_jcxz_flag }, 735 { "jEcxzH", Jb, XX, loop_jcxz_flag }, 736 { "inB", AL, Ib, XX }, 737 { "inS", eAX, Ib, XX }, 738 { "outB", Ib, AL, XX }, 739 { "outS", Ib, eAX, XX }, 740 /* e8 */ 741 { "callT", Jv, XX, XX }, 742 { "jmpT", Jv, XX, XX }, 743 { "ljmp{T|}", Ap, XX, XX }, 744 { "jmp", Jb, XX, XX }, 745 { "inB", AL, indirDX, XX }, 746 { "inS", eAX, indirDX, XX }, 747 { "outB", indirDX, AL, XX }, 748 { "outS", indirDX, eAX, XX }, 749 /* f0 */ 750 { "(bad)", XX, XX, XX }, /* lock prefix */ 751 { "icebp", XX, XX, XX }, 752 { "(bad)", XX, XX, XX }, /* repne */ 753 { "(bad)", XX, XX, XX }, /* repz */ 754 { "hlt", XX, XX, XX }, 755 { "cmc", XX, XX, XX }, 756 { GRP3b }, 757 { GRP3S }, 758 /* f8 */ 759 { "clc", XX, XX, XX }, 760 { "stc", XX, XX, XX }, 761 { "cli", XX, XX, XX }, 762 { "sti", XX, XX, XX }, 763 { "cld", XX, XX, XX }, 764 { "std", XX, XX, XX }, 765 { GRP4 }, 766 { GRP5 }, 767 }; 768 769 static const struct dis386 dis386_twobyte[] = { 770 /* 00 */ 771 { GRP6 }, 772 { GRP7 }, 773 { "larS", Gv, Ew, XX }, 774 { "lslS", Gv, Ew, XX }, 775 { "(bad)", XX, XX, XX }, 776 { "syscall", XX, XX, XX }, 777 { "clts", XX, XX, XX }, 778 { "sysretP", XX, XX, XX }, 779 /* 08 */ 780 { "invd", XX, XX, XX }, 781 { "wbinvd", XX, XX, XX }, 782 { "(bad)", XX, XX, XX }, 783 { "ud2a", XX, XX, XX }, 784 { "(bad)", XX, XX, XX }, 785 { GRPAMD }, 786 { "femms", XX, XX, XX }, 787 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */ 788 /* 10 */ 789 { PREGRP8 }, 790 { PREGRP9 }, 791 { PREGRP30 }, 792 { "movlpX", EX, XM, SIMD_Fixup, 'h' }, 793 { "unpcklpX", XM, EX, XX }, 794 { "unpckhpX", XM, EX, XX }, 795 { PREGRP31 }, 796 { "movhpX", EX, XM, SIMD_Fixup, 'l' }, 797 /* 18 */ 798 { GRP14 }, 799 { "(bad)", XX, XX, XX }, 800 { "(bad)", XX, XX, XX }, 801 { "(bad)", XX, XX, XX }, 802 { "(bad)", XX, XX, XX }, 803 { "(bad)", XX, XX, XX }, 804 { "(bad)", XX, XX, XX }, 805 { "(bad)", XX, XX, XX }, 806 /* 20 */ 807 { "movL", Rm, Cm, XX }, 808 { "movL", Rm, Dm, XX }, 809 { "movL", Cm, Rm, XX }, 810 { "movL", Dm, Rm, XX }, 811 { "movL", Rd, Td, XX }, 812 { "(bad)", XX, XX, XX }, 813 { "movL", Td, Rd, XX }, 814 { "(bad)", XX, XX, XX }, 815 /* 28 */ 816 { "movapX", XM, EX, XX }, 817 { "movapX", EX, XM, XX }, 818 { PREGRP2 }, 819 { "movntpX", Ev, XM, XX }, 820 { PREGRP4 }, 821 { PREGRP3 }, 822 { "ucomisX", XM,EX, XX }, 823 { "comisX", XM,EX, XX }, 824 /* 30 */ 825 { "wrmsr", XX, XX, XX }, 826 { "rdtsc", XX, XX, XX }, 827 { "rdmsr", XX, XX, XX }, 828 { "rdpmc", XX, XX, XX }, 829 { "sysenter", XX, XX, XX }, 830 { "sysexit", XX, XX, XX }, 831 { "(bad)", XX, XX, XX }, 832 { "(bad)", XX, XX, XX }, 833 /* 38 */ 834 { "(bad)", XX, XX, XX }, 835 { "(bad)", XX, XX, XX }, 836 { "(bad)", XX, XX, XX }, 837 { "(bad)", XX, XX, XX }, 838 { "(bad)", XX, XX, XX }, 839 { "(bad)", XX, XX, XX }, 840 { "(bad)", XX, XX, XX }, 841 { "(bad)", XX, XX, XX }, 842 /* 40 */ 843 { "cmovo", Gv, Ev, XX }, 844 { "cmovno", Gv, Ev, XX }, 845 { "cmovb", Gv, Ev, XX }, 846 { "cmovae", Gv, Ev, XX }, 847 { "cmove", Gv, Ev, XX }, 848 { "cmovne", Gv, Ev, XX }, 849 { "cmovbe", Gv, Ev, XX }, 850 { "cmova", Gv, Ev, XX }, 851 /* 48 */ 852 { "cmovs", Gv, Ev, XX }, 853 { "cmovns", Gv, Ev, XX }, 854 { "cmovp", Gv, Ev, XX }, 855 { "cmovnp", Gv, Ev, XX }, 856 { "cmovl", Gv, Ev, XX }, 857 { "cmovge", Gv, Ev, XX }, 858 { "cmovle", Gv, Ev, XX }, 859 { "cmovg", Gv, Ev, XX }, 860 /* 50 */ 861 { "movmskpX", Gd, XS, XX }, 862 { PREGRP13 }, 863 { PREGRP12 }, 864 { PREGRP11 }, 865 { "andpX", XM, EX, XX }, 866 { "andnpX", XM, EX, XX }, 867 { "orpX", XM, EX, XX }, 868 { "xorpX", XM, EX, XX }, 869 /* 58 */ 870 { PREGRP0 }, 871 { PREGRP10 }, 872 { PREGRP17 }, 873 { PREGRP16 }, 874 { PREGRP14 }, 875 { PREGRP7 }, 876 { PREGRP5 }, 877 { PREGRP6 }, 878 /* 60 */ 879 { "punpcklbw", MX, EM, XX }, 880 { "punpcklwd", MX, EM, XX }, 881 { "punpckldq", MX, EM, XX }, 882 { "packsswb", MX, EM, XX }, 883 { "pcmpgtb", MX, EM, XX }, 884 { "pcmpgtw", MX, EM, XX }, 885 { "pcmpgtd", MX, EM, XX }, 886 { "packuswb", MX, EM, XX }, 887 /* 68 */ 888 { "punpckhbw", MX, EM, XX }, 889 { "punpckhwd", MX, EM, XX }, 890 { "punpckhdq", MX, EM, XX }, 891 { "packssdw", MX, EM, XX }, 892 { PREGRP26 }, 893 { PREGRP24 }, 894 { "movd", MX, Edq, XX }, 895 { PREGRP19 }, 896 /* 70 */ 897 { PREGRP22 }, 898 { GRP10 }, 899 { GRP11 }, 900 { GRP12 }, 901 { "pcmpeqb", MX, EM, XX }, 902 { "pcmpeqw", MX, EM, XX }, 903 { "pcmpeqd", MX, EM, XX }, 904 { "emms", XX, XX, XX }, 905 /* 78 */ 906 { "(bad)", XX, XX, XX }, 907 { "(bad)", XX, XX, XX }, 908 { "(bad)", XX, XX, XX }, 909 { "(bad)", XX, XX, XX }, 910 { PREGRP28 }, 911 { PREGRP29 }, 912 { PREGRP23 }, 913 { PREGRP20 }, 914 /* 80 */ 915 { "joH", Jv, XX, cond_jump_flag }, 916 { "jnoH", Jv, XX, cond_jump_flag }, 917 { "jbH", Jv, XX, cond_jump_flag }, 918 { "jaeH", Jv, XX, cond_jump_flag }, 919 { "jeH", Jv, XX, cond_jump_flag }, 920 { "jneH", Jv, XX, cond_jump_flag }, 921 { "jbeH", Jv, XX, cond_jump_flag }, 922 { "jaH", Jv, XX, cond_jump_flag }, 923 /* 88 */ 924 { "jsH", Jv, XX, cond_jump_flag }, 925 { "jnsH", Jv, XX, cond_jump_flag }, 926 { "jpH", Jv, XX, cond_jump_flag }, 927 { "jnpH", Jv, XX, cond_jump_flag }, 928 { "jlH", Jv, XX, cond_jump_flag }, 929 { "jgeH", Jv, XX, cond_jump_flag }, 930 { "jleH", Jv, XX, cond_jump_flag }, 931 { "jgH", Jv, XX, cond_jump_flag }, 932 /* 90 */ 933 { "seto", Eb, XX, XX }, 934 { "setno", Eb, XX, XX }, 935 { "setb", Eb, XX, XX }, 936 { "setae", Eb, XX, XX }, 937 { "sete", Eb, XX, XX }, 938 { "setne", Eb, XX, XX }, 939 { "setbe", Eb, XX, XX }, 940 { "seta", Eb, XX, XX }, 941 /* 98 */ 942 { "sets", Eb, XX, XX }, 943 { "setns", Eb, XX, XX }, 944 { "setp", Eb, XX, XX }, 945 { "setnp", Eb, XX, XX }, 946 { "setl", Eb, XX, XX }, 947 { "setge", Eb, XX, XX }, 948 { "setle", Eb, XX, XX }, 949 { "setg", Eb, XX, XX }, 950 /* a0 */ 951 { "pushT", fs, XX, XX }, 952 { "popT", fs, XX, XX }, 953 { "cpuid", XX, XX, XX }, 954 { "btS", Ev, Gv, XX }, 955 { "shldS", Ev, Gv, Ib }, 956 { "shldS", Ev, Gv, CL }, 957 { "", OPXCRYPT2, XX, XX }, 958 { "", OPXCRYPT, XX, XX }, 959 /* a8 */ 960 { "pushT", gs, XX, XX }, 961 { "popT", gs, XX, XX }, 962 { "rsm", XX, XX, XX }, 963 { "btsS", Ev, Gv, XX }, 964 { "shrdS", Ev, Gv, Ib }, 965 { "shrdS", Ev, Gv, CL }, 966 { GRP13 }, 967 { "imulS", Gv, Ev, XX }, 968 /* b0 */ 969 { "cmpxchgB", Eb, Gb, XX }, 970 { "cmpxchgS", Ev, Gv, XX }, 971 { "lssS", Gv, Mp, XX }, 972 { "btrS", Ev, Gv, XX }, 973 { "lfsS", Gv, Mp, XX }, 974 { "lgsS", Gv, Mp, XX }, 975 { "movz{bR|x|bR|x}", Gv, Eb, XX }, 976 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */ 977 /* b8 */ 978 { "(bad)", XX, XX, XX }, 979 { "ud2b", XX, XX, XX }, 980 { GRP8 }, 981 { "btcS", Ev, Gv, XX }, 982 { "bsfS", Gv, Ev, XX }, 983 { "bsrS", Gv, Ev, XX }, 984 { "movs{bR|x|bR|x}", Gv, Eb, XX }, 985 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */ 986 /* c0 */ 987 { "xaddB", Eb, Gb, XX }, 988 { "xaddS", Ev, Gv, XX }, 989 { PREGRP1 }, 990 { "movntiS", Ev, Gv, XX }, 991 { "pinsrw", MX, Ed, Ib }, 992 { "pextrw", Gd, MS, Ib }, 993 { "shufpX", XM, EX, Ib }, 994 { GRP9 }, 995 /* c8 */ 996 { "bswap", RMeAX, XX, XX }, 997 { "bswap", RMeCX, XX, XX }, 998 { "bswap", RMeDX, XX, XX }, 999 { "bswap", RMeBX, XX, XX }, 1000 { "bswap", RMeSP, XX, XX }, 1001 { "bswap", RMeBP, XX, XX }, 1002 { "bswap", RMeSI, XX, XX }, 1003 { "bswap", RMeDI, XX, XX }, 1004 /* d0 */ 1005 { PREGRP27 }, 1006 { "psrlw", MX, EM, XX }, 1007 { "psrld", MX, EM, XX }, 1008 { "psrlq", MX, EM, XX }, 1009 { "paddq", MX, EM, XX }, 1010 { "pmullw", MX, EM, XX }, 1011 { PREGRP21 }, 1012 { "pmovmskb", Gd, MS, XX }, 1013 /* d8 */ 1014 { "psubusb", MX, EM, XX }, 1015 { "psubusw", MX, EM, XX }, 1016 { "pminub", MX, EM, XX }, 1017 { "pand", MX, EM, XX }, 1018 { "paddusb", MX, EM, XX }, 1019 { "paddusw", MX, EM, XX }, 1020 { "pmaxub", MX, EM, XX }, 1021 { "pandn", MX, EM, XX }, 1022 /* e0 */ 1023 { "pavgb", MX, EM, XX }, 1024 { "psraw", MX, EM, XX }, 1025 { "psrad", MX, EM, XX }, 1026 { "pavgw", MX, EM, XX }, 1027 { "pmulhuw", MX, EM, XX }, 1028 { "pmulhw", MX, EM, XX }, 1029 { PREGRP15 }, 1030 { PREGRP25 }, 1031 /* e8 */ 1032 { "psubsb", MX, EM, XX }, 1033 { "psubsw", MX, EM, XX }, 1034 { "pminsw", MX, EM, XX }, 1035 { "por", MX, EM, XX }, 1036 { "paddsb", MX, EM, XX }, 1037 { "paddsw", MX, EM, XX }, 1038 { "pmaxsw", MX, EM, XX }, 1039 { "pxor", MX, EM, XX }, 1040 /* f0 */ 1041 { PREGRP32 }, 1042 { "psllw", MX, EM, XX }, 1043 { "pslld", MX, EM, XX }, 1044 { "psllq", MX, EM, XX }, 1045 { "pmuludq", MX, EM, XX }, 1046 { "pmaddwd", MX, EM, XX }, 1047 { "psadbw", MX, EM, XX }, 1048 { PREGRP18 }, 1049 /* f8 */ 1050 { "psubb", MX, EM, XX }, 1051 { "psubw", MX, EM, XX }, 1052 { "psubd", MX, EM, XX }, 1053 { "psubq", MX, EM, XX }, 1054 { "paddb", MX, EM, XX }, 1055 { "paddw", MX, EM, XX }, 1056 { "paddd", MX, EM, XX }, 1057 { "(bad)", XX, XX, XX } 1058 }; 1059 1060 static const unsigned char onebyte_has_modrm[256] = { 1061 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1062 /* ------------------------------- */ 1063 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ 1064 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ 1065 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ 1066 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ 1067 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ 1068 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ 1069 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ 1070 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ 1071 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ 1072 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ 1073 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ 1074 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ 1075 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ 1076 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ 1077 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ 1078 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ 1079 /* ------------------------------- */ 1080 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1081 }; 1082 1083 static const unsigned char twobyte_has_modrm[256] = { 1084 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1085 /* ------------------------------- */ 1086 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ 1087 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */ 1088 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ 1089 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1090 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ 1091 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ 1092 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ 1093 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */ 1094 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1095 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ 1096 /* a0 */ 0,0,0,1,1,1,0,1,0,0,0,1,1,1,1,1, /* af */ 1097 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */ 1098 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ 1099 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */ 1100 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ 1101 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */ 1102 /* ------------------------------- */ 1103 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1104 }; 1105 1106 static const unsigned char twobyte_uses_SSE_prefix[256] = { 1107 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1108 /* ------------------------------- */ 1109 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1110 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ 1111 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */ 1112 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1113 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1114 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1115 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ 1116 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */ 1117 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1118 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1119 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1120 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1121 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1122 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1123 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1124 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ 1125 /* ------------------------------- */ 1126 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1127 }; 1128 1129 static char obuf[100]; 1130 static char *obufp; 1131 static char scratchbuf[100]; 1132 static unsigned char *start_codep; 1133 static unsigned char *insn_codep; 1134 static unsigned char *codep; 1135 static disassemble_info *the_info; 1136 static int mod; 1137 static int rm; 1138 static int reg; 1139 static unsigned char need_modrm; 1140 1141 /* If we are accessing mod/rm/reg without need_modrm set, then the 1142 values are stale. Hitting this abort likely indicates that you 1143 need to update onebyte_has_modrm or twobyte_has_modrm. */ 1144 #define MODRM_CHECK if (!need_modrm) abort () 1145 1146 static const char **names64; 1147 static const char **names32; 1148 static const char **names16; 1149 static const char **names8; 1150 static const char **names8rex; 1151 static const char **names_seg; 1152 static const char **index16; 1153 1154 static const char *intel_names64[] = { 1155 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", 1156 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 1157 }; 1158 static const char *intel_names32[] = { 1159 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", 1160 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" 1161 }; 1162 static const char *intel_names16[] = { 1163 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", 1164 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" 1165 }; 1166 static const char *intel_names8[] = { 1167 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", 1168 }; 1169 static const char *intel_names8rex[] = { 1170 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", 1171 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" 1172 }; 1173 static const char *intel_names_seg[] = { 1174 "es", "cs", "ss", "ds", "fs", "gs", "?", "?", 1175 }; 1176 static const char *intel_index16[] = { 1177 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" 1178 }; 1179 1180 static const char *att_names64[] = { 1181 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", 1182 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 1183 }; 1184 static const char *att_names32[] = { 1185 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", 1186 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" 1187 }; 1188 static const char *att_names16[] = { 1189 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", 1190 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" 1191 }; 1192 static const char *att_names8[] = { 1193 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", 1194 }; 1195 static const char *att_names8rex[] = { 1196 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", 1197 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" 1198 }; 1199 static const char *att_names_seg[] = { 1200 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", 1201 }; 1202 static const char *att_index16[] = { 1203 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" 1204 }; 1205 1206 static const struct dis386 grps[][8] = { 1207 /* GRP1b */ 1208 { 1209 { "addA", Eb, Ib, XX }, 1210 { "orA", Eb, Ib, XX }, 1211 { "adcA", Eb, Ib, XX }, 1212 { "sbbA", Eb, Ib, XX }, 1213 { "andA", Eb, Ib, XX }, 1214 { "subA", Eb, Ib, XX }, 1215 { "xorA", Eb, Ib, XX }, 1216 { "cmpA", Eb, Ib, XX } 1217 }, 1218 /* GRP1S */ 1219 { 1220 { "addQ", Ev, Iv, XX }, 1221 { "orQ", Ev, Iv, XX }, 1222 { "adcQ", Ev, Iv, XX }, 1223 { "sbbQ", Ev, Iv, XX }, 1224 { "andQ", Ev, Iv, XX }, 1225 { "subQ", Ev, Iv, XX }, 1226 { "xorQ", Ev, Iv, XX }, 1227 { "cmpQ", Ev, Iv, XX } 1228 }, 1229 /* GRP1Ss */ 1230 { 1231 { "addQ", Ev, sIb, XX }, 1232 { "orQ", Ev, sIb, XX }, 1233 { "adcQ", Ev, sIb, XX }, 1234 { "sbbQ", Ev, sIb, XX }, 1235 { "andQ", Ev, sIb, XX }, 1236 { "subQ", Ev, sIb, XX }, 1237 { "xorQ", Ev, sIb, XX }, 1238 { "cmpQ", Ev, sIb, XX } 1239 }, 1240 /* GRP2b */ 1241 { 1242 { "rolA", Eb, Ib, XX }, 1243 { "rorA", Eb, Ib, XX }, 1244 { "rclA", Eb, Ib, XX }, 1245 { "rcrA", Eb, Ib, XX }, 1246 { "shlA", Eb, Ib, XX }, 1247 { "shrA", Eb, Ib, XX }, 1248 { "(bad)", XX, XX, XX }, 1249 { "sarA", Eb, Ib, XX }, 1250 }, 1251 /* GRP2S */ 1252 { 1253 { "rolQ", Ev, Ib, XX }, 1254 { "rorQ", Ev, Ib, XX }, 1255 { "rclQ", Ev, Ib, XX }, 1256 { "rcrQ", Ev, Ib, XX }, 1257 { "shlQ", Ev, Ib, XX }, 1258 { "shrQ", Ev, Ib, XX }, 1259 { "(bad)", XX, XX, XX }, 1260 { "sarQ", Ev, Ib, XX }, 1261 }, 1262 /* GRP2b_one */ 1263 { 1264 { "rolA", Eb, XX, XX }, 1265 { "rorA", Eb, XX, XX }, 1266 { "rclA", Eb, XX, XX }, 1267 { "rcrA", Eb, XX, XX }, 1268 { "shlA", Eb, XX, XX }, 1269 { "shrA", Eb, XX, XX }, 1270 { "(bad)", XX, XX, XX }, 1271 { "sarA", Eb, XX, XX }, 1272 }, 1273 /* GRP2S_one */ 1274 { 1275 { "rolQ", Ev, XX, XX }, 1276 { "rorQ", Ev, XX, XX }, 1277 { "rclQ", Ev, XX, XX }, 1278 { "rcrQ", Ev, XX, XX }, 1279 { "shlQ", Ev, XX, XX }, 1280 { "shrQ", Ev, XX, XX }, 1281 { "(bad)", XX, XX, XX}, 1282 { "sarQ", Ev, XX, XX }, 1283 }, 1284 /* GRP2b_cl */ 1285 { 1286 { "rolA", Eb, CL, XX }, 1287 { "rorA", Eb, CL, XX }, 1288 { "rclA", Eb, CL, XX }, 1289 { "rcrA", Eb, CL, XX }, 1290 { "shlA", Eb, CL, XX }, 1291 { "shrA", Eb, CL, XX }, 1292 { "(bad)", XX, XX, XX }, 1293 { "sarA", Eb, CL, XX }, 1294 }, 1295 /* GRP2S_cl */ 1296 { 1297 { "rolQ", Ev, CL, XX }, 1298 { "rorQ", Ev, CL, XX }, 1299 { "rclQ", Ev, CL, XX }, 1300 { "rcrQ", Ev, CL, XX }, 1301 { "shlQ", Ev, CL, XX }, 1302 { "shrQ", Ev, CL, XX }, 1303 { "(bad)", XX, XX, XX }, 1304 { "sarQ", Ev, CL, XX } 1305 }, 1306 /* GRP3b */ 1307 { 1308 { "testA", Eb, Ib, XX }, 1309 { "(bad)", Eb, XX, XX }, 1310 { "notA", Eb, XX, XX }, 1311 { "negA", Eb, XX, XX }, 1312 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */ 1313 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */ 1314 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */ 1315 { "idivA", Eb, XX, XX } /* and idiv for consistency. */ 1316 }, 1317 /* GRP3S */ 1318 { 1319 { "testQ", Ev, Iv, XX }, 1320 { "(bad)", XX, XX, XX }, 1321 { "notQ", Ev, XX, XX }, 1322 { "negQ", Ev, XX, XX }, 1323 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */ 1324 { "imulQ", Ev, XX, XX }, 1325 { "divQ", Ev, XX, XX }, 1326 { "idivQ", Ev, XX, XX }, 1327 }, 1328 /* GRP4 */ 1329 { 1330 { "incA", Eb, XX, XX }, 1331 { "decA", Eb, XX, XX }, 1332 { "(bad)", XX, XX, XX }, 1333 { "(bad)", XX, XX, XX }, 1334 { "(bad)", XX, XX, XX }, 1335 { "(bad)", XX, XX, XX }, 1336 { "(bad)", XX, XX, XX }, 1337 { "(bad)", XX, XX, XX }, 1338 }, 1339 /* GRP5 */ 1340 { 1341 { "incQ", Ev, XX, XX }, 1342 { "decQ", Ev, XX, XX }, 1343 { "callT", indirEv, XX, XX }, 1344 { "lcallT", indirEv, XX, XX }, 1345 { "jmpT", indirEv, XX, XX }, 1346 { "ljmpT", indirEv, XX, XX }, 1347 { "pushU", Ev, XX, XX }, 1348 { "(bad)", XX, XX, XX }, 1349 }, 1350 /* GRP6 */ 1351 { 1352 { "sldtQ", Ev, XX, XX }, 1353 { "strQ", Ev, XX, XX }, 1354 { "lldt", Ew, XX, XX }, 1355 { "ltr", Ew, XX, XX }, 1356 { "verr", Ew, XX, XX }, 1357 { "verw", Ew, XX, XX }, 1358 { "(bad)", XX, XX, XX }, 1359 { "(bad)", XX, XX, XX } 1360 }, 1361 /* GRP7 */ 1362 { 1363 { "sgdtQ", M, XX, XX }, 1364 { "sidtQ", PNI_Fixup, 0, XX, XX }, 1365 { "lgdtQ", M, XX, XX }, 1366 { "lidtQ", M, XX, XX }, 1367 { "smswQ", Ev, XX, XX }, 1368 { "(bad)", XX, XX, XX }, 1369 { "lmsw", Ew, XX, XX }, 1370 { "invlpg", INVLPG_Fixup, w_mode, XX, XX }, 1371 }, 1372 /* GRP8 */ 1373 { 1374 { "(bad)", XX, XX, XX }, 1375 { "(bad)", XX, XX, XX }, 1376 { "(bad)", XX, XX, XX }, 1377 { "(bad)", XX, XX, XX }, 1378 { "btQ", Ev, Ib, XX }, 1379 { "btsQ", Ev, Ib, XX }, 1380 { "btrQ", Ev, Ib, XX }, 1381 { "btcQ", Ev, Ib, XX }, 1382 }, 1383 /* GRP9 */ 1384 { 1385 { "(bad)", XX, XX, XX }, 1386 { "cmpxchg8b", Ev, XX, XX }, 1387 { "(bad)", XX, XX, XX }, 1388 { "(bad)", XX, XX, XX }, 1389 { "(bad)", XX, XX, XX }, 1390 { "(bad)", XX, XX, XX }, 1391 { "(bad)", XX, XX, XX }, 1392 { "(bad)", XX, XX, XX }, 1393 }, 1394 /* GRP10 */ 1395 { 1396 { "(bad)", XX, XX, XX }, 1397 { "(bad)", XX, XX, XX }, 1398 { "psrlw", MS, Ib, XX }, 1399 { "(bad)", XX, XX, XX }, 1400 { "psraw", MS, Ib, XX }, 1401 { "(bad)", XX, XX, XX }, 1402 { "psllw", MS, Ib, XX }, 1403 { "(bad)", XX, XX, XX }, 1404 }, 1405 /* GRP11 */ 1406 { 1407 { "(bad)", XX, XX, XX }, 1408 { "(bad)", XX, XX, XX }, 1409 { "psrld", MS, Ib, XX }, 1410 { "(bad)", XX, XX, XX }, 1411 { "psrad", MS, Ib, XX }, 1412 { "(bad)", XX, XX, XX }, 1413 { "pslld", MS, Ib, XX }, 1414 { "(bad)", XX, XX, XX }, 1415 }, 1416 /* GRP12 */ 1417 { 1418 { "(bad)", XX, XX, XX }, 1419 { "(bad)", XX, XX, XX }, 1420 { "psrlq", MS, Ib, XX }, 1421 { "psrldq", MS, Ib, XX }, 1422 { "(bad)", XX, XX, XX }, 1423 { "(bad)", XX, XX, XX }, 1424 { "psllq", MS, Ib, XX }, 1425 { "pslldq", MS, Ib, XX }, 1426 }, 1427 /* GRP13 */ 1428 { 1429 { "fxsave", Ev, XX, XX }, 1430 { "fxrstor", Ev, XX, XX }, 1431 { "ldmxcsr", Ev, XX, XX }, 1432 { "stmxcsr", Ev, XX, XX }, 1433 { "(bad)", XX, XX, XX }, 1434 { "lfence", OP_0fae, 0, XX, XX }, 1435 { "mfence", OP_0fae, 0, XX, XX }, 1436 { "clflush", OP_0fae, 0, XX, XX }, 1437 }, 1438 /* GRP14 */ 1439 { 1440 { "prefetchnta", Ev, XX, XX }, 1441 { "prefetcht0", Ev, XX, XX }, 1442 { "prefetcht1", Ev, XX, XX }, 1443 { "prefetcht2", Ev, XX, XX }, 1444 { "(bad)", XX, XX, XX }, 1445 { "(bad)", XX, XX, XX }, 1446 { "(bad)", XX, XX, XX }, 1447 { "(bad)", XX, XX, XX }, 1448 }, 1449 /* GRPAMD */ 1450 { 1451 { "prefetch", Eb, XX, XX }, 1452 { "prefetchw", Eb, XX, XX }, 1453 { "(bad)", XX, XX, XX }, 1454 { "(bad)", XX, XX, XX }, 1455 { "(bad)", XX, XX, XX }, 1456 { "(bad)", XX, XX, XX }, 1457 { "(bad)", XX, XX, XX }, 1458 { "(bad)", XX, XX, XX }, 1459 }, 1460 }; 1461 1462 static const struct dis386 prefix_user_table[][4] = { 1463 /* PREGRP0 */ 1464 { 1465 { "addps", XM, EX, XX }, 1466 { "addss", XM, EX, XX }, 1467 { "addpd", XM, EX, XX }, 1468 { "addsd", XM, EX, XX }, 1469 }, 1470 /* PREGRP1 */ 1471 { 1472 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */ 1473 { "", XM, EX, OPSIMD }, 1474 { "", XM, EX, OPSIMD }, 1475 { "", XM, EX, OPSIMD }, 1476 }, 1477 /* PREGRP2 */ 1478 { 1479 { "cvtpi2ps", XM, EM, XX }, 1480 { "cvtsi2ssY", XM, Ev, XX }, 1481 { "cvtpi2pd", XM, EM, XX }, 1482 { "cvtsi2sdY", XM, Ev, XX }, 1483 }, 1484 /* PREGRP3 */ 1485 { 1486 { "cvtps2pi", MX, EX, XX }, 1487 { "cvtss2siY", Gv, EX, XX }, 1488 { "cvtpd2pi", MX, EX, XX }, 1489 { "cvtsd2siY", Gv, EX, XX }, 1490 }, 1491 /* PREGRP4 */ 1492 { 1493 { "cvttps2pi", MX, EX, XX }, 1494 { "cvttss2siY", Gv, EX, XX }, 1495 { "cvttpd2pi", MX, EX, XX }, 1496 { "cvttsd2siY", Gv, EX, XX }, 1497 }, 1498 /* PREGRP5 */ 1499 { 1500 { "divps", XM, EX, XX }, 1501 { "divss", XM, EX, XX }, 1502 { "divpd", XM, EX, XX }, 1503 { "divsd", XM, EX, XX }, 1504 }, 1505 /* PREGRP6 */ 1506 { 1507 { "maxps", XM, EX, XX }, 1508 { "maxss", XM, EX, XX }, 1509 { "maxpd", XM, EX, XX }, 1510 { "maxsd", XM, EX, XX }, 1511 }, 1512 /* PREGRP7 */ 1513 { 1514 { "minps", XM, EX, XX }, 1515 { "minss", XM, EX, XX }, 1516 { "minpd", XM, EX, XX }, 1517 { "minsd", XM, EX, XX }, 1518 }, 1519 /* PREGRP8 */ 1520 { 1521 { "movups", XM, EX, XX }, 1522 { "movss", XM, EX, XX }, 1523 { "movupd", XM, EX, XX }, 1524 { "movsd", XM, EX, XX }, 1525 }, 1526 /* PREGRP9 */ 1527 { 1528 { "movups", EX, XM, XX }, 1529 { "movss", EX, XM, XX }, 1530 { "movupd", EX, XM, XX }, 1531 { "movsd", EX, XM, XX }, 1532 }, 1533 /* PREGRP10 */ 1534 { 1535 { "mulps", XM, EX, XX }, 1536 { "mulss", XM, EX, XX }, 1537 { "mulpd", XM, EX, XX }, 1538 { "mulsd", XM, EX, XX }, 1539 }, 1540 /* PREGRP11 */ 1541 { 1542 { "rcpps", XM, EX, XX }, 1543 { "rcpss", XM, EX, XX }, 1544 { "(bad)", XM, EX, XX }, 1545 { "(bad)", XM, EX, XX }, 1546 }, 1547 /* PREGRP12 */ 1548 { 1549 { "rsqrtps", XM, EX, XX }, 1550 { "rsqrtss", XM, EX, XX }, 1551 { "(bad)", XM, EX, XX }, 1552 { "(bad)", XM, EX, XX }, 1553 }, 1554 /* PREGRP13 */ 1555 { 1556 { "sqrtps", XM, EX, XX }, 1557 { "sqrtss", XM, EX, XX }, 1558 { "sqrtpd", XM, EX, XX }, 1559 { "sqrtsd", XM, EX, XX }, 1560 }, 1561 /* PREGRP14 */ 1562 { 1563 { "subps", XM, EX, XX }, 1564 { "subss", XM, EX, XX }, 1565 { "subpd", XM, EX, XX }, 1566 { "subsd", XM, EX, XX }, 1567 }, 1568 /* PREGRP15 */ 1569 { 1570 { "(bad)", XM, EX, XX }, 1571 { "cvtdq2pd", XM, EX, XX }, 1572 { "cvttpd2dq", XM, EX, XX }, 1573 { "cvtpd2dq", XM, EX, XX }, 1574 }, 1575 /* PREGRP16 */ 1576 { 1577 { "cvtdq2ps", XM, EX, XX }, 1578 { "cvttps2dq",XM, EX, XX }, 1579 { "cvtps2dq",XM, EX, XX }, 1580 { "(bad)", XM, EX, XX }, 1581 }, 1582 /* PREGRP17 */ 1583 { 1584 { "cvtps2pd", XM, EX, XX }, 1585 { "cvtss2sd", XM, EX, XX }, 1586 { "cvtpd2ps", XM, EX, XX }, 1587 { "cvtsd2ss", XM, EX, XX }, 1588 }, 1589 /* PREGRP18 */ 1590 { 1591 { "maskmovq", MX, MS, XX }, 1592 { "(bad)", XM, EX, XX }, 1593 { "maskmovdqu", XM, EX, XX }, 1594 { "(bad)", XM, EX, XX }, 1595 }, 1596 /* PREGRP19 */ 1597 { 1598 { "movq", MX, EM, XX }, 1599 { "movdqu", XM, EX, XX }, 1600 { "movdqa", XM, EX, XX }, 1601 { "(bad)", XM, EX, XX }, 1602 }, 1603 /* PREGRP20 */ 1604 { 1605 { "movq", EM, MX, XX }, 1606 { "movdqu", EX, XM, XX }, 1607 { "movdqa", EX, XM, XX }, 1608 { "(bad)", EX, XM, XX }, 1609 }, 1610 /* PREGRP21 */ 1611 { 1612 { "(bad)", EX, XM, XX }, 1613 { "movq2dq", XM, MS, XX }, 1614 { "movq", EX, XM, XX }, 1615 { "movdq2q", MX, XS, XX }, 1616 }, 1617 /* PREGRP22 */ 1618 { 1619 { "pshufw", MX, EM, Ib }, 1620 { "pshufhw", XM, EX, Ib }, 1621 { "pshufd", XM, EX, Ib }, 1622 { "pshuflw", XM, EX, Ib }, 1623 }, 1624 /* PREGRP23 */ 1625 { 1626 { "movd", Edq, MX, XX }, 1627 { "movq", XM, EX, XX }, 1628 { "movd", Edq, XM, XX }, 1629 { "(bad)", Ed, XM, XX }, 1630 }, 1631 /* PREGRP24 */ 1632 { 1633 { "(bad)", MX, EX, XX }, 1634 { "(bad)", XM, EX, XX }, 1635 { "punpckhqdq", XM, EX, XX }, 1636 { "(bad)", XM, EX, XX }, 1637 }, 1638 /* PREGRP25 */ 1639 { 1640 { "movntq", Ev, MX, XX }, 1641 { "(bad)", Ev, XM, XX }, 1642 { "movntdq", Ev, XM, XX }, 1643 { "(bad)", Ev, XM, XX }, 1644 }, 1645 /* PREGRP26 */ 1646 { 1647 { "(bad)", MX, EX, XX }, 1648 { "(bad)", XM, EX, XX }, 1649 { "punpcklqdq", XM, EX, XX }, 1650 { "(bad)", XM, EX, XX }, 1651 }, 1652 /* PREGRP27 */ 1653 { 1654 { "(bad)", MX, EX, XX }, 1655 { "(bad)", XM, EX, XX }, 1656 { "addsubpd", XM, EX, XX }, 1657 { "addsubps", XM, EX, XX }, 1658 }, 1659 /* PREGRP28 */ 1660 { 1661 { "(bad)", MX, EX, XX }, 1662 { "(bad)", XM, EX, XX }, 1663 { "haddpd", XM, EX, XX }, 1664 { "haddps", XM, EX, XX }, 1665 }, 1666 /* PREGRP29 */ 1667 { 1668 { "(bad)", MX, EX, XX }, 1669 { "(bad)", XM, EX, XX }, 1670 { "hsubpd", XM, EX, XX }, 1671 { "hsubps", XM, EX, XX }, 1672 }, 1673 /* PREGRP30 */ 1674 { 1675 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ 1676 { "movsldup", XM, EX, XX }, 1677 { "movlpd", XM, EX, XX }, 1678 { "movddup", XM, EX, XX }, 1679 }, 1680 /* PREGRP31 */ 1681 { 1682 { "movhpX", XM, EX, SIMD_Fixup, 'l' }, 1683 { "movshdup", XM, EX, XX }, 1684 { "movhpd", XM, EX, XX }, 1685 { "(bad)", XM, EX, XX }, 1686 }, 1687 /* PREGRP32 */ 1688 { 1689 { "(bad)", XM, EX, XX }, 1690 { "(bad)", XM, EX, XX }, 1691 { "(bad)", XM, EX, XX }, 1692 { "lddqu", XM, M, XX }, 1693 }, 1694 }; 1695 1696 static const struct dis386 x86_64_table[][2] = { 1697 { 1698 { "arpl", Ew, Gw, XX }, 1699 { "movs{||lq|xd}", Gv, Ed, XX }, 1700 }, 1701 }; 1702 1703 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") 1704 1705 static void 1706 ckprefix (void) 1707 { 1708 int newrex; 1709 rex = 0; 1710 prefixes = 0; 1711 used_prefixes = 0; 1712 rex_used = 0; 1713 while (1) 1714 { 1715 FETCH_DATA (the_info, codep + 1); 1716 newrex = 0; 1717 switch (*codep) 1718 { 1719 /* REX prefixes family. */ 1720 case 0x40: 1721 case 0x41: 1722 case 0x42: 1723 case 0x43: 1724 case 0x44: 1725 case 0x45: 1726 case 0x46: 1727 case 0x47: 1728 case 0x48: 1729 case 0x49: 1730 case 0x4a: 1731 case 0x4b: 1732 case 0x4c: 1733 case 0x4d: 1734 case 0x4e: 1735 case 0x4f: 1736 if (mode_64bit) 1737 newrex = *codep; 1738 else 1739 return; 1740 break; 1741 case 0xf3: 1742 prefixes |= PREFIX_REPZ; 1743 break; 1744 case 0xf2: 1745 prefixes |= PREFIX_REPNZ; 1746 break; 1747 case 0xf0: 1748 prefixes |= PREFIX_LOCK; 1749 break; 1750 case 0x2e: 1751 prefixes |= PREFIX_CS; 1752 break; 1753 case 0x36: 1754 prefixes |= PREFIX_SS; 1755 break; 1756 case 0x3e: 1757 prefixes |= PREFIX_DS; 1758 break; 1759 case 0x26: 1760 prefixes |= PREFIX_ES; 1761 break; 1762 case 0x64: 1763 prefixes |= PREFIX_FS; 1764 break; 1765 case 0x65: 1766 prefixes |= PREFIX_GS; 1767 break; 1768 case 0x66: 1769 prefixes |= PREFIX_DATA; 1770 break; 1771 case 0x67: 1772 prefixes |= PREFIX_ADDR; 1773 break; 1774 case FWAIT_OPCODE: 1775 /* fwait is really an instruction. If there are prefixes 1776 before the fwait, they belong to the fwait, *not* to the 1777 following instruction. */ 1778 if (prefixes) 1779 { 1780 prefixes |= PREFIX_FWAIT; 1781 codep++; 1782 return; 1783 } 1784 prefixes = PREFIX_FWAIT; 1785 break; 1786 default: 1787 return; 1788 } 1789 /* Rex is ignored when followed by another prefix. */ 1790 if (rex) 1791 { 1792 oappend (prefix_name (rex, 0)); 1793 oappend (" "); 1794 } 1795 rex = newrex; 1796 codep++; 1797 } 1798 } 1799 1800 /* Return the name of the prefix byte PREF, or NULL if PREF is not a 1801 prefix byte. */ 1802 1803 static const char * 1804 prefix_name (int pref, int sizeflag) 1805 { 1806 switch (pref) 1807 { 1808 /* REX prefixes family. */ 1809 case 0x40: 1810 return "rex"; 1811 case 0x41: 1812 return "rexZ"; 1813 case 0x42: 1814 return "rexY"; 1815 case 0x43: 1816 return "rexYZ"; 1817 case 0x44: 1818 return "rexX"; 1819 case 0x45: 1820 return "rexXZ"; 1821 case 0x46: 1822 return "rexXY"; 1823 case 0x47: 1824 return "rexXYZ"; 1825 case 0x48: 1826 return "rex64"; 1827 case 0x49: 1828 return "rex64Z"; 1829 case 0x4a: 1830 return "rex64Y"; 1831 case 0x4b: 1832 return "rex64YZ"; 1833 case 0x4c: 1834 return "rex64X"; 1835 case 0x4d: 1836 return "rex64XZ"; 1837 case 0x4e: 1838 return "rex64XY"; 1839 case 0x4f: 1840 return "rex64XYZ"; 1841 case 0xf3: 1842 return "repz"; 1843 case 0xf2: 1844 return "repnz"; 1845 case 0xf0: 1846 return "lock"; 1847 case 0x2e: 1848 return "cs"; 1849 case 0x36: 1850 return "ss"; 1851 case 0x3e: 1852 return "ds"; 1853 case 0x26: 1854 return "es"; 1855 case 0x64: 1856 return "fs"; 1857 case 0x65: 1858 return "gs"; 1859 case 0x66: 1860 return (sizeflag & DFLAG) ? "data16" : "data32"; 1861 case 0x67: 1862 if (mode_64bit) 1863 return (sizeflag & AFLAG) ? "addr32" : "addr64"; 1864 else 1865 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32"; 1866 case FWAIT_OPCODE: 1867 return "fwait"; 1868 default: 1869 return NULL; 1870 } 1871 } 1872 1873 static char op1out[100], op2out[100], op3out[100]; 1874 static int op_ad, op_index[3]; 1875 static bfd_vma op_address[3]; 1876 static bfd_vma op_riprel[3]; 1877 static bfd_vma start_pc; 1878 1879 /* 1880 * On the 386's of 1988, the maximum length of an instruction is 15 bytes. 1881 * (see topic "Redundant prefixes" in the "Differences from 8086" 1882 * section of the "Virtual 8086 Mode" chapter.) 1883 * 'pc' should be the address of this instruction, it will 1884 * be used to print the target address if this is a relative jump or call 1885 * The function returns the length of this instruction in bytes. 1886 */ 1887 1888 static char intel_syntax; 1889 static char open_char; 1890 static char close_char; 1891 static char separator_char; 1892 static char scale_char; 1893 1894 /* Here for backwards compatibility. When gdb stops using 1895 print_insn_i386_att and print_insn_i386_intel these functions can 1896 disappear, and print_insn_i386 be merged into print_insn. */ 1897 int 1898 print_insn_i386_att (bfd_vma pc, disassemble_info *info) 1899 { 1900 intel_syntax = 0; 1901 1902 return print_insn (pc, info); 1903 } 1904 1905 int 1906 print_insn_i386_intel (bfd_vma pc, disassemble_info *info) 1907 { 1908 intel_syntax = 1; 1909 1910 return print_insn (pc, info); 1911 } 1912 1913 int 1914 print_insn_i386 (bfd_vma pc, disassemble_info *info) 1915 { 1916 intel_syntax = -1; 1917 1918 return print_insn (pc, info); 1919 } 1920 1921 static int 1922 print_insn (bfd_vma pc, disassemble_info *info) 1923 { 1924 const struct dis386 *dp; 1925 int i; 1926 int two_source_ops; 1927 char *first, *second, *third; 1928 int needcomma; 1929 unsigned char uses_SSE_prefix; 1930 int sizeflag; 1931 const char *p; 1932 struct dis_private priv; 1933 1934 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax 1935 || info->mach == bfd_mach_x86_64); 1936 1937 if (intel_syntax == (char) -1) 1938 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax 1939 || info->mach == bfd_mach_x86_64_intel_syntax); 1940 1941 if (info->mach == bfd_mach_i386_i386 1942 || info->mach == bfd_mach_x86_64 1943 || info->mach == bfd_mach_i386_i386_intel_syntax 1944 || info->mach == bfd_mach_x86_64_intel_syntax) 1945 priv.orig_sizeflag = AFLAG | DFLAG; 1946 else if (info->mach == bfd_mach_i386_i8086) 1947 priv.orig_sizeflag = 0; 1948 else 1949 abort (); 1950 1951 for (p = info->disassembler_options; p != NULL; ) 1952 { 1953 if (strncmp (p, "x86-64", 6) == 0) 1954 { 1955 mode_64bit = 1; 1956 priv.orig_sizeflag = AFLAG | DFLAG; 1957 } 1958 else if (strncmp (p, "i386", 4) == 0) 1959 { 1960 mode_64bit = 0; 1961 priv.orig_sizeflag = AFLAG | DFLAG; 1962 } 1963 else if (strncmp (p, "i8086", 5) == 0) 1964 { 1965 mode_64bit = 0; 1966 priv.orig_sizeflag = 0; 1967 } 1968 else if (strncmp (p, "intel", 5) == 0) 1969 { 1970 intel_syntax = 1; 1971 } 1972 else if (strncmp (p, "att", 3) == 0) 1973 { 1974 intel_syntax = 0; 1975 } 1976 else if (strncmp (p, "addr", 4) == 0) 1977 { 1978 if (p[4] == '1' && p[5] == '6') 1979 priv.orig_sizeflag &= ~AFLAG; 1980 else if (p[4] == '3' && p[5] == '2') 1981 priv.orig_sizeflag |= AFLAG; 1982 } 1983 else if (strncmp (p, "data", 4) == 0) 1984 { 1985 if (p[4] == '1' && p[5] == '6') 1986 priv.orig_sizeflag &= ~DFLAG; 1987 else if (p[4] == '3' && p[5] == '2') 1988 priv.orig_sizeflag |= DFLAG; 1989 } 1990 else if (strncmp (p, "suffix", 6) == 0) 1991 priv.orig_sizeflag |= SUFFIX_ALWAYS; 1992 1993 p = strchr (p, ','); 1994 if (p != NULL) 1995 p++; 1996 } 1997 1998 if (intel_syntax) 1999 { 2000 names64 = intel_names64; 2001 names32 = intel_names32; 2002 names16 = intel_names16; 2003 names8 = intel_names8; 2004 names8rex = intel_names8rex; 2005 names_seg = intel_names_seg; 2006 index16 = intel_index16; 2007 open_char = '['; 2008 close_char = ']'; 2009 separator_char = '+'; 2010 scale_char = '*'; 2011 } 2012 else 2013 { 2014 names64 = att_names64; 2015 names32 = att_names32; 2016 names16 = att_names16; 2017 names8 = att_names8; 2018 names8rex = att_names8rex; 2019 names_seg = att_names_seg; 2020 index16 = att_index16; 2021 open_char = '('; 2022 close_char = ')'; 2023 separator_char = ','; 2024 scale_char = ','; 2025 } 2026 2027 /* The output looks better if we put 7 bytes on a line, since that 2028 puts most long word instructions on a single line. */ 2029 info->bytes_per_line = 7; 2030 2031 info->private_data = &priv; 2032 priv.max_fetched = priv.the_buffer; 2033 priv.insn_start = pc; 2034 2035 obuf[0] = 0; 2036 op1out[0] = 0; 2037 op2out[0] = 0; 2038 op3out[0] = 0; 2039 2040 op_index[0] = op_index[1] = op_index[2] = -1; 2041 2042 the_info = info; 2043 start_pc = pc; 2044 start_codep = priv.the_buffer; 2045 codep = priv.the_buffer; 2046 2047 if (setjmp (priv.bailout) != 0) 2048 { 2049 const char *name; 2050 2051 /* Getting here means we tried for data but didn't get it. That 2052 means we have an incomplete instruction of some sort. Just 2053 print the first byte as a prefix or a .byte pseudo-op. */ 2054 if (codep > priv.the_buffer) 2055 { 2056 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 2057 if (name != NULL) 2058 (*info->fprintf_func) (info->stream, "%s", name); 2059 else 2060 { 2061 /* Just print the first byte as a .byte instruction. */ 2062 (*info->fprintf_func) (info->stream, ".byte 0x%x", 2063 (unsigned int) priv.the_buffer[0]); 2064 } 2065 2066 return 1; 2067 } 2068 2069 return -1; 2070 } 2071 2072 obufp = obuf; 2073 ckprefix (); 2074 2075 insn_codep = codep; 2076 sizeflag = priv.orig_sizeflag; 2077 2078 FETCH_DATA (info, codep + 1); 2079 two_source_ops = (*codep == 0x62) || (*codep == 0xc8); 2080 2081 if ((prefixes & PREFIX_FWAIT) 2082 && ((*codep < 0xd8) || (*codep > 0xdf))) 2083 { 2084 const char *name; 2085 2086 /* fwait not followed by floating point instruction. Print the 2087 first prefix, which is probably fwait itself. */ 2088 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 2089 if (name == NULL) 2090 name = INTERNAL_DISASSEMBLER_ERROR; 2091 (*info->fprintf_func) (info->stream, "%s", name); 2092 return 1; 2093 } 2094 2095 if (*codep == 0x0f) 2096 { 2097 FETCH_DATA (info, codep + 2); 2098 dp = &dis386_twobyte[*++codep]; 2099 need_modrm = twobyte_has_modrm[*codep]; 2100 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep]; 2101 } 2102 else 2103 { 2104 dp = &dis386[*codep]; 2105 need_modrm = onebyte_has_modrm[*codep]; 2106 uses_SSE_prefix = 0; 2107 } 2108 codep++; 2109 2110 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ)) 2111 { 2112 oappend ("repz "); 2113 used_prefixes |= PREFIX_REPZ; 2114 } 2115 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ)) 2116 { 2117 oappend ("repnz "); 2118 used_prefixes |= PREFIX_REPNZ; 2119 } 2120 if (prefixes & PREFIX_LOCK) 2121 { 2122 oappend ("lock "); 2123 used_prefixes |= PREFIX_LOCK; 2124 } 2125 2126 if (prefixes & PREFIX_ADDR) 2127 { 2128 sizeflag ^= AFLAG; 2129 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax) 2130 { 2131 if ((sizeflag & AFLAG) || mode_64bit) 2132 oappend ("addr32 "); 2133 else 2134 oappend ("addr16 "); 2135 used_prefixes |= PREFIX_ADDR; 2136 } 2137 } 2138 2139 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA)) 2140 { 2141 sizeflag ^= DFLAG; 2142 if (dp->bytemode3 == cond_jump_mode 2143 && dp->bytemode1 == v_mode 2144 && !intel_syntax) 2145 { 2146 if (sizeflag & DFLAG) 2147 oappend ("data32 "); 2148 else 2149 oappend ("data16 "); 2150 used_prefixes |= PREFIX_DATA; 2151 } 2152 } 2153 2154 if (need_modrm) 2155 { 2156 FETCH_DATA (info, codep + 1); 2157 mod = (*codep >> 6) & 3; 2158 reg = (*codep >> 3) & 7; 2159 rm = *codep & 7; 2160 } 2161 2162 if (dp->name == NULL && dp->bytemode1 == FLOATCODE) 2163 { 2164 dofloat (sizeflag); 2165 } 2166 else 2167 { 2168 int index; 2169 if (dp->name == NULL) 2170 { 2171 switch (dp->bytemode1) 2172 { 2173 case USE_GROUPS: 2174 dp = &grps[dp->bytemode2][reg]; 2175 break; 2176 2177 case USE_PREFIX_USER_TABLE: 2178 index = 0; 2179 used_prefixes |= (prefixes & PREFIX_REPZ); 2180 if (prefixes & PREFIX_REPZ) 2181 index = 1; 2182 else 2183 { 2184 used_prefixes |= (prefixes & PREFIX_DATA); 2185 if (prefixes & PREFIX_DATA) 2186 index = 2; 2187 else 2188 { 2189 used_prefixes |= (prefixes & PREFIX_REPNZ); 2190 if (prefixes & PREFIX_REPNZ) 2191 index = 3; 2192 } 2193 } 2194 dp = &prefix_user_table[dp->bytemode2][index]; 2195 break; 2196 2197 case X86_64_SPECIAL: 2198 dp = &x86_64_table[dp->bytemode2][mode_64bit]; 2199 break; 2200 2201 default: 2202 oappend (INTERNAL_DISASSEMBLER_ERROR); 2203 break; 2204 } 2205 } 2206 2207 if (putop (dp->name, sizeflag) == 0) 2208 { 2209 obufp = op1out; 2210 op_ad = 2; 2211 if (dp->op1) 2212 (*dp->op1) (dp->bytemode1, sizeflag); 2213 2214 obufp = op2out; 2215 op_ad = 1; 2216 if (dp->op2) 2217 (*dp->op2) (dp->bytemode2, sizeflag); 2218 2219 obufp = op3out; 2220 op_ad = 0; 2221 if (dp->op3) 2222 (*dp->op3) (dp->bytemode3, sizeflag); 2223 } 2224 } 2225 2226 /* See if any prefixes were not used. If so, print the first one 2227 separately. If we don't do this, we'll wind up printing an 2228 instruction stream which does not precisely correspond to the 2229 bytes we are disassembling. */ 2230 if ((prefixes & ~used_prefixes) != 0) 2231 { 2232 const char *name; 2233 2234 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 2235 if (name == NULL) 2236 name = INTERNAL_DISASSEMBLER_ERROR; 2237 (*info->fprintf_func) (info->stream, "%s", name); 2238 return 1; 2239 } 2240 if (rex & ~rex_used) 2241 { 2242 const char *name; 2243 name = prefix_name (rex | 0x40, priv.orig_sizeflag); 2244 if (name == NULL) 2245 name = INTERNAL_DISASSEMBLER_ERROR; 2246 (*info->fprintf_func) (info->stream, "%s ", name); 2247 } 2248 2249 obufp = obuf + strlen (obuf); 2250 for (i = strlen (obuf); i < 6; i++) 2251 oappend (" "); 2252 oappend (" "); 2253 (*info->fprintf_func) (info->stream, "%s", obuf); 2254 2255 /* The enter and bound instructions are printed with operands in the same 2256 order as the intel book; everything else is printed in reverse order. */ 2257 if (intel_syntax || two_source_ops) 2258 { 2259 first = op1out; 2260 second = op2out; 2261 third = op3out; 2262 op_ad = op_index[0]; 2263 op_index[0] = op_index[2]; 2264 op_index[2] = op_ad; 2265 } 2266 else 2267 { 2268 first = op3out; 2269 second = op2out; 2270 third = op1out; 2271 } 2272 needcomma = 0; 2273 if (*first) 2274 { 2275 if (op_index[0] != -1 && !op_riprel[0]) 2276 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info); 2277 else 2278 (*info->fprintf_func) (info->stream, "%s", first); 2279 needcomma = 1; 2280 } 2281 if (*second) 2282 { 2283 if (needcomma) 2284 (*info->fprintf_func) (info->stream, ","); 2285 if (op_index[1] != -1 && !op_riprel[1]) 2286 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info); 2287 else 2288 (*info->fprintf_func) (info->stream, "%s", second); 2289 needcomma = 1; 2290 } 2291 if (*third) 2292 { 2293 if (needcomma) 2294 (*info->fprintf_func) (info->stream, ","); 2295 if (op_index[2] != -1 && !op_riprel[2]) 2296 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info); 2297 else 2298 (*info->fprintf_func) (info->stream, "%s", third); 2299 } 2300 for (i = 0; i < 3; i++) 2301 if (op_index[i] != -1 && op_riprel[i]) 2302 { 2303 (*info->fprintf_func) (info->stream, " # "); 2304 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep 2305 + op_address[op_index[i]]), info); 2306 } 2307 return codep - priv.the_buffer; 2308 } 2309 2310 static const char *float_mem[] = { 2311 /* d8 */ 2312 "fadd{s||s|}", 2313 "fmul{s||s|}", 2314 "fcom{s||s|}", 2315 "fcomp{s||s|}", 2316 "fsub{s||s|}", 2317 "fsubr{s||s|}", 2318 "fdiv{s||s|}", 2319 "fdivr{s||s|}", 2320 /* d9 */ 2321 "fld{s||s|}", 2322 "(bad)", 2323 "fst{s||s|}", 2324 "fstp{s||s|}", 2325 "fldenv", 2326 "fldcw", 2327 "fNstenv", 2328 "fNstcw", 2329 /* da */ 2330 "fiadd{l||l|}", 2331 "fimul{l||l|}", 2332 "ficom{l||l|}", 2333 "ficomp{l||l|}", 2334 "fisub{l||l|}", 2335 "fisubr{l||l|}", 2336 "fidiv{l||l|}", 2337 "fidivr{l||l|}", 2338 /* db */ 2339 "fild{l||l|}", 2340 "fisttp{l||l|}", 2341 "fist{l||l|}", 2342 "fistp{l||l|}", 2343 "(bad)", 2344 "fld{t||t|}", 2345 "(bad)", 2346 "fstp{t||t|}", 2347 /* dc */ 2348 "fadd{l||l|}", 2349 "fmul{l||l|}", 2350 "fcom{l||l|}", 2351 "fcomp{l||l|}", 2352 "fsub{l||l|}", 2353 "fsubr{l||l|}", 2354 "fdiv{l||l|}", 2355 "fdivr{l||l|}", 2356 /* dd */ 2357 "fld{l||l|}", 2358 "fisttpll", 2359 "fst{l||l|}", 2360 "fstp{l||l|}", 2361 "frstor", 2362 "(bad)", 2363 "fNsave", 2364 "fNstsw", 2365 /* de */ 2366 "fiadd", 2367 "fimul", 2368 "ficom", 2369 "ficomp", 2370 "fisub", 2371 "fisubr", 2372 "fidiv", 2373 "fidivr", 2374 /* df */ 2375 "fild", 2376 "fisttp", 2377 "fist", 2378 "fistp", 2379 "fbld", 2380 "fild{ll||ll|}", 2381 "fbstp", 2382 "fistpll", 2383 }; 2384 2385 #define ST OP_ST, 0 2386 #define STi OP_STi, 0 2387 2388 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0 2389 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0 2390 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0 2391 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0 2392 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0 2393 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0 2394 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0 2395 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0 2396 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0 2397 2398 static const struct dis386 float_reg[][8] = { 2399 /* d8 */ 2400 { 2401 { "fadd", ST, STi, XX }, 2402 { "fmul", ST, STi, XX }, 2403 { "fcom", STi, XX, XX }, 2404 { "fcomp", STi, XX, XX }, 2405 { "fsub", ST, STi, XX }, 2406 { "fsubr", ST, STi, XX }, 2407 { "fdiv", ST, STi, XX }, 2408 { "fdivr", ST, STi, XX }, 2409 }, 2410 /* d9 */ 2411 { 2412 { "fld", STi, XX, XX }, 2413 { "fxch", STi, XX, XX }, 2414 { FGRPd9_2 }, 2415 { "(bad)", XX, XX, XX }, 2416 { FGRPd9_4 }, 2417 { FGRPd9_5 }, 2418 { FGRPd9_6 }, 2419 { FGRPd9_7 }, 2420 }, 2421 /* da */ 2422 { 2423 { "fcmovb", ST, STi, XX }, 2424 { "fcmove", ST, STi, XX }, 2425 { "fcmovbe",ST, STi, XX }, 2426 { "fcmovu", ST, STi, XX }, 2427 { "(bad)", XX, XX, XX }, 2428 { FGRPda_5 }, 2429 { "(bad)", XX, XX, XX }, 2430 { "(bad)", XX, XX, XX }, 2431 }, 2432 /* db */ 2433 { 2434 { "fcmovnb",ST, STi, XX }, 2435 { "fcmovne",ST, STi, XX }, 2436 { "fcmovnbe",ST, STi, XX }, 2437 { "fcmovnu",ST, STi, XX }, 2438 { FGRPdb_4 }, 2439 { "fucomi", ST, STi, XX }, 2440 { "fcomi", ST, STi, XX }, 2441 { "(bad)", XX, XX, XX }, 2442 }, 2443 /* dc */ 2444 { 2445 { "fadd", STi, ST, XX }, 2446 { "fmul", STi, ST, XX }, 2447 { "(bad)", XX, XX, XX }, 2448 { "(bad)", XX, XX, XX }, 2449 #if UNIXWARE_COMPAT 2450 { "fsub", STi, ST, XX }, 2451 { "fsubr", STi, ST, XX }, 2452 { "fdiv", STi, ST, XX }, 2453 { "fdivr", STi, ST, XX }, 2454 #else 2455 { "fsubr", STi, ST, XX }, 2456 { "fsub", STi, ST, XX }, 2457 { "fdivr", STi, ST, XX }, 2458 { "fdiv", STi, ST, XX }, 2459 #endif 2460 }, 2461 /* dd */ 2462 { 2463 { "ffree", STi, XX, XX }, 2464 { "(bad)", XX, XX, XX }, 2465 { "fst", STi, XX, XX }, 2466 { "fstp", STi, XX, XX }, 2467 { "fucom", STi, XX, XX }, 2468 { "fucomp", STi, XX, XX }, 2469 { "(bad)", XX, XX, XX }, 2470 { "(bad)", XX, XX, XX }, 2471 }, 2472 /* de */ 2473 { 2474 { "faddp", STi, ST, XX }, 2475 { "fmulp", STi, ST, XX }, 2476 { "(bad)", XX, XX, XX }, 2477 { FGRPde_3 }, 2478 #if UNIXWARE_COMPAT 2479 { "fsubp", STi, ST, XX }, 2480 { "fsubrp", STi, ST, XX }, 2481 { "fdivp", STi, ST, XX }, 2482 { "fdivrp", STi, ST, XX }, 2483 #else 2484 { "fsubrp", STi, ST, XX }, 2485 { "fsubp", STi, ST, XX }, 2486 { "fdivrp", STi, ST, XX }, 2487 { "fdivp", STi, ST, XX }, 2488 #endif 2489 }, 2490 /* df */ 2491 { 2492 { "ffreep", STi, XX, XX }, 2493 { "(bad)", XX, XX, XX }, 2494 { "(bad)", XX, XX, XX }, 2495 { "(bad)", XX, XX, XX }, 2496 { FGRPdf_4 }, 2497 { "fucomip",ST, STi, XX }, 2498 { "fcomip", ST, STi, XX }, 2499 { "(bad)", XX, XX, XX }, 2500 }, 2501 }; 2502 2503 static char *fgrps[][8] = { 2504 /* d9_2 0 */ 2505 { 2506 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2507 }, 2508 2509 /* d9_4 1 */ 2510 { 2511 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", 2512 }, 2513 2514 /* d9_5 2 */ 2515 { 2516 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", 2517 }, 2518 2519 /* d9_6 3 */ 2520 { 2521 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", 2522 }, 2523 2524 /* d9_7 4 */ 2525 { 2526 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", 2527 }, 2528 2529 /* da_5 5 */ 2530 { 2531 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2532 }, 2533 2534 /* db_4 6 */ 2535 { 2536 "feni(287 only)","fdisi(287 only)","fNclex","fNinit", 2537 "fNsetpm(287 only)","(bad)","(bad)","(bad)", 2538 }, 2539 2540 /* de_3 7 */ 2541 { 2542 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2543 }, 2544 2545 /* df_4 8 */ 2546 { 2547 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2548 }, 2549 }; 2550 2551 static void 2552 dofloat (int sizeflag) 2553 { 2554 const struct dis386 *dp; 2555 unsigned char floatop; 2556 2557 floatop = codep[-1]; 2558 2559 if (mod != 3) 2560 { 2561 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag); 2562 obufp = op1out; 2563 if (floatop == 0xdb) 2564 OP_E (x_mode, sizeflag); 2565 else if (floatop == 0xdd) 2566 OP_E (d_mode, sizeflag); 2567 else 2568 OP_E (v_mode, sizeflag); 2569 return; 2570 } 2571 /* Skip mod/rm byte. */ 2572 MODRM_CHECK; 2573 codep++; 2574 2575 dp = &float_reg[floatop - 0xd8][reg]; 2576 if (dp->name == NULL) 2577 { 2578 putop (fgrps[dp->bytemode1][rm], sizeflag); 2579 2580 /* Instruction fnstsw is only one with strange arg. */ 2581 if (floatop == 0xdf && codep[-1] == 0xe0) 2582 strcpy (op1out, names16[0]); 2583 } 2584 else 2585 { 2586 putop (dp->name, sizeflag); 2587 2588 obufp = op1out; 2589 if (dp->op1) 2590 (*dp->op1) (dp->bytemode1, sizeflag); 2591 obufp = op2out; 2592 if (dp->op2) 2593 (*dp->op2) (dp->bytemode2, sizeflag); 2594 } 2595 } 2596 2597 static void 2598 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 2599 { 2600 oappend ("%st"); 2601 } 2602 2603 static void 2604 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 2605 { 2606 sprintf (scratchbuf, "%%st(%d)", rm); 2607 oappend (scratchbuf + intel_syntax); 2608 } 2609 2610 /* Capital letters in template are macros. */ 2611 static int 2612 putop (const char *template, int sizeflag) 2613 { 2614 const char *p; 2615 int alt; 2616 2617 for (p = template; *p; p++) 2618 { 2619 switch (*p) 2620 { 2621 default: 2622 *obufp++ = *p; 2623 break; 2624 case '{': 2625 alt = 0; 2626 if (intel_syntax) 2627 alt += 1; 2628 if (mode_64bit) 2629 alt += 2; 2630 while (alt != 0) 2631 { 2632 while (*++p != '|') 2633 { 2634 if (*p == '}') 2635 { 2636 /* Alternative not valid. */ 2637 strcpy (obuf, "(bad)"); 2638 obufp = obuf + 5; 2639 return 1; 2640 } 2641 else if (*p == '\0') 2642 abort (); 2643 } 2644 alt--; 2645 } 2646 break; 2647 case '|': 2648 while (*++p != '}') 2649 { 2650 if (*p == '\0') 2651 abort (); 2652 } 2653 break; 2654 case '}': 2655 break; 2656 case 'A': 2657 if (intel_syntax) 2658 break; 2659 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 2660 *obufp++ = 'b'; 2661 break; 2662 case 'B': 2663 if (intel_syntax) 2664 break; 2665 if (sizeflag & SUFFIX_ALWAYS) 2666 *obufp++ = 'b'; 2667 break; 2668 case 'E': /* For jcxz/jecxz */ 2669 if (mode_64bit) 2670 { 2671 if (sizeflag & AFLAG) 2672 *obufp++ = 'r'; 2673 else 2674 *obufp++ = 'e'; 2675 } 2676 else 2677 if (sizeflag & AFLAG) 2678 *obufp++ = 'e'; 2679 used_prefixes |= (prefixes & PREFIX_ADDR); 2680 break; 2681 case 'F': 2682 if (intel_syntax) 2683 break; 2684 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS)) 2685 { 2686 if (sizeflag & AFLAG) 2687 *obufp++ = mode_64bit ? 'q' : 'l'; 2688 else 2689 *obufp++ = mode_64bit ? 'l' : 'w'; 2690 used_prefixes |= (prefixes & PREFIX_ADDR); 2691 } 2692 break; 2693 case 'H': 2694 if (intel_syntax) 2695 break; 2696 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS 2697 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) 2698 { 2699 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); 2700 *obufp++ = ','; 2701 *obufp++ = 'p'; 2702 if (prefixes & PREFIX_DS) 2703 *obufp++ = 't'; 2704 else 2705 *obufp++ = 'n'; 2706 } 2707 break; 2708 case 'L': 2709 if (intel_syntax) 2710 break; 2711 if (sizeflag & SUFFIX_ALWAYS) 2712 *obufp++ = 'l'; 2713 break; 2714 case 'N': 2715 if ((prefixes & PREFIX_FWAIT) == 0) 2716 *obufp++ = 'n'; 2717 else 2718 used_prefixes |= PREFIX_FWAIT; 2719 break; 2720 case 'O': 2721 USED_REX (REX_MODE64); 2722 if (rex & REX_MODE64) 2723 *obufp++ = 'o'; 2724 else 2725 *obufp++ = 'd'; 2726 break; 2727 case 'T': 2728 if (intel_syntax) 2729 break; 2730 if (mode_64bit) 2731 { 2732 *obufp++ = 'q'; 2733 break; 2734 } 2735 /* Fall through. */ 2736 case 'P': 2737 if (intel_syntax) 2738 break; 2739 if ((prefixes & PREFIX_DATA) 2740 || (rex & REX_MODE64) 2741 || (sizeflag & SUFFIX_ALWAYS)) 2742 { 2743 USED_REX (REX_MODE64); 2744 if (rex & REX_MODE64) 2745 *obufp++ = 'q'; 2746 else 2747 { 2748 if (sizeflag & DFLAG) 2749 *obufp++ = 'l'; 2750 else 2751 *obufp++ = 'w'; 2752 used_prefixes |= (prefixes & PREFIX_DATA); 2753 } 2754 } 2755 break; 2756 case 'U': 2757 if (intel_syntax) 2758 break; 2759 if (mode_64bit) 2760 { 2761 *obufp++ = 'q'; 2762 break; 2763 } 2764 /* Fall through. */ 2765 case 'Q': 2766 if (intel_syntax) 2767 break; 2768 USED_REX (REX_MODE64); 2769 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 2770 { 2771 if (rex & REX_MODE64) 2772 *obufp++ = 'q'; 2773 else 2774 { 2775 if (sizeflag & DFLAG) 2776 *obufp++ = 'l'; 2777 else 2778 *obufp++ = 'w'; 2779 used_prefixes |= (prefixes & PREFIX_DATA); 2780 } 2781 } 2782 break; 2783 case 'R': 2784 USED_REX (REX_MODE64); 2785 if (intel_syntax) 2786 { 2787 if (rex & REX_MODE64) 2788 { 2789 *obufp++ = 'q'; 2790 *obufp++ = 't'; 2791 } 2792 else if (sizeflag & DFLAG) 2793 { 2794 *obufp++ = 'd'; 2795 *obufp++ = 'q'; 2796 } 2797 else 2798 { 2799 *obufp++ = 'w'; 2800 *obufp++ = 'd'; 2801 } 2802 } 2803 else 2804 { 2805 if (rex & REX_MODE64) 2806 *obufp++ = 'q'; 2807 else if (sizeflag & DFLAG) 2808 *obufp++ = 'l'; 2809 else 2810 *obufp++ = 'w'; 2811 } 2812 if (!(rex & REX_MODE64)) 2813 used_prefixes |= (prefixes & PREFIX_DATA); 2814 break; 2815 case 'S': 2816 if (intel_syntax) 2817 break; 2818 if (sizeflag & SUFFIX_ALWAYS) 2819 { 2820 if (rex & REX_MODE64) 2821 *obufp++ = 'q'; 2822 else 2823 { 2824 if (sizeflag & DFLAG) 2825 *obufp++ = 'l'; 2826 else 2827 *obufp++ = 'w'; 2828 used_prefixes |= (prefixes & PREFIX_DATA); 2829 } 2830 } 2831 break; 2832 case 'X': 2833 if (prefixes & PREFIX_DATA) 2834 *obufp++ = 'd'; 2835 else 2836 *obufp++ = 's'; 2837 used_prefixes |= (prefixes & PREFIX_DATA); 2838 break; 2839 case 'Y': 2840 if (intel_syntax) 2841 break; 2842 if (rex & REX_MODE64) 2843 { 2844 USED_REX (REX_MODE64); 2845 *obufp++ = 'q'; 2846 } 2847 break; 2848 /* implicit operand size 'l' for i386 or 'q' for x86-64 */ 2849 case 'W': 2850 /* operand size flag for cwtl, cbtw */ 2851 USED_REX (0); 2852 if (rex) 2853 *obufp++ = 'l'; 2854 else if (sizeflag & DFLAG) 2855 *obufp++ = 'w'; 2856 else 2857 *obufp++ = 'b'; 2858 if (intel_syntax) 2859 { 2860 if (rex) 2861 { 2862 *obufp++ = 'q'; 2863 *obufp++ = 'e'; 2864 } 2865 if (sizeflag & DFLAG) 2866 { 2867 *obufp++ = 'd'; 2868 *obufp++ = 'e'; 2869 } 2870 else 2871 { 2872 *obufp++ = 'w'; 2873 } 2874 } 2875 if (!rex) 2876 used_prefixes |= (prefixes & PREFIX_DATA); 2877 break; 2878 } 2879 } 2880 *obufp = 0; 2881 return 0; 2882 } 2883 2884 static void 2885 oappend (const char *s) 2886 { 2887 strcpy (obufp, s); 2888 obufp += strlen (s); 2889 } 2890 2891 static void 2892 append_seg (void) 2893 { 2894 if (prefixes & PREFIX_CS) 2895 { 2896 used_prefixes |= PREFIX_CS; 2897 oappend ("%cs:" + intel_syntax); 2898 } 2899 if (prefixes & PREFIX_DS) 2900 { 2901 used_prefixes |= PREFIX_DS; 2902 oappend ("%ds:" + intel_syntax); 2903 } 2904 if (prefixes & PREFIX_SS) 2905 { 2906 used_prefixes |= PREFIX_SS; 2907 oappend ("%ss:" + intel_syntax); 2908 } 2909 if (prefixes & PREFIX_ES) 2910 { 2911 used_prefixes |= PREFIX_ES; 2912 oappend ("%es:" + intel_syntax); 2913 } 2914 if (prefixes & PREFIX_FS) 2915 { 2916 used_prefixes |= PREFIX_FS; 2917 oappend ("%fs:" + intel_syntax); 2918 } 2919 if (prefixes & PREFIX_GS) 2920 { 2921 used_prefixes |= PREFIX_GS; 2922 oappend ("%gs:" + intel_syntax); 2923 } 2924 } 2925 2926 static void 2927 OP_indirE (int bytemode, int sizeflag) 2928 { 2929 if (!intel_syntax) 2930 oappend ("*"); 2931 OP_E (bytemode, sizeflag); 2932 } 2933 2934 static void 2935 print_operand_value (char *buf, int hex, bfd_vma disp) 2936 { 2937 if (mode_64bit) 2938 { 2939 if (hex) 2940 { 2941 char tmp[30]; 2942 int i; 2943 buf[0] = '0'; 2944 buf[1] = 'x'; 2945 sprintf_vma (tmp, disp); 2946 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); 2947 strcpy (buf + 2, tmp + i); 2948 } 2949 else 2950 { 2951 bfd_signed_vma v = disp; 2952 char tmp[30]; 2953 int i; 2954 if (v < 0) 2955 { 2956 *(buf++) = '-'; 2957 v = -disp; 2958 /* Check for possible overflow on 0x8000000000000000. */ 2959 if (v < 0) 2960 { 2961 strcpy (buf, "9223372036854775808"); 2962 return; 2963 } 2964 } 2965 if (!v) 2966 { 2967 strcpy (buf, "0"); 2968 return; 2969 } 2970 2971 i = 0; 2972 tmp[29] = 0; 2973 while (v) 2974 { 2975 tmp[28 - i] = (v % 10) + '0'; 2976 v /= 10; 2977 i++; 2978 } 2979 strcpy (buf, tmp + 29 - i); 2980 } 2981 } 2982 else 2983 { 2984 if (hex) 2985 sprintf (buf, "0x%x", (unsigned int) disp); 2986 else 2987 sprintf (buf, "%d", (int) disp); 2988 } 2989 } 2990 2991 static void 2992 OP_E (int bytemode, int sizeflag) 2993 { 2994 bfd_vma disp; 2995 int add = 0; 2996 int riprel = 0; 2997 USED_REX (REX_EXTZ); 2998 if (rex & REX_EXTZ) 2999 add += 8; 3000 3001 /* Skip mod/rm byte. */ 3002 MODRM_CHECK; 3003 codep++; 3004 3005 if (mod == 3) 3006 { 3007 switch (bytemode) 3008 { 3009 case b_mode: 3010 USED_REX (0); 3011 if (rex) 3012 oappend (names8rex[rm + add]); 3013 else 3014 oappend (names8[rm + add]); 3015 break; 3016 case w_mode: 3017 oappend (names16[rm + add]); 3018 break; 3019 case d_mode: 3020 oappend (names32[rm + add]); 3021 break; 3022 case q_mode: 3023 oappend (names64[rm + add]); 3024 break; 3025 case m_mode: 3026 if (mode_64bit) 3027 oappend (names64[rm + add]); 3028 else 3029 oappend (names32[rm + add]); 3030 break; 3031 case v_mode: 3032 case dq_mode: 3033 USED_REX (REX_MODE64); 3034 if (rex & REX_MODE64) 3035 oappend (names64[rm + add]); 3036 else if ((sizeflag & DFLAG) || bytemode == dq_mode) 3037 oappend (names32[rm + add]); 3038 else 3039 oappend (names16[rm + add]); 3040 used_prefixes |= (prefixes & PREFIX_DATA); 3041 break; 3042 case 0: 3043 break; 3044 default: 3045 oappend (INTERNAL_DISASSEMBLER_ERROR); 3046 break; 3047 } 3048 return; 3049 } 3050 3051 disp = 0; 3052 append_seg (); 3053 3054 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */ 3055 { 3056 int havesib; 3057 int havebase; 3058 int base; 3059 int index = 0; 3060 int scale = 0; 3061 3062 havesib = 0; 3063 havebase = 1; 3064 base = rm; 3065 3066 if (base == 4) 3067 { 3068 havesib = 1; 3069 FETCH_DATA (the_info, codep + 1); 3070 scale = (*codep >> 6) & 3; 3071 index = (*codep >> 3) & 7; 3072 base = *codep & 7; 3073 USED_REX (REX_EXTY); 3074 USED_REX (REX_EXTZ); 3075 if (rex & REX_EXTY) 3076 index += 8; 3077 if (rex & REX_EXTZ) 3078 base += 8; 3079 codep++; 3080 } 3081 3082 switch (mod) 3083 { 3084 case 0: 3085 if ((base & 7) == 5) 3086 { 3087 havebase = 0; 3088 if (mode_64bit && !havesib && (sizeflag & AFLAG)) 3089 riprel = 1; 3090 disp = get32s (); 3091 } 3092 break; 3093 case 1: 3094 FETCH_DATA (the_info, codep + 1); 3095 disp = *codep++; 3096 if ((disp & 0x80) != 0) 3097 disp -= 0x100; 3098 break; 3099 case 2: 3100 disp = get32s (); 3101 break; 3102 } 3103 3104 if (!intel_syntax) 3105 if (mod != 0 || (base & 7) == 5) 3106 { 3107 print_operand_value (scratchbuf, !riprel, disp); 3108 oappend (scratchbuf); 3109 if (riprel) 3110 { 3111 set_op (disp, 1); 3112 oappend ("(%rip)"); 3113 } 3114 } 3115 3116 if (havebase || (havesib && (index != 4 || scale != 0))) 3117 { 3118 if (intel_syntax) 3119 { 3120 switch (bytemode) 3121 { 3122 case b_mode: 3123 oappend ("BYTE PTR "); 3124 break; 3125 case w_mode: 3126 oappend ("WORD PTR "); 3127 break; 3128 case v_mode: 3129 oappend ("DWORD PTR "); 3130 break; 3131 case d_mode: 3132 oappend ("QWORD PTR "); 3133 break; 3134 case m_mode: 3135 if (mode_64bit) 3136 oappend ("DWORD PTR "); 3137 else 3138 oappend ("QWORD PTR "); 3139 break; 3140 case x_mode: 3141 oappend ("XWORD PTR "); 3142 break; 3143 default: 3144 break; 3145 } 3146 } 3147 *obufp++ = open_char; 3148 if (intel_syntax && riprel) 3149 oappend ("rip + "); 3150 *obufp = '\0'; 3151 USED_REX (REX_EXTZ); 3152 if (!havesib && (rex & REX_EXTZ)) 3153 base += 8; 3154 if (havebase) 3155 oappend (mode_64bit && (sizeflag & AFLAG) 3156 ? names64[base] : names32[base]); 3157 if (havesib) 3158 { 3159 if (index != 4) 3160 { 3161 if (intel_syntax) 3162 { 3163 if (havebase) 3164 { 3165 *obufp++ = separator_char; 3166 *obufp = '\0'; 3167 } 3168 sprintf (scratchbuf, "%s", 3169 mode_64bit && (sizeflag & AFLAG) 3170 ? names64[index] : names32[index]); 3171 } 3172 else 3173 sprintf (scratchbuf, ",%s", 3174 mode_64bit && (sizeflag & AFLAG) 3175 ? names64[index] : names32[index]); 3176 oappend (scratchbuf); 3177 } 3178 if (scale != 0 || (!intel_syntax && index != 4)) 3179 { 3180 *obufp++ = scale_char; 3181 *obufp = '\0'; 3182 sprintf (scratchbuf, "%d", 1 << scale); 3183 oappend (scratchbuf); 3184 } 3185 } 3186 if (intel_syntax) 3187 if (mod != 0 || (base & 7) == 5) 3188 { 3189 /* Don't print zero displacements. */ 3190 if (disp != 0) 3191 { 3192 if ((bfd_signed_vma) disp > 0) 3193 { 3194 *obufp++ = '+'; 3195 *obufp = '\0'; 3196 } 3197 3198 print_operand_value (scratchbuf, 0, disp); 3199 oappend (scratchbuf); 3200 } 3201 } 3202 3203 *obufp++ = close_char; 3204 *obufp = '\0'; 3205 } 3206 else if (intel_syntax) 3207 { 3208 if (mod != 0 || (base & 7) == 5) 3209 { 3210 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3211 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 3212 ; 3213 else 3214 { 3215 oappend (names_seg[ds_reg - es_reg]); 3216 oappend (":"); 3217 } 3218 print_operand_value (scratchbuf, 1, disp); 3219 oappend (scratchbuf); 3220 } 3221 } 3222 } 3223 else 3224 { /* 16 bit address mode */ 3225 switch (mod) 3226 { 3227 case 0: 3228 if ((rm & 7) == 6) 3229 { 3230 disp = get16 (); 3231 if ((disp & 0x8000) != 0) 3232 disp -= 0x10000; 3233 } 3234 break; 3235 case 1: 3236 FETCH_DATA (the_info, codep + 1); 3237 disp = *codep++; 3238 if ((disp & 0x80) != 0) 3239 disp -= 0x100; 3240 break; 3241 case 2: 3242 disp = get16 (); 3243 if ((disp & 0x8000) != 0) 3244 disp -= 0x10000; 3245 break; 3246 } 3247 3248 if (!intel_syntax) 3249 if (mod != 0 || (rm & 7) == 6) 3250 { 3251 print_operand_value (scratchbuf, 0, disp); 3252 oappend (scratchbuf); 3253 } 3254 3255 if (mod != 0 || (rm & 7) != 6) 3256 { 3257 *obufp++ = open_char; 3258 *obufp = '\0'; 3259 oappend (index16[rm + add]); 3260 *obufp++ = close_char; 3261 *obufp = '\0'; 3262 } 3263 } 3264 } 3265 3266 static void 3267 OP_G (int bytemode, int sizeflag) 3268 { 3269 int add = 0; 3270 USED_REX (REX_EXTX); 3271 if (rex & REX_EXTX) 3272 add += 8; 3273 switch (bytemode) 3274 { 3275 case b_mode: 3276 USED_REX (0); 3277 if (rex) 3278 oappend (names8rex[reg + add]); 3279 else 3280 oappend (names8[reg + add]); 3281 break; 3282 case w_mode: 3283 oappend (names16[reg + add]); 3284 break; 3285 case d_mode: 3286 oappend (names32[reg + add]); 3287 break; 3288 case q_mode: 3289 oappend (names64[reg + add]); 3290 break; 3291 case v_mode: 3292 USED_REX (REX_MODE64); 3293 if (rex & REX_MODE64) 3294 oappend (names64[reg + add]); 3295 else if (sizeflag & DFLAG) 3296 oappend (names32[reg + add]); 3297 else 3298 oappend (names16[reg + add]); 3299 used_prefixes |= (prefixes & PREFIX_DATA); 3300 break; 3301 default: 3302 oappend (INTERNAL_DISASSEMBLER_ERROR); 3303 break; 3304 } 3305 } 3306 3307 static bfd_vma 3308 get64 (void) 3309 { 3310 bfd_vma x; 3311 #ifdef BFD64 3312 unsigned int a; 3313 unsigned int b; 3314 3315 FETCH_DATA (the_info, codep + 8); 3316 a = *codep++ & 0xff; 3317 a |= (*codep++ & 0xff) << 8; 3318 a |= (*codep++ & 0xff) << 16; 3319 a |= (*codep++ & 0xff) << 24; 3320 b = *codep++ & 0xff; 3321 b |= (*codep++ & 0xff) << 8; 3322 b |= (*codep++ & 0xff) << 16; 3323 b |= (*codep++ & 0xff) << 24; 3324 x = a + ((bfd_vma) b << 32); 3325 #else 3326 abort (); 3327 x = 0; 3328 #endif 3329 return x; 3330 } 3331 3332 static bfd_signed_vma 3333 get32 (void) 3334 { 3335 bfd_signed_vma x = 0; 3336 3337 FETCH_DATA (the_info, codep + 4); 3338 x = *codep++ & (bfd_signed_vma) 0xff; 3339 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 3340 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 3341 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 3342 return x; 3343 } 3344 3345 static bfd_signed_vma 3346 get32s (void) 3347 { 3348 bfd_signed_vma x = 0; 3349 3350 FETCH_DATA (the_info, codep + 4); 3351 x = *codep++ & (bfd_signed_vma) 0xff; 3352 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 3353 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 3354 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 3355 3356 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); 3357 3358 return x; 3359 } 3360 3361 static int 3362 get16 (void) 3363 { 3364 int x = 0; 3365 3366 FETCH_DATA (the_info, codep + 2); 3367 x = *codep++ & 0xff; 3368 x |= (*codep++ & 0xff) << 8; 3369 return x; 3370 } 3371 3372 static void 3373 set_op (bfd_vma op, int riprel) 3374 { 3375 op_index[op_ad] = op_ad; 3376 if (mode_64bit) 3377 { 3378 op_address[op_ad] = op; 3379 op_riprel[op_ad] = riprel; 3380 } 3381 else 3382 { 3383 /* Mask to get a 32-bit address. */ 3384 op_address[op_ad] = op & 0xffffffff; 3385 op_riprel[op_ad] = riprel & 0xffffffff; 3386 } 3387 } 3388 3389 static void 3390 OP_REG (int code, int sizeflag) 3391 { 3392 const char *s; 3393 int add = 0; 3394 USED_REX (REX_EXTZ); 3395 if (rex & REX_EXTZ) 3396 add = 8; 3397 3398 switch (code) 3399 { 3400 case indir_dx_reg: 3401 if (intel_syntax) 3402 s = "[dx]"; 3403 else 3404 s = "(%dx)"; 3405 break; 3406 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 3407 case sp_reg: case bp_reg: case si_reg: case di_reg: 3408 s = names16[code - ax_reg + add]; 3409 break; 3410 case es_reg: case ss_reg: case cs_reg: 3411 case ds_reg: case fs_reg: case gs_reg: 3412 s = names_seg[code - es_reg + add]; 3413 break; 3414 case al_reg: case ah_reg: case cl_reg: case ch_reg: 3415 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 3416 USED_REX (0); 3417 if (rex) 3418 s = names8rex[code - al_reg + add]; 3419 else 3420 s = names8[code - al_reg]; 3421 break; 3422 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: 3423 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: 3424 if (mode_64bit) 3425 { 3426 s = names64[code - rAX_reg + add]; 3427 break; 3428 } 3429 code += eAX_reg - rAX_reg; 3430 /* Fall through. */ 3431 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 3432 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 3433 USED_REX (REX_MODE64); 3434 if (rex & REX_MODE64) 3435 s = names64[code - eAX_reg + add]; 3436 else if (sizeflag & DFLAG) 3437 s = names32[code - eAX_reg + add]; 3438 else 3439 s = names16[code - eAX_reg + add]; 3440 used_prefixes |= (prefixes & PREFIX_DATA); 3441 break; 3442 default: 3443 s = INTERNAL_DISASSEMBLER_ERROR; 3444 break; 3445 } 3446 oappend (s); 3447 } 3448 3449 static void 3450 OP_IMREG (int code, int sizeflag) 3451 { 3452 const char *s; 3453 3454 switch (code) 3455 { 3456 case indir_dx_reg: 3457 if (intel_syntax) 3458 s = "[dx]"; 3459 else 3460 s = "(%dx)"; 3461 break; 3462 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 3463 case sp_reg: case bp_reg: case si_reg: case di_reg: 3464 s = names16[code - ax_reg]; 3465 break; 3466 case es_reg: case ss_reg: case cs_reg: 3467 case ds_reg: case fs_reg: case gs_reg: 3468 s = names_seg[code - es_reg]; 3469 break; 3470 case al_reg: case ah_reg: case cl_reg: case ch_reg: 3471 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 3472 USED_REX (0); 3473 if (rex) 3474 s = names8rex[code - al_reg]; 3475 else 3476 s = names8[code - al_reg]; 3477 break; 3478 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 3479 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 3480 USED_REX (REX_MODE64); 3481 if (rex & REX_MODE64) 3482 s = names64[code - eAX_reg]; 3483 else if (sizeflag & DFLAG) 3484 s = names32[code - eAX_reg]; 3485 else 3486 s = names16[code - eAX_reg]; 3487 used_prefixes |= (prefixes & PREFIX_DATA); 3488 break; 3489 default: 3490 s = INTERNAL_DISASSEMBLER_ERROR; 3491 break; 3492 } 3493 oappend (s); 3494 } 3495 3496 static void 3497 OP_I (int bytemode, int sizeflag) 3498 { 3499 bfd_signed_vma op; 3500 bfd_signed_vma mask = -1; 3501 3502 switch (bytemode) 3503 { 3504 case b_mode: 3505 FETCH_DATA (the_info, codep + 1); 3506 op = *codep++; 3507 mask = 0xff; 3508 break; 3509 case q_mode: 3510 if (mode_64bit) 3511 { 3512 op = get32s (); 3513 break; 3514 } 3515 /* Fall through. */ 3516 case v_mode: 3517 USED_REX (REX_MODE64); 3518 if (rex & REX_MODE64) 3519 op = get32s (); 3520 else if (sizeflag & DFLAG) 3521 { 3522 op = get32 (); 3523 mask = 0xffffffff; 3524 } 3525 else 3526 { 3527 op = get16 (); 3528 mask = 0xfffff; 3529 } 3530 used_prefixes |= (prefixes & PREFIX_DATA); 3531 break; 3532 case w_mode: 3533 mask = 0xfffff; 3534 op = get16 (); 3535 break; 3536 default: 3537 oappend (INTERNAL_DISASSEMBLER_ERROR); 3538 return; 3539 } 3540 3541 op &= mask; 3542 scratchbuf[0] = '$'; 3543 print_operand_value (scratchbuf + 1, 1, op); 3544 oappend (scratchbuf + intel_syntax); 3545 scratchbuf[0] = '\0'; 3546 } 3547 3548 static void 3549 OP_I64 (int bytemode, int sizeflag) 3550 { 3551 bfd_signed_vma op; 3552 bfd_signed_vma mask = -1; 3553 3554 if (!mode_64bit) 3555 { 3556 OP_I (bytemode, sizeflag); 3557 return; 3558 } 3559 3560 switch (bytemode) 3561 { 3562 case b_mode: 3563 FETCH_DATA (the_info, codep + 1); 3564 op = *codep++; 3565 mask = 0xff; 3566 break; 3567 case v_mode: 3568 USED_REX (REX_MODE64); 3569 if (rex & REX_MODE64) 3570 op = get64 (); 3571 else if (sizeflag & DFLAG) 3572 { 3573 op = get32 (); 3574 mask = 0xffffffff; 3575 } 3576 else 3577 { 3578 op = get16 (); 3579 mask = 0xfffff; 3580 } 3581 used_prefixes |= (prefixes & PREFIX_DATA); 3582 break; 3583 case w_mode: 3584 mask = 0xfffff; 3585 op = get16 (); 3586 break; 3587 default: 3588 oappend (INTERNAL_DISASSEMBLER_ERROR); 3589 return; 3590 } 3591 3592 op &= mask; 3593 scratchbuf[0] = '$'; 3594 print_operand_value (scratchbuf + 1, 1, op); 3595 oappend (scratchbuf + intel_syntax); 3596 scratchbuf[0] = '\0'; 3597 } 3598 3599 static void 3600 OP_sI (int bytemode, int sizeflag) 3601 { 3602 bfd_signed_vma op; 3603 bfd_signed_vma mask = -1; 3604 3605 switch (bytemode) 3606 { 3607 case b_mode: 3608 FETCH_DATA (the_info, codep + 1); 3609 op = *codep++; 3610 if ((op & 0x80) != 0) 3611 op -= 0x100; 3612 mask = 0xffffffff; 3613 break; 3614 case v_mode: 3615 USED_REX (REX_MODE64); 3616 if (rex & REX_MODE64) 3617 op = get32s (); 3618 else if (sizeflag & DFLAG) 3619 { 3620 op = get32s (); 3621 mask = 0xffffffff; 3622 } 3623 else 3624 { 3625 mask = 0xffffffff; 3626 op = get16 (); 3627 if ((op & 0x8000) != 0) 3628 op -= 0x10000; 3629 } 3630 used_prefixes |= (prefixes & PREFIX_DATA); 3631 break; 3632 case w_mode: 3633 op = get16 (); 3634 mask = 0xffffffff; 3635 if ((op & 0x8000) != 0) 3636 op -= 0x10000; 3637 break; 3638 default: 3639 oappend (INTERNAL_DISASSEMBLER_ERROR); 3640 return; 3641 } 3642 3643 scratchbuf[0] = '$'; 3644 print_operand_value (scratchbuf + 1, 1, op); 3645 oappend (scratchbuf + intel_syntax); 3646 } 3647 3648 static void 3649 OP_J (int bytemode, int sizeflag) 3650 { 3651 bfd_vma disp; 3652 bfd_vma mask = -1; 3653 3654 switch (bytemode) 3655 { 3656 case b_mode: 3657 FETCH_DATA (the_info, codep + 1); 3658 disp = *codep++; 3659 if ((disp & 0x80) != 0) 3660 disp -= 0x100; 3661 break; 3662 case v_mode: 3663 if (sizeflag & DFLAG) 3664 disp = get32s (); 3665 else 3666 { 3667 disp = get16 (); 3668 /* For some reason, a data16 prefix on a jump instruction 3669 means that the pc is masked to 16 bits after the 3670 displacement is added! */ 3671 mask = 0xffff; 3672 } 3673 break; 3674 default: 3675 oappend (INTERNAL_DISASSEMBLER_ERROR); 3676 return; 3677 } 3678 disp = (start_pc + codep - start_codep + disp) & mask; 3679 set_op (disp, 0); 3680 print_operand_value (scratchbuf, 1, disp); 3681 oappend (scratchbuf); 3682 } 3683 3684 static void 3685 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3686 { 3687 oappend (names_seg[reg]); 3688 } 3689 3690 static void 3691 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag) 3692 { 3693 int seg, offset; 3694 3695 if (sizeflag & DFLAG) 3696 { 3697 offset = get32 (); 3698 seg = get16 (); 3699 } 3700 else 3701 { 3702 offset = get16 (); 3703 seg = get16 (); 3704 } 3705 used_prefixes |= (prefixes & PREFIX_DATA); 3706 if (intel_syntax) 3707 sprintf (scratchbuf, "0x%x,0x%x", seg, offset); 3708 else 3709 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset); 3710 oappend (scratchbuf); 3711 } 3712 3713 static void 3714 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag) 3715 { 3716 bfd_vma off; 3717 3718 append_seg (); 3719 3720 if ((sizeflag & AFLAG) || mode_64bit) 3721 off = get32 (); 3722 else 3723 off = get16 (); 3724 3725 if (intel_syntax) 3726 { 3727 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3728 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 3729 { 3730 oappend (names_seg[ds_reg - es_reg]); 3731 oappend (":"); 3732 } 3733 } 3734 print_operand_value (scratchbuf, 1, off); 3735 oappend (scratchbuf); 3736 } 3737 3738 static void 3739 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3740 { 3741 bfd_vma off; 3742 3743 if (!mode_64bit) 3744 { 3745 OP_OFF (bytemode, sizeflag); 3746 return; 3747 } 3748 3749 append_seg (); 3750 3751 off = get64 (); 3752 3753 if (intel_syntax) 3754 { 3755 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3756 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 3757 { 3758 oappend (names_seg[ds_reg - es_reg]); 3759 oappend (":"); 3760 } 3761 } 3762 print_operand_value (scratchbuf, 1, off); 3763 oappend (scratchbuf); 3764 } 3765 3766 static void 3767 ptr_reg (int code, int sizeflag) 3768 { 3769 const char *s; 3770 if (intel_syntax) 3771 oappend ("["); 3772 else 3773 oappend ("("); 3774 3775 USED_REX (REX_MODE64); 3776 if (rex & REX_MODE64) 3777 { 3778 if (!(sizeflag & AFLAG)) 3779 s = names32[code - eAX_reg]; 3780 else 3781 s = names64[code - eAX_reg]; 3782 } 3783 else if (sizeflag & AFLAG) 3784 s = names32[code - eAX_reg]; 3785 else 3786 s = names16[code - eAX_reg]; 3787 oappend (s); 3788 if (intel_syntax) 3789 oappend ("]"); 3790 else 3791 oappend (")"); 3792 } 3793 3794 static void 3795 OP_ESreg (int code, int sizeflag) 3796 { 3797 oappend ("%es:" + intel_syntax); 3798 ptr_reg (code, sizeflag); 3799 } 3800 3801 static void 3802 OP_DSreg (int code, int sizeflag) 3803 { 3804 if ((prefixes 3805 & (PREFIX_CS 3806 | PREFIX_DS 3807 | PREFIX_SS 3808 | PREFIX_ES 3809 | PREFIX_FS 3810 | PREFIX_GS)) == 0) 3811 prefixes |= PREFIX_DS; 3812 append_seg (); 3813 ptr_reg (code, sizeflag); 3814 } 3815 3816 static void 3817 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3818 { 3819 int add = 0; 3820 USED_REX (REX_EXTX); 3821 if (rex & REX_EXTX) 3822 add = 8; 3823 sprintf (scratchbuf, "%%cr%d", reg + add); 3824 oappend (scratchbuf + intel_syntax); 3825 } 3826 3827 static void 3828 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3829 { 3830 int add = 0; 3831 USED_REX (REX_EXTX); 3832 if (rex & REX_EXTX) 3833 add = 8; 3834 if (intel_syntax) 3835 sprintf (scratchbuf, "db%d", reg + add); 3836 else 3837 sprintf (scratchbuf, "%%db%d", reg + add); 3838 oappend (scratchbuf); 3839 } 3840 3841 static void 3842 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3843 { 3844 sprintf (scratchbuf, "%%tr%d", reg); 3845 oappend (scratchbuf + intel_syntax); 3846 } 3847 3848 static void 3849 OP_Rd (int bytemode, int sizeflag) 3850 { 3851 if (mod == 3) 3852 OP_E (bytemode, sizeflag); 3853 else 3854 BadOp (); 3855 } 3856 3857 static void 3858 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3859 { 3860 int add = 0; 3861 USED_REX (REX_EXTX); 3862 if (rex & REX_EXTX) 3863 add = 8; 3864 used_prefixes |= (prefixes & PREFIX_DATA); 3865 if (prefixes & PREFIX_DATA) 3866 sprintf (scratchbuf, "%%xmm%d", reg + add); 3867 else 3868 sprintf (scratchbuf, "%%mm%d", reg + add); 3869 oappend (scratchbuf + intel_syntax); 3870 } 3871 3872 static void 3873 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3874 { 3875 int add = 0; 3876 USED_REX (REX_EXTX); 3877 if (rex & REX_EXTX) 3878 add = 8; 3879 sprintf (scratchbuf, "%%xmm%d", reg + add); 3880 oappend (scratchbuf + intel_syntax); 3881 } 3882 3883 static void 3884 OP_EM (int bytemode, int sizeflag) 3885 { 3886 int add = 0; 3887 if (mod != 3) 3888 { 3889 OP_E (bytemode, sizeflag); 3890 return; 3891 } 3892 USED_REX (REX_EXTZ); 3893 if (rex & REX_EXTZ) 3894 add = 8; 3895 3896 /* Skip mod/rm byte. */ 3897 MODRM_CHECK; 3898 codep++; 3899 used_prefixes |= (prefixes & PREFIX_DATA); 3900 if (prefixes & PREFIX_DATA) 3901 sprintf (scratchbuf, "%%xmm%d", rm + add); 3902 else 3903 sprintf (scratchbuf, "%%mm%d", rm + add); 3904 oappend (scratchbuf + intel_syntax); 3905 } 3906 3907 static void 3908 OP_EX (int bytemode, int sizeflag) 3909 { 3910 int add = 0; 3911 if (mod != 3) 3912 { 3913 OP_E (bytemode, sizeflag); 3914 return; 3915 } 3916 USED_REX (REX_EXTZ); 3917 if (rex & REX_EXTZ) 3918 add = 8; 3919 3920 /* Skip mod/rm byte. */ 3921 MODRM_CHECK; 3922 codep++; 3923 sprintf (scratchbuf, "%%xmm%d", rm + add); 3924 oappend (scratchbuf + intel_syntax); 3925 } 3926 3927 static void 3928 OP_MS (int bytemode, int sizeflag) 3929 { 3930 if (mod == 3) 3931 OP_EM (bytemode, sizeflag); 3932 else 3933 BadOp (); 3934 } 3935 3936 static void 3937 OP_XS (int bytemode, int sizeflag) 3938 { 3939 if (mod == 3) 3940 OP_EX (bytemode, sizeflag); 3941 else 3942 BadOp (); 3943 } 3944 3945 static void 3946 OP_M (int bytemode, int sizeflag) 3947 { 3948 if (mod == 3) 3949 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */ 3950 else 3951 OP_E (bytemode, sizeflag); 3952 } 3953 3954 static void 3955 OP_0fae (int bytemode, int sizeflag) 3956 { 3957 if (mod == 3) 3958 { 3959 if (reg == 7) 3960 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); 3961 3962 if (reg < 5 || rm != 0) 3963 { 3964 BadOp (); /* bad sfence, mfence, or lfence */ 3965 return; 3966 } 3967 } 3968 else if (reg != 7) 3969 { 3970 BadOp (); /* bad clflush */ 3971 return; 3972 } 3973 3974 OP_E (bytemode, sizeflag); 3975 } 3976 3977 static void 3978 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3979 { 3980 /* NOP with REPZ prefix is called PAUSE. */ 3981 if (prefixes == PREFIX_REPZ) 3982 strcpy (obuf, "pause"); 3983 } 3984 3985 static const char *const Suffix3DNow[] = { 3986 /* 00 */ NULL, NULL, NULL, NULL, 3987 /* 04 */ NULL, NULL, NULL, NULL, 3988 /* 08 */ NULL, NULL, NULL, NULL, 3989 /* 0C */ "pi2fw", "pi2fd", NULL, NULL, 3990 /* 10 */ NULL, NULL, NULL, NULL, 3991 /* 14 */ NULL, NULL, NULL, NULL, 3992 /* 18 */ NULL, NULL, NULL, NULL, 3993 /* 1C */ "pf2iw", "pf2id", NULL, NULL, 3994 /* 20 */ NULL, NULL, NULL, NULL, 3995 /* 24 */ NULL, NULL, NULL, NULL, 3996 /* 28 */ NULL, NULL, NULL, NULL, 3997 /* 2C */ NULL, NULL, NULL, NULL, 3998 /* 30 */ NULL, NULL, NULL, NULL, 3999 /* 34 */ NULL, NULL, NULL, NULL, 4000 /* 38 */ NULL, NULL, NULL, NULL, 4001 /* 3C */ NULL, NULL, NULL, NULL, 4002 /* 40 */ NULL, NULL, NULL, NULL, 4003 /* 44 */ NULL, NULL, NULL, NULL, 4004 /* 48 */ NULL, NULL, NULL, NULL, 4005 /* 4C */ NULL, NULL, NULL, NULL, 4006 /* 50 */ NULL, NULL, NULL, NULL, 4007 /* 54 */ NULL, NULL, NULL, NULL, 4008 /* 58 */ NULL, NULL, NULL, NULL, 4009 /* 5C */ NULL, NULL, NULL, NULL, 4010 /* 60 */ NULL, NULL, NULL, NULL, 4011 /* 64 */ NULL, NULL, NULL, NULL, 4012 /* 68 */ NULL, NULL, NULL, NULL, 4013 /* 6C */ NULL, NULL, NULL, NULL, 4014 /* 70 */ NULL, NULL, NULL, NULL, 4015 /* 74 */ NULL, NULL, NULL, NULL, 4016 /* 78 */ NULL, NULL, NULL, NULL, 4017 /* 7C */ NULL, NULL, NULL, NULL, 4018 /* 80 */ NULL, NULL, NULL, NULL, 4019 /* 84 */ NULL, NULL, NULL, NULL, 4020 /* 88 */ NULL, NULL, "pfnacc", NULL, 4021 /* 8C */ NULL, NULL, "pfpnacc", NULL, 4022 /* 90 */ "pfcmpge", NULL, NULL, NULL, 4023 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", 4024 /* 98 */ NULL, NULL, "pfsub", NULL, 4025 /* 9C */ NULL, NULL, "pfadd", NULL, 4026 /* A0 */ "pfcmpgt", NULL, NULL, NULL, 4027 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", 4028 /* A8 */ NULL, NULL, "pfsubr", NULL, 4029 /* AC */ NULL, NULL, "pfacc", NULL, 4030 /* B0 */ "pfcmpeq", NULL, NULL, NULL, 4031 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw", 4032 /* B8 */ NULL, NULL, NULL, "pswapd", 4033 /* BC */ NULL, NULL, NULL, "pavgusb", 4034 /* C0 */ NULL, NULL, NULL, NULL, 4035 /* C4 */ NULL, NULL, NULL, NULL, 4036 /* C8 */ NULL, NULL, NULL, NULL, 4037 /* CC */ NULL, NULL, NULL, NULL, 4038 /* D0 */ NULL, NULL, NULL, NULL, 4039 /* D4 */ NULL, NULL, NULL, NULL, 4040 /* D8 */ NULL, NULL, NULL, NULL, 4041 /* DC */ NULL, NULL, NULL, NULL, 4042 /* E0 */ NULL, NULL, NULL, NULL, 4043 /* E4 */ NULL, NULL, NULL, NULL, 4044 /* E8 */ NULL, NULL, NULL, NULL, 4045 /* EC */ NULL, NULL, NULL, NULL, 4046 /* F0 */ NULL, NULL, NULL, NULL, 4047 /* F4 */ NULL, NULL, NULL, NULL, 4048 /* F8 */ NULL, NULL, NULL, NULL, 4049 /* FC */ NULL, NULL, NULL, NULL, 4050 }; 4051 4052 static void 4053 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4054 { 4055 const char *mnemonic; 4056 4057 FETCH_DATA (the_info, codep + 1); 4058 /* AMD 3DNow! instructions are specified by an opcode suffix in the 4059 place where an 8-bit immediate would normally go. ie. the last 4060 byte of the instruction. */ 4061 obufp = obuf + strlen (obuf); 4062 mnemonic = Suffix3DNow[*codep++ & 0xff]; 4063 if (mnemonic) 4064 oappend (mnemonic); 4065 else 4066 { 4067 /* Since a variable sized modrm/sib chunk is between the start 4068 of the opcode (0x0f0f) and the opcode suffix, we need to do 4069 all the modrm processing first, and don't know until now that 4070 we have a bad opcode. This necessitates some cleaning up. */ 4071 op1out[0] = '\0'; 4072 op2out[0] = '\0'; 4073 BadOp (); 4074 } 4075 } 4076 4077 static const char *simd_cmp_op[] = { 4078 "eq", 4079 "lt", 4080 "le", 4081 "unord", 4082 "neq", 4083 "nlt", 4084 "nle", 4085 "ord" 4086 }; 4087 4088 static void 4089 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4090 { 4091 unsigned int cmp_type; 4092 4093 FETCH_DATA (the_info, codep + 1); 4094 obufp = obuf + strlen (obuf); 4095 cmp_type = *codep++ & 0xff; 4096 if (cmp_type < 8) 4097 { 4098 char suffix1 = 'p', suffix2 = 's'; 4099 used_prefixes |= (prefixes & PREFIX_REPZ); 4100 if (prefixes & PREFIX_REPZ) 4101 suffix1 = 's'; 4102 else 4103 { 4104 used_prefixes |= (prefixes & PREFIX_DATA); 4105 if (prefixes & PREFIX_DATA) 4106 suffix2 = 'd'; 4107 else 4108 { 4109 used_prefixes |= (prefixes & PREFIX_REPNZ); 4110 if (prefixes & PREFIX_REPNZ) 4111 suffix1 = 's', suffix2 = 'd'; 4112 } 4113 } 4114 sprintf (scratchbuf, "cmp%s%c%c", 4115 simd_cmp_op[cmp_type], suffix1, suffix2); 4116 used_prefixes |= (prefixes & PREFIX_REPZ); 4117 oappend (scratchbuf); 4118 } 4119 else 4120 { 4121 /* We have a bad extension byte. Clean up. */ 4122 op1out[0] = '\0'; 4123 op2out[0] = '\0'; 4124 BadOp (); 4125 } 4126 } 4127 4128 static void 4129 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED) 4130 { 4131 /* Change movlps/movhps to movhlps/movlhps for 2 register operand 4132 forms of these instructions. */ 4133 if (mod == 3) 4134 { 4135 char *p = obuf + strlen (obuf); 4136 *(p + 1) = '\0'; 4137 *p = *(p - 1); 4138 *(p - 1) = *(p - 2); 4139 *(p - 2) = *(p - 3); 4140 *(p - 3) = extrachar; 4141 } 4142 } 4143 4144 static void 4145 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 4146 { 4147 if (mod == 3 && reg == 1) 4148 { 4149 char *p = obuf + strlen (obuf); 4150 4151 /* Override "sidt". */ 4152 if (rm) 4153 { 4154 /* mwait %eax,%ecx */ 4155 strcpy (p - 4, "mwait %eax,%ecx"); 4156 } 4157 else 4158 { 4159 /* monitor %eax,%ecx,%edx" */ 4160 strcpy (p - 4, "monitor %eax,%ecx,%edx"); 4161 } 4162 4163 codep++; 4164 } 4165 else 4166 OP_E (0, sizeflag); 4167 } 4168 4169 static void 4170 INVLPG_Fixup (int bytemode, int sizeflag) 4171 { 4172 if (*codep == 0xf8) 4173 { 4174 char *p = obuf + strlen (obuf); 4175 4176 /* Override "invlpg". */ 4177 strcpy (p - 6, "swapgs"); 4178 codep++; 4179 } 4180 else 4181 OP_E (bytemode, sizeflag); 4182 } 4183 4184 static struct { 4185 unsigned char opc; 4186 char *name; 4187 } xcrypt[] = { 4188 { 0xc0, "xstore-rng" }, 4189 { 0xc8, "xcrypt-ecb" }, 4190 { 0xd0, "xcrypt-cbc" }, 4191 { 0xd8, "xcrypt-ctr" }, 4192 { 0xe0, "xcrypt-cfb" }, 4193 { 0xe8, "xcrypt-ofb" }, 4194 }; 4195 4196 static struct { 4197 unsigned char opc; 4198 char *name; 4199 } xcrypt2[] = { 4200 { 0xc0, "montmul" }, 4201 { 0xc8, "xsha1" }, 4202 { 0xd0, "xsha256" }, 4203 }; 4204 4205 static void 4206 OP_xcrypt (bytemode, sizeflag) 4207 int bytemode ATTRIBUTE_UNUSED; 4208 int sizeflag ATTRIBUTE_UNUSED; 4209 { 4210 const char *mnemonic = NULL; 4211 unsigned int i; 4212 4213 FETCH_DATA (the_info, codep + 1); 4214 /* VIA C3 xcrypt-* & xmove-* instructions are specified by an opcode 4215 suffix in the place where an 8-bit immediate would normally go. 4216 ie. the last byte of the instruction. */ 4217 obufp = obuf + strlen(obuf); 4218 4219 for (i = 0; i < sizeof(xcrypt) / sizeof(xcrypt[0]); i++) 4220 if (xcrypt[i].opc == (*codep & 0xff)) 4221 mnemonic = xcrypt[i].name; 4222 codep++; 4223 if (mnemonic) 4224 oappend (mnemonic); 4225 else 4226 BadOp(); 4227 } 4228 4229 static void 4230 OP_xcrypt2 (bytemode, sizeflag) 4231 int bytemode ATTRIBUTE_UNUSED; 4232 int sizeflag ATTRIBUTE_UNUSED; 4233 { 4234 const char *mnemonic = NULL; 4235 unsigned int i; 4236 4237 FETCH_DATA (the_info, codep + 1); 4238 /* VIA C3 xcrypt2 instructions are specified by an opcode 4239 suffix in the place where an 8-bit immediate would normally go. 4240 ie. the last byte of the instruction. */ 4241 obufp = obuf + strlen(obuf); 4242 4243 for (i = 0; i < sizeof(xcrypt2) / sizeof(xcrypt2[0]); i++) 4244 if (xcrypt2[i].opc == (*codep & 0xff)) 4245 mnemonic = xcrypt2[i].name; 4246 codep++; 4247 if (mnemonic) 4248 oappend (mnemonic); 4249 else 4250 BadOp(); 4251 } 4252 4253 static void 4254 BadOp (void) 4255 { 4256 /* Throw away prefixes and 1st. opcode byte. */ 4257 codep = insn_codep + 1; 4258 oappend ("(bad)"); 4259 } 4260