1 /* CPU data header for ip2k. 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. 6 7 This file is part of the GNU Binutils and/or GDB, the GNU debugger. 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2, or (at your option) 12 any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License along 20 with this program; if not, write to the Free Software Foundation, Inc., 21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 22 23 */ 24 25 #ifndef IP2K_CPU_H 26 #define IP2K_CPU_H 27 28 #define CGEN_ARCH ip2k 29 30 /* Given symbol S, return ip2k_cgen_<S>. */ 31 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 32 #define CGEN_SYM(s) ip2k##_cgen_##s 33 #else 34 #define CGEN_SYM(s) ip2k/**/_cgen_/**/s 35 #endif 36 37 38 /* Selected cpu families. */ 39 #define HAVE_CPU_IP2KBF 40 41 #define CGEN_INSN_LSB0_P 1 42 43 /* Minimum size of any insn (in bytes). */ 44 #define CGEN_MIN_INSN_SIZE 2 45 46 /* Maximum size of any insn (in bytes). */ 47 #define CGEN_MAX_INSN_SIZE 2 48 49 #define CGEN_INT_INSN_P 1 50 51 /* Maximum number of syntax elements in an instruction. */ 52 #define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 12 53 54 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands. 55 e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands 56 we can't hash on everything up to the space. */ 57 #define CGEN_MNEMONIC_OPERANDS 58 59 /* Maximum number of fields in an instruction. */ 60 #define CGEN_ACTUAL_MAX_IFMT_OPERANDS 3 61 62 /* Enums. */ 63 64 /* Enum declaration for op6 enums. */ 65 typedef enum insn_op6 { 66 OP6_OTHER1, OP6_OTHER2, OP6_SUB, OP6_DEC 67 , OP6_OR, OP6_AND, OP6_XOR, OP6_ADD 68 , OP6_TEST, OP6_NOT, OP6_INC, OP6_DECSZ 69 , OP6_RR, OP6_RL, OP6_SWAP, OP6_INCSZ 70 , OP6_CSE, OP6_POP, OP6_SUBC, OP6_DECSNZ 71 , OP6_MULU, OP6_MULS, OP6_INCSNZ, OP6_ADDC 72 } INSN_OP6; 73 74 /* Enum declaration for dir enums. */ 75 typedef enum insn_dir { 76 DIR_TO_W, DIR_NOTTO_W 77 } INSN_DIR; 78 79 /* Enum declaration for op4 enums. */ 80 typedef enum insn_op4 { 81 OP4_LITERAL = 7, OP4_CLRB = 8, OP4_SETB = 9, OP4_SNB = 10 82 , OP4_SB = 11 83 } INSN_OP4; 84 85 /* Enum declaration for op4mid enums. */ 86 typedef enum insn_op4mid { 87 OP4MID_LOADH_L = 0, OP4MID_LOADL_L = 1, OP4MID_MULU_L = 2, OP4MID_MULS_L = 3 88 , OP4MID_PUSH_L = 4, OP4MID_CSNE_L = 6, OP4MID_CSE_L = 7, OP4MID_RETW_L = 8 89 , OP4MID_CMP_L = 9, OP4MID_SUB_L = 10, OP4MID_ADD_L = 11, OP4MID_MOV_L = 12 90 , OP4MID_OR_L = 13, OP4MID_AND_L = 14, OP4MID_XOR_L = 15 91 } INSN_OP4MID; 92 93 /* Enum declaration for op3 enums. */ 94 typedef enum insn_op3 { 95 OP3_CALL = 6, OP3_JMP = 7 96 } INSN_OP3; 97 98 /* Enum declaration for . */ 99 typedef enum register_names { 100 H_REGISTERS_ADDRSEL = 2, H_REGISTERS_ADDRX = 3, H_REGISTERS_IPH = 4, H_REGISTERS_IPL = 5 101 , H_REGISTERS_SPH = 6, H_REGISTERS_SPL = 7, H_REGISTERS_PCH = 8, H_REGISTERS_PCL = 9 102 , H_REGISTERS_WREG = 10, H_REGISTERS_STATUS = 11, H_REGISTERS_DPH = 12, H_REGISTERS_DPL = 13 103 , H_REGISTERS_SPDREG = 14, H_REGISTERS_MULH = 15, H_REGISTERS_ADDRH = 16, H_REGISTERS_ADDRL = 17 104 , H_REGISTERS_DATAH = 18, H_REGISTERS_DATAL = 19, H_REGISTERS_INTVECH = 20, H_REGISTERS_INTVECL = 21 105 , H_REGISTERS_INTSPD = 22, H_REGISTERS_INTF = 23, H_REGISTERS_INTE = 24, H_REGISTERS_INTED = 25 106 , H_REGISTERS_FCFG = 26, H_REGISTERS_TCTRL = 27, H_REGISTERS_XCFG = 28, H_REGISTERS_EMCFG = 29 107 , H_REGISTERS_IPCH = 30, H_REGISTERS_IPCL = 31, H_REGISTERS_RAIN = 32, H_REGISTERS_RAOUT = 33 108 , H_REGISTERS_RADIR = 34, H_REGISTERS_LFSRH = 35, H_REGISTERS_RBIN = 36, H_REGISTERS_RBOUT = 37 109 , H_REGISTERS_RBDIR = 38, H_REGISTERS_LFSRL = 39, H_REGISTERS_RCIN = 40, H_REGISTERS_RCOUT = 41 110 , H_REGISTERS_RCDIR = 42, H_REGISTERS_LFSRA = 43, H_REGISTERS_RDIN = 44, H_REGISTERS_RDOUT = 45 111 , H_REGISTERS_RDDIR = 46, H_REGISTERS_REIN = 48, H_REGISTERS_REOUT = 49, H_REGISTERS_REDIR = 50 112 , H_REGISTERS_RFIN = 52, H_REGISTERS_RFOUT = 53, H_REGISTERS_RFDIR = 54, H_REGISTERS_RGOUT = 57 113 , H_REGISTERS_RGDIR = 58, H_REGISTERS_RTTMR = 64, H_REGISTERS_RTCFG = 65, H_REGISTERS_T0TMR = 66 114 , H_REGISTERS_T0CFG = 67, H_REGISTERS_T1CNTH = 68, H_REGISTERS_T1CNTL = 69, H_REGISTERS_T1CAP1H = 70 115 , H_REGISTERS_T1CAP1L = 71, H_REGISTERS_T1CAP2H = 72, H_REGISTERS_T1CMP2H = 72, H_REGISTERS_T1CAP2L = 73 116 , H_REGISTERS_T1CMP2L = 73, H_REGISTERS_T1CMP1H = 74, H_REGISTERS_T1CMP1L = 75, H_REGISTERS_T1CFG1H = 76 117 , H_REGISTERS_T1CFG1L = 77, H_REGISTERS_T1CFG2H = 78, H_REGISTERS_T1CFG2L = 79, H_REGISTERS_ADCH = 80 118 , H_REGISTERS_ADCL = 81, H_REGISTERS_ADCCFG = 82, H_REGISTERS_ADCTMR = 83, H_REGISTERS_T2CNTH = 84 119 , H_REGISTERS_T2CNTL = 85, H_REGISTERS_T2CAP1H = 86, H_REGISTERS_T2CAP1L = 87, H_REGISTERS_T2CAP2H = 88 120 , H_REGISTERS_T2CMP2H = 88, H_REGISTERS_T2CAP2L = 89, H_REGISTERS_T2CMP2L = 89, H_REGISTERS_T2CMP1H = 90 121 , H_REGISTERS_T2CMP1L = 91, H_REGISTERS_T2CFG1H = 92, H_REGISTERS_T2CFG1L = 93, H_REGISTERS_T2CFG2H = 94 122 , H_REGISTERS_T2CFG2L = 95, H_REGISTERS_S1TMRH = 96, H_REGISTERS_S1TMRL = 97, H_REGISTERS_S1TBUFH = 98 123 , H_REGISTERS_S1TBUFL = 99, H_REGISTERS_S1TCFG = 100, H_REGISTERS_S1RCNT = 101, H_REGISTERS_S1RBUFH = 102 124 , H_REGISTERS_S1RBUFL = 103, H_REGISTERS_S1RCFG = 104, H_REGISTERS_S1RSYNC = 105, H_REGISTERS_S1INTF = 106 125 , H_REGISTERS_S1INTE = 107, H_REGISTERS_S1MODE = 108, H_REGISTERS_S1SMASK = 109, H_REGISTERS_PSPCFG = 110 126 , H_REGISTERS_CMPCFG = 111, H_REGISTERS_S2TMRH = 112, H_REGISTERS_S2TMRL = 113, H_REGISTERS_S2TBUFH = 114 127 , H_REGISTERS_S2TBUFL = 115, H_REGISTERS_S2TCFG = 116, H_REGISTERS_S2RCNT = 117, H_REGISTERS_S2RBUFH = 118 128 , H_REGISTERS_S2RBUFL = 119, H_REGISTERS_S2RCFG = 120, H_REGISTERS_S2RSYNC = 121, H_REGISTERS_S2INTF = 122 129 , H_REGISTERS_S2INTE = 123, H_REGISTERS_S2MODE = 124, H_REGISTERS_S2SMASK = 125, H_REGISTERS_CALLH = 126 130 , H_REGISTERS_CALLL = 127 131 } REGISTER_NAMES; 132 133 /* Attributes. */ 134 135 /* Enum declaration for machine type selection. */ 136 typedef enum mach_attr { 137 MACH_BASE, MACH_IP2022, MACH_IP2022EXT, MACH_MAX 138 } MACH_ATTR; 139 140 /* Enum declaration for instruction set selection. */ 141 typedef enum isa_attr { 142 ISA_IP2K, ISA_MAX 143 } ISA_ATTR; 144 145 /* Number of architecture variants. */ 146 #define MAX_ISAS 1 147 #define MAX_MACHS ((int) MACH_MAX) 148 149 /* Ifield support. */ 150 151 extern const struct cgen_ifld ip2k_cgen_ifld_table[]; 152 153 /* Ifield attribute indices. */ 154 155 /* Enum declaration for cgen_ifld attrs. */ 156 typedef enum cgen_ifld_attr { 157 CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED 158 , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31 159 , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS 160 } CGEN_IFLD_ATTR; 161 162 /* Number of non-boolean elements in cgen_ifld_attr. */ 163 #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1) 164 165 /* Enum declaration for ip2k ifield types. */ 166 typedef enum ifield_type { 167 IP2K_F_NIL, IP2K_F_ANYOF, IP2K_F_IMM8, IP2K_F_REG 168 , IP2K_F_ADDR16CJP, IP2K_F_DIR, IP2K_F_BITNO, IP2K_F_OP3 169 , IP2K_F_OP4, IP2K_F_OP4MID, IP2K_F_OP6, IP2K_F_OP8 170 , IP2K_F_OP6_10LOW, IP2K_F_OP6_7LOW, IP2K_F_RETI3, IP2K_F_SKIPB 171 , IP2K_F_PAGE3, IP2K_F_MAX 172 } IFIELD_TYPE; 173 174 #define MAX_IFLD ((int) IP2K_F_MAX) 175 176 /* Hardware attribute indices. */ 177 178 /* Enum declaration for cgen_hw attrs. */ 179 typedef enum cgen_hw_attr { 180 CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE 181 , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS 182 } CGEN_HW_ATTR; 183 184 /* Number of non-boolean elements in cgen_hw_attr. */ 185 #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1) 186 187 /* Enum declaration for ip2k hardware types. */ 188 typedef enum cgen_hw_type { 189 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR 190 , HW_H_IADDR, HW_H_SPR, HW_H_REGISTERS, HW_H_STACK 191 , HW_H_PABITS, HW_H_ZBIT, HW_H_CBIT, HW_H_DCBIT 192 , HW_H_PC, HW_MAX 193 } CGEN_HW_TYPE; 194 195 #define MAX_HW ((int) HW_MAX) 196 197 /* Operand attribute indices. */ 198 199 /* Enum declaration for cgen_operand attrs. */ 200 typedef enum cgen_operand_attr { 201 CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT 202 , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY 203 , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS 204 } CGEN_OPERAND_ATTR; 205 206 /* Number of non-boolean elements in cgen_operand_attr. */ 207 #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1) 208 209 /* Enum declaration for ip2k operand types. */ 210 typedef enum cgen_operand_type { 211 IP2K_OPERAND_PC, IP2K_OPERAND_ADDR16CJP, IP2K_OPERAND_FR, IP2K_OPERAND_LIT8 212 , IP2K_OPERAND_BITNO, IP2K_OPERAND_ADDR16P, IP2K_OPERAND_ADDR16H, IP2K_OPERAND_ADDR16L 213 , IP2K_OPERAND_RETI3, IP2K_OPERAND_PABITS, IP2K_OPERAND_ZBIT, IP2K_OPERAND_CBIT 214 , IP2K_OPERAND_DCBIT, IP2K_OPERAND_MAX 215 } CGEN_OPERAND_TYPE; 216 217 /* Number of operands types. */ 218 #define MAX_OPERANDS 13 219 220 /* Maximum number of operands referenced by any insn. */ 221 #define MAX_OPERAND_INSTANCES 8 222 223 /* Insn attribute indices. */ 224 225 /* Enum declaration for cgen_insn attrs. */ 226 typedef enum cgen_insn_attr { 227 CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI 228 , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED 229 , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_EXT_SKIP_INSN, CGEN_INSN_SKIPA 230 , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS 231 } CGEN_INSN_ATTR; 232 233 /* Number of non-boolean elements in cgen_insn_attr. */ 234 #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1) 235 236 /* cgen.h uses things we just defined. */ 237 #include "opcode/cgen.h" 238 239 /* Attributes. */ 240 extern const CGEN_ATTR_TABLE ip2k_cgen_hardware_attr_table[]; 241 extern const CGEN_ATTR_TABLE ip2k_cgen_ifield_attr_table[]; 242 extern const CGEN_ATTR_TABLE ip2k_cgen_operand_attr_table[]; 243 extern const CGEN_ATTR_TABLE ip2k_cgen_insn_attr_table[]; 244 245 /* Hardware decls. */ 246 247 248 249 250 251 #endif /* IP2K_CPU_H */ 252