1*c87b03e5Sespie@c Copyright (C) 1988, 1989, 1992, 1994, 1997, 1998, 1999, 2000, 2001, 2002, 2003 2*c87b03e5Sespie@c Free Software Foundation, Inc. 3*c87b03e5Sespie@c This is part of the GCC manual. 4*c87b03e5Sespie@c For copying conditions, see the file gcc.texi. 5*c87b03e5Sespie 6*c87b03e5Sespie@node RTL 7*c87b03e5Sespie@chapter RTL Representation 8*c87b03e5Sespie@cindex RTL representation 9*c87b03e5Sespie@cindex representation of RTL 10*c87b03e5Sespie@cindex Register Transfer Language (RTL) 11*c87b03e5Sespie 12*c87b03e5SespieMost of the work of the compiler is done on an intermediate representation 13*c87b03e5Sespiecalled register transfer language. In this language, the instructions to be 14*c87b03e5Sespieoutput are described, pretty much one by one, in an algebraic form that 15*c87b03e5Sespiedescribes what the instruction does. 16*c87b03e5Sespie 17*c87b03e5SespieRTL is inspired by Lisp lists. It has both an internal form, made up of 18*c87b03e5Sespiestructures that point at other structures, and a textual form that is used 19*c87b03e5Sespiein the machine description and in printed debugging dumps. The textual 20*c87b03e5Sespieform uses nested parentheses to indicate the pointers in the internal form. 21*c87b03e5Sespie 22*c87b03e5Sespie@menu 23*c87b03e5Sespie* RTL Objects:: Expressions vs vectors vs strings vs integers. 24*c87b03e5Sespie* RTL Classes:: Categories of RTL expression objects, and their structure. 25*c87b03e5Sespie* Accessors:: Macros to access expression operands or vector elts. 26*c87b03e5Sespie* Flags:: Other flags in an RTL expression. 27*c87b03e5Sespie* Machine Modes:: Describing the size and format of a datum. 28*c87b03e5Sespie* Constants:: Expressions with constant values. 29*c87b03e5Sespie* Regs and Memory:: Expressions representing register contents or memory. 30*c87b03e5Sespie* Arithmetic:: Expressions representing arithmetic on other expressions. 31*c87b03e5Sespie* Comparisons:: Expressions representing comparison of expressions. 32*c87b03e5Sespie* Bit-Fields:: Expressions representing bit-fields in memory or reg. 33*c87b03e5Sespie* Vector Operations:: Expressions involving vector datatypes. 34*c87b03e5Sespie* Conversions:: Extending, truncating, floating or fixing. 35*c87b03e5Sespie* RTL Declarations:: Declaring volatility, constancy, etc. 36*c87b03e5Sespie* Side Effects:: Expressions for storing in registers, etc. 37*c87b03e5Sespie* Incdec:: Embedded side-effects for autoincrement addressing. 38*c87b03e5Sespie* Assembler:: Representing @code{asm} with operands. 39*c87b03e5Sespie* Insns:: Expression types for entire insns. 40*c87b03e5Sespie* Calls:: RTL representation of function call insns. 41*c87b03e5Sespie* Sharing:: Some expressions are unique; others *must* be copied. 42*c87b03e5Sespie* Reading RTL:: Reading textual RTL from a file. 43*c87b03e5Sespie@end menu 44*c87b03e5Sespie 45*c87b03e5Sespie@node RTL Objects 46*c87b03e5Sespie@section RTL Object Types 47*c87b03e5Sespie@cindex RTL object types 48*c87b03e5Sespie 49*c87b03e5Sespie@cindex RTL integers 50*c87b03e5Sespie@cindex RTL strings 51*c87b03e5Sespie@cindex RTL vectors 52*c87b03e5Sespie@cindex RTL expression 53*c87b03e5Sespie@cindex RTX (See RTL) 54*c87b03e5SespieRTL uses five kinds of objects: expressions, integers, wide integers, 55*c87b03e5Sespiestrings and vectors. Expressions are the most important ones. An RTL 56*c87b03e5Sespieexpression (``RTX'', for short) is a C structure, but it is usually 57*c87b03e5Sespiereferred to with a pointer; a type that is given the typedef name 58*c87b03e5Sespie@code{rtx}. 59*c87b03e5Sespie 60*c87b03e5SespieAn integer is simply an @code{int}; their written form uses decimal 61*c87b03e5Sespiedigits. A wide integer is an integral object whose type is 62*c87b03e5Sespie@code{HOST_WIDE_INT}; their written form uses decimal digits. 63*c87b03e5Sespie 64*c87b03e5SespieA string is a sequence of characters. In core it is represented as a 65*c87b03e5Sespie@code{char *} in usual C fashion, and it is written in C syntax as well. 66*c87b03e5SespieHowever, strings in RTL may never be null. If you write an empty string in 67*c87b03e5Sespiea machine description, it is represented in core as a null pointer rather 68*c87b03e5Sespiethan as a pointer to a null character. In certain contexts, these null 69*c87b03e5Sespiepointers instead of strings are valid. Within RTL code, strings are most 70*c87b03e5Sespiecommonly found inside @code{symbol_ref} expressions, but they appear in 71*c87b03e5Sespieother contexts in the RTL expressions that make up machine descriptions. 72*c87b03e5Sespie 73*c87b03e5SespieIn a machine description, strings are normally written with double 74*c87b03e5Sespiequotes, as you would in C. However, strings in machine descriptions may 75*c87b03e5Sespieextend over many lines, which is invalid C, and adjacent string 76*c87b03e5Sespieconstants are not concatenated as they are in C. Any string constant 77*c87b03e5Sespiemay be surrounded with a single set of parentheses. Sometimes this 78*c87b03e5Sespiemakes the machine description easier to read. 79*c87b03e5Sespie 80*c87b03e5SespieThere is also a special syntax for strings, which can be useful when C 81*c87b03e5Sespiecode is embedded in a machine description. Wherever a string can 82*c87b03e5Sespieappear, it is also valid to write a C-style brace block. The entire 83*c87b03e5Sespiebrace block, including the outermost pair of braces, is considered to be 84*c87b03e5Sespiethe string constant. Double quote characters inside the braces are not 85*c87b03e5Sespiespecial. Therefore, if you write string constants in the C code, you 86*c87b03e5Sespieneed not escape each quote character with a backslash. 87*c87b03e5Sespie 88*c87b03e5SespieA vector contains an arbitrary number of pointers to expressions. The 89*c87b03e5Sespienumber of elements in the vector is explicitly present in the vector. 90*c87b03e5SespieThe written form of a vector consists of square brackets 91*c87b03e5Sespie(@samp{[@dots{}]}) surrounding the elements, in sequence and with 92*c87b03e5Sespiewhitespace separating them. Vectors of length zero are not created; 93*c87b03e5Sespienull pointers are used instead. 94*c87b03e5Sespie 95*c87b03e5Sespie@cindex expression codes 96*c87b03e5Sespie@cindex codes, RTL expression 97*c87b03e5Sespie@findex GET_CODE 98*c87b03e5Sespie@findex PUT_CODE 99*c87b03e5SespieExpressions are classified by @dfn{expression codes} (also called RTX 100*c87b03e5Sespiecodes). The expression code is a name defined in @file{rtl.def}, which is 101*c87b03e5Sespiealso (in upper case) a C enumeration constant. The possible expression 102*c87b03e5Sespiecodes and their meanings are machine-independent. The code of an RTX can 103*c87b03e5Sespiebe extracted with the macro @code{GET_CODE (@var{x})} and altered with 104*c87b03e5Sespie@code{PUT_CODE (@var{x}, @var{newcode})}. 105*c87b03e5Sespie 106*c87b03e5SespieThe expression code determines how many operands the expression contains, 107*c87b03e5Sespieand what kinds of objects they are. In RTL, unlike Lisp, you cannot tell 108*c87b03e5Sespieby looking at an operand what kind of object it is. Instead, you must know 109*c87b03e5Sespiefrom its context---from the expression code of the containing expression. 110*c87b03e5SespieFor example, in an expression of code @code{subreg}, the first operand is 111*c87b03e5Sespieto be regarded as an expression and the second operand as an integer. In 112*c87b03e5Sespiean expression of code @code{plus}, there are two operands, both of which 113*c87b03e5Sespieare to be regarded as expressions. In a @code{symbol_ref} expression, 114*c87b03e5Sespiethere is one operand, which is to be regarded as a string. 115*c87b03e5Sespie 116*c87b03e5SespieExpressions are written as parentheses containing the name of the 117*c87b03e5Sespieexpression type, its flags and machine mode if any, and then the operands 118*c87b03e5Sespieof the expression (separated by spaces). 119*c87b03e5Sespie 120*c87b03e5SespieExpression code names in the @samp{md} file are written in lower case, 121*c87b03e5Sespiebut when they appear in C code they are written in upper case. In this 122*c87b03e5Sespiemanual, they are shown as follows: @code{const_int}. 123*c87b03e5Sespie 124*c87b03e5Sespie@cindex (nil) 125*c87b03e5Sespie@cindex nil 126*c87b03e5SespieIn a few contexts a null pointer is valid where an expression is normally 127*c87b03e5Sespiewanted. The written form of this is @code{(nil)}. 128*c87b03e5Sespie 129*c87b03e5Sespie@node RTL Classes 130*c87b03e5Sespie@section RTL Classes and Formats 131*c87b03e5Sespie@cindex RTL classes 132*c87b03e5Sespie@cindex classes of RTX codes 133*c87b03e5Sespie@cindex RTX codes, classes of 134*c87b03e5Sespie@findex GET_RTX_CLASS 135*c87b03e5Sespie 136*c87b03e5SespieThe various expression codes are divided into several @dfn{classes}, 137*c87b03e5Sespiewhich are represented by single characters. You can determine the class 138*c87b03e5Sespieof an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}. 139*c87b03e5SespieCurrently, @file{rtx.def} defines these classes: 140*c87b03e5Sespie 141*c87b03e5Sespie@table @code 142*c87b03e5Sespie@item o 143*c87b03e5SespieAn RTX code that represents an actual object, such as a register 144*c87b03e5Sespie(@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}). 145*c87b03e5SespieConstants and basic transforms on objects (@code{ADDRESSOF}, 146*c87b03e5Sespie@code{HIGH}, @code{LO_SUM}) are also included. Note that @code{SUBREG} 147*c87b03e5Sespieand @code{STRICT_LOW_PART} are not in this class, but in class @code{x}. 148*c87b03e5Sespie 149*c87b03e5Sespie@item < 150*c87b03e5SespieAn RTX code for a comparison, such as @code{NE} or @code{LT}. 151*c87b03e5Sespie 152*c87b03e5Sespie@item 1 153*c87b03e5SespieAn RTX code for a unary arithmetic operation, such as @code{NEG}, 154*c87b03e5Sespie@code{NOT}, or @code{ABS}. This category also includes value extension 155*c87b03e5Sespie(sign or zero) and conversions between integer and floating point. 156*c87b03e5Sespie 157*c87b03e5Sespie@item c 158*c87b03e5SespieAn RTX code for a commutative binary operation, such as @code{PLUS} or 159*c87b03e5Sespie@code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class 160*c87b03e5Sespie@code{<}. 161*c87b03e5Sespie 162*c87b03e5Sespie@item 2 163*c87b03e5SespieAn RTX code for a non-commutative binary operation, such as @code{MINUS}, 164*c87b03e5Sespie@code{DIV}, or @code{ASHIFTRT}. 165*c87b03e5Sespie 166*c87b03e5Sespie@item b 167*c87b03e5SespieAn RTX code for a bit-field operation. Currently only 168*c87b03e5Sespie@code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs 169*c87b03e5Sespieand are lvalues (so they can be used for insertion as well). 170*c87b03e5Sespie@xref{Bit-Fields}. 171*c87b03e5Sespie 172*c87b03e5Sespie@item 3 173*c87b03e5SespieAn RTX code for other three input operations. Currently only 174*c87b03e5Sespie@code{IF_THEN_ELSE}. 175*c87b03e5Sespie 176*c87b03e5Sespie@item i 177*c87b03e5SespieAn RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and 178*c87b03e5Sespie@code{CALL_INSN}. @xref{Insns}. 179*c87b03e5Sespie 180*c87b03e5Sespie@item m 181*c87b03e5SespieAn RTX code for something that matches in insns, such as 182*c87b03e5Sespie@code{MATCH_DUP}. These only occur in machine descriptions. 183*c87b03e5Sespie 184*c87b03e5Sespie@item a 185*c87b03e5SespieAn RTX code for an auto-increment addressing mode, such as 186*c87b03e5Sespie@code{POST_INC}. 187*c87b03e5Sespie 188*c87b03e5Sespie@item x 189*c87b03e5SespieAll other RTX codes. This category includes the remaining codes used 190*c87b03e5Sespieonly in machine descriptions (@code{DEFINE_*}, etc.). It also includes 191*c87b03e5Sespieall the codes describing side effects (@code{SET}, @code{USE}, 192*c87b03e5Sespie@code{CLOBBER}, etc.) and the non-insns that may appear on an insn 193*c87b03e5Sespiechain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}. 194*c87b03e5Sespie@end table 195*c87b03e5Sespie 196*c87b03e5Sespie@cindex RTL format 197*c87b03e5SespieFor each expression code, @file{rtl.def} specifies the number of 198*c87b03e5Sespiecontained objects and their kinds using a sequence of characters 199*c87b03e5Sespiecalled the @dfn{format} of the expression code. For example, 200*c87b03e5Sespiethe format of @code{subreg} is @samp{ei}. 201*c87b03e5Sespie 202*c87b03e5Sespie@cindex RTL format characters 203*c87b03e5SespieThese are the most commonly used format characters: 204*c87b03e5Sespie 205*c87b03e5Sespie@table @code 206*c87b03e5Sespie@item e 207*c87b03e5SespieAn expression (actually a pointer to an expression). 208*c87b03e5Sespie 209*c87b03e5Sespie@item i 210*c87b03e5SespieAn integer. 211*c87b03e5Sespie 212*c87b03e5Sespie@item w 213*c87b03e5SespieA wide integer. 214*c87b03e5Sespie 215*c87b03e5Sespie@item s 216*c87b03e5SespieA string. 217*c87b03e5Sespie 218*c87b03e5Sespie@item E 219*c87b03e5SespieA vector of expressions. 220*c87b03e5Sespie@end table 221*c87b03e5Sespie 222*c87b03e5SespieA few other format characters are used occasionally: 223*c87b03e5Sespie 224*c87b03e5Sespie@table @code 225*c87b03e5Sespie@item u 226*c87b03e5Sespie@samp{u} is equivalent to @samp{e} except that it is printed differently 227*c87b03e5Sespiein debugging dumps. It is used for pointers to insns. 228*c87b03e5Sespie 229*c87b03e5Sespie@item n 230*c87b03e5Sespie@samp{n} is equivalent to @samp{i} except that it is printed differently 231*c87b03e5Sespiein debugging dumps. It is used for the line number or code number of a 232*c87b03e5Sespie@code{note} insn. 233*c87b03e5Sespie 234*c87b03e5Sespie@item S 235*c87b03e5Sespie@samp{S} indicates a string which is optional. In the RTL objects in 236*c87b03e5Sespiecore, @samp{S} is equivalent to @samp{s}, but when the object is read, 237*c87b03e5Sespiefrom an @samp{md} file, the string value of this operand may be omitted. 238*c87b03e5SespieAn omitted string is taken to be the null string. 239*c87b03e5Sespie 240*c87b03e5Sespie@item V 241*c87b03e5Sespie@samp{V} indicates a vector which is optional. In the RTL objects in 242*c87b03e5Sespiecore, @samp{V} is equivalent to @samp{E}, but when the object is read 243*c87b03e5Sespiefrom an @samp{md} file, the vector value of this operand may be omitted. 244*c87b03e5SespieAn omitted vector is effectively the same as a vector of no elements. 245*c87b03e5Sespie 246*c87b03e5Sespie@item B 247*c87b03e5Sespie@samp{B} indicates a pointer to basic block structure. 248*c87b03e5Sespie 249*c87b03e5Sespie@item 0 250*c87b03e5Sespie@samp{0} means a slot whose contents do not fit any normal category. 251*c87b03e5Sespie@samp{0} slots are not printed at all in dumps, and are often used in 252*c87b03e5Sespiespecial ways by small parts of the compiler. 253*c87b03e5Sespie@end table 254*c87b03e5Sespie 255*c87b03e5SespieThere are macros to get the number of operands and the format 256*c87b03e5Sespieof an expression code: 257*c87b03e5Sespie 258*c87b03e5Sespie@table @code 259*c87b03e5Sespie@findex GET_RTX_LENGTH 260*c87b03e5Sespie@item GET_RTX_LENGTH (@var{code}) 261*c87b03e5SespieNumber of operands of an RTX of code @var{code}. 262*c87b03e5Sespie 263*c87b03e5Sespie@findex GET_RTX_FORMAT 264*c87b03e5Sespie@item GET_RTX_FORMAT (@var{code}) 265*c87b03e5SespieThe format of an RTX of code @var{code}, as a C string. 266*c87b03e5Sespie@end table 267*c87b03e5Sespie 268*c87b03e5SespieSome classes of RTX codes always have the same format. For example, it 269*c87b03e5Sespieis safe to assume that all comparison operations have format @code{ee}. 270*c87b03e5Sespie 271*c87b03e5Sespie@table @code 272*c87b03e5Sespie@item 1 273*c87b03e5SespieAll codes of this class have format @code{e}. 274*c87b03e5Sespie 275*c87b03e5Sespie@item < 276*c87b03e5Sespie@itemx c 277*c87b03e5Sespie@itemx 2 278*c87b03e5SespieAll codes of these classes have format @code{ee}. 279*c87b03e5Sespie 280*c87b03e5Sespie@item b 281*c87b03e5Sespie@itemx 3 282*c87b03e5SespieAll codes of these classes have format @code{eee}. 283*c87b03e5Sespie 284*c87b03e5Sespie@item i 285*c87b03e5SespieAll codes of this class have formats that begin with @code{iuueiee}. 286*c87b03e5Sespie@xref{Insns}. Note that not all RTL objects linked onto an insn chain 287*c87b03e5Sespieare of class @code{i}. 288*c87b03e5Sespie 289*c87b03e5Sespie@item o 290*c87b03e5Sespie@itemx m 291*c87b03e5Sespie@itemx x 292*c87b03e5SespieYou can make no assumptions about the format of these codes. 293*c87b03e5Sespie@end table 294*c87b03e5Sespie 295*c87b03e5Sespie@node Accessors 296*c87b03e5Sespie@section Access to Operands 297*c87b03e5Sespie@cindex accessors 298*c87b03e5Sespie@cindex access to operands 299*c87b03e5Sespie@cindex operand access 300*c87b03e5Sespie 301*c87b03e5Sespie@findex XEXP 302*c87b03e5Sespie@findex XINT 303*c87b03e5Sespie@findex XWINT 304*c87b03e5Sespie@findex XSTR 305*c87b03e5SespieOperands of expressions are accessed using the macros @code{XEXP}, 306*c87b03e5Sespie@code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes 307*c87b03e5Sespietwo arguments: an expression-pointer (RTX) and an operand number 308*c87b03e5Sespie(counting from zero). Thus, 309*c87b03e5Sespie 310*c87b03e5Sespie@example 311*c87b03e5SespieXEXP (@var{x}, 2) 312*c87b03e5Sespie@end example 313*c87b03e5Sespie 314*c87b03e5Sespie@noindent 315*c87b03e5Sespieaccesses operand 2 of expression @var{x}, as an expression. 316*c87b03e5Sespie 317*c87b03e5Sespie@example 318*c87b03e5SespieXINT (@var{x}, 2) 319*c87b03e5Sespie@end example 320*c87b03e5Sespie 321*c87b03e5Sespie@noindent 322*c87b03e5Sespieaccesses the same operand as an integer. @code{XSTR}, used in the same 323*c87b03e5Sespiefashion, would access it as a string. 324*c87b03e5Sespie 325*c87b03e5SespieAny operand can be accessed as an integer, as an expression or as a string. 326*c87b03e5SespieYou must choose the correct method of access for the kind of value actually 327*c87b03e5Sespiestored in the operand. You would do this based on the expression code of 328*c87b03e5Sespiethe containing expression. That is also how you would know how many 329*c87b03e5Sespieoperands there are. 330*c87b03e5Sespie 331*c87b03e5SespieFor example, if @var{x} is a @code{subreg} expression, you know that it has 332*c87b03e5Sespietwo operands which can be correctly accessed as @code{XEXP (@var{x}, 0)} 333*c87b03e5Sespieand @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you 334*c87b03e5Sespiewould get the address of the expression operand but cast as an integer; 335*c87b03e5Sespiethat might occasionally be useful, but it would be cleaner to write 336*c87b03e5Sespie@code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also 337*c87b03e5Sespiecompile without error, and would return the second, integer operand cast as 338*c87b03e5Sespiean expression pointer, which would probably result in a crash when 339*c87b03e5Sespieaccessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either, 340*c87b03e5Sespiebut this will access memory past the end of the expression with 341*c87b03e5Sespieunpredictable results. 342*c87b03e5Sespie 343*c87b03e5SespieAccess to operands which are vectors is more complicated. You can use the 344*c87b03e5Sespiemacro @code{XVEC} to get the vector-pointer itself, or the macros 345*c87b03e5Sespie@code{XVECEXP} and @code{XVECLEN} to access the elements and length of a 346*c87b03e5Sespievector. 347*c87b03e5Sespie 348*c87b03e5Sespie@table @code 349*c87b03e5Sespie@findex XVEC 350*c87b03e5Sespie@item XVEC (@var{exp}, @var{idx}) 351*c87b03e5SespieAccess the vector-pointer which is operand number @var{idx} in @var{exp}. 352*c87b03e5Sespie 353*c87b03e5Sespie@findex XVECLEN 354*c87b03e5Sespie@item XVECLEN (@var{exp}, @var{idx}) 355*c87b03e5SespieAccess the length (number of elements) in the vector which is 356*c87b03e5Sespiein operand number @var{idx} in @var{exp}. This value is an @code{int}. 357*c87b03e5Sespie 358*c87b03e5Sespie@findex XVECEXP 359*c87b03e5Sespie@item XVECEXP (@var{exp}, @var{idx}, @var{eltnum}) 360*c87b03e5SespieAccess element number @var{eltnum} in the vector which is 361*c87b03e5Sespiein operand number @var{idx} in @var{exp}. This value is an RTX@. 362*c87b03e5Sespie 363*c87b03e5SespieIt is up to you to make sure that @var{eltnum} is not negative 364*c87b03e5Sespieand is less than @code{XVECLEN (@var{exp}, @var{idx})}. 365*c87b03e5Sespie@end table 366*c87b03e5Sespie 367*c87b03e5SespieAll the macros defined in this section expand into lvalues and therefore 368*c87b03e5Sespiecan be used to assign the operands, lengths and vector elements as well as 369*c87b03e5Sespieto access them. 370*c87b03e5Sespie 371*c87b03e5Sespie@node Flags 372*c87b03e5Sespie@section Flags in an RTL Expression 373*c87b03e5Sespie@cindex flags in RTL expression 374*c87b03e5Sespie 375*c87b03e5SespieRTL expressions contain several flags (one-bit bit-fields) 376*c87b03e5Sespiethat are used in certain types of expression. Most often they 377*c87b03e5Sespieare accessed with the following macros, which expand into lvalues. 378*c87b03e5Sespie 379*c87b03e5Sespie@table @code 380*c87b03e5Sespie@findex CONSTANT_POOL_ADDRESS_P 381*c87b03e5Sespie@cindex @code{symbol_ref} and @samp{/u} 382*c87b03e5Sespie@cindex @code{unchanging}, in @code{symbol_ref} 383*c87b03e5Sespie@item CONSTANT_POOL_ADDRESS_P (@var{x}) 384*c87b03e5SespieNonzero in a @code{symbol_ref} if it refers to part of the current 385*c87b03e5Sespiefunction's constant pool. For most targets these addresses are in a 386*c87b03e5Sespie@code{.rodata} section entirely separate from the function, but for 387*c87b03e5Sespiesome targets the addresses are close to the beginning of the function. 388*c87b03e5SespieIn either case GCC assumes these addresses can be addressed directly, 389*c87b03e5Sespieperhaps with the help of base registers. 390*c87b03e5SespieStored in the @code{unchanging} field and printed as @samp{/u}. 391*c87b03e5Sespie 392*c87b03e5Sespie@findex CONST_OR_PURE_CALL_P 393*c87b03e5Sespie@cindex @code{call_insn} and @samp{/u} 394*c87b03e5Sespie@cindex @code{unchanging}, in @code{call_insn} 395*c87b03e5Sespie@item CONST_OR_PURE_CALL_P (@var{x}) 396*c87b03e5SespieIn a @code{call_insn}, @code{note}, or an @code{expr_list} for notes, 397*c87b03e5Sespieindicates that the insn represents a call to a const or pure function. 398*c87b03e5SespieStored in the @code{unchanging} field and printed as @samp{/u}. 399*c87b03e5Sespie 400*c87b03e5Sespie@findex INSN_ANNULLED_BRANCH_P 401*c87b03e5Sespie@cindex @code{jump_insn} and @samp{/u} 402*c87b03e5Sespie@cindex @code{call_insn} and @samp{/u} 403*c87b03e5Sespie@cindex @code{insn} and @samp{/u} 404*c87b03e5Sespie@cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn} 405*c87b03e5Sespie@item INSN_ANNULLED_BRANCH_P (@var{x}) 406*c87b03e5SespieIn a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates 407*c87b03e5Sespiethat the branch is an annulling one. See the discussion under 408*c87b03e5Sespie@code{sequence} below. Stored in the @code{unchanging} field and 409*c87b03e5Sespieprinted as @samp{/u}. 410*c87b03e5Sespie 411*c87b03e5Sespie@findex INSN_DEAD_CODE_P 412*c87b03e5Sespie@cindex @code{insn} and @samp{/s} 413*c87b03e5Sespie@cindex @code{in_struct}, in @code{insn} 414*c87b03e5Sespie@item INSN_DEAD_CODE_P (@var{x}) 415*c87b03e5SespieIn an @code{insn} during the dead-code elimination pass, nonzero if the 416*c87b03e5Sespieinsn is dead. 417*c87b03e5SespieStored in the @code{in_struct} field and printed as @samp{/s}. 418*c87b03e5Sespie 419*c87b03e5Sespie@findex INSN_DELETED_P 420*c87b03e5Sespie@cindex @code{insn} and @samp{/v} 421*c87b03e5Sespie@cindex @code{call_insn} and @samp{/v} 422*c87b03e5Sespie@cindex @code{jump_insn} and @samp{/v} 423*c87b03e5Sespie@cindex @code{code_label} and @samp{/v} 424*c87b03e5Sespie@cindex @code{barrier} and @samp{/v} 425*c87b03e5Sespie@cindex @code{note} and @samp{/v} 426*c87b03e5Sespie@cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{barrier}, and @code{note} 427*c87b03e5Sespie@item INSN_DELETED_P (@var{x}) 428*c87b03e5SespieIn an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, 429*c87b03e5Sespie@code{barrier}, or @code{note}, 430*c87b03e5Sespienonzero if the insn has been deleted. Stored in the 431*c87b03e5Sespie@code{volatil} field and printed as @samp{/v}. 432*c87b03e5Sespie 433*c87b03e5Sespie@findex INSN_FROM_TARGET_P 434*c87b03e5Sespie@cindex @code{insn} and @samp{/s} 435*c87b03e5Sespie@cindex @code{jump_insn} and @samp{/s} 436*c87b03e5Sespie@cindex @code{call_insn} and @samp{/s} 437*c87b03e5Sespie@cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn} 438*c87b03e5Sespie@item INSN_FROM_TARGET_P (@var{x}) 439*c87b03e5SespieIn an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay 440*c87b03e5Sespieslot of a branch, indicates that the insn 441*c87b03e5Sespieis from the target of the branch. If the branch insn has 442*c87b03e5Sespie@code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if 443*c87b03e5Sespiethe branch is taken. For annulled branches with 444*c87b03e5Sespie@code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the 445*c87b03e5Sespiebranch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set, 446*c87b03e5Sespiethis insn will always be executed. Stored in the @code{in_struct} 447*c87b03e5Sespiefield and printed as @samp{/s}. 448*c87b03e5Sespie 449*c87b03e5Sespie@findex LABEL_OUTSIDE_LOOP_P 450*c87b03e5Sespie@cindex @code{label_ref} and @samp{/s} 451*c87b03e5Sespie@cindex @code{in_struct}, in @code{label_ref} 452*c87b03e5Sespie@item LABEL_OUTSIDE_LOOP_P (@var{x}) 453*c87b03e5SespieIn @code{label_ref} expressions, nonzero if this is a reference to a 454*c87b03e5Sespielabel that is outside the innermost loop containing the reference to the 455*c87b03e5Sespielabel. Stored in the @code{in_struct} field and printed as @samp{/s}. 456*c87b03e5Sespie 457*c87b03e5Sespie@findex LABEL_PRESERVE_P 458*c87b03e5Sespie@cindex @code{code_label} and @samp{/i} 459*c87b03e5Sespie@cindex @code{note} and @samp{/i} 460*c87b03e5Sespie@cindex @code{in_struct}, in @code{code_label} and @code{note} 461*c87b03e5Sespie@item LABEL_PRESERVE_P (@var{x}) 462*c87b03e5SespieIn a @code{code_label} or @code{note}, indicates that the label is referenced by 463*c87b03e5Sespiecode or data not visible to the RTL of a given function. 464*c87b03e5SespieLabels referenced by a non-local goto will have this bit set. Stored 465*c87b03e5Sespiein the @code{in_struct} field and printed as @samp{/s}. 466*c87b03e5Sespie 467*c87b03e5Sespie@findex LABEL_REF_NONLOCAL_P 468*c87b03e5Sespie@cindex @code{label_ref} and @samp{/v} 469*c87b03e5Sespie@cindex @code{reg_label} and @samp{/v} 470*c87b03e5Sespie@cindex @code{volatil}, in @code{label_ref} and @code{reg_label} 471*c87b03e5Sespie@item LABEL_REF_NONLOCAL_P (@var{x}) 472*c87b03e5SespieIn @code{label_ref} and @code{reg_label} expressions, nonzero if this is 473*c87b03e5Sespiea reference to a non-local label. 474*c87b03e5SespieStored in the @code{volatil} field and printed as @samp{/v}. 475*c87b03e5Sespie 476*c87b03e5Sespie@findex MEM_IN_STRUCT_P 477*c87b03e5Sespie@cindex @code{mem} and @samp{/s} 478*c87b03e5Sespie@cindex @code{in_struct}, in @code{mem} 479*c87b03e5Sespie@item MEM_IN_STRUCT_P (@var{x}) 480*c87b03e5SespieIn @code{mem} expressions, nonzero for reference to an entire structure, 481*c87b03e5Sespieunion or array, or to a component of one. Zero for references to a 482*c87b03e5Sespiescalar variable or through a pointer to a scalar. If both this flag and 483*c87b03e5Sespie@code{MEM_SCALAR_P} are clear, then we don't know whether this @code{mem} 484*c87b03e5Sespieis in a structure or not. Both flags should never be simultaneously set. 485*c87b03e5SespieStored in the @code{in_struct} field and printed as @samp{/s}. 486*c87b03e5Sespie 487*c87b03e5Sespie@findex MEM_KEEP_ALIAS_SET_P 488*c87b03e5Sespie@cindex @code{mem} and @samp{/j} 489*c87b03e5Sespie@cindex @code{jump}, in @code{mem} 490*c87b03e5Sespie@item MEM_KEEP_ALIAS_SET_P (@var{x}) 491*c87b03e5SespieIn @code{mem} expressions, 1 if we should keep the alias set for this 492*c87b03e5Sespiemem unchanged when we access a component. Set to 1, for example, when we 493*c87b03e5Sespieare already in a non-addressable component of an aggregate. 494*c87b03e5SespieStored in the @code{jump} field and printed as @samp{/j}. 495*c87b03e5Sespie 496*c87b03e5Sespie@findex MEM_SCALAR_P 497*c87b03e5Sespie@cindex @code{mem} and @samp{/f} 498*c87b03e5Sespie@cindex @code{frame_related}, in @code{mem} 499*c87b03e5Sespie@item MEM_SCALAR_P (@var{x}) 500*c87b03e5SespieIn @code{mem} expressions, nonzero for reference to a scalar known not 501*c87b03e5Sespieto be a member of a structure, union, or array. Zero for such 502*c87b03e5Sespiereferences and for indirections through pointers, even pointers pointing 503*c87b03e5Sespieto scalar types. If both this flag and @code{MEM_IN_STRUCT_P} are clear, 504*c87b03e5Sespiethen we don't know whether this @code{mem} is in a structure or not. 505*c87b03e5SespieBoth flags should never be simultaneously set. 506*c87b03e5SespieStored in the @code{frame_related} field and printed as @samp{/f}. 507*c87b03e5Sespie 508*c87b03e5Sespie@findex MEM_VOLATILE_P 509*c87b03e5Sespie@cindex @code{mem} and @samp{/v} 510*c87b03e5Sespie@cindex @code{asm_input} and @samp{/v} 511*c87b03e5Sespie@cindex @code{asm_operands} and @samp{/v} 512*c87b03e5Sespie@cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input} 513*c87b03e5Sespie@item MEM_VOLATILE_P (@var{x}) 514*c87b03e5SespieIn @code{mem}, @code{asm_operands}, and @code{asm_input} expressions, 515*c87b03e5Sespienonzero for volatile memory references. 516*c87b03e5SespieStored in the @code{volatil} field and printed as @samp{/v}. 517*c87b03e5Sespie 518*c87b03e5Sespie@findex REG_FUNCTION_VALUE_P 519*c87b03e5Sespie@cindex @code{reg} and @samp{/i} 520*c87b03e5Sespie@cindex @code{integrated}, in @code{reg} 521*c87b03e5Sespie@item REG_FUNCTION_VALUE_P (@var{x}) 522*c87b03e5SespieNonzero in a @code{reg} if it is the place in which this function's 523*c87b03e5Sespievalue is going to be returned. (This happens only in a hard 524*c87b03e5Sespieregister.) Stored in the @code{integrated} field and printed as 525*c87b03e5Sespie@samp{/i}. 526*c87b03e5Sespie 527*c87b03e5Sespie@findex REG_LOOP_TEST_P 528*c87b03e5Sespie@cindex @code{reg} and @samp{/s} 529*c87b03e5Sespie@cindex @code{in_struct}, in @code{reg} 530*c87b03e5Sespie@item REG_LOOP_TEST_P (@var{x}) 531*c87b03e5SespieIn @code{reg} expressions, nonzero if this register's entire life is 532*c87b03e5Sespiecontained in the exit test code for some loop. Stored in the 533*c87b03e5Sespie@code{in_struct} field and printed as @samp{/s}. 534*c87b03e5Sespie 535*c87b03e5Sespie@findex REG_POINTER 536*c87b03e5Sespie@cindex @code{reg} and @samp{/f} 537*c87b03e5Sespie@cindex @code{frame_related}, in @code{reg} 538*c87b03e5Sespie@item REG_POINTER (@var{x}) 539*c87b03e5SespieNonzero in a @code{reg} if the register holds a pointer. Stored in the 540*c87b03e5Sespie@code{frame_related} field and printed as @samp{/f}. 541*c87b03e5Sespie 542*c87b03e5Sespie@findex REG_USERVAR_P 543*c87b03e5Sespie@cindex @code{reg} and @samp{/v} 544*c87b03e5Sespie@cindex @code{volatil}, in @code{reg} 545*c87b03e5Sespie@item REG_USERVAR_P (@var{x}) 546*c87b03e5SespieIn a @code{reg}, nonzero if it corresponds to a variable present in 547*c87b03e5Sespiethe user's source code. Zero for temporaries generated internally by 548*c87b03e5Sespiethe compiler. Stored in the @code{volatil} field and printed as 549*c87b03e5Sespie@samp{/v}. 550*c87b03e5Sespie 551*c87b03e5SespieThe same hard register may be used also for collecting the values of 552*c87b03e5Sespiefunctions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero 553*c87b03e5Sespiein this kind of use. 554*c87b03e5Sespie 555*c87b03e5Sespie@findex RTX_FRAME_RELATED_P 556*c87b03e5Sespie@cindex @code{insn} and @samp{/f} 557*c87b03e5Sespie@cindex @code{call_insn} and @samp{/f} 558*c87b03e5Sespie@cindex @code{jump_insn} and @samp{/f} 559*c87b03e5Sespie@cindex @code{barrier} and @samp{/f} 560*c87b03e5Sespie@cindex @code{set} and @samp{/f} 561*c87b03e5Sespie@cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set} 562*c87b03e5Sespie@item RTX_FRAME_RELATED_P (@var{x}) 563*c87b03e5SespieNonzero in an @code{insn}, @code{call_insn}, @code{jump_insn}, 564*c87b03e5Sespie@code{barrier}, or @code{set} which is part of a function prologue 565*c87b03e5Sespieand sets the stack pointer, sets the frame pointer, or saves a register. 566*c87b03e5SespieThis flag should also be set on an instruction that sets up a temporary 567*c87b03e5Sespieregister to use in place of the frame pointer. 568*c87b03e5SespieStored in the @code{frame_related} field and printed as @samp{/f}. 569*c87b03e5Sespie 570*c87b03e5SespieIn particular, on RISC targets where there are limits on the sizes of 571*c87b03e5Sespieimmediate constants, it is sometimes impossible to reach the register 572*c87b03e5Sespiesave area directly from the stack pointer. In that case, a temporary 573*c87b03e5Sespieregister is used that is near enough to the register save area, and the 574*c87b03e5SespieCanonical Frame Address, i.e., DWARF2's logical frame pointer, register 575*c87b03e5Sespiemust (temporarily) be changed to be this temporary register. So, the 576*c87b03e5Sespieinstruction that sets this temporary register must be marked as 577*c87b03e5Sespie@code{RTX_FRAME_RELATED_P}. 578*c87b03e5Sespie 579*c87b03e5SespieIf the marked instruction is overly complex (defined in terms of what 580*c87b03e5Sespie@code{dwarf2out_frame_debug_expr} can handle), you will also have to 581*c87b03e5Sespiecreate a @code{REG_FRAME_RELATED_EXPR} note and attach it to the 582*c87b03e5Sespieinstruction. This note should contain a simple expression of the 583*c87b03e5Sespiecomputation performed by this instruction, i.e., one that 584*c87b03e5Sespie@code{dwarf2out_frame_debug_expr} can handle. 585*c87b03e5Sespie 586*c87b03e5SespieThis flag is required for exception handling support on targets with RTL 587*c87b03e5Sespieprologues. 588*c87b03e5Sespie 589*c87b03e5Sespie@findex RTX_INTEGRATED_P 590*c87b03e5Sespie@cindex @code{insn} and @samp{/i} 591*c87b03e5Sespie@cindex @code{call_insn} and @samp{/i} 592*c87b03e5Sespie@cindex @code{jump_insn} and @samp{/i} 593*c87b03e5Sespie@cindex @code{barrier} and @samp{/i} 594*c87b03e5Sespie@cindex @code{code_label} and @samp{/i} 595*c87b03e5Sespie@cindex @code{insn_list} and @samp{/i} 596*c87b03e5Sespie@cindex @code{const} and @samp{/i} 597*c87b03e5Sespie@cindex @code{note} and @samp{/i} 598*c87b03e5Sespie@cindex @code{integrated}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, @code{code_label}, @code{insn_list}, @code{const}, and @code{note} 599*c87b03e5Sespie@item RTX_INTEGRATED_P (@var{x}) 600*c87b03e5SespieNonzero in an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, 601*c87b03e5Sespie@code{code_label}, @code{insn_list}, @code{const}, or @code{note} if it 602*c87b03e5Sespieresulted from an in-line function call. 603*c87b03e5SespieStored in the @code{integrated} field and printed as @samp{/i}. 604*c87b03e5Sespie 605*c87b03e5Sespie@findex RTX_UNCHANGING_P 606*c87b03e5Sespie@cindex @code{reg} and @samp{/u} 607*c87b03e5Sespie@cindex @code{mem} and @samp{/u} 608*c87b03e5Sespie@cindex @code{concat} and @samp{/u} 609*c87b03e5Sespie@cindex @code{unchanging}, in @code{reg} and @code{mem} 610*c87b03e5Sespie@item RTX_UNCHANGING_P (@var{x}) 611*c87b03e5SespieNonzero in a @code{reg}, @code{mem}, or @code{concat} if the register or 612*c87b03e5Sespiememory is set at most once, anywhere. This does not mean that it is 613*c87b03e5Sespiefunction invariant. 614*c87b03e5Sespie 615*c87b03e5SespieGCC uses this flag to determine whether two references conflict. As 616*c87b03e5Sespieimplemented by @code{true_dependence} in @file{alias.c} for memory 617*c87b03e5Sespiereferences, unchanging memory can't conflict with non-unchanging memory; 618*c87b03e5Sespiea non-unchanging read can conflict with a non-unchanging write; an 619*c87b03e5Sespieunchanging read can conflict with an unchanging write (since there may 620*c87b03e5Sespiebe a single store to this address to initialize it); and an unchanging 621*c87b03e5Sespiestore can conflict with a non-unchanging read. This means we must make 622*c87b03e5Sespieconservative assumptions when choosing the value of this flag for a 623*c87b03e5Sespiememory reference to an object containing both unchanging and 624*c87b03e5Sespienon-unchanging fields: we must set the flag when writing to the object 625*c87b03e5Sespieand clear it when reading from the object. 626*c87b03e5Sespie 627*c87b03e5SespieStored in the @code{unchanging} field and printed as @samp{/u}. 628*c87b03e5Sespie 629*c87b03e5Sespie@findex SCHED_GROUP_P 630*c87b03e5Sespie@cindex @code{insn} and @samp{/s} 631*c87b03e5Sespie@cindex @code{call_insn} and @samp{/s} 632*c87b03e5Sespie@cindex @code{jump_insn} and @samp{/s} 633*c87b03e5Sespie@cindex @code{in_struct}, in @code{insn}, @code{jump_insn} and @code{call_insn} 634*c87b03e5Sespie@item SCHED_GROUP_P (@var{x}) 635*c87b03e5SespieDuring instruction scheduling, in an @code{insn}, @code{call_insn} or 636*c87b03e5Sespie@code{jump_insn}, indicates that the 637*c87b03e5Sespieprevious insn must be scheduled together with this insn. This is used to 638*c87b03e5Sespieensure that certain groups of instructions will not be split up by the 639*c87b03e5Sespieinstruction scheduling pass, for example, @code{use} insns before 640*c87b03e5Sespiea @code{call_insn} may not be separated from the @code{call_insn}. 641*c87b03e5SespieStored in the @code{in_struct} field and printed as @samp{/s}. 642*c87b03e5Sespie 643*c87b03e5Sespie@findex SET_IS_RETURN_P 644*c87b03e5Sespie@cindex @code{insn} and @samp{/j} 645*c87b03e5Sespie@cindex @code{jump}, in @code{insn} 646*c87b03e5Sespie@item SET_IS_RETURN_P (@var{x}) 647*c87b03e5SespieFor a @code{set}, nonzero if it is for a return. 648*c87b03e5SespieStored in the @code{jump} field and printed as @samp{/j}. 649*c87b03e5Sespie 650*c87b03e5Sespie@findex SIBLING_CALL_P 651*c87b03e5Sespie@cindex @code{call_insn} and @samp{/j} 652*c87b03e5Sespie@cindex @code{jump}, in @code{call_insn} 653*c87b03e5Sespie@item SIBLING_CALL_P (@var{x}) 654*c87b03e5SespieFor a @code{call_insn}, nonzero if the insn is a sibling call. 655*c87b03e5SespieStored in the @code{jump} field and printed as @samp{/j}. 656*c87b03e5Sespie 657*c87b03e5Sespie@findex STRING_POOL_ADDRESS_P 658*c87b03e5Sespie@cindex @code{symbol_ref} and @samp{/f} 659*c87b03e5Sespie@cindex @code{frame_related}, in @code{symbol_ref} 660*c87b03e5Sespie@item STRING_POOL_ADDRESS_P (@var{x}) 661*c87b03e5SespieFor a @code{symbol_ref} expression, nonzero if it addresses this function's 662*c87b03e5Sespiestring constant pool. 663*c87b03e5SespieStored in the @code{frame_related} field and printed as @samp{/f}. 664*c87b03e5Sespie 665*c87b03e5Sespie@findex SUBREG_PROMOTED_UNSIGNED_P 666*c87b03e5Sespie@cindex @code{subreg} and @samp{/u} and @samp{/v} 667*c87b03e5Sespie@cindex @code{unchanging}, in @code{subreg} 668*c87b03e5Sespie@cindex @code{volatil}, in @code{subreg} 669*c87b03e5Sespie@item SUBREG_PROMOTED_UNSIGNED_P (@var{x}) 670*c87b03e5SespieReturns a value greater then zero for a @code{subreg} that has 671*c87b03e5Sespie@code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept 672*c87b03e5Sespiezero-extended, zero if it is kept sign-extended, and less then zero if it is 673*c87b03e5Sespieextended some other way via the @code{ptr_extend} instruction. 674*c87b03e5SespieStored in the @code{unchanging} 675*c87b03e5Sespiefield and @code{volatil} field, printed as @samp{/u} and @samp{/v}. 676*c87b03e5SespieThis macro may only be used to get the value it may not be used to change 677*c87b03e5Sespiethe value. Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value. 678*c87b03e5Sespie 679*c87b03e5Sespie@findex SUBREG_PROMOTED_UNSIGNED_SET 680*c87b03e5Sespie@cindex @code{subreg} and @samp{/u} 681*c87b03e5Sespie@cindex @code{unchanging}, in @code{subreg} 682*c87b03e5Sespie@cindex @code{volatil}, in @code{subreg} 683*c87b03e5Sespie@item SUBREG_PROMOTED_UNSIGNED_SET (@var{x}) 684*c87b03e5SespieSet the @code{unchanging} and @code{volatil} fields in a @code{subreg} 685*c87b03e5Sespieto reflect zero, sign, or other extension. If @code{volatil} is 686*c87b03e5Sespiezero, then @code{unchanging} as nonzero means zero extension and as 687*c87b03e5Sespiezero means sign extension. If @code{volatil} is nonzero then some 688*c87b03e5Sespieother type of extension was done via the @code{ptr_extend} instruction. 689*c87b03e5Sespie 690*c87b03e5Sespie@findex SUBREG_PROMOTED_VAR_P 691*c87b03e5Sespie@cindex @code{subreg} and @samp{/s} 692*c87b03e5Sespie@cindex @code{in_struct}, in @code{subreg} 693*c87b03e5Sespie@item SUBREG_PROMOTED_VAR_P (@var{x}) 694*c87b03e5SespieNonzero in a @code{subreg} if it was made when accessing an object that 695*c87b03e5Sespiewas promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine 696*c87b03e5Sespiedescription macro (@pxref{Storage Layout}). In this case, the mode of 697*c87b03e5Sespiethe @code{subreg} is the declared mode of the object and the mode of 698*c87b03e5Sespie@code{SUBREG_REG} is the mode of the register that holds the object. 699*c87b03e5SespiePromoted variables are always either sign- or zero-extended to the wider 700*c87b03e5Sespiemode on every assignment. Stored in the @code{in_struct} field and 701*c87b03e5Sespieprinted as @samp{/s}. 702*c87b03e5Sespie 703*c87b03e5Sespie@findex SYMBOL_REF_USED 704*c87b03e5Sespie@cindex @code{used}, in @code{symbol_ref} 705*c87b03e5Sespie@item SYMBOL_REF_USED (@var{x}) 706*c87b03e5SespieIn a @code{symbol_ref}, indicates that @var{x} has been used. This is 707*c87b03e5Sespienormally only used to ensure that @var{x} is only declared external 708*c87b03e5Sespieonce. Stored in the @code{used} field. 709*c87b03e5Sespie 710*c87b03e5Sespie@findex SYMBOL_REF_WEAK 711*c87b03e5Sespie@cindex @code{symbol_ref} and @samp{/i} 712*c87b03e5Sespie@cindex @code{integrated}, in @code{symbol_ref} 713*c87b03e5Sespie@item SYMBOL_REF_WEAK (@var{x}) 714*c87b03e5SespieIn a @code{symbol_ref}, indicates that @var{x} has been declared weak. 715*c87b03e5SespieStored in the @code{integrated} field and printed as @samp{/i}. 716*c87b03e5Sespie 717*c87b03e5Sespie@findex SYMBOL_REF_FLAG 718*c87b03e5Sespie@cindex @code{symbol_ref} and @samp{/v} 719*c87b03e5Sespie@cindex @code{volatil}, in @code{symbol_ref} 720*c87b03e5Sespie@item SYMBOL_REF_FLAG (@var{x}) 721*c87b03e5SespieIn a @code{symbol_ref}, this is used as a flag for machine-specific purposes. 722*c87b03e5SespieStored in the @code{volatil} field and printed as @samp{/v}. 723*c87b03e5Sespie 724*c87b03e5SespieMost uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed 725*c87b03e5Sespieby @code{SYMBOL_REF_FLAGS}. Certainly use of @code{SYMBOL_REF_FLAGS} 726*c87b03e5Sespieis mandatory if the target requires more than one bit of storage. 727*c87b03e5Sespie@end table 728*c87b03e5Sespie 729*c87b03e5SespieThese are the fields to which the above macros refer: 730*c87b03e5Sespie 731*c87b03e5Sespie@table @code 732*c87b03e5Sespie@findex call 733*c87b03e5Sespie@cindex @samp{/c} in RTL dump 734*c87b03e5Sespie@item call 735*c87b03e5SespieThis flag is currently unused. 736*c87b03e5Sespie 737*c87b03e5SespieIn an RTL dump, this flag is represented as @samp{/c}. 738*c87b03e5Sespie 739*c87b03e5Sespie@findex frame_related 740*c87b03e5Sespie@cindex @samp{/f} in RTL dump 741*c87b03e5Sespie@item frame_related 742*c87b03e5SespieIn an @code{insn} or @code{set} expression, 1 means that it is part of 743*c87b03e5Sespiea function prologue and sets the stack pointer, sets the frame pointer, 744*c87b03e5Sespiesaves a register, or sets up a temporary register to use in place of the 745*c87b03e5Sespieframe pointer. 746*c87b03e5Sespie 747*c87b03e5SespieIn @code{reg} expressions, 1 means that the register holds a pointer. 748*c87b03e5Sespie 749*c87b03e5SespieIn @code{symbol_ref} expressions, 1 means that the reference addresses 750*c87b03e5Sespiethis function's string constant pool. 751*c87b03e5Sespie 752*c87b03e5SespieIn @code{mem} expressions, 1 means that the reference is to a scalar. 753*c87b03e5Sespie 754*c87b03e5SespieIn an RTL dump, this flag is represented as @samp{/f}. 755*c87b03e5Sespie 756*c87b03e5Sespie@findex in_struct 757*c87b03e5Sespie@cindex @samp{/s} in RTL dump 758*c87b03e5Sespie@item in_struct 759*c87b03e5SespieIn @code{mem} expressions, it is 1 if the memory datum referred to is 760*c87b03e5Sespieall or part of a structure or array; 0 if it is (or might be) a scalar 761*c87b03e5Sespievariable. A reference through a C pointer has 0 because the pointer 762*c87b03e5Sespiemight point to a scalar variable. This information allows the compiler 763*c87b03e5Sespieto determine something about possible cases of aliasing. 764*c87b03e5Sespie 765*c87b03e5SespieIn @code{reg} expressions, it is 1 if the register has its entire life 766*c87b03e5Sespiecontained within the test expression of some loop. 767*c87b03e5Sespie 768*c87b03e5SespieIn @code{subreg} expressions, 1 means that the @code{subreg} is accessing 769*c87b03e5Sespiean object that has had its mode promoted from a wider mode. 770*c87b03e5Sespie 771*c87b03e5SespieIn @code{label_ref} expressions, 1 means that the referenced label is 772*c87b03e5Sespieoutside the innermost loop containing the insn in which the @code{label_ref} 773*c87b03e5Sespiewas found. 774*c87b03e5Sespie 775*c87b03e5SespieIn @code{code_label} expressions, it is 1 if the label may never be deleted. 776*c87b03e5SespieThis is used for labels which are the target of non-local gotos. Such a 777*c87b03e5Sespielabel that would have been deleted is replaced with a @code{note} of type 778*c87b03e5Sespie@code{NOTE_INSN_DELETED_LABEL}. 779*c87b03e5Sespie 780*c87b03e5SespieIn an @code{insn} during dead-code elimination, 1 means that the insn is 781*c87b03e5Sespiedead code. 782*c87b03e5Sespie 783*c87b03e5SespieIn an @code{insn} or @code{jump_insn} during reorg for an insn in the 784*c87b03e5Sespiedelay slot of a branch, 785*c87b03e5Sespie1 means that this insn is from the target of the branch. 786*c87b03e5Sespie 787*c87b03e5SespieIn an @code{insn} during instruction scheduling, 1 means that this insn 788*c87b03e5Sespiemust be scheduled as part of a group together with the previous insn. 789*c87b03e5Sespie 790*c87b03e5SespieIn an RTL dump, this flag is represented as @samp{/s}. 791*c87b03e5Sespie 792*c87b03e5Sespie@findex integrated 793*c87b03e5Sespie@cindex @samp{/i} in RTL dump 794*c87b03e5Sespie@item integrated 795*c87b03e5SespieIn an @code{insn}, @code{insn_list}, or @code{const}, 1 means the RTL was 796*c87b03e5Sespieproduced by procedure integration. 797*c87b03e5Sespie 798*c87b03e5SespieIn @code{reg} expressions, 1 means the register contains 799*c87b03e5Sespiethe value to be returned by the current function. On 800*c87b03e5Sespiemachines that pass parameters in registers, the same register number 801*c87b03e5Sespiemay be used for parameters as well, but this flag is not set on such 802*c87b03e5Sespieuses. 803*c87b03e5Sespie 804*c87b03e5SespieIn @code{symbol_ref} expressions, 1 means the referenced symbol is weak. 805*c87b03e5Sespie 806*c87b03e5SespieIn an RTL dump, this flag is represented as @samp{/i}. 807*c87b03e5Sespie 808*c87b03e5Sespie@findex jump 809*c87b03e5Sespie@cindex @samp{/j} in RTL dump 810*c87b03e5Sespie@item jump 811*c87b03e5SespieIn a @code{mem} expression, 1 means we should keep the alias set for this 812*c87b03e5Sespiemem unchanged when we access a component. 813*c87b03e5Sespie 814*c87b03e5SespieIn a @code{set}, 1 means it is for a return. 815*c87b03e5Sespie 816*c87b03e5SespieIn a @code{call_insn}, 1 means it is a sibling call. 817*c87b03e5Sespie 818*c87b03e5SespieIn an RTL dump, this flag is represented as @samp{/j}. 819*c87b03e5Sespie 820*c87b03e5Sespie@findex unchanging 821*c87b03e5Sespie@cindex @samp{/u} in RTL dump 822*c87b03e5Sespie@item unchanging 823*c87b03e5SespieIn @code{reg} and @code{mem} expressions, 1 means 824*c87b03e5Sespiethat the value of the expression never changes. 825*c87b03e5Sespie 826*c87b03e5SespieIn @code{subreg} expressions, it is 1 if the @code{subreg} references an 827*c87b03e5Sespieunsigned object whose mode has been promoted to a wider mode. 828*c87b03e5Sespie 829*c87b03e5SespieIn an @code{insn} or @code{jump_insn} in the delay slot of a branch 830*c87b03e5Sespieinstruction, 1 means an annulling branch should be used. 831*c87b03e5Sespie 832*c87b03e5SespieIn a @code{symbol_ref} expression, 1 means that this symbol addresses 833*c87b03e5Sespiesomething in the per-function constant pool. 834*c87b03e5Sespie 835*c87b03e5SespieIn a @code{call_insn}, @code{note}, or an @code{expr_list} of notes, 836*c87b03e5Sespie1 means that this instruction is a call to a const or pure function. 837*c87b03e5Sespie 838*c87b03e5SespieIn an RTL dump, this flag is represented as @samp{/u}. 839*c87b03e5Sespie 840*c87b03e5Sespie@findex used 841*c87b03e5Sespie@item used 842*c87b03e5SespieThis flag is used directly (without an access macro) at the end of RTL 843*c87b03e5Sespiegeneration for a function, to count the number of times an expression 844*c87b03e5Sespieappears in insns. Expressions that appear more than once are copied, 845*c87b03e5Sespieaccording to the rules for shared structure (@pxref{Sharing}). 846*c87b03e5Sespie 847*c87b03e5SespieFor a @code{reg}, it is used directly (without an access macro) by the 848*c87b03e5Sespieleaf register renumbering code to ensure that each register is only 849*c87b03e5Sespierenumbered once. 850*c87b03e5Sespie 851*c87b03e5SespieIn a @code{symbol_ref}, it indicates that an external declaration for 852*c87b03e5Sespiethe symbol has already been written. 853*c87b03e5Sespie 854*c87b03e5Sespie@findex volatil 855*c87b03e5Sespie@cindex @samp{/v} in RTL dump 856*c87b03e5Sespie@item volatil 857*c87b03e5Sespie@cindex volatile memory references 858*c87b03e5SespieIn a @code{mem}, @code{asm_operands}, or @code{asm_input} 859*c87b03e5Sespieexpression, it is 1 if the memory 860*c87b03e5Sespiereference is volatile. Volatile memory references may not be deleted, 861*c87b03e5Sespiereordered or combined. 862*c87b03e5Sespie 863*c87b03e5SespieIn a @code{symbol_ref} expression, it is used for machine-specific 864*c87b03e5Sespiepurposes. 865*c87b03e5Sespie 866*c87b03e5SespieIn a @code{reg} expression, it is 1 if the value is a user-level variable. 867*c87b03e5Sespie0 indicates an internal compiler temporary. 868*c87b03e5Sespie 869*c87b03e5SespieIn an @code{insn}, 1 means the insn has been deleted. 870*c87b03e5Sespie 871*c87b03e5SespieIn @code{label_ref} and @code{reg_label} expressions, 1 means a reference 872*c87b03e5Sespieto a non-local label. 873*c87b03e5Sespie 874*c87b03e5SespieIn an RTL dump, this flag is represented as @samp{/v}. 875*c87b03e5Sespie@end table 876*c87b03e5Sespie 877*c87b03e5Sespie@node Machine Modes 878*c87b03e5Sespie@section Machine Modes 879*c87b03e5Sespie@cindex machine modes 880*c87b03e5Sespie 881*c87b03e5Sespie@findex enum machine_mode 882*c87b03e5SespieA machine mode describes a size of data object and the representation used 883*c87b03e5Sespiefor it. In the C code, machine modes are represented by an enumeration 884*c87b03e5Sespietype, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL 885*c87b03e5Sespieexpression has room for a machine mode and so do certain kinds of tree 886*c87b03e5Sespieexpressions (declarations and types, to be precise). 887*c87b03e5Sespie 888*c87b03e5SespieIn debugging dumps and machine descriptions, the machine mode of an RTL 889*c87b03e5Sespieexpression is written after the expression code with a colon to separate 890*c87b03e5Sespiethem. The letters @samp{mode} which appear at the end of each machine mode 891*c87b03e5Sespiename are omitted. For example, @code{(reg:SI 38)} is a @code{reg} 892*c87b03e5Sespieexpression with machine mode @code{SImode}. If the mode is 893*c87b03e5Sespie@code{VOIDmode}, it is not written at all. 894*c87b03e5Sespie 895*c87b03e5SespieHere is a table of machine modes. The term ``byte'' below refers to an 896*c87b03e5Sespieobject of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}). 897*c87b03e5Sespie 898*c87b03e5Sespie@table @code 899*c87b03e5Sespie@findex BImode 900*c87b03e5Sespie@item BImode 901*c87b03e5Sespie``Bit'' mode represents a single bit, for predicate registers. 902*c87b03e5Sespie 903*c87b03e5Sespie@findex QImode 904*c87b03e5Sespie@item QImode 905*c87b03e5Sespie``Quarter-Integer'' mode represents a single byte treated as an integer. 906*c87b03e5Sespie 907*c87b03e5Sespie@findex HImode 908*c87b03e5Sespie@item HImode 909*c87b03e5Sespie``Half-Integer'' mode represents a two-byte integer. 910*c87b03e5Sespie 911*c87b03e5Sespie@findex PSImode 912*c87b03e5Sespie@item PSImode 913*c87b03e5Sespie``Partial Single Integer'' mode represents an integer which occupies 914*c87b03e5Sespiefour bytes but which doesn't really use all four. On some machines, 915*c87b03e5Sespiethis is the right mode to use for pointers. 916*c87b03e5Sespie 917*c87b03e5Sespie@findex SImode 918*c87b03e5Sespie@item SImode 919*c87b03e5Sespie``Single Integer'' mode represents a four-byte integer. 920*c87b03e5Sespie 921*c87b03e5Sespie@findex PDImode 922*c87b03e5Sespie@item PDImode 923*c87b03e5Sespie``Partial Double Integer'' mode represents an integer which occupies 924*c87b03e5Sespieeight bytes but which doesn't really use all eight. On some machines, 925*c87b03e5Sespiethis is the right mode to use for certain pointers. 926*c87b03e5Sespie 927*c87b03e5Sespie@findex DImode 928*c87b03e5Sespie@item DImode 929*c87b03e5Sespie``Double Integer'' mode represents an eight-byte integer. 930*c87b03e5Sespie 931*c87b03e5Sespie@findex TImode 932*c87b03e5Sespie@item TImode 933*c87b03e5Sespie``Tetra Integer'' (?) mode represents a sixteen-byte integer. 934*c87b03e5Sespie 935*c87b03e5Sespie@findex OImode 936*c87b03e5Sespie@item OImode 937*c87b03e5Sespie``Octa Integer'' (?) mode represents a thirty-two-byte integer. 938*c87b03e5Sespie 939*c87b03e5Sespie@findex QFmode 940*c87b03e5Sespie@item QFmode 941*c87b03e5Sespie``Quarter-Floating'' mode represents a quarter-precision (single byte) 942*c87b03e5Sespiefloating point number. 943*c87b03e5Sespie 944*c87b03e5Sespie@findex HFmode 945*c87b03e5Sespie@item HFmode 946*c87b03e5Sespie``Half-Floating'' mode represents a half-precision (two byte) floating 947*c87b03e5Sespiepoint number. 948*c87b03e5Sespie 949*c87b03e5Sespie@findex TQFmode 950*c87b03e5Sespie@item TQFmode 951*c87b03e5Sespie``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision 952*c87b03e5Sespie(three byte) floating point number. 953*c87b03e5Sespie 954*c87b03e5Sespie@findex SFmode 955*c87b03e5Sespie@item SFmode 956*c87b03e5Sespie``Single Floating'' mode represents a four byte floating point number. 957*c87b03e5SespieIn the common case, of a processor with IEEE arithmetic and 8-bit bytes, 958*c87b03e5Sespiethis is a single-precision IEEE floating point number; it can also be 959*c87b03e5Sespieused for double-precision (on processors with 16-bit bytes) and 960*c87b03e5Sespiesingle-precision VAX and IBM types. 961*c87b03e5Sespie 962*c87b03e5Sespie@findex DFmode 963*c87b03e5Sespie@item DFmode 964*c87b03e5Sespie``Double Floating'' mode represents an eight byte floating point number. 965*c87b03e5SespieIn the common case, of a processor with IEEE arithmetic and 8-bit bytes, 966*c87b03e5Sespiethis is a double-precision IEEE floating point number. 967*c87b03e5Sespie 968*c87b03e5Sespie@findex XFmode 969*c87b03e5Sespie@item XFmode 970*c87b03e5Sespie``Extended Floating'' mode represents a twelve byte floating point 971*c87b03e5Sespienumber. This mode is used for IEEE extended floating point. On some 972*c87b03e5Sespiesystems not all bits within these bytes will actually be used. 973*c87b03e5Sespie 974*c87b03e5Sespie@findex TFmode 975*c87b03e5Sespie@item TFmode 976*c87b03e5Sespie``Tetra Floating'' mode represents a sixteen byte floating point number. 977*c87b03e5SespieThis gets used for both the 96-bit extended IEEE floating-point types 978*c87b03e5Sespiepadded to 128 bits, and true 128-bit extended IEEE floating-point types. 979*c87b03e5Sespie 980*c87b03e5Sespie@findex CCmode 981*c87b03e5Sespie@item CCmode 982*c87b03e5Sespie``Condition Code'' mode represents the value of a condition code, which 983*c87b03e5Sespieis a machine-specific set of bits used to represent the result of a 984*c87b03e5Sespiecomparison operation. Other machine-specific modes may also be used for 985*c87b03e5Sespiethe condition code. These modes are not used on machines that use 986*c87b03e5Sespie@code{cc0} (see @pxref{Condition Code}). 987*c87b03e5Sespie 988*c87b03e5Sespie@findex BLKmode 989*c87b03e5Sespie@item BLKmode 990*c87b03e5Sespie``Block'' mode represents values that are aggregates to which none of 991*c87b03e5Sespiethe other modes apply. In RTL, only memory references can have this mode, 992*c87b03e5Sespieand only if they appear in string-move or vector instructions. On machines 993*c87b03e5Sespiewhich have no such instructions, @code{BLKmode} will not appear in RTL@. 994*c87b03e5Sespie 995*c87b03e5Sespie@findex VOIDmode 996*c87b03e5Sespie@item VOIDmode 997*c87b03e5SespieVoid mode means the absence of a mode or an unspecified mode. 998*c87b03e5SespieFor example, RTL expressions of code @code{const_int} have mode 999*c87b03e5Sespie@code{VOIDmode} because they can be taken to have whatever mode the context 1000*c87b03e5Sespierequires. In debugging dumps of RTL, @code{VOIDmode} is expressed by 1001*c87b03e5Sespiethe absence of any mode. 1002*c87b03e5Sespie 1003*c87b03e5Sespie@findex QCmode 1004*c87b03e5Sespie@findex HCmode 1005*c87b03e5Sespie@findex SCmode 1006*c87b03e5Sespie@findex DCmode 1007*c87b03e5Sespie@findex XCmode 1008*c87b03e5Sespie@findex TCmode 1009*c87b03e5Sespie@item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode 1010*c87b03e5SespieThese modes stand for a complex number represented as a pair of floating 1011*c87b03e5Sespiepoint values. The floating point values are in @code{QFmode}, 1012*c87b03e5Sespie@code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and 1013*c87b03e5Sespie@code{TFmode}, respectively. 1014*c87b03e5Sespie 1015*c87b03e5Sespie@findex CQImode 1016*c87b03e5Sespie@findex CHImode 1017*c87b03e5Sespie@findex CSImode 1018*c87b03e5Sespie@findex CDImode 1019*c87b03e5Sespie@findex CTImode 1020*c87b03e5Sespie@findex COImode 1021*c87b03e5Sespie@item CQImode, CHImode, CSImode, CDImode, CTImode, COImode 1022*c87b03e5SespieThese modes stand for a complex number represented as a pair of integer 1023*c87b03e5Sespievalues. The integer values are in @code{QImode}, @code{HImode}, 1024*c87b03e5Sespie@code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode}, 1025*c87b03e5Sespierespectively. 1026*c87b03e5Sespie@end table 1027*c87b03e5Sespie 1028*c87b03e5SespieThe machine description defines @code{Pmode} as a C macro which expands 1029*c87b03e5Sespieinto the machine mode used for addresses. Normally this is the mode 1030*c87b03e5Sespiewhose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines. 1031*c87b03e5Sespie 1032*c87b03e5SespieThe only modes which a machine description @i{must} support are 1033*c87b03e5Sespie@code{QImode}, and the modes corresponding to @code{BITS_PER_WORD}, 1034*c87b03e5Sespie@code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}. 1035*c87b03e5SespieThe compiler will attempt to use @code{DImode} for 8-byte structures and 1036*c87b03e5Sespieunions, but this can be prevented by overriding the definition of 1037*c87b03e5Sespie@code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler 1038*c87b03e5Sespieuse @code{TImode} for 16-byte structures and unions. Likewise, you can 1039*c87b03e5Sespiearrange for the C type @code{short int} to avoid using @code{HImode}. 1040*c87b03e5Sespie 1041*c87b03e5Sespie@cindex mode classes 1042*c87b03e5SespieVery few explicit references to machine modes remain in the compiler and 1043*c87b03e5Sespiethese few references will soon be removed. Instead, the machine modes 1044*c87b03e5Sespieare divided into mode classes. These are represented by the enumeration 1045*c87b03e5Sespietype @code{enum mode_class} defined in @file{machmode.h}. The possible 1046*c87b03e5Sespiemode classes are: 1047*c87b03e5Sespie 1048*c87b03e5Sespie@table @code 1049*c87b03e5Sespie@findex MODE_INT 1050*c87b03e5Sespie@item MODE_INT 1051*c87b03e5SespieInteger modes. By default these are @code{BImode}, @code{QImode}, 1052*c87b03e5Sespie@code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and 1053*c87b03e5Sespie@code{OImode}. 1054*c87b03e5Sespie 1055*c87b03e5Sespie@findex MODE_PARTIAL_INT 1056*c87b03e5Sespie@item MODE_PARTIAL_INT 1057*c87b03e5SespieThe ``partial integer'' modes, @code{PQImode}, @code{PHImode}, 1058*c87b03e5Sespie@code{PSImode} and @code{PDImode}. 1059*c87b03e5Sespie 1060*c87b03e5Sespie@findex MODE_FLOAT 1061*c87b03e5Sespie@item MODE_FLOAT 1062*c87b03e5SespieFloating point modes. By default these are @code{QFmode}, 1063*c87b03e5Sespie@code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode}, 1064*c87b03e5Sespie@code{XFmode} and @code{TFmode}. 1065*c87b03e5Sespie 1066*c87b03e5Sespie@findex MODE_COMPLEX_INT 1067*c87b03e5Sespie@item MODE_COMPLEX_INT 1068*c87b03e5SespieComplex integer modes. (These are not currently implemented). 1069*c87b03e5Sespie 1070*c87b03e5Sespie@findex MODE_COMPLEX_FLOAT 1071*c87b03e5Sespie@item MODE_COMPLEX_FLOAT 1072*c87b03e5SespieComplex floating point modes. By default these are @code{QCmode}, 1073*c87b03e5Sespie@code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and 1074*c87b03e5Sespie@code{TCmode}. 1075*c87b03e5Sespie 1076*c87b03e5Sespie@findex MODE_FUNCTION 1077*c87b03e5Sespie@item MODE_FUNCTION 1078*c87b03e5SespieAlgol or Pascal function variables including a static chain. 1079*c87b03e5Sespie(These are not currently implemented). 1080*c87b03e5Sespie 1081*c87b03e5Sespie@findex MODE_CC 1082*c87b03e5Sespie@item MODE_CC 1083*c87b03e5SespieModes representing condition code values. These are @code{CCmode} plus 1084*c87b03e5Sespieany modes listed in the @code{EXTRA_CC_MODES} macro. @xref{Jump Patterns}, 1085*c87b03e5Sespiealso see @ref{Condition Code}. 1086*c87b03e5Sespie 1087*c87b03e5Sespie@findex MODE_RANDOM 1088*c87b03e5Sespie@item MODE_RANDOM 1089*c87b03e5SespieThis is a catchall mode class for modes which don't fit into the above 1090*c87b03e5Sespieclasses. Currently @code{VOIDmode} and @code{BLKmode} are in 1091*c87b03e5Sespie@code{MODE_RANDOM}. 1092*c87b03e5Sespie@end table 1093*c87b03e5Sespie 1094*c87b03e5SespieHere are some C macros that relate to machine modes: 1095*c87b03e5Sespie 1096*c87b03e5Sespie@table @code 1097*c87b03e5Sespie@findex GET_MODE 1098*c87b03e5Sespie@item GET_MODE (@var{x}) 1099*c87b03e5SespieReturns the machine mode of the RTX @var{x}. 1100*c87b03e5Sespie 1101*c87b03e5Sespie@findex PUT_MODE 1102*c87b03e5Sespie@item PUT_MODE (@var{x}, @var{newmode}) 1103*c87b03e5SespieAlters the machine mode of the RTX @var{x} to be @var{newmode}. 1104*c87b03e5Sespie 1105*c87b03e5Sespie@findex NUM_MACHINE_MODES 1106*c87b03e5Sespie@item NUM_MACHINE_MODES 1107*c87b03e5SespieStands for the number of machine modes available on the target 1108*c87b03e5Sespiemachine. This is one greater than the largest numeric value of any 1109*c87b03e5Sespiemachine mode. 1110*c87b03e5Sespie 1111*c87b03e5Sespie@findex GET_MODE_NAME 1112*c87b03e5Sespie@item GET_MODE_NAME (@var{m}) 1113*c87b03e5SespieReturns the name of mode @var{m} as a string. 1114*c87b03e5Sespie 1115*c87b03e5Sespie@findex GET_MODE_CLASS 1116*c87b03e5Sespie@item GET_MODE_CLASS (@var{m}) 1117*c87b03e5SespieReturns the mode class of mode @var{m}. 1118*c87b03e5Sespie 1119*c87b03e5Sespie@findex GET_MODE_WIDER_MODE 1120*c87b03e5Sespie@item GET_MODE_WIDER_MODE (@var{m}) 1121*c87b03e5SespieReturns the next wider natural mode. For example, the expression 1122*c87b03e5Sespie@code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}. 1123*c87b03e5Sespie 1124*c87b03e5Sespie@findex GET_MODE_SIZE 1125*c87b03e5Sespie@item GET_MODE_SIZE (@var{m}) 1126*c87b03e5SespieReturns the size in bytes of a datum of mode @var{m}. 1127*c87b03e5Sespie 1128*c87b03e5Sespie@findex GET_MODE_BITSIZE 1129*c87b03e5Sespie@item GET_MODE_BITSIZE (@var{m}) 1130*c87b03e5SespieReturns the size in bits of a datum of mode @var{m}. 1131*c87b03e5Sespie 1132*c87b03e5Sespie@findex GET_MODE_MASK 1133*c87b03e5Sespie@item GET_MODE_MASK (@var{m}) 1134*c87b03e5SespieReturns a bitmask containing 1 for all bits in a word that fit within 1135*c87b03e5Sespiemode @var{m}. This macro can only be used for modes whose bitsize is 1136*c87b03e5Sespieless than or equal to @code{HOST_BITS_PER_INT}. 1137*c87b03e5Sespie 1138*c87b03e5Sespie@findex GET_MODE_ALIGNMENT 1139*c87b03e5Sespie@item GET_MODE_ALIGNMENT (@var{m}) 1140*c87b03e5SespieReturn the required alignment, in bits, for an object of mode @var{m}. 1141*c87b03e5Sespie 1142*c87b03e5Sespie@findex GET_MODE_UNIT_SIZE 1143*c87b03e5Sespie@item GET_MODE_UNIT_SIZE (@var{m}) 1144*c87b03e5SespieReturns the size in bytes of the subunits of a datum of mode @var{m}. 1145*c87b03e5SespieThis is the same as @code{GET_MODE_SIZE} except in the case of complex 1146*c87b03e5Sespiemodes. For them, the unit size is the size of the real or imaginary 1147*c87b03e5Sespiepart. 1148*c87b03e5Sespie 1149*c87b03e5Sespie@findex GET_MODE_NUNITS 1150*c87b03e5Sespie@item GET_MODE_NUNITS (@var{m}) 1151*c87b03e5SespieReturns the number of units contained in a mode, i.e., 1152*c87b03e5Sespie@code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}. 1153*c87b03e5Sespie 1154*c87b03e5Sespie@findex GET_CLASS_NARROWEST_MODE 1155*c87b03e5Sespie@item GET_CLASS_NARROWEST_MODE (@var{c}) 1156*c87b03e5SespieReturns the narrowest mode in mode class @var{c}. 1157*c87b03e5Sespie@end table 1158*c87b03e5Sespie 1159*c87b03e5Sespie@findex byte_mode 1160*c87b03e5Sespie@findex word_mode 1161*c87b03e5SespieThe global variables @code{byte_mode} and @code{word_mode} contain modes 1162*c87b03e5Sespiewhose classes are @code{MODE_INT} and whose bitsizes are either 1163*c87b03e5Sespie@code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit 1164*c87b03e5Sespiemachines, these are @code{QImode} and @code{SImode}, respectively. 1165*c87b03e5Sespie 1166*c87b03e5Sespie@node Constants 1167*c87b03e5Sespie@section Constant Expression Types 1168*c87b03e5Sespie@cindex RTL constants 1169*c87b03e5Sespie@cindex RTL constant expression types 1170*c87b03e5Sespie 1171*c87b03e5SespieThe simplest RTL expressions are those that represent constant values. 1172*c87b03e5Sespie 1173*c87b03e5Sespie@table @code 1174*c87b03e5Sespie@findex const_int 1175*c87b03e5Sespie@item (const_int @var{i}) 1176*c87b03e5SespieThis type of expression represents the integer value @var{i}. @var{i} 1177*c87b03e5Sespieis customarily accessed with the macro @code{INTVAL} as in 1178*c87b03e5Sespie@code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}. 1179*c87b03e5Sespie 1180*c87b03e5Sespie@findex const0_rtx 1181*c87b03e5Sespie@findex const1_rtx 1182*c87b03e5Sespie@findex const2_rtx 1183*c87b03e5Sespie@findex constm1_rtx 1184*c87b03e5SespieThere is only one expression object for the integer value zero; it is 1185*c87b03e5Sespiethe value of the variable @code{const0_rtx}. Likewise, the only 1186*c87b03e5Sespieexpression for integer value one is found in @code{const1_rtx}, the only 1187*c87b03e5Sespieexpression for integer value two is found in @code{const2_rtx}, and the 1188*c87b03e5Sespieonly expression for integer value negative one is found in 1189*c87b03e5Sespie@code{constm1_rtx}. Any attempt to create an expression of code 1190*c87b03e5Sespie@code{const_int} and value zero, one, two or negative one will return 1191*c87b03e5Sespie@code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or 1192*c87b03e5Sespie@code{constm1_rtx} as appropriate. 1193*c87b03e5Sespie 1194*c87b03e5Sespie@findex const_true_rtx 1195*c87b03e5SespieSimilarly, there is only one object for the integer whose value is 1196*c87b03e5Sespie@code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If 1197*c87b03e5Sespie@code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and 1198*c87b03e5Sespie@code{const1_rtx} will point to the same object. If 1199*c87b03e5Sespie@code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and 1200*c87b03e5Sespie@code{constm1_rtx} will point to the same object. 1201*c87b03e5Sespie 1202*c87b03e5Sespie@findex const_double 1203*c87b03e5Sespie@item (const_double:@var{m} @var{addr} @var{i0} @var{i1} @dots{}) 1204*c87b03e5SespieRepresents either a floating-point constant of mode @var{m} or an 1205*c87b03e5Sespieinteger constant too large to fit into @code{HOST_BITS_PER_WIDE_INT} 1206*c87b03e5Sespiebits but small enough to fit within twice that number of bits (GCC 1207*c87b03e5Sespiedoes not provide a mechanism to represent even larger constants). In 1208*c87b03e5Sespiethe latter case, @var{m} will be @code{VOIDmode}. 1209*c87b03e5Sespie 1210*c87b03e5Sespie@findex const_vector 1211*c87b03e5Sespie@item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}]) 1212*c87b03e5SespieRepresents a vector constant. The square brackets stand for the vector 1213*c87b03e5Sespiecontaining the constant elements. @var{x0}, @var{x1} and so on are 1214*c87b03e5Sespiethe @code{const_int} or @code{const_double} elements. 1215*c87b03e5Sespie 1216*c87b03e5SespieThe number of units in a @code{const_vector} is obtained with the macro 1217*c87b03e5Sespie@code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}. 1218*c87b03e5Sespie 1219*c87b03e5SespieIndividual elements in a vector constant are accessed with the macro 1220*c87b03e5Sespie@code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})} 1221*c87b03e5Sespiewhere @var{v} is the vector constant and @var{n} is the element 1222*c87b03e5Sespiedesired. 1223*c87b03e5Sespie 1224*c87b03e5Sespie@findex CONST_DOUBLE_MEM 1225*c87b03e5Sespie@findex CONST_DOUBLE_CHAIN 1226*c87b03e5Sespie@var{addr} is used to contain the @code{mem} expression that corresponds 1227*c87b03e5Sespieto the location in memory that at which the constant can be found. If 1228*c87b03e5Sespieit has not been allocated a memory location, but is on the chain of all 1229*c87b03e5Sespie@code{const_double} expressions in this compilation (maintained using an 1230*c87b03e5Sespieundisplayed field), @var{addr} contains @code{const0_rtx}. If it is not 1231*c87b03e5Sespieon the chain, @var{addr} contains @code{cc0_rtx}. @var{addr} is 1232*c87b03e5Sespiecustomarily accessed with the macro @code{CONST_DOUBLE_MEM} and the 1233*c87b03e5Sespiechain field via @code{CONST_DOUBLE_CHAIN}. 1234*c87b03e5Sespie 1235*c87b03e5Sespie@findex CONST_DOUBLE_LOW 1236*c87b03e5SespieIf @var{m} is @code{VOIDmode}, the bits of the value are stored in 1237*c87b03e5Sespie@var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro 1238*c87b03e5Sespie@code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}. 1239*c87b03e5Sespie 1240*c87b03e5SespieIf the constant is floating point (regardless of its precision), then 1241*c87b03e5Sespiethe number of integers used to store the value depends on the size of 1242*c87b03e5Sespie@code{REAL_VALUE_TYPE} (@pxref{Floating Point}). The integers 1243*c87b03e5Sespierepresent a floating point number, but not precisely in the target 1244*c87b03e5Sespiemachine's or host machine's floating point format. To convert them to 1245*c87b03e5Sespiethe precise bit pattern used by the target machine, use the macro 1246*c87b03e5Sespie@code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}). 1247*c87b03e5Sespie 1248*c87b03e5Sespie@findex CONST0_RTX 1249*c87b03e5Sespie@findex CONST1_RTX 1250*c87b03e5Sespie@findex CONST2_RTX 1251*c87b03e5SespieThe macro @code{CONST0_RTX (@var{mode})} refers to an expression with 1252*c87b03e5Sespievalue 0 in mode @var{mode}. If mode @var{mode} is of mode class 1253*c87b03e5Sespie@code{MODE_INT}, it returns @code{const0_rtx}. If mode @var{mode} is of 1254*c87b03e5Sespiemode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE} 1255*c87b03e5Sespieexpression in mode @var{mode}. Otherwise, it returns a 1256*c87b03e5Sespie@code{CONST_VECTOR} expression in mode @var{mode}. Similarly, the macro 1257*c87b03e5Sespie@code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in 1258*c87b03e5Sespiemode @var{mode} and similarly for @code{CONST2_RTX}. The 1259*c87b03e5Sespie@code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined 1260*c87b03e5Sespiefor vector modes. 1261*c87b03e5Sespie 1262*c87b03e5Sespie@findex const_string 1263*c87b03e5Sespie@item (const_string @var{str}) 1264*c87b03e5SespieRepresents a constant string with value @var{str}. Currently this is 1265*c87b03e5Sespieused only for insn attributes (@pxref{Insn Attributes}) since constant 1266*c87b03e5Sespiestrings in C are placed in memory. 1267*c87b03e5Sespie 1268*c87b03e5Sespie@findex symbol_ref 1269*c87b03e5Sespie@item (symbol_ref:@var{mode} @var{symbol}) 1270*c87b03e5SespieRepresents the value of an assembler label for data. @var{symbol} is 1271*c87b03e5Sespiea string that describes the name of the assembler label. If it starts 1272*c87b03e5Sespiewith a @samp{*}, the label is the rest of @var{symbol} not including 1273*c87b03e5Sespiethe @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed 1274*c87b03e5Sespiewith @samp{_}. 1275*c87b03e5Sespie 1276*c87b03e5SespieThe @code{symbol_ref} contains a mode, which is usually @code{Pmode}. 1277*c87b03e5SespieUsually that is the only mode for which a symbol is directly valid. 1278*c87b03e5Sespie 1279*c87b03e5Sespie@findex label_ref 1280*c87b03e5Sespie@item (label_ref @var{label}) 1281*c87b03e5SespieRepresents the value of an assembler label for code. It contains one 1282*c87b03e5Sespieoperand, an expression, which must be a @code{code_label} or a @code{note} 1283*c87b03e5Sespieof type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction 1284*c87b03e5Sespiesequence to identify the place where the label should go. 1285*c87b03e5Sespie 1286*c87b03e5SespieThe reason for using a distinct expression type for code label 1287*c87b03e5Sespiereferences is so that jump optimization can distinguish them. 1288*c87b03e5Sespie 1289*c87b03e5Sespie@item (const:@var{m} @var{exp}) 1290*c87b03e5SespieRepresents a constant that is the result of an assembly-time 1291*c87b03e5Sespiearithmetic computation. The operand, @var{exp}, is an expression that 1292*c87b03e5Sespiecontains only constants (@code{const_int}, @code{symbol_ref} and 1293*c87b03e5Sespie@code{label_ref} expressions) combined with @code{plus} and 1294*c87b03e5Sespie@code{minus}. However, not all combinations are valid, since the 1295*c87b03e5Sespieassembler cannot do arbitrary arithmetic on relocatable symbols. 1296*c87b03e5Sespie 1297*c87b03e5Sespie@var{m} should be @code{Pmode}. 1298*c87b03e5Sespie 1299*c87b03e5Sespie@findex high 1300*c87b03e5Sespie@item (high:@var{m} @var{exp}) 1301*c87b03e5SespieRepresents the high-order bits of @var{exp}, usually a 1302*c87b03e5Sespie@code{symbol_ref}. The number of bits is machine-dependent and is 1303*c87b03e5Sespienormally the number of bits specified in an instruction that initializes 1304*c87b03e5Sespiethe high order bits of a register. It is used with @code{lo_sum} to 1305*c87b03e5Sespierepresent the typical two-instruction sequence used in RISC machines to 1306*c87b03e5Sespiereference a global memory location. 1307*c87b03e5Sespie 1308*c87b03e5Sespie@var{m} should be @code{Pmode}. 1309*c87b03e5Sespie@end table 1310*c87b03e5Sespie 1311*c87b03e5Sespie@node Regs and Memory 1312*c87b03e5Sespie@section Registers and Memory 1313*c87b03e5Sespie@cindex RTL register expressions 1314*c87b03e5Sespie@cindex RTL memory expressions 1315*c87b03e5Sespie 1316*c87b03e5SespieHere are the RTL expression types for describing access to machine 1317*c87b03e5Sespieregisters and to main memory. 1318*c87b03e5Sespie 1319*c87b03e5Sespie@table @code 1320*c87b03e5Sespie@findex reg 1321*c87b03e5Sespie@cindex hard registers 1322*c87b03e5Sespie@cindex pseudo registers 1323*c87b03e5Sespie@item (reg:@var{m} @var{n}) 1324*c87b03e5SespieFor small values of the integer @var{n} (those that are less than 1325*c87b03e5Sespie@code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine 1326*c87b03e5Sespieregister number @var{n}: a @dfn{hard register}. For larger values of 1327*c87b03e5Sespie@var{n}, it stands for a temporary value or @dfn{pseudo register}. 1328*c87b03e5SespieThe compiler's strategy is to generate code assuming an unlimited 1329*c87b03e5Sespienumber of such pseudo registers, and later convert them into hard 1330*c87b03e5Sespieregisters or into memory references. 1331*c87b03e5Sespie 1332*c87b03e5Sespie@var{m} is the machine mode of the reference. It is necessary because 1333*c87b03e5Sespiemachines can generally refer to each register in more than one mode. 1334*c87b03e5SespieFor example, a register may contain a full word but there may be 1335*c87b03e5Sespieinstructions to refer to it as a half word or as a single byte, as 1336*c87b03e5Sespiewell as instructions to refer to it as a floating point number of 1337*c87b03e5Sespievarious precisions. 1338*c87b03e5Sespie 1339*c87b03e5SespieEven for a register that the machine can access in only one mode, 1340*c87b03e5Sespiethe mode must always be specified. 1341*c87b03e5Sespie 1342*c87b03e5SespieThe symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine 1343*c87b03e5Sespiedescription, since the number of hard registers on the machine is an 1344*c87b03e5Sespieinvariant characteristic of the machine. Note, however, that not 1345*c87b03e5Sespieall of the machine registers must be general registers. All the 1346*c87b03e5Sespiemachine registers that can be used for storage of data are given 1347*c87b03e5Sespiehard register numbers, even those that can be used only in certain 1348*c87b03e5Sespieinstructions or can hold only certain types of data. 1349*c87b03e5Sespie 1350*c87b03e5SespieA hard register may be accessed in various modes throughout one 1351*c87b03e5Sespiefunction, but each pseudo register is given a natural mode 1352*c87b03e5Sespieand is accessed only in that mode. When it is necessary to describe 1353*c87b03e5Sespiean access to a pseudo register using a nonnatural mode, a @code{subreg} 1354*c87b03e5Sespieexpression is used. 1355*c87b03e5Sespie 1356*c87b03e5SespieA @code{reg} expression with a machine mode that specifies more than 1357*c87b03e5Sespieone word of data may actually stand for several consecutive registers. 1358*c87b03e5SespieIf in addition the register number specifies a hardware register, then 1359*c87b03e5Sespieit actually represents several consecutive hardware registers starting 1360*c87b03e5Sespiewith the specified one. 1361*c87b03e5Sespie 1362*c87b03e5SespieEach pseudo register number used in a function's RTL code is 1363*c87b03e5Sespierepresented by a unique @code{reg} expression. 1364*c87b03e5Sespie 1365*c87b03e5Sespie@findex FIRST_VIRTUAL_REGISTER 1366*c87b03e5Sespie@findex LAST_VIRTUAL_REGISTER 1367*c87b03e5SespieSome pseudo register numbers, those within the range of 1368*c87b03e5Sespie@code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only 1369*c87b03e5Sespieappear during the RTL generation phase and are eliminated before the 1370*c87b03e5Sespieoptimization phases. These represent locations in the stack frame that 1371*c87b03e5Sespiecannot be determined until RTL generation for the function has been 1372*c87b03e5Sespiecompleted. The following virtual register numbers are defined: 1373*c87b03e5Sespie 1374*c87b03e5Sespie@table @code 1375*c87b03e5Sespie@findex VIRTUAL_INCOMING_ARGS_REGNUM 1376*c87b03e5Sespie@item VIRTUAL_INCOMING_ARGS_REGNUM 1377*c87b03e5SespieThis points to the first word of the incoming arguments passed on the 1378*c87b03e5Sespiestack. Normally these arguments are placed there by the caller, but the 1379*c87b03e5Sespiecallee may have pushed some arguments that were previously passed in 1380*c87b03e5Sespieregisters. 1381*c87b03e5Sespie 1382*c87b03e5Sespie@cindex @code{FIRST_PARM_OFFSET} and virtual registers 1383*c87b03e5Sespie@cindex @code{ARG_POINTER_REGNUM} and virtual registers 1384*c87b03e5SespieWhen RTL generation is complete, this virtual register is replaced 1385*c87b03e5Sespieby the sum of the register given by @code{ARG_POINTER_REGNUM} and the 1386*c87b03e5Sespievalue of @code{FIRST_PARM_OFFSET}. 1387*c87b03e5Sespie 1388*c87b03e5Sespie@findex VIRTUAL_STACK_VARS_REGNUM 1389*c87b03e5Sespie@cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers 1390*c87b03e5Sespie@item VIRTUAL_STACK_VARS_REGNUM 1391*c87b03e5SespieIf @code{FRAME_GROWS_DOWNWARD} is defined, this points to immediately 1392*c87b03e5Sespieabove the first variable on the stack. Otherwise, it points to the 1393*c87b03e5Sespiefirst variable on the stack. 1394*c87b03e5Sespie 1395*c87b03e5Sespie@cindex @code{STARTING_FRAME_OFFSET} and virtual registers 1396*c87b03e5Sespie@cindex @code{FRAME_POINTER_REGNUM} and virtual registers 1397*c87b03e5Sespie@code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the 1398*c87b03e5Sespieregister given by @code{FRAME_POINTER_REGNUM} and the value 1399*c87b03e5Sespie@code{STARTING_FRAME_OFFSET}. 1400*c87b03e5Sespie 1401*c87b03e5Sespie@findex VIRTUAL_STACK_DYNAMIC_REGNUM 1402*c87b03e5Sespie@item VIRTUAL_STACK_DYNAMIC_REGNUM 1403*c87b03e5SespieThis points to the location of dynamically allocated memory on the stack 1404*c87b03e5Sespieimmediately after the stack pointer has been adjusted by the amount of 1405*c87b03e5Sespiememory desired. 1406*c87b03e5Sespie 1407*c87b03e5Sespie@cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers 1408*c87b03e5Sespie@cindex @code{STACK_POINTER_REGNUM} and virtual registers 1409*c87b03e5SespieThis virtual register is replaced by the sum of the register given by 1410*c87b03e5Sespie@code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}. 1411*c87b03e5Sespie 1412*c87b03e5Sespie@findex VIRTUAL_OUTGOING_ARGS_REGNUM 1413*c87b03e5Sespie@item VIRTUAL_OUTGOING_ARGS_REGNUM 1414*c87b03e5SespieThis points to the location in the stack at which outgoing arguments 1415*c87b03e5Sespieshould be written when the stack is pre-pushed (arguments pushed using 1416*c87b03e5Sespiepush insns should always use @code{STACK_POINTER_REGNUM}). 1417*c87b03e5Sespie 1418*c87b03e5Sespie@cindex @code{STACK_POINTER_OFFSET} and virtual registers 1419*c87b03e5SespieThis virtual register is replaced by the sum of the register given by 1420*c87b03e5Sespie@code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}. 1421*c87b03e5Sespie@end table 1422*c87b03e5Sespie 1423*c87b03e5Sespie@findex subreg 1424*c87b03e5Sespie@item (subreg:@var{m} @var{reg} @var{bytenum}) 1425*c87b03e5Sespie@code{subreg} expressions are used to refer to a register in a machine 1426*c87b03e5Sespiemode other than its natural one, or to refer to one register of 1427*c87b03e5Sespiea multi-part @code{reg} that actually refers to several registers. 1428*c87b03e5Sespie 1429*c87b03e5SespieEach pseudo-register has a natural mode. If it is necessary to 1430*c87b03e5Sespieoperate on it in a different mode---for example, to perform a fullword 1431*c87b03e5Sespiemove instruction on a pseudo-register that contains a single 1432*c87b03e5Sespiebyte---the pseudo-register must be enclosed in a @code{subreg}. In 1433*c87b03e5Sespiesuch a case, @var{bytenum} is zero. 1434*c87b03e5Sespie 1435*c87b03e5SespieUsually @var{m} is at least as narrow as the mode of @var{reg}, in which 1436*c87b03e5Sespiecase it is restricting consideration to only the bits of @var{reg} that 1437*c87b03e5Sespieare in @var{m}. 1438*c87b03e5Sespie 1439*c87b03e5SespieSometimes @var{m} is wider than the mode of @var{reg}. These 1440*c87b03e5Sespie@code{subreg} expressions are often called @dfn{paradoxical}. They are 1441*c87b03e5Sespieused in cases where we want to refer to an object in a wider mode but do 1442*c87b03e5Sespienot care what value the additional bits have. The reload pass ensures 1443*c87b03e5Sespiethat paradoxical references are only made to hard registers. 1444*c87b03e5Sespie 1445*c87b03e5SespieThe other use of @code{subreg} is to extract the individual registers of 1446*c87b03e5Sespiea multi-register value. Machine modes such as @code{DImode} and 1447*c87b03e5Sespie@code{TImode} can indicate values longer than a word, values which 1448*c87b03e5Sespieusually require two or more consecutive registers. To access one of the 1449*c87b03e5Sespieregisters, use a @code{subreg} with mode @code{SImode} and a 1450*c87b03e5Sespie@var{bytenum} offset that says which register. 1451*c87b03e5Sespie 1452*c87b03e5SespieStoring in a non-paradoxical @code{subreg} has undefined results for 1453*c87b03e5Sespiebits belonging to the same word as the @code{subreg}. This laxity makes 1454*c87b03e5Sespieit easier to generate efficient code for such instructions. To 1455*c87b03e5Sespierepresent an instruction that preserves all the bits outside of those in 1456*c87b03e5Sespiethe @code{subreg}, use @code{strict_low_part} around the @code{subreg}. 1457*c87b03e5Sespie 1458*c87b03e5Sespie@cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg} 1459*c87b03e5SespieThe compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, says 1460*c87b03e5Sespiethat byte number zero is part of the most significant word; otherwise, 1461*c87b03e5Sespieit is part of the least significant word. 1462*c87b03e5Sespie 1463*c87b03e5Sespie@cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg} 1464*c87b03e5SespieThe compilation parameter @code{BYTES_BIG_ENDIAN}, if set to 1, says 1465*c87b03e5Sespiethat byte number zero is the most significant byte within a word; 1466*c87b03e5Sespieotherwise, it is the least significant byte within a word. 1467*c87b03e5Sespie 1468*c87b03e5Sespie@cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg} 1469*c87b03e5SespieOn a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with 1470*c87b03e5Sespie@code{WORDS_BIG_ENDIAN}. 1471*c87b03e5SespieHowever, most parts of the compiler treat floating point values as if 1472*c87b03e5Sespiethey had the same endianness as integer values. This works because 1473*c87b03e5Sespiethey handle them solely as a collection of integer values, with no 1474*c87b03e5Sespieparticular numerical value. Only real.c and the runtime libraries 1475*c87b03e5Sespiecare about @code{FLOAT_WORDS_BIG_ENDIAN}. 1476*c87b03e5Sespie 1477*c87b03e5Sespie@cindex combiner pass 1478*c87b03e5Sespie@cindex reload pass 1479*c87b03e5Sespie@cindex @code{subreg}, special reload handling 1480*c87b03e5SespieBetween the combiner pass and the reload pass, it is possible to have a 1481*c87b03e5Sespieparadoxical @code{subreg} which contains a @code{mem} instead of a 1482*c87b03e5Sespie@code{reg} as its first operand. After the reload pass, it is also 1483*c87b03e5Sespiepossible to have a non-paradoxical @code{subreg} which contains a 1484*c87b03e5Sespie@code{mem}; this usually occurs when the @code{mem} is a stack slot 1485*c87b03e5Sespiewhich replaced a pseudo register. 1486*c87b03e5Sespie 1487*c87b03e5SespieNote that it is not valid to access a @code{DFmode} value in @code{SFmode} 1488*c87b03e5Sespieusing a @code{subreg}. On some machines the most significant part of a 1489*c87b03e5Sespie@code{DFmode} value does not have the same format as a single-precision 1490*c87b03e5Sespiefloating value. 1491*c87b03e5Sespie 1492*c87b03e5SespieIt is also not valid to access a single word of a multi-word value in a 1493*c87b03e5Sespiehard register when less registers can hold the value than would be 1494*c87b03e5Sespieexpected from its size. For example, some 32-bit machines have 1495*c87b03e5Sespiefloating-point registers that can hold an entire @code{DFmode} value. 1496*c87b03e5SespieIf register 10 were such a register @code{(subreg:SI (reg:DF 10) 1)} 1497*c87b03e5Sespiewould be invalid because there is no way to convert that reference to 1498*c87b03e5Sespiea single machine register. The reload pass prevents @code{subreg} 1499*c87b03e5Sespieexpressions such as these from being formed. 1500*c87b03e5Sespie 1501*c87b03e5Sespie@findex SUBREG_REG 1502*c87b03e5Sespie@findex SUBREG_BYTE 1503*c87b03e5SespieThe first operand of a @code{subreg} expression is customarily accessed 1504*c87b03e5Sespiewith the @code{SUBREG_REG} macro and the second operand is customarily 1505*c87b03e5Sespieaccessed with the @code{SUBREG_BYTE} macro. 1506*c87b03e5Sespie 1507*c87b03e5Sespie@findex scratch 1508*c87b03e5Sespie@cindex scratch operands 1509*c87b03e5Sespie@item (scratch:@var{m}) 1510*c87b03e5SespieThis represents a scratch register that will be required for the 1511*c87b03e5Sespieexecution of a single instruction and not used subsequently. It is 1512*c87b03e5Sespieconverted into a @code{reg} by either the local register allocator or 1513*c87b03e5Sespiethe reload pass. 1514*c87b03e5Sespie 1515*c87b03e5Sespie@code{scratch} is usually present inside a @code{clobber} operation 1516*c87b03e5Sespie(@pxref{Side Effects}). 1517*c87b03e5Sespie 1518*c87b03e5Sespie@findex cc0 1519*c87b03e5Sespie@cindex condition code register 1520*c87b03e5Sespie@item (cc0) 1521*c87b03e5SespieThis refers to the machine's condition code register. It has no 1522*c87b03e5Sespieoperands and may not have a machine mode. There are two ways to use it: 1523*c87b03e5Sespie 1524*c87b03e5Sespie@itemize @bullet 1525*c87b03e5Sespie@item 1526*c87b03e5SespieTo stand for a complete set of condition code flags. This is best on 1527*c87b03e5Sespiemost machines, where each comparison sets the entire series of flags. 1528*c87b03e5Sespie 1529*c87b03e5SespieWith this technique, @code{(cc0)} may be validly used in only two 1530*c87b03e5Sespiecontexts: as the destination of an assignment (in test and compare 1531*c87b03e5Sespieinstructions) and in comparison operators comparing against zero 1532*c87b03e5Sespie(@code{const_int} with value zero; that is to say, @code{const0_rtx}). 1533*c87b03e5Sespie 1534*c87b03e5Sespie@item 1535*c87b03e5SespieTo stand for a single flag that is the result of a single condition. 1536*c87b03e5SespieThis is useful on machines that have only a single flag bit, and in 1537*c87b03e5Sespiewhich comparison instructions must specify the condition to test. 1538*c87b03e5Sespie 1539*c87b03e5SespieWith this technique, @code{(cc0)} may be validly used in only two 1540*c87b03e5Sespiecontexts: as the destination of an assignment (in test and compare 1541*c87b03e5Sespieinstructions) where the source is a comparison operator, and as the 1542*c87b03e5Sespiefirst operand of @code{if_then_else} (in a conditional branch). 1543*c87b03e5Sespie@end itemize 1544*c87b03e5Sespie 1545*c87b03e5Sespie@findex cc0_rtx 1546*c87b03e5SespieThere is only one expression object of code @code{cc0}; it is the 1547*c87b03e5Sespievalue of the variable @code{cc0_rtx}. Any attempt to create an 1548*c87b03e5Sespieexpression of code @code{cc0} will return @code{cc0_rtx}. 1549*c87b03e5Sespie 1550*c87b03e5SespieInstructions can set the condition code implicitly. On many machines, 1551*c87b03e5Sespienearly all instructions set the condition code based on the value that 1552*c87b03e5Sespiethey compute or store. It is not necessary to record these actions 1553*c87b03e5Sespieexplicitly in the RTL because the machine description includes a 1554*c87b03e5Sespieprescription for recognizing the instructions that do so (by means of 1555*c87b03e5Sespiethe macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only 1556*c87b03e5Sespieinstructions whose sole purpose is to set the condition code, and 1557*c87b03e5Sespieinstructions that use the condition code, need mention @code{(cc0)}. 1558*c87b03e5Sespie 1559*c87b03e5SespieOn some machines, the condition code register is given a register number 1560*c87b03e5Sespieand a @code{reg} is used instead of @code{(cc0)}. This is usually the 1561*c87b03e5Sespiepreferable approach if only a small subset of instructions modify the 1562*c87b03e5Sespiecondition code. Other machines store condition codes in general 1563*c87b03e5Sespieregisters; in such cases a pseudo register should be used. 1564*c87b03e5Sespie 1565*c87b03e5SespieSome machines, such as the SPARC and RS/6000, have two sets of 1566*c87b03e5Sespiearithmetic instructions, one that sets and one that does not set the 1567*c87b03e5Sespiecondition code. This is best handled by normally generating the 1568*c87b03e5Sespieinstruction that does not set the condition code, and making a pattern 1569*c87b03e5Sespiethat both performs the arithmetic and sets the condition code register 1570*c87b03e5Sespie(which would not be @code{(cc0)} in this case). For examples, search 1571*c87b03e5Sespiefor @samp{addcc} and @samp{andcc} in @file{sparc.md}. 1572*c87b03e5Sespie 1573*c87b03e5Sespie@findex pc 1574*c87b03e5Sespie@item (pc) 1575*c87b03e5Sespie@cindex program counter 1576*c87b03e5SespieThis represents the machine's program counter. It has no operands and 1577*c87b03e5Sespiemay not have a machine mode. @code{(pc)} may be validly used only in 1578*c87b03e5Sespiecertain specific contexts in jump instructions. 1579*c87b03e5Sespie 1580*c87b03e5Sespie@findex pc_rtx 1581*c87b03e5SespieThere is only one expression object of code @code{pc}; it is the value 1582*c87b03e5Sespieof the variable @code{pc_rtx}. Any attempt to create an expression of 1583*c87b03e5Sespiecode @code{pc} will return @code{pc_rtx}. 1584*c87b03e5Sespie 1585*c87b03e5SespieAll instructions that do not jump alter the program counter implicitly 1586*c87b03e5Sespieby incrementing it, but there is no need to mention this in the RTL@. 1587*c87b03e5Sespie 1588*c87b03e5Sespie@findex mem 1589*c87b03e5Sespie@item (mem:@var{m} @var{addr} @var{alias}) 1590*c87b03e5SespieThis RTX represents a reference to main memory at an address 1591*c87b03e5Sespierepresented by the expression @var{addr}. @var{m} specifies how large 1592*c87b03e5Sespiea unit of memory is accessed. @var{alias} specifies an alias set for the 1593*c87b03e5Sespiereference. In general two items are in different alias sets if they cannot 1594*c87b03e5Sespiereference the same memory address. 1595*c87b03e5Sespie 1596*c87b03e5SespieThe construct @code{(mem:BLK (scratch))} is considered to alias all 1597*c87b03e5Sespieother memories. Thus it may be used as a memory barrier in epilogue 1598*c87b03e5Sespiestack deallocation patterns. 1599*c87b03e5Sespie 1600*c87b03e5Sespie@findex addressof 1601*c87b03e5Sespie@item (addressof:@var{m} @var{reg}) 1602*c87b03e5SespieThis RTX represents a request for the address of register @var{reg}. Its mode 1603*c87b03e5Sespieis always @code{Pmode}. If there are any @code{addressof} 1604*c87b03e5Sespieexpressions left in the function after CSE, @var{reg} is forced into the 1605*c87b03e5Sespiestack and the @code{addressof} expression is replaced with a @code{plus} 1606*c87b03e5Sespieexpression for the address of its stack slot. 1607*c87b03e5Sespie@end table 1608*c87b03e5Sespie 1609*c87b03e5Sespie@node Arithmetic 1610*c87b03e5Sespie@section RTL Expressions for Arithmetic 1611*c87b03e5Sespie@cindex arithmetic, in RTL 1612*c87b03e5Sespie@cindex math, in RTL 1613*c87b03e5Sespie@cindex RTL expressions for arithmetic 1614*c87b03e5Sespie 1615*c87b03e5SespieUnless otherwise specified, all the operands of arithmetic expressions 1616*c87b03e5Sespiemust be valid for mode @var{m}. An operand is valid for mode @var{m} 1617*c87b03e5Sespieif it has mode @var{m}, or if it is a @code{const_int} or 1618*c87b03e5Sespie@code{const_double} and @var{m} is a mode of class @code{MODE_INT}. 1619*c87b03e5Sespie 1620*c87b03e5SespieFor commutative binary operations, constants should be placed in the 1621*c87b03e5Sespiesecond operand. 1622*c87b03e5Sespie 1623*c87b03e5Sespie@table @code 1624*c87b03e5Sespie@findex plus 1625*c87b03e5Sespie@cindex RTL addition 1626*c87b03e5Sespie@cindex RTL sum 1627*c87b03e5Sespie@item (plus:@var{m} @var{x} @var{y}) 1628*c87b03e5SespieRepresents the sum of the values represented by @var{x} and @var{y} 1629*c87b03e5Sespiecarried out in machine mode @var{m}. 1630*c87b03e5Sespie 1631*c87b03e5Sespie@findex lo_sum 1632*c87b03e5Sespie@item (lo_sum:@var{m} @var{x} @var{y}) 1633*c87b03e5SespieLike @code{plus}, except that it represents that sum of @var{x} and the 1634*c87b03e5Sespielow-order bits of @var{y}. The number of low order bits is 1635*c87b03e5Sespiemachine-dependent but is normally the number of bits in a @code{Pmode} 1636*c87b03e5Sespieitem minus the number of bits set by the @code{high} code 1637*c87b03e5Sespie(@pxref{Constants}). 1638*c87b03e5Sespie 1639*c87b03e5Sespie@var{m} should be @code{Pmode}. 1640*c87b03e5Sespie 1641*c87b03e5Sespie@findex minus 1642*c87b03e5Sespie@cindex RTL subtraction 1643*c87b03e5Sespie@cindex RTL difference 1644*c87b03e5Sespie@item (minus:@var{m} @var{x} @var{y}) 1645*c87b03e5SespieLike @code{plus} but represents subtraction. 1646*c87b03e5Sespie 1647*c87b03e5Sespie@findex ss_plus 1648*c87b03e5Sespie@cindex RTL addition with signed saturation 1649*c87b03e5Sespie@item (ss_plus:@var{m} @var{x} @var{y}) 1650*c87b03e5Sespie 1651*c87b03e5SespieLike @code{plus}, but using signed saturation in case of an overflow. 1652*c87b03e5Sespie 1653*c87b03e5Sespie@findex us_plus 1654*c87b03e5Sespie@cindex RTL addition with unsigned saturation 1655*c87b03e5Sespie@item (us_plus:@var{m} @var{x} @var{y}) 1656*c87b03e5Sespie 1657*c87b03e5SespieLike @code{plus}, but using unsigned saturation in case of an overflow. 1658*c87b03e5Sespie 1659*c87b03e5Sespie@findex ss_minus 1660*c87b03e5Sespie@cindex RTL addition with signed saturation 1661*c87b03e5Sespie@item (ss_minus:@var{m} @var{x} @var{y}) 1662*c87b03e5Sespie 1663*c87b03e5SespieLike @code{minus}, but using signed saturation in case of an overflow. 1664*c87b03e5Sespie 1665*c87b03e5Sespie@findex us_minus 1666*c87b03e5Sespie@cindex RTL addition with unsigned saturation 1667*c87b03e5Sespie@item (us_minus:@var{m} @var{x} @var{y}) 1668*c87b03e5Sespie 1669*c87b03e5SespieLike @code{minus}, but using unsigned saturation in case of an overflow. 1670*c87b03e5Sespie 1671*c87b03e5Sespie@findex compare 1672*c87b03e5Sespie@cindex RTL comparison 1673*c87b03e5Sespie@item (compare:@var{m} @var{x} @var{y}) 1674*c87b03e5SespieRepresents the result of subtracting @var{y} from @var{x} for purposes 1675*c87b03e5Sespieof comparison. The result is computed without overflow, as if with 1676*c87b03e5Sespieinfinite precision. 1677*c87b03e5Sespie 1678*c87b03e5SespieOf course, machines can't really subtract with infinite precision. 1679*c87b03e5SespieHowever, they can pretend to do so when only the sign of the result will 1680*c87b03e5Sespiebe used, which is the case when the result is stored in the condition 1681*c87b03e5Sespiecode. And that is the @emph{only} way this kind of expression may 1682*c87b03e5Sespievalidly be used: as a value to be stored in the condition codes, either 1683*c87b03e5Sespie@code{(cc0)} or a register. @xref{Comparisons}. 1684*c87b03e5Sespie 1685*c87b03e5SespieThe mode @var{m} is not related to the modes of @var{x} and @var{y}, but 1686*c87b03e5Sespieinstead is the mode of the condition code value. If @code{(cc0)} is 1687*c87b03e5Sespieused, it is @code{VOIDmode}. Otherwise it is some mode in class 1688*c87b03e5Sespie@code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}. If @var{m} 1689*c87b03e5Sespieis @code{VOIDmode} or @code{CCmode}, the operation returns sufficient 1690*c87b03e5Sespieinformation (in an unspecified format) so that any comparison operator 1691*c87b03e5Sespiecan be applied to the result of the @code{COMPARE} operation. For other 1692*c87b03e5Sespiemodes in class @code{MODE_CC}, the operation only returns a subset of 1693*c87b03e5Sespiethis information. 1694*c87b03e5Sespie 1695*c87b03e5SespieNormally, @var{x} and @var{y} must have the same mode. Otherwise, 1696*c87b03e5Sespie@code{compare} is valid only if the mode of @var{x} is in class 1697*c87b03e5Sespie@code{MODE_INT} and @var{y} is a @code{const_int} or 1698*c87b03e5Sespie@code{const_double} with mode @code{VOIDmode}. The mode of @var{x} 1699*c87b03e5Sespiedetermines what mode the comparison is to be done in; thus it must not 1700*c87b03e5Sespiebe @code{VOIDmode}. 1701*c87b03e5Sespie 1702*c87b03e5SespieIf one of the operands is a constant, it should be placed in the 1703*c87b03e5Sespiesecond operand and the comparison code adjusted as appropriate. 1704*c87b03e5Sespie 1705*c87b03e5SespieA @code{compare} specifying two @code{VOIDmode} constants is not valid 1706*c87b03e5Sespiesince there is no way to know in what mode the comparison is to be 1707*c87b03e5Sespieperformed; the comparison must either be folded during the compilation 1708*c87b03e5Sespieor the first operand must be loaded into a register while its mode is 1709*c87b03e5Sespiestill known. 1710*c87b03e5Sespie 1711*c87b03e5Sespie@findex neg 1712*c87b03e5Sespie@item (neg:@var{m} @var{x}) 1713*c87b03e5SespieRepresents the negation (subtraction from zero) of the value represented 1714*c87b03e5Sespieby @var{x}, carried out in mode @var{m}. 1715*c87b03e5Sespie 1716*c87b03e5Sespie@findex mult 1717*c87b03e5Sespie@cindex multiplication 1718*c87b03e5Sespie@cindex product 1719*c87b03e5Sespie@item (mult:@var{m} @var{x} @var{y}) 1720*c87b03e5SespieRepresents the signed product of the values represented by @var{x} and 1721*c87b03e5Sespie@var{y} carried out in machine mode @var{m}. 1722*c87b03e5Sespie 1723*c87b03e5SespieSome machines support a multiplication that generates a product wider 1724*c87b03e5Sespiethan the operands. Write the pattern for this as 1725*c87b03e5Sespie 1726*c87b03e5Sespie@example 1727*c87b03e5Sespie(mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y})) 1728*c87b03e5Sespie@end example 1729*c87b03e5Sespie 1730*c87b03e5Sespiewhere @var{m} is wider than the modes of @var{x} and @var{y}, which need 1731*c87b03e5Sespienot be the same. 1732*c87b03e5Sespie 1733*c87b03e5SespieFor unsigned widening multiplication, use the same idiom, but with 1734*c87b03e5Sespie@code{zero_extend} instead of @code{sign_extend}. 1735*c87b03e5Sespie 1736*c87b03e5Sespie@findex div 1737*c87b03e5Sespie@cindex division 1738*c87b03e5Sespie@cindex signed division 1739*c87b03e5Sespie@cindex quotient 1740*c87b03e5Sespie@item (div:@var{m} @var{x} @var{y}) 1741*c87b03e5SespieRepresents the quotient in signed division of @var{x} by @var{y}, 1742*c87b03e5Sespiecarried out in machine mode @var{m}. If @var{m} is a floating point 1743*c87b03e5Sespiemode, it represents the exact quotient; otherwise, the integerized 1744*c87b03e5Sespiequotient. 1745*c87b03e5Sespie 1746*c87b03e5SespieSome machines have division instructions in which the operands and 1747*c87b03e5Sespiequotient widths are not all the same; you should represent 1748*c87b03e5Sespiesuch instructions using @code{truncate} and @code{sign_extend} as in, 1749*c87b03e5Sespie 1750*c87b03e5Sespie@example 1751*c87b03e5Sespie(truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y}))) 1752*c87b03e5Sespie@end example 1753*c87b03e5Sespie 1754*c87b03e5Sespie@findex udiv 1755*c87b03e5Sespie@cindex unsigned division 1756*c87b03e5Sespie@cindex division 1757*c87b03e5Sespie@item (udiv:@var{m} @var{x} @var{y}) 1758*c87b03e5SespieLike @code{div} but represents unsigned division. 1759*c87b03e5Sespie 1760*c87b03e5Sespie@findex mod 1761*c87b03e5Sespie@findex umod 1762*c87b03e5Sespie@cindex remainder 1763*c87b03e5Sespie@cindex division 1764*c87b03e5Sespie@item (mod:@var{m} @var{x} @var{y}) 1765*c87b03e5Sespie@itemx (umod:@var{m} @var{x} @var{y}) 1766*c87b03e5SespieLike @code{div} and @code{udiv} but represent the remainder instead of 1767*c87b03e5Sespiethe quotient. 1768*c87b03e5Sespie 1769*c87b03e5Sespie@findex smin 1770*c87b03e5Sespie@findex smax 1771*c87b03e5Sespie@cindex signed minimum 1772*c87b03e5Sespie@cindex signed maximum 1773*c87b03e5Sespie@item (smin:@var{m} @var{x} @var{y}) 1774*c87b03e5Sespie@itemx (smax:@var{m} @var{x} @var{y}) 1775*c87b03e5SespieRepresents the smaller (for @code{smin}) or larger (for @code{smax}) of 1776*c87b03e5Sespie@var{x} and @var{y}, interpreted as signed integers in mode @var{m}. 1777*c87b03e5Sespie 1778*c87b03e5Sespie@findex umin 1779*c87b03e5Sespie@findex umax 1780*c87b03e5Sespie@cindex unsigned minimum and maximum 1781*c87b03e5Sespie@item (umin:@var{m} @var{x} @var{y}) 1782*c87b03e5Sespie@itemx (umax:@var{m} @var{x} @var{y}) 1783*c87b03e5SespieLike @code{smin} and @code{smax}, but the values are interpreted as unsigned 1784*c87b03e5Sespieintegers. 1785*c87b03e5Sespie 1786*c87b03e5Sespie@findex not 1787*c87b03e5Sespie@cindex complement, bitwise 1788*c87b03e5Sespie@cindex bitwise complement 1789*c87b03e5Sespie@item (not:@var{m} @var{x}) 1790*c87b03e5SespieRepresents the bitwise complement of the value represented by @var{x}, 1791*c87b03e5Sespiecarried out in mode @var{m}, which must be a fixed-point machine mode. 1792*c87b03e5Sespie 1793*c87b03e5Sespie@findex and 1794*c87b03e5Sespie@cindex logical-and, bitwise 1795*c87b03e5Sespie@cindex bitwise logical-and 1796*c87b03e5Sespie@item (and:@var{m} @var{x} @var{y}) 1797*c87b03e5SespieRepresents the bitwise logical-and of the values represented by 1798*c87b03e5Sespie@var{x} and @var{y}, carried out in machine mode @var{m}, which must be 1799*c87b03e5Sespiea fixed-point machine mode. 1800*c87b03e5Sespie 1801*c87b03e5Sespie@findex ior 1802*c87b03e5Sespie@cindex inclusive-or, bitwise 1803*c87b03e5Sespie@cindex bitwise inclusive-or 1804*c87b03e5Sespie@item (ior:@var{m} @var{x} @var{y}) 1805*c87b03e5SespieRepresents the bitwise inclusive-or of the values represented by @var{x} 1806*c87b03e5Sespieand @var{y}, carried out in machine mode @var{m}, which must be a 1807*c87b03e5Sespiefixed-point mode. 1808*c87b03e5Sespie 1809*c87b03e5Sespie@findex xor 1810*c87b03e5Sespie@cindex exclusive-or, bitwise 1811*c87b03e5Sespie@cindex bitwise exclusive-or 1812*c87b03e5Sespie@item (xor:@var{m} @var{x} @var{y}) 1813*c87b03e5SespieRepresents the bitwise exclusive-or of the values represented by @var{x} 1814*c87b03e5Sespieand @var{y}, carried out in machine mode @var{m}, which must be a 1815*c87b03e5Sespiefixed-point mode. 1816*c87b03e5Sespie 1817*c87b03e5Sespie@findex ashift 1818*c87b03e5Sespie@cindex left shift 1819*c87b03e5Sespie@cindex shift 1820*c87b03e5Sespie@cindex arithmetic shift 1821*c87b03e5Sespie@item (ashift:@var{m} @var{x} @var{c}) 1822*c87b03e5SespieRepresents the result of arithmetically shifting @var{x} left by @var{c} 1823*c87b03e5Sespieplaces. @var{x} have mode @var{m}, a fixed-point machine mode. @var{c} 1824*c87b03e5Sespiebe a fixed-point mode or be a constant with mode @code{VOIDmode}; which 1825*c87b03e5Sespiemode is determined by the mode called for in the machine description 1826*c87b03e5Sespieentry for the left-shift instruction. For example, on the VAX, the mode 1827*c87b03e5Sespieof @var{c} is @code{QImode} regardless of @var{m}. 1828*c87b03e5Sespie 1829*c87b03e5Sespie@findex lshiftrt 1830*c87b03e5Sespie@cindex right shift 1831*c87b03e5Sespie@findex ashiftrt 1832*c87b03e5Sespie@item (lshiftrt:@var{m} @var{x} @var{c}) 1833*c87b03e5Sespie@itemx (ashiftrt:@var{m} @var{x} @var{c}) 1834*c87b03e5SespieLike @code{ashift} but for right shift. Unlike the case for left shift, 1835*c87b03e5Sespiethese two operations are distinct. 1836*c87b03e5Sespie 1837*c87b03e5Sespie@findex rotate 1838*c87b03e5Sespie@cindex rotate 1839*c87b03e5Sespie@cindex left rotate 1840*c87b03e5Sespie@findex rotatert 1841*c87b03e5Sespie@cindex right rotate 1842*c87b03e5Sespie@item (rotate:@var{m} @var{x} @var{c}) 1843*c87b03e5Sespie@itemx (rotatert:@var{m} @var{x} @var{c}) 1844*c87b03e5SespieSimilar but represent left and right rotate. If @var{c} is a constant, 1845*c87b03e5Sespieuse @code{rotate}. 1846*c87b03e5Sespie 1847*c87b03e5Sespie@findex abs 1848*c87b03e5Sespie@cindex absolute value 1849*c87b03e5Sespie@item (abs:@var{m} @var{x}) 1850*c87b03e5SespieRepresents the absolute value of @var{x}, computed in mode @var{m}. 1851*c87b03e5Sespie 1852*c87b03e5Sespie@findex sqrt 1853*c87b03e5Sespie@cindex square root 1854*c87b03e5Sespie@item (sqrt:@var{m} @var{x}) 1855*c87b03e5SespieRepresents the square root of @var{x}, computed in mode @var{m}. 1856*c87b03e5SespieMost often @var{m} will be a floating point mode. 1857*c87b03e5Sespie 1858*c87b03e5Sespie@findex ffs 1859*c87b03e5Sespie@item (ffs:@var{m} @var{x}) 1860*c87b03e5SespieRepresents one plus the index of the least significant 1-bit in 1861*c87b03e5Sespie@var{x}, represented as an integer of mode @var{m}. (The value is 1862*c87b03e5Sespiezero if @var{x} is zero.) The mode of @var{x} need not be @var{m}; 1863*c87b03e5Sespiedepending on the target machine, various mode combinations may be 1864*c87b03e5Sespievalid. 1865*c87b03e5Sespie@end table 1866*c87b03e5Sespie 1867*c87b03e5Sespie@node Comparisons 1868*c87b03e5Sespie@section Comparison Operations 1869*c87b03e5Sespie@cindex RTL comparison operations 1870*c87b03e5Sespie 1871*c87b03e5SespieComparison operators test a relation on two operands and are considered 1872*c87b03e5Sespieto represent a machine-dependent nonzero value described by, but not 1873*c87b03e5Sespienecessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc}) 1874*c87b03e5Sespieif the relation holds, or zero if it does not, for comparison operators 1875*c87b03e5Sespiewhose results have a `MODE_INT' mode, and 1876*c87b03e5Sespie@code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or 1877*c87b03e5Sespiezero if it does not, for comparison operators that return floating-point 1878*c87b03e5Sespievalues. The mode of the comparison operation is independent of the mode 1879*c87b03e5Sespieof the data being compared. If the comparison operation is being tested 1880*c87b03e5Sespie(e.g., the first operand of an @code{if_then_else}), the mode must be 1881*c87b03e5Sespie@code{VOIDmode}. 1882*c87b03e5Sespie 1883*c87b03e5Sespie@cindex condition codes 1884*c87b03e5SespieThere are two ways that comparison operations may be used. The 1885*c87b03e5Sespiecomparison operators may be used to compare the condition codes 1886*c87b03e5Sespie@code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such 1887*c87b03e5Sespiea construct actually refers to the result of the preceding instruction 1888*c87b03e5Sespiein which the condition codes were set. The instruction setting the 1889*c87b03e5Sespiecondition code must be adjacent to the instruction using the condition 1890*c87b03e5Sespiecode; only @code{note} insns may separate them. 1891*c87b03e5Sespie 1892*c87b03e5SespieAlternatively, a comparison operation may directly compare two data 1893*c87b03e5Sespieobjects. The mode of the comparison is determined by the operands; they 1894*c87b03e5Sespiemust both be valid for a common machine mode. A comparison with both 1895*c87b03e5Sespieoperands constant would be invalid as the machine mode could not be 1896*c87b03e5Sespiededuced from it, but such a comparison should never exist in RTL due to 1897*c87b03e5Sespieconstant folding. 1898*c87b03e5Sespie 1899*c87b03e5SespieIn the example above, if @code{(cc0)} were last set to 1900*c87b03e5Sespie@code{(compare @var{x} @var{y})}, the comparison operation is 1901*c87b03e5Sespieidentical to @code{(eq @var{x} @var{y})}. Usually only one style 1902*c87b03e5Sespieof comparisons is supported on a particular machine, but the combine 1903*c87b03e5Sespiepass will try to merge the operations to produce the @code{eq} shown 1904*c87b03e5Sespiein case it exists in the context of the particular insn involved. 1905*c87b03e5Sespie 1906*c87b03e5SespieInequality comparisons come in two flavors, signed and unsigned. Thus, 1907*c87b03e5Sespiethere are distinct expression codes @code{gt} and @code{gtu} for signed and 1908*c87b03e5Sespieunsigned greater-than. These can produce different results for the same 1909*c87b03e5Sespiepair of integer values: for example, 1 is signed greater-than @minus{}1 but not 1910*c87b03e5Sespieunsigned greater-than, because @minus{}1 when regarded as unsigned is actually 1911*c87b03e5Sespie@code{0xffffffff} which is greater than 1. 1912*c87b03e5Sespie 1913*c87b03e5SespieThe signed comparisons are also used for floating point values. Floating 1914*c87b03e5Sespiepoint comparisons are distinguished by the machine modes of the operands. 1915*c87b03e5Sespie 1916*c87b03e5Sespie@table @code 1917*c87b03e5Sespie@findex eq 1918*c87b03e5Sespie@cindex equal 1919*c87b03e5Sespie@item (eq:@var{m} @var{x} @var{y}) 1920*c87b03e5Sespie@code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y} 1921*c87b03e5Sespieare equal, otherwise 0. 1922*c87b03e5Sespie 1923*c87b03e5Sespie@findex ne 1924*c87b03e5Sespie@cindex not equal 1925*c87b03e5Sespie@item (ne:@var{m} @var{x} @var{y}) 1926*c87b03e5Sespie@code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y} 1927*c87b03e5Sespieare not equal, otherwise 0. 1928*c87b03e5Sespie 1929*c87b03e5Sespie@findex gt 1930*c87b03e5Sespie@cindex greater than 1931*c87b03e5Sespie@item (gt:@var{m} @var{x} @var{y}) 1932*c87b03e5Sespie@code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}. If they 1933*c87b03e5Sespieare fixed-point, the comparison is done in a signed sense. 1934*c87b03e5Sespie 1935*c87b03e5Sespie@findex gtu 1936*c87b03e5Sespie@cindex greater than 1937*c87b03e5Sespie@cindex unsigned greater than 1938*c87b03e5Sespie@item (gtu:@var{m} @var{x} @var{y}) 1939*c87b03e5SespieLike @code{gt} but does unsigned comparison, on fixed-point numbers only. 1940*c87b03e5Sespie 1941*c87b03e5Sespie@findex lt 1942*c87b03e5Sespie@cindex less than 1943*c87b03e5Sespie@findex ltu 1944*c87b03e5Sespie@cindex unsigned less than 1945*c87b03e5Sespie@item (lt:@var{m} @var{x} @var{y}) 1946*c87b03e5Sespie@itemx (ltu:@var{m} @var{x} @var{y}) 1947*c87b03e5SespieLike @code{gt} and @code{gtu} but test for ``less than''. 1948*c87b03e5Sespie 1949*c87b03e5Sespie@findex ge 1950*c87b03e5Sespie@cindex greater than 1951*c87b03e5Sespie@findex geu 1952*c87b03e5Sespie@cindex unsigned greater than 1953*c87b03e5Sespie@item (ge:@var{m} @var{x} @var{y}) 1954*c87b03e5Sespie@itemx (geu:@var{m} @var{x} @var{y}) 1955*c87b03e5SespieLike @code{gt} and @code{gtu} but test for ``greater than or equal''. 1956*c87b03e5Sespie 1957*c87b03e5Sespie@findex le 1958*c87b03e5Sespie@cindex less than or equal 1959*c87b03e5Sespie@findex leu 1960*c87b03e5Sespie@cindex unsigned less than 1961*c87b03e5Sespie@item (le:@var{m} @var{x} @var{y}) 1962*c87b03e5Sespie@itemx (leu:@var{m} @var{x} @var{y}) 1963*c87b03e5SespieLike @code{gt} and @code{gtu} but test for ``less than or equal''. 1964*c87b03e5Sespie 1965*c87b03e5Sespie@findex if_then_else 1966*c87b03e5Sespie@item (if_then_else @var{cond} @var{then} @var{else}) 1967*c87b03e5SespieThis is not a comparison operation but is listed here because it is 1968*c87b03e5Sespiealways used in conjunction with a comparison operation. To be 1969*c87b03e5Sespieprecise, @var{cond} is a comparison expression. This expression 1970*c87b03e5Sespierepresents a choice, according to @var{cond}, between the value 1971*c87b03e5Sespierepresented by @var{then} and the one represented by @var{else}. 1972*c87b03e5Sespie 1973*c87b03e5SespieOn most machines, @code{if_then_else} expressions are valid only 1974*c87b03e5Sespieto express conditional jumps. 1975*c87b03e5Sespie 1976*c87b03e5Sespie@findex cond 1977*c87b03e5Sespie@item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default}) 1978*c87b03e5SespieSimilar to @code{if_then_else}, but more general. Each of @var{test1}, 1979*c87b03e5Sespie@var{test2}, @dots{} is performed in turn. The result of this expression is 1980*c87b03e5Sespiethe @var{value} corresponding to the first nonzero test, or @var{default} if 1981*c87b03e5Sespienone of the tests are nonzero expressions. 1982*c87b03e5Sespie 1983*c87b03e5SespieThis is currently not valid for instruction patterns and is supported only 1984*c87b03e5Sespiefor insn attributes. @xref{Insn Attributes}. 1985*c87b03e5Sespie@end table 1986*c87b03e5Sespie 1987*c87b03e5Sespie@node Bit-Fields 1988*c87b03e5Sespie@section Bit-Fields 1989*c87b03e5Sespie@cindex bit-fields 1990*c87b03e5Sespie 1991*c87b03e5SespieSpecial expression codes exist to represent bit-field instructions. 1992*c87b03e5SespieThese types of expressions are lvalues in RTL; they may appear 1993*c87b03e5Sespieon the left side of an assignment, indicating insertion of a value 1994*c87b03e5Sespieinto the specified bit-field. 1995*c87b03e5Sespie 1996*c87b03e5Sespie@table @code 1997*c87b03e5Sespie@findex sign_extract 1998*c87b03e5Sespie@cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract} 1999*c87b03e5Sespie@item (sign_extract:@var{m} @var{loc} @var{size} @var{pos}) 2000*c87b03e5SespieThis represents a reference to a sign-extended bit-field contained or 2001*c87b03e5Sespiestarting in @var{loc} (a memory or register reference). The bit-field 2002*c87b03e5Sespieis @var{size} bits wide and starts at bit @var{pos}. The compilation 2003*c87b03e5Sespieoption @code{BITS_BIG_ENDIAN} says which end of the memory unit 2004*c87b03e5Sespie@var{pos} counts from. 2005*c87b03e5Sespie 2006*c87b03e5SespieIf @var{loc} is in memory, its mode must be a single-byte integer mode. 2007*c87b03e5SespieIf @var{loc} is in a register, the mode to use is specified by the 2008*c87b03e5Sespieoperand of the @code{insv} or @code{extv} pattern 2009*c87b03e5Sespie(@pxref{Standard Names}) and is usually a full-word integer mode, 2010*c87b03e5Sespiewhich is the default if none is specified. 2011*c87b03e5Sespie 2012*c87b03e5SespieThe mode of @var{pos} is machine-specific and is also specified 2013*c87b03e5Sespiein the @code{insv} or @code{extv} pattern. 2014*c87b03e5Sespie 2015*c87b03e5SespieThe mode @var{m} is the same as the mode that would be used for 2016*c87b03e5Sespie@var{loc} if it were a register. 2017*c87b03e5Sespie 2018*c87b03e5Sespie@findex zero_extract 2019*c87b03e5Sespie@item (zero_extract:@var{m} @var{loc} @var{size} @var{pos}) 2020*c87b03e5SespieLike @code{sign_extract} but refers to an unsigned or zero-extended 2021*c87b03e5Sespiebit-field. The same sequence of bits are extracted, but they 2022*c87b03e5Sespieare filled to an entire word with zeros instead of by sign-extension. 2023*c87b03e5Sespie@end table 2024*c87b03e5Sespie 2025*c87b03e5Sespie@node Vector Operations 2026*c87b03e5Sespie@section Vector Operations 2027*c87b03e5Sespie@cindex vector operations 2028*c87b03e5Sespie 2029*c87b03e5SespieAll normal RTL expressions can be used with vector modes; they are 2030*c87b03e5Sespieinterpreted as operating on each part of the vector independently. 2031*c87b03e5SespieAdditionally, there are a few new expressions to describe specific vector 2032*c87b03e5Sespieoperations. 2033*c87b03e5Sespie 2034*c87b03e5Sespie@table @code 2035*c87b03e5Sespie@findex vec_merge 2036*c87b03e5Sespie@item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items}) 2037*c87b03e5SespieThis describes a merge operation between two vectors. The result is a vector 2038*c87b03e5Sespieof mode @var{m}; its elements are selected from either @var{vec1} or 2039*c87b03e5Sespie@var{vec2}. Which elements are selected is described by @var{items}, which 2040*c87b03e5Sespieis a bit mask represented by a @code{const_int}; a zero bit indicates the 2041*c87b03e5Sespiecorresponding element in the result vector is taken from @var{vec2} while 2042*c87b03e5Sespiea set bit indicates it is taken from @var{vec1}. 2043*c87b03e5Sespie 2044*c87b03e5Sespie@findex vec_select 2045*c87b03e5Sespie@item (vec_select:@var{m} @var{vec1} @var{selection}) 2046*c87b03e5SespieThis describes an operation that selects parts of a vector. @var{vec1} is 2047*c87b03e5Sespiethe source vector, @var{selection} is a @code{parallel} that contains a 2048*c87b03e5Sespie@code{const_int} for each of the subparts of the result vector, giving the 2049*c87b03e5Sespienumber of the source subpart that should be stored into it. 2050*c87b03e5Sespie 2051*c87b03e5Sespie@findex vec_concat 2052*c87b03e5Sespie@item (vec_concat:@var{m} @var{vec1} @var{vec2}) 2053*c87b03e5SespieDescribes a vector concat operation. The result is a concatenation of the 2054*c87b03e5Sespievectors @var{vec1} and @var{vec2}; its length is the sum of the lengths of 2055*c87b03e5Sespiethe two inputs. 2056*c87b03e5Sespie 2057*c87b03e5Sespie@findex vec_const 2058*c87b03e5Sespie@item (vec_const:@var{m} @var{subparts}) 2059*c87b03e5SespieThis describes a constant vector. @var{subparts} is a @code{parallel} that 2060*c87b03e5Sespiecontains a constant for each of the subparts of the vector. 2061*c87b03e5Sespie 2062*c87b03e5Sespie@findex vec_duplicate 2063*c87b03e5Sespie@item (vec_duplicate:@var{m} @var{vec}) 2064*c87b03e5SespieThis operation converts a small vector into a larger one by duplicating the 2065*c87b03e5Sespieinput values. The output vector mode must have the same submodes as the 2066*c87b03e5Sespieinput vector mode, and the number of output parts must be an integer multiple 2067*c87b03e5Sespieof the number of input parts. 2068*c87b03e5Sespie 2069*c87b03e5Sespie@end table 2070*c87b03e5Sespie 2071*c87b03e5Sespie@node Conversions 2072*c87b03e5Sespie@section Conversions 2073*c87b03e5Sespie@cindex conversions 2074*c87b03e5Sespie@cindex machine mode conversions 2075*c87b03e5Sespie 2076*c87b03e5SespieAll conversions between machine modes must be represented by 2077*c87b03e5Sespieexplicit conversion operations. For example, an expression 2078*c87b03e5Sespiewhich is the sum of a byte and a full word cannot be written as 2079*c87b03e5Sespie@code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus} 2080*c87b03e5Sespieoperation requires two operands of the same machine mode. 2081*c87b03e5SespieTherefore, the byte-sized operand is enclosed in a conversion 2082*c87b03e5Sespieoperation, as in 2083*c87b03e5Sespie 2084*c87b03e5Sespie@example 2085*c87b03e5Sespie(plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80)) 2086*c87b03e5Sespie@end example 2087*c87b03e5Sespie 2088*c87b03e5SespieThe conversion operation is not a mere placeholder, because there 2089*c87b03e5Sespiemay be more than one way of converting from a given starting mode 2090*c87b03e5Sespieto the desired final mode. The conversion operation code says how 2091*c87b03e5Sespieto do it. 2092*c87b03e5Sespie 2093*c87b03e5SespieFor all conversion operations, @var{x} must not be @code{VOIDmode} 2094*c87b03e5Sespiebecause the mode in which to do the conversion would not be known. 2095*c87b03e5SespieThe conversion must either be done at compile-time or @var{x} 2096*c87b03e5Sespiemust be placed into a register. 2097*c87b03e5Sespie 2098*c87b03e5Sespie@table @code 2099*c87b03e5Sespie@findex sign_extend 2100*c87b03e5Sespie@item (sign_extend:@var{m} @var{x}) 2101*c87b03e5SespieRepresents the result of sign-extending the value @var{x} 2102*c87b03e5Sespieto machine mode @var{m}. @var{m} must be a fixed-point mode 2103*c87b03e5Sespieand @var{x} a fixed-point value of a mode narrower than @var{m}. 2104*c87b03e5Sespie 2105*c87b03e5Sespie@findex zero_extend 2106*c87b03e5Sespie@item (zero_extend:@var{m} @var{x}) 2107*c87b03e5SespieRepresents the result of zero-extending the value @var{x} 2108*c87b03e5Sespieto machine mode @var{m}. @var{m} must be a fixed-point mode 2109*c87b03e5Sespieand @var{x} a fixed-point value of a mode narrower than @var{m}. 2110*c87b03e5Sespie 2111*c87b03e5Sespie@findex float_extend 2112*c87b03e5Sespie@item (float_extend:@var{m} @var{x}) 2113*c87b03e5SespieRepresents the result of extending the value @var{x} 2114*c87b03e5Sespieto machine mode @var{m}. @var{m} must be a floating point mode 2115*c87b03e5Sespieand @var{x} a floating point value of a mode narrower than @var{m}. 2116*c87b03e5Sespie 2117*c87b03e5Sespie@findex truncate 2118*c87b03e5Sespie@item (truncate:@var{m} @var{x}) 2119*c87b03e5SespieRepresents the result of truncating the value @var{x} 2120*c87b03e5Sespieto machine mode @var{m}. @var{m} must be a fixed-point mode 2121*c87b03e5Sespieand @var{x} a fixed-point value of a mode wider than @var{m}. 2122*c87b03e5Sespie 2123*c87b03e5Sespie@findex ss_truncate 2124*c87b03e5Sespie@item (ss_truncate:@var{m} @var{x}) 2125*c87b03e5SespieRepresents the result of truncating the value @var{x} 2126*c87b03e5Sespieto machine mode @var{m}, using signed saturation in the case of 2127*c87b03e5Sespieoverflow. Both @var{m} and the mode of @var{x} must be fixed-point 2128*c87b03e5Sespiemodes. 2129*c87b03e5Sespie 2130*c87b03e5Sespie@findex us_truncate 2131*c87b03e5Sespie@item (us_truncate:@var{m} @var{x}) 2132*c87b03e5SespieRepresents the result of truncating the value @var{x} 2133*c87b03e5Sespieto machine mode @var{m}, using unsigned saturation in the case of 2134*c87b03e5Sespieoverflow. Both @var{m} and the mode of @var{x} must be fixed-point 2135*c87b03e5Sespiemodes. 2136*c87b03e5Sespie 2137*c87b03e5Sespie@findex float_truncate 2138*c87b03e5Sespie@item (float_truncate:@var{m} @var{x}) 2139*c87b03e5SespieRepresents the result of truncating the value @var{x} 2140*c87b03e5Sespieto machine mode @var{m}. @var{m} must be a floating point mode 2141*c87b03e5Sespieand @var{x} a floating point value of a mode wider than @var{m}. 2142*c87b03e5Sespie 2143*c87b03e5Sespie@findex float 2144*c87b03e5Sespie@item (float:@var{m} @var{x}) 2145*c87b03e5SespieRepresents the result of converting fixed point value @var{x}, 2146*c87b03e5Sespieregarded as signed, to floating point mode @var{m}. 2147*c87b03e5Sespie 2148*c87b03e5Sespie@findex unsigned_float 2149*c87b03e5Sespie@item (unsigned_float:@var{m} @var{x}) 2150*c87b03e5SespieRepresents the result of converting fixed point value @var{x}, 2151*c87b03e5Sespieregarded as unsigned, to floating point mode @var{m}. 2152*c87b03e5Sespie 2153*c87b03e5Sespie@findex fix 2154*c87b03e5Sespie@item (fix:@var{m} @var{x}) 2155*c87b03e5SespieWhen @var{m} is a fixed point mode, represents the result of 2156*c87b03e5Sespieconverting floating point value @var{x} to mode @var{m}, regarded as 2157*c87b03e5Sespiesigned. How rounding is done is not specified, so this operation may 2158*c87b03e5Sespiebe used validly in compiling C code only for integer-valued operands. 2159*c87b03e5Sespie 2160*c87b03e5Sespie@findex unsigned_fix 2161*c87b03e5Sespie@item (unsigned_fix:@var{m} @var{x}) 2162*c87b03e5SespieRepresents the result of converting floating point value @var{x} to 2163*c87b03e5Sespiefixed point mode @var{m}, regarded as unsigned. How rounding is done 2164*c87b03e5Sespieis not specified. 2165*c87b03e5Sespie 2166*c87b03e5Sespie@findex fix 2167*c87b03e5Sespie@item (fix:@var{m} @var{x}) 2168*c87b03e5SespieWhen @var{m} is a floating point mode, represents the result of 2169*c87b03e5Sespieconverting floating point value @var{x} (valid for mode @var{m}) to an 2170*c87b03e5Sespieinteger, still represented in floating point mode @var{m}, by rounding 2171*c87b03e5Sespietowards zero. 2172*c87b03e5Sespie@end table 2173*c87b03e5Sespie 2174*c87b03e5Sespie@node RTL Declarations 2175*c87b03e5Sespie@section Declarations 2176*c87b03e5Sespie@cindex RTL declarations 2177*c87b03e5Sespie@cindex declarations, RTL 2178*c87b03e5Sespie 2179*c87b03e5SespieDeclaration expression codes do not represent arithmetic operations 2180*c87b03e5Sespiebut rather state assertions about their operands. 2181*c87b03e5Sespie 2182*c87b03e5Sespie@table @code 2183*c87b03e5Sespie@findex strict_low_part 2184*c87b03e5Sespie@cindex @code{subreg}, in @code{strict_low_part} 2185*c87b03e5Sespie@item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0)) 2186*c87b03e5SespieThis expression code is used in only one context: as the destination operand of a 2187*c87b03e5Sespie@code{set} expression. In addition, the operand of this expression 2188*c87b03e5Sespiemust be a non-paradoxical @code{subreg} expression. 2189*c87b03e5Sespie 2190*c87b03e5SespieThe presence of @code{strict_low_part} says that the part of the 2191*c87b03e5Sespieregister which is meaningful in mode @var{n}, but is not part of 2192*c87b03e5Sespiemode @var{m}, is not to be altered. Normally, an assignment to such 2193*c87b03e5Sespiea subreg is allowed to have undefined effects on the rest of the 2194*c87b03e5Sespieregister when @var{m} is less than a word. 2195*c87b03e5Sespie@end table 2196*c87b03e5Sespie 2197*c87b03e5Sespie@node Side Effects 2198*c87b03e5Sespie@section Side Effect Expressions 2199*c87b03e5Sespie@cindex RTL side effect expressions 2200*c87b03e5Sespie 2201*c87b03e5SespieThe expression codes described so far represent values, not actions. 2202*c87b03e5SespieBut machine instructions never produce values; they are meaningful 2203*c87b03e5Sespieonly for their side effects on the state of the machine. Special 2204*c87b03e5Sespieexpression codes are used to represent side effects. 2205*c87b03e5Sespie 2206*c87b03e5SespieThe body of an instruction is always one of these side effect codes; 2207*c87b03e5Sespiethe codes described above, which represent values, appear only as 2208*c87b03e5Sespiethe operands of these. 2209*c87b03e5Sespie 2210*c87b03e5Sespie@table @code 2211*c87b03e5Sespie@findex set 2212*c87b03e5Sespie@item (set @var{lval} @var{x}) 2213*c87b03e5SespieRepresents the action of storing the value of @var{x} into the place 2214*c87b03e5Sespierepresented by @var{lval}. @var{lval} must be an expression 2215*c87b03e5Sespierepresenting a place that can be stored in: @code{reg} (or @code{subreg}, 2216*c87b03e5Sespie@code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc}, 2217*c87b03e5Sespie@code{parallel}, or @code{cc0}. 2218*c87b03e5Sespie 2219*c87b03e5SespieIf @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a 2220*c87b03e5Sespiemachine mode; then @var{x} must be valid for that mode. 2221*c87b03e5Sespie 2222*c87b03e5SespieIf @var{lval} is a @code{reg} whose machine mode is less than the full 2223*c87b03e5Sespiewidth of the register, then it means that the part of the register 2224*c87b03e5Sespiespecified by the machine mode is given the specified value and the 2225*c87b03e5Sespierest of the register receives an undefined value. Likewise, if 2226*c87b03e5Sespie@var{lval} is a @code{subreg} whose machine mode is narrower than 2227*c87b03e5Sespiethe mode of the register, the rest of the register can be changed in 2228*c87b03e5Sespiean undefined way. 2229*c87b03e5Sespie 2230*c87b03e5SespieIf @var{lval} is a @code{strict_low_part} or @code{zero_extract} 2231*c87b03e5Sespieof a @code{subreg}, then the part of the register specified by the 2232*c87b03e5Sespiemachine mode of the @code{subreg} is given the value @var{x} and 2233*c87b03e5Sespiethe rest of the register is not changed. 2234*c87b03e5Sespie 2235*c87b03e5SespieIf @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may 2236*c87b03e5Sespiebe either a @code{compare} expression or a value that may have any mode. 2237*c87b03e5SespieThe latter case represents a ``test'' instruction. The expression 2238*c87b03e5Sespie@code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to 2239*c87b03e5Sespie@code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}. 2240*c87b03e5SespieUse the former expression to save space during the compilation. 2241*c87b03e5Sespie 2242*c87b03e5SespieIf @var{lval} is a @code{parallel}, it is used to represent the case of 2243*c87b03e5Sespiea function returning a structure in multiple registers. Each element 2244*c87b03e5Sespieof the @code{parallel} is an @code{expr_list} whose first operand is a 2245*c87b03e5Sespie@code{reg} and whose second operand is a @code{const_int} representing the 2246*c87b03e5Sespieoffset (in bytes) into the structure at which the data in that register 2247*c87b03e5Sespiecorresponds. The first element may be null to indicate that the structure 2248*c87b03e5Sespieis also passed partly in memory. 2249*c87b03e5Sespie 2250*c87b03e5Sespie@cindex jump instructions and @code{set} 2251*c87b03e5Sespie@cindex @code{if_then_else} usage 2252*c87b03e5SespieIf @var{lval} is @code{(pc)}, we have a jump instruction, and the 2253*c87b03e5Sespiepossibilities for @var{x} are very limited. It may be a 2254*c87b03e5Sespie@code{label_ref} expression (unconditional jump). It may be an 2255*c87b03e5Sespie@code{if_then_else} (conditional jump), in which case either the 2256*c87b03e5Sespiesecond or the third operand must be @code{(pc)} (for the case which 2257*c87b03e5Sespiedoes not jump) and the other of the two must be a @code{label_ref} 2258*c87b03e5Sespie(for the case which does jump). @var{x} may also be a @code{mem} or 2259*c87b03e5Sespie@code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a 2260*c87b03e5Sespie@code{mem}; these unusual patterns are used to represent jumps through 2261*c87b03e5Sespiebranch tables. 2262*c87b03e5Sespie 2263*c87b03e5SespieIf @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of 2264*c87b03e5Sespie@var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be 2265*c87b03e5Sespievalid for the mode of @var{lval}. 2266*c87b03e5Sespie 2267*c87b03e5Sespie@findex SET_DEST 2268*c87b03e5Sespie@findex SET_SRC 2269*c87b03e5Sespie@var{lval} is customarily accessed with the @code{SET_DEST} macro and 2270*c87b03e5Sespie@var{x} with the @code{SET_SRC} macro. 2271*c87b03e5Sespie 2272*c87b03e5Sespie@findex return 2273*c87b03e5Sespie@item (return) 2274*c87b03e5SespieAs the sole expression in a pattern, represents a return from the 2275*c87b03e5Sespiecurrent function, on machines where this can be done with one 2276*c87b03e5Sespieinstruction, such as VAXen. On machines where a multi-instruction 2277*c87b03e5Sespie``epilogue'' must be executed in order to return from the function, 2278*c87b03e5Sespiereturning is done by jumping to a label which precedes the epilogue, and 2279*c87b03e5Sespiethe @code{return} expression code is never used. 2280*c87b03e5Sespie 2281*c87b03e5SespieInside an @code{if_then_else} expression, represents the value to be 2282*c87b03e5Sespieplaced in @code{pc} to return to the caller. 2283*c87b03e5Sespie 2284*c87b03e5SespieNote that an insn pattern of @code{(return)} is logically equivalent to 2285*c87b03e5Sespie@code{(set (pc) (return))}, but the latter form is never used. 2286*c87b03e5Sespie 2287*c87b03e5Sespie@findex call 2288*c87b03e5Sespie@item (call @var{function} @var{nargs}) 2289*c87b03e5SespieRepresents a function call. @var{function} is a @code{mem} expression 2290*c87b03e5Sespiewhose address is the address of the function to be called. 2291*c87b03e5Sespie@var{nargs} is an expression which can be used for two purposes: on 2292*c87b03e5Sespiesome machines it represents the number of bytes of stack argument; on 2293*c87b03e5Sespieothers, it represents the number of argument registers. 2294*c87b03e5Sespie 2295*c87b03e5SespieEach machine has a standard machine mode which @var{function} must 2296*c87b03e5Sespiehave. The machine description defines macro @code{FUNCTION_MODE} to 2297*c87b03e5Sespieexpand into the requisite mode name. The purpose of this mode is to 2298*c87b03e5Sespiespecify what kind of addressing is allowed, on machines where the 2299*c87b03e5Sespieallowed kinds of addressing depend on the machine mode being 2300*c87b03e5Sespieaddressed. 2301*c87b03e5Sespie 2302*c87b03e5Sespie@findex clobber 2303*c87b03e5Sespie@item (clobber @var{x}) 2304*c87b03e5SespieRepresents the storing or possible storing of an unpredictable, 2305*c87b03e5Sespieundescribed value into @var{x}, which must be a @code{reg}, 2306*c87b03e5Sespie@code{scratch}, @code{parallel} or @code{mem} expression. 2307*c87b03e5Sespie 2308*c87b03e5SespieOne place this is used is in string instructions that store standard 2309*c87b03e5Sespievalues into particular hard registers. It may not be worth the 2310*c87b03e5Sespietrouble to describe the values that are stored, but it is essential to 2311*c87b03e5Sespieinform the compiler that the registers will be altered, lest it 2312*c87b03e5Sespieattempt to keep data in them across the string instruction. 2313*c87b03e5Sespie 2314*c87b03e5SespieIf @var{x} is @code{(mem:BLK (const_int 0))} or 2315*c87b03e5Sespie@code{(mem:BLK (scratch))}, it means that all memory 2316*c87b03e5Sespielocations must be presumed clobbered. If @var{x} is a @code{parallel}, 2317*c87b03e5Sespieit has the same meaning as a @code{parallel} in a @code{set} expression. 2318*c87b03e5Sespie 2319*c87b03e5SespieNote that the machine description classifies certain hard registers as 2320*c87b03e5Sespie``call-clobbered''. All function call instructions are assumed by 2321*c87b03e5Sespiedefault to clobber these registers, so there is no need to use 2322*c87b03e5Sespie@code{clobber} expressions to indicate this fact. Also, each function 2323*c87b03e5Sespiecall is assumed to have the potential to alter any memory location, 2324*c87b03e5Sespieunless the function is declared @code{const}. 2325*c87b03e5Sespie 2326*c87b03e5SespieIf the last group of expressions in a @code{parallel} are each a 2327*c87b03e5Sespie@code{clobber} expression whose arguments are @code{reg} or 2328*c87b03e5Sespie@code{match_scratch} (@pxref{RTL Template}) expressions, the combiner 2329*c87b03e5Sespiephase can add the appropriate @code{clobber} expressions to an insn it 2330*c87b03e5Sespiehas constructed when doing so will cause a pattern to be matched. 2331*c87b03e5Sespie 2332*c87b03e5SespieThis feature can be used, for example, on a machine that whose multiply 2333*c87b03e5Sespieand add instructions don't use an MQ register but which has an 2334*c87b03e5Sespieadd-accumulate instruction that does clobber the MQ register. Similarly, 2335*c87b03e5Sespiea combined instruction might require a temporary register while the 2336*c87b03e5Sespieconstituent instructions might not. 2337*c87b03e5Sespie 2338*c87b03e5SespieWhen a @code{clobber} expression for a register appears inside a 2339*c87b03e5Sespie@code{parallel} with other side effects, the register allocator 2340*c87b03e5Sespieguarantees that the register is unoccupied both before and after that 2341*c87b03e5Sespieinsn. However, the reload phase may allocate a register used for one of 2342*c87b03e5Sespiethe inputs unless the @samp{&} constraint is specified for the selected 2343*c87b03e5Sespiealternative (@pxref{Modifiers}). You can clobber either a specific hard 2344*c87b03e5Sespieregister, a pseudo register, or a @code{scratch} expression; in the 2345*c87b03e5Sespielatter two cases, GCC will allocate a hard register that is available 2346*c87b03e5Sespiethere for use as a temporary. 2347*c87b03e5Sespie 2348*c87b03e5SespieFor instructions that require a temporary register, you should use 2349*c87b03e5Sespie@code{scratch} instead of a pseudo-register because this will allow the 2350*c87b03e5Sespiecombiner phase to add the @code{clobber} when required. You do this by 2351*c87b03e5Sespiecoding (@code{clobber} (@code{match_scratch} @dots{})). If you do 2352*c87b03e5Sespieclobber a pseudo register, use one which appears nowhere else---generate 2353*c87b03e5Sespiea new one each time. Otherwise, you may confuse CSE@. 2354*c87b03e5Sespie 2355*c87b03e5SespieThere is one other known use for clobbering a pseudo register in a 2356*c87b03e5Sespie@code{parallel}: when one of the input operands of the insn is also 2357*c87b03e5Sespieclobbered by the insn. In this case, using the same pseudo register in 2358*c87b03e5Sespiethe clobber and elsewhere in the insn produces the expected results. 2359*c87b03e5Sespie 2360*c87b03e5Sespie@findex use 2361*c87b03e5Sespie@item (use @var{x}) 2362*c87b03e5SespieRepresents the use of the value of @var{x}. It indicates that the 2363*c87b03e5Sespievalue in @var{x} at this point in the program is needed, even though 2364*c87b03e5Sespieit may not be apparent why this is so. Therefore, the compiler will 2365*c87b03e5Sespienot attempt to delete previous instructions whose only effect is to 2366*c87b03e5Sespiestore a value in @var{x}. @var{x} must be a @code{reg} expression. 2367*c87b03e5Sespie 2368*c87b03e5SespieIn some situations, it may be tempting to add a @code{use} of a 2369*c87b03e5Sespieregister in a @code{parallel} to describe a situation where the value 2370*c87b03e5Sespieof a special register will modify the behavior of the instruction. 2371*c87b03e5SespieAn hypothetical example might be a pattern for an addition that can 2372*c87b03e5Sespieeither wrap around or use saturating addition depending on the value 2373*c87b03e5Sespieof a special control register: 2374*c87b03e5Sespie 2375*c87b03e5Sespie@smallexample 2376*c87b03e5Sespie(parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3) 2377*c87b03e5Sespie (reg:SI 4)] 0)) 2378*c87b03e5Sespie (use (reg:SI 1))]) 2379*c87b03e5Sespie@end smallexample 2380*c87b03e5Sespie 2381*c87b03e5Sespie@noindent 2382*c87b03e5Sespie 2383*c87b03e5SespieThis will not work, several of the optimizers only look at expressions 2384*c87b03e5Sespielocally; it is very likely that if you have multiple insns with 2385*c87b03e5Sespieidentical inputs to the @code{unspec}, they will be optimized away even 2386*c87b03e5Sespieif register 1 changes in between. 2387*c87b03e5Sespie 2388*c87b03e5SespieThis means that @code{use} can @emph{only} be used to describe 2389*c87b03e5Sespiethat the register is live. You should think twice before adding 2390*c87b03e5Sespie@code{use} statements, more often you will want to use @code{unspec} 2391*c87b03e5Sespieinstead. The @code{use} RTX is most commonly useful to describe that 2392*c87b03e5Sespiea fixed register is implicitly used in an insn. It is also safe to use 2393*c87b03e5Sespiein patterns where the compiler knows for other reasons that the result 2394*c87b03e5Sespieof the whole pattern is variable, such as @samp{movstr@var{m}} or 2395*c87b03e5Sespie@samp{call} patterns. 2396*c87b03e5Sespie 2397*c87b03e5SespieDuring the reload phase, an insn that has a @code{use} as pattern 2398*c87b03e5Sespiecan carry a reg_equal note. These @code{use} insns will be deleted 2399*c87b03e5Sespiebefore the reload phase exits. 2400*c87b03e5Sespie 2401*c87b03e5SespieDuring the delayed branch scheduling phase, @var{x} may be an insn. 2402*c87b03e5SespieThis indicates that @var{x} previously was located at this place in the 2403*c87b03e5Sespiecode and its data dependencies need to be taken into account. These 2404*c87b03e5Sespie@code{use} insns will be deleted before the delayed branch scheduling 2405*c87b03e5Sespiephase exits. 2406*c87b03e5Sespie 2407*c87b03e5Sespie@findex parallel 2408*c87b03e5Sespie@item (parallel [@var{x0} @var{x1} @dots{}]) 2409*c87b03e5SespieRepresents several side effects performed in parallel. The square 2410*c87b03e5Sespiebrackets stand for a vector; the operand of @code{parallel} is a 2411*c87b03e5Sespievector of expressions. @var{x0}, @var{x1} and so on are individual 2412*c87b03e5Sespieside effect expressions---expressions of code @code{set}, @code{call}, 2413*c87b03e5Sespie@code{return}, @code{clobber} or @code{use}. 2414*c87b03e5Sespie 2415*c87b03e5Sespie``In parallel'' means that first all the values used in the individual 2416*c87b03e5Sespieside-effects are computed, and second all the actual side-effects are 2417*c87b03e5Sespieperformed. For example, 2418*c87b03e5Sespie 2419*c87b03e5Sespie@example 2420*c87b03e5Sespie(parallel [(set (reg:SI 1) (mem:SI (reg:SI 1))) 2421*c87b03e5Sespie (set (mem:SI (reg:SI 1)) (reg:SI 1))]) 2422*c87b03e5Sespie@end example 2423*c87b03e5Sespie 2424*c87b03e5Sespie@noindent 2425*c87b03e5Sespiesays unambiguously that the values of hard register 1 and the memory 2426*c87b03e5Sespielocation addressed by it are interchanged. In both places where 2427*c87b03e5Sespie@code{(reg:SI 1)} appears as a memory address it refers to the value 2428*c87b03e5Sespiein register 1 @emph{before} the execution of the insn. 2429*c87b03e5Sespie 2430*c87b03e5SespieIt follows that it is @emph{incorrect} to use @code{parallel} and 2431*c87b03e5Sespieexpect the result of one @code{set} to be available for the next one. 2432*c87b03e5SespieFor example, people sometimes attempt to represent a jump-if-zero 2433*c87b03e5Sespieinstruction this way: 2434*c87b03e5Sespie 2435*c87b03e5Sespie@example 2436*c87b03e5Sespie(parallel [(set (cc0) (reg:SI 34)) 2437*c87b03e5Sespie (set (pc) (if_then_else 2438*c87b03e5Sespie (eq (cc0) (const_int 0)) 2439*c87b03e5Sespie (label_ref @dots{}) 2440*c87b03e5Sespie (pc)))]) 2441*c87b03e5Sespie@end example 2442*c87b03e5Sespie 2443*c87b03e5Sespie@noindent 2444*c87b03e5SespieBut this is incorrect, because it says that the jump condition depends 2445*c87b03e5Sespieon the condition code value @emph{before} this instruction, not on the 2446*c87b03e5Sespienew value that is set by this instruction. 2447*c87b03e5Sespie 2448*c87b03e5Sespie@cindex peephole optimization, RTL representation 2449*c87b03e5SespiePeephole optimization, which takes place together with final assembly 2450*c87b03e5Sespiecode output, can produce insns whose patterns consist of a @code{parallel} 2451*c87b03e5Sespiewhose elements are the operands needed to output the resulting 2452*c87b03e5Sespieassembler code---often @code{reg}, @code{mem} or constant expressions. 2453*c87b03e5SespieThis would not be well-formed RTL at any other stage in compilation, 2454*c87b03e5Sespiebut it is ok then because no further optimization remains to be done. 2455*c87b03e5SespieHowever, the definition of the macro @code{NOTICE_UPDATE_CC}, if 2456*c87b03e5Sespieany, must deal with such insns if you define any peephole optimizations. 2457*c87b03e5Sespie 2458*c87b03e5Sespie@findex cond_exec 2459*c87b03e5Sespie@item (cond_exec [@var{cond} @var{expr}]) 2460*c87b03e5SespieRepresents a conditionally executed expression. The @var{expr} is 2461*c87b03e5Sespieexecuted only if the @var{cond} is nonzero. The @var{cond} expression 2462*c87b03e5Sespiemust not have side-effects, but the @var{expr} may very well have 2463*c87b03e5Sespieside-effects. 2464*c87b03e5Sespie 2465*c87b03e5Sespie@findex sequence 2466*c87b03e5Sespie@item (sequence [@var{insns} @dots{}]) 2467*c87b03e5SespieRepresents a sequence of insns. Each of the @var{insns} that appears 2468*c87b03e5Sespiein the vector is suitable for appearing in the chain of insns, so it 2469*c87b03e5Sespiemust be an @code{insn}, @code{jump_insn}, @code{call_insn}, 2470*c87b03e5Sespie@code{code_label}, @code{barrier} or @code{note}. 2471*c87b03e5Sespie 2472*c87b03e5SespieA @code{sequence} RTX is never placed in an actual insn during RTL 2473*c87b03e5Sespiegeneration. It represents the sequence of insns that result from a 2474*c87b03e5Sespie@code{define_expand} @emph{before} those insns are passed to 2475*c87b03e5Sespie@code{emit_insn} to insert them in the chain of insns. When actually 2476*c87b03e5Sespieinserted, the individual sub-insns are separated out and the 2477*c87b03e5Sespie@code{sequence} is forgotten. 2478*c87b03e5Sespie 2479*c87b03e5SespieAfter delay-slot scheduling is completed, an insn and all the insns that 2480*c87b03e5Sespiereside in its delay slots are grouped together into a @code{sequence}. 2481*c87b03e5SespieThe insn requiring the delay slot is the first insn in the vector; 2482*c87b03e5Sespiesubsequent insns are to be placed in the delay slot. 2483*c87b03e5Sespie 2484*c87b03e5Sespie@code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to 2485*c87b03e5Sespieindicate that a branch insn should be used that will conditionally annul 2486*c87b03e5Sespiethe effect of the insns in the delay slots. In such a case, 2487*c87b03e5Sespie@code{INSN_FROM_TARGET_P} indicates that the insn is from the target of 2488*c87b03e5Sespiethe branch and should be executed only if the branch is taken; otherwise 2489*c87b03e5Sespiethe insn should be executed only if the branch is not taken. 2490*c87b03e5Sespie@xref{Delay Slots}. 2491*c87b03e5Sespie@end table 2492*c87b03e5Sespie 2493*c87b03e5SespieThese expression codes appear in place of a side effect, as the body of 2494*c87b03e5Sespiean insn, though strictly speaking they do not always describe side 2495*c87b03e5Sespieeffects as such: 2496*c87b03e5Sespie 2497*c87b03e5Sespie@table @code 2498*c87b03e5Sespie@findex asm_input 2499*c87b03e5Sespie@item (asm_input @var{s}) 2500*c87b03e5SespieRepresents literal assembler code as described by the string @var{s}. 2501*c87b03e5Sespie 2502*c87b03e5Sespie@findex unspec 2503*c87b03e5Sespie@findex unspec_volatile 2504*c87b03e5Sespie@item (unspec [@var{operands} @dots{}] @var{index}) 2505*c87b03e5Sespie@itemx (unspec_volatile [@var{operands} @dots{}] @var{index}) 2506*c87b03e5SespieRepresents a machine-specific operation on @var{operands}. @var{index} 2507*c87b03e5Sespieselects between multiple machine-specific operations. 2508*c87b03e5Sespie@code{unspec_volatile} is used for volatile operations and operations 2509*c87b03e5Sespiethat may trap; @code{unspec} is used for other operations. 2510*c87b03e5Sespie 2511*c87b03e5SespieThese codes may appear inside a @code{pattern} of an 2512*c87b03e5Sespieinsn, inside a @code{parallel}, or inside an expression. 2513*c87b03e5Sespie 2514*c87b03e5Sespie@findex addr_vec 2515*c87b03e5Sespie@item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}]) 2516*c87b03e5SespieRepresents a table of jump addresses. The vector elements @var{lr0}, 2517*c87b03e5Sespieetc., are @code{label_ref} expressions. The mode @var{m} specifies 2518*c87b03e5Sespiehow much space is given to each address; normally @var{m} would be 2519*c87b03e5Sespie@code{Pmode}. 2520*c87b03e5Sespie 2521*c87b03e5Sespie@findex addr_diff_vec 2522*c87b03e5Sespie@item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags}) 2523*c87b03e5SespieRepresents a table of jump addresses expressed as offsets from 2524*c87b03e5Sespie@var{base}. The vector elements @var{lr0}, etc., are @code{label_ref} 2525*c87b03e5Sespieexpressions and so is @var{base}. The mode @var{m} specifies how much 2526*c87b03e5Sespiespace is given to each address-difference. @var{min} and @var{max} 2527*c87b03e5Sespieare set up by branch shortening and hold a label with a minimum and a 2528*c87b03e5Sespiemaximum address, respectively. @var{flags} indicates the relative 2529*c87b03e5Sespieposition of @var{base}, @var{min} and @var{max} to the containing insn 2530*c87b03e5Sespieand of @var{min} and @var{max} to @var{base}. See rtl.def for details. 2531*c87b03e5Sespie 2532*c87b03e5Sespie@findex prefetch 2533*c87b03e5Sespie@item (prefetch:@var{m} @var{addr} @var{rw} @var{locality}) 2534*c87b03e5SespieRepresents prefetch of memory at address @var{addr}. 2535*c87b03e5SespieOperand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise; 2536*c87b03e5Sespietargets that do not support write prefetches should treat this as a normal 2537*c87b03e5Sespieprefetch. 2538*c87b03e5SespieOperand @var{locality} specifies the amount of temporal locality; 0 if there 2539*c87b03e5Sespieis none or 1, 2, or 3 for increasing levels of temporal locality; 2540*c87b03e5Sespietargets that do not support locality hints should ignore this. 2541*c87b03e5Sespie 2542*c87b03e5SespieThis insn is used to minimize cache-miss latency by moving data into a 2543*c87b03e5Sespiecache before it is accessed. It should use only non-faulting data prefetch 2544*c87b03e5Sespieinstructions. 2545*c87b03e5Sespie@end table 2546*c87b03e5Sespie 2547*c87b03e5Sespie@node Incdec 2548*c87b03e5Sespie@section Embedded Side-Effects on Addresses 2549*c87b03e5Sespie@cindex RTL preincrement 2550*c87b03e5Sespie@cindex RTL postincrement 2551*c87b03e5Sespie@cindex RTL predecrement 2552*c87b03e5Sespie@cindex RTL postdecrement 2553*c87b03e5Sespie 2554*c87b03e5SespieSix special side-effect expression codes appear as memory addresses. 2555*c87b03e5Sespie 2556*c87b03e5Sespie@table @code 2557*c87b03e5Sespie@findex pre_dec 2558*c87b03e5Sespie@item (pre_dec:@var{m} @var{x}) 2559*c87b03e5SespieRepresents the side effect of decrementing @var{x} by a standard 2560*c87b03e5Sespieamount and represents also the value that @var{x} has after being 2561*c87b03e5Sespiedecremented. @var{x} must be a @code{reg} or @code{mem}, but most 2562*c87b03e5Sespiemachines allow only a @code{reg}. @var{m} must be the machine mode 2563*c87b03e5Sespiefor pointers on the machine in use. The amount @var{x} is decremented 2564*c87b03e5Sespieby is the length in bytes of the machine mode of the containing memory 2565*c87b03e5Sespiereference of which this expression serves as the address. Here is an 2566*c87b03e5Sespieexample of its use: 2567*c87b03e5Sespie 2568*c87b03e5Sespie@example 2569*c87b03e5Sespie(mem:DF (pre_dec:SI (reg:SI 39))) 2570*c87b03e5Sespie@end example 2571*c87b03e5Sespie 2572*c87b03e5Sespie@noindent 2573*c87b03e5SespieThis says to decrement pseudo register 39 by the length of a @code{DFmode} 2574*c87b03e5Sespievalue and use the result to address a @code{DFmode} value. 2575*c87b03e5Sespie 2576*c87b03e5Sespie@findex pre_inc 2577*c87b03e5Sespie@item (pre_inc:@var{m} @var{x}) 2578*c87b03e5SespieSimilar, but specifies incrementing @var{x} instead of decrementing it. 2579*c87b03e5Sespie 2580*c87b03e5Sespie@findex post_dec 2581*c87b03e5Sespie@item (post_dec:@var{m} @var{x}) 2582*c87b03e5SespieRepresents the same side effect as @code{pre_dec} but a different 2583*c87b03e5Sespievalue. The value represented here is the value @var{x} has @i{before} 2584*c87b03e5Sespiebeing decremented. 2585*c87b03e5Sespie 2586*c87b03e5Sespie@findex post_inc 2587*c87b03e5Sespie@item (post_inc:@var{m} @var{x}) 2588*c87b03e5SespieSimilar, but specifies incrementing @var{x} instead of decrementing it. 2589*c87b03e5Sespie 2590*c87b03e5Sespie@findex post_modify 2591*c87b03e5Sespie@item (post_modify:@var{m} @var{x} @var{y}) 2592*c87b03e5Sespie 2593*c87b03e5SespieRepresents the side effect of setting @var{x} to @var{y} and 2594*c87b03e5Sespierepresents @var{x} before @var{x} is modified. @var{x} must be a 2595*c87b03e5Sespie@code{reg} or @code{mem}, but most machines allow only a @code{reg}. 2596*c87b03e5Sespie@var{m} must be the machine mode for pointers on the machine in use. 2597*c87b03e5Sespie 2598*c87b03e5SespieThe expression @var{y} must be one of three forms: 2599*c87b03e5Sespie@table @code 2600*c87b03e5Sespie@code{(plus:@var{m} @var{x} @var{z})}, 2601*c87b03e5Sespie@code{(minus:@var{m} @var{x} @var{z})}, or 2602*c87b03e5Sespie@code{(plus:@var{m} @var{x} @var{i})}, 2603*c87b03e5Sespie@end table 2604*c87b03e5Sespiewhere @var{z} is an index register and @var{i} is a constant. 2605*c87b03e5Sespie 2606*c87b03e5SespieHere is an example of its use: 2607*c87b03e5Sespie 2608*c87b03e5Sespie@smallexample 2609*c87b03e5Sespie(mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42) 2610*c87b03e5Sespie (reg:SI 48)))) 2611*c87b03e5Sespie@end smallexample 2612*c87b03e5Sespie 2613*c87b03e5SespieThis says to modify pseudo register 42 by adding the contents of pseudo 2614*c87b03e5Sespieregister 48 to it, after the use of what ever 42 points to. 2615*c87b03e5Sespie 2616*c87b03e5Sespie@findex pre_modify 2617*c87b03e5Sespie@item (pre_modify:@var{m} @var{x} @var{expr}) 2618*c87b03e5SespieSimilar except side effects happen before the use. 2619*c87b03e5Sespie@end table 2620*c87b03e5Sespie 2621*c87b03e5SespieThese embedded side effect expressions must be used with care. Instruction 2622*c87b03e5Sespiepatterns may not use them. Until the @samp{flow} pass of the compiler, 2623*c87b03e5Sespiethey may occur only to represent pushes onto the stack. The @samp{flow} 2624*c87b03e5Sespiepass finds cases where registers are incremented or decremented in one 2625*c87b03e5Sespieinstruction and used as an address shortly before or after; these cases are 2626*c87b03e5Sespiethen transformed to use pre- or post-increment or -decrement. 2627*c87b03e5Sespie 2628*c87b03e5SespieIf a register used as the operand of these expressions is used in 2629*c87b03e5Sespieanother address in an insn, the original value of the register is used. 2630*c87b03e5SespieUses of the register outside of an address are not permitted within the 2631*c87b03e5Sespiesame insn as a use in an embedded side effect expression because such 2632*c87b03e5Sespieinsns behave differently on different machines and hence must be treated 2633*c87b03e5Sespieas ambiguous and disallowed. 2634*c87b03e5Sespie 2635*c87b03e5SespieAn instruction that can be represented with an embedded side effect 2636*c87b03e5Sespiecould also be represented using @code{parallel} containing an additional 2637*c87b03e5Sespie@code{set} to describe how the address register is altered. This is not 2638*c87b03e5Sespiedone because machines that allow these operations at all typically 2639*c87b03e5Sespieallow them wherever a memory address is called for. Describing them as 2640*c87b03e5Sespieadditional parallel stores would require doubling the number of entries 2641*c87b03e5Sespiein the machine description. 2642*c87b03e5Sespie 2643*c87b03e5Sespie@node Assembler 2644*c87b03e5Sespie@section Assembler Instructions as Expressions 2645*c87b03e5Sespie@cindex assembler instructions in RTL 2646*c87b03e5Sespie 2647*c87b03e5Sespie@cindex @code{asm_operands}, usage 2648*c87b03e5SespieThe RTX code @code{asm_operands} represents a value produced by a 2649*c87b03e5Sespieuser-specified assembler instruction. It is used to represent 2650*c87b03e5Sespiean @code{asm} statement with arguments. An @code{asm} statement with 2651*c87b03e5Sespiea single output operand, like this: 2652*c87b03e5Sespie 2653*c87b03e5Sespie@smallexample 2654*c87b03e5Sespieasm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z)); 2655*c87b03e5Sespie@end smallexample 2656*c87b03e5Sespie 2657*c87b03e5Sespie@noindent 2658*c87b03e5Sespieis represented using a single @code{asm_operands} RTX which represents 2659*c87b03e5Sespiethe value that is stored in @code{outputvar}: 2660*c87b03e5Sespie 2661*c87b03e5Sespie@smallexample 2662*c87b03e5Sespie(set @var{rtx-for-outputvar} 2663*c87b03e5Sespie (asm_operands "foo %1,%2,%0" "a" 0 2664*c87b03e5Sespie [@var{rtx-for-addition-result} @var{rtx-for-*z}] 2665*c87b03e5Sespie [(asm_input:@var{m1} "g") 2666*c87b03e5Sespie (asm_input:@var{m2} "di")])) 2667*c87b03e5Sespie@end smallexample 2668*c87b03e5Sespie 2669*c87b03e5Sespie@noindent 2670*c87b03e5SespieHere the operands of the @code{asm_operands} RTX are the assembler 2671*c87b03e5Sespietemplate string, the output-operand's constraint, the index-number of the 2672*c87b03e5Sespieoutput operand among the output operands specified, a vector of input 2673*c87b03e5Sespieoperand RTX's, and a vector of input-operand modes and constraints. The 2674*c87b03e5Sespiemode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of 2675*c87b03e5Sespie@code{*z}. 2676*c87b03e5Sespie 2677*c87b03e5SespieWhen an @code{asm} statement has multiple output values, its insn has 2678*c87b03e5Sespieseveral such @code{set} RTX's inside of a @code{parallel}. Each @code{set} 2679*c87b03e5Sespiecontains a @code{asm_operands}; all of these share the same assembler 2680*c87b03e5Sespietemplate and vectors, but each contains the constraint for the respective 2681*c87b03e5Sespieoutput operand. They are also distinguished by the output-operand index 2682*c87b03e5Sespienumber, which is 0, 1, @dots{} for successive output operands. 2683*c87b03e5Sespie 2684*c87b03e5Sespie@node Insns 2685*c87b03e5Sespie@section Insns 2686*c87b03e5Sespie@cindex insns 2687*c87b03e5Sespie 2688*c87b03e5SespieThe RTL representation of the code for a function is a doubly-linked 2689*c87b03e5Sespiechain of objects called @dfn{insns}. Insns are expressions with 2690*c87b03e5Sespiespecial codes that are used for no other purpose. Some insns are 2691*c87b03e5Sespieactual instructions; others represent dispatch tables for @code{switch} 2692*c87b03e5Sespiestatements; others represent labels to jump to or various sorts of 2693*c87b03e5Sespiedeclarative information. 2694*c87b03e5Sespie 2695*c87b03e5SespieIn addition to its own specific data, each insn must have a unique 2696*c87b03e5Sespieid-number that distinguishes it from all other insns in the current 2697*c87b03e5Sespiefunction (after delayed branch scheduling, copies of an insn with the 2698*c87b03e5Sespiesame id-number may be present in multiple places in a function, but 2699*c87b03e5Sespiethese copies will always be identical and will only appear inside a 2700*c87b03e5Sespie@code{sequence}), and chain pointers to the preceding and following 2701*c87b03e5Sespieinsns. These three fields occupy the same position in every insn, 2702*c87b03e5Sespieindependent of the expression code of the insn. They could be accessed 2703*c87b03e5Sespiewith @code{XEXP} and @code{XINT}, but instead three special macros are 2704*c87b03e5Sespiealways used: 2705*c87b03e5Sespie 2706*c87b03e5Sespie@table @code 2707*c87b03e5Sespie@findex INSN_UID 2708*c87b03e5Sespie@item INSN_UID (@var{i}) 2709*c87b03e5SespieAccesses the unique id of insn @var{i}. 2710*c87b03e5Sespie 2711*c87b03e5Sespie@findex PREV_INSN 2712*c87b03e5Sespie@item PREV_INSN (@var{i}) 2713*c87b03e5SespieAccesses the chain pointer to the insn preceding @var{i}. 2714*c87b03e5SespieIf @var{i} is the first insn, this is a null pointer. 2715*c87b03e5Sespie 2716*c87b03e5Sespie@findex NEXT_INSN 2717*c87b03e5Sespie@item NEXT_INSN (@var{i}) 2718*c87b03e5SespieAccesses the chain pointer to the insn following @var{i}. 2719*c87b03e5SespieIf @var{i} is the last insn, this is a null pointer. 2720*c87b03e5Sespie@end table 2721*c87b03e5Sespie 2722*c87b03e5Sespie@findex get_insns 2723*c87b03e5Sespie@findex get_last_insn 2724*c87b03e5SespieThe first insn in the chain is obtained by calling @code{get_insns}; the 2725*c87b03e5Sespielast insn is the result of calling @code{get_last_insn}. Within the 2726*c87b03e5Sespiechain delimited by these insns, the @code{NEXT_INSN} and 2727*c87b03e5Sespie@code{PREV_INSN} pointers must always correspond: if @var{insn} is not 2728*c87b03e5Sespiethe first insn, 2729*c87b03e5Sespie 2730*c87b03e5Sespie@example 2731*c87b03e5SespieNEXT_INSN (PREV_INSN (@var{insn})) == @var{insn} 2732*c87b03e5Sespie@end example 2733*c87b03e5Sespie 2734*c87b03e5Sespie@noindent 2735*c87b03e5Sespieis always true and if @var{insn} is not the last insn, 2736*c87b03e5Sespie 2737*c87b03e5Sespie@example 2738*c87b03e5SespiePREV_INSN (NEXT_INSN (@var{insn})) == @var{insn} 2739*c87b03e5Sespie@end example 2740*c87b03e5Sespie 2741*c87b03e5Sespie@noindent 2742*c87b03e5Sespieis always true. 2743*c87b03e5Sespie 2744*c87b03e5SespieAfter delay slot scheduling, some of the insns in the chain might be 2745*c87b03e5Sespie@code{sequence} expressions, which contain a vector of insns. The value 2746*c87b03e5Sespieof @code{NEXT_INSN} in all but the last of these insns is the next insn 2747*c87b03e5Sespiein the vector; the value of @code{NEXT_INSN} of the last insn in the vector 2748*c87b03e5Sespieis the same as the value of @code{NEXT_INSN} for the @code{sequence} in 2749*c87b03e5Sespiewhich it is contained. Similar rules apply for @code{PREV_INSN}. 2750*c87b03e5Sespie 2751*c87b03e5SespieThis means that the above invariants are not necessarily true for insns 2752*c87b03e5Sespieinside @code{sequence} expressions. Specifically, if @var{insn} is the 2753*c87b03e5Sespiefirst insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))} 2754*c87b03e5Sespieis the insn containing the @code{sequence} expression, as is the value 2755*c87b03e5Sespieof @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last 2756*c87b03e5Sespieinsn in the @code{sequence} expression. You can use these expressions 2757*c87b03e5Sespieto find the containing @code{sequence} expression. 2758*c87b03e5Sespie 2759*c87b03e5SespieEvery insn has one of the following six expression codes: 2760*c87b03e5Sespie 2761*c87b03e5Sespie@table @code 2762*c87b03e5Sespie@findex insn 2763*c87b03e5Sespie@item insn 2764*c87b03e5SespieThe expression code @code{insn} is used for instructions that do not jump 2765*c87b03e5Sespieand do not do function calls. @code{sequence} expressions are always 2766*c87b03e5Sespiecontained in insns with code @code{insn} even if one of those insns 2767*c87b03e5Sespieshould jump or do function calls. 2768*c87b03e5Sespie 2769*c87b03e5SespieInsns with code @code{insn} have four additional fields beyond the three 2770*c87b03e5Sespiemandatory ones listed above. These four are described in a table below. 2771*c87b03e5Sespie 2772*c87b03e5Sespie@findex jump_insn 2773*c87b03e5Sespie@item jump_insn 2774*c87b03e5SespieThe expression code @code{jump_insn} is used for instructions that may 2775*c87b03e5Sespiejump (or, more generally, may contain @code{label_ref} expressions). If 2776*c87b03e5Sespiethere is an instruction to return from the current function, it is 2777*c87b03e5Sespierecorded as a @code{jump_insn}. 2778*c87b03e5Sespie 2779*c87b03e5Sespie@findex JUMP_LABEL 2780*c87b03e5Sespie@code{jump_insn} insns have the same extra fields as @code{insn} insns, 2781*c87b03e5Sespieaccessed in the same way and in addition contain a field 2782*c87b03e5Sespie@code{JUMP_LABEL} which is defined once jump optimization has completed. 2783*c87b03e5Sespie 2784*c87b03e5SespieFor simple conditional and unconditional jumps, this field contains 2785*c87b03e5Sespiethe @code{code_label} to which this insn will (possibly conditionally) 2786*c87b03e5Sespiebranch. In a more complex jump, @code{JUMP_LABEL} records one of the 2787*c87b03e5Sespielabels that the insn refers to; the only way to find the others is to 2788*c87b03e5Sespiescan the entire body of the insn. In an @code{addr_vec}, 2789*c87b03e5Sespie@code{JUMP_LABEL} is @code{NULL_RTX}. 2790*c87b03e5Sespie 2791*c87b03e5SespieReturn insns count as jumps, but since they do not refer to any 2792*c87b03e5Sespielabels, their @code{JUMP_LABEL} is @code{NULL_RTX}. 2793*c87b03e5Sespie 2794*c87b03e5Sespie@findex call_insn 2795*c87b03e5Sespie@item call_insn 2796*c87b03e5SespieThe expression code @code{call_insn} is used for instructions that may do 2797*c87b03e5Sespiefunction calls. It is important to distinguish these instructions because 2798*c87b03e5Sespiethey imply that certain registers and memory locations may be altered 2799*c87b03e5Sespieunpredictably. 2800*c87b03e5Sespie 2801*c87b03e5Sespie@findex CALL_INSN_FUNCTION_USAGE 2802*c87b03e5Sespie@code{call_insn} insns have the same extra fields as @code{insn} insns, 2803*c87b03e5Sespieaccessed in the same way and in addition contain a field 2804*c87b03e5Sespie@code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of 2805*c87b03e5Sespie@code{expr_list} expressions) containing @code{use} and @code{clobber} 2806*c87b03e5Sespieexpressions that denote hard registers and @code{MEM}s used or 2807*c87b03e5Sespieclobbered by the called function. 2808*c87b03e5Sespie 2809*c87b03e5SespieA @code{MEM} generally points to a stack slots in which arguments passed 2810*c87b03e5Sespieto the libcall by reference (@pxref{Register Arguments, 2811*c87b03e5SespieFUNCTION_ARG_PASS_BY_REFERENCE}) are stored. If the argument is 2812*c87b03e5Sespiecaller-copied (@pxref{Register Arguments, FUNCTION_ARG_CALLEE_COPIES}), 2813*c87b03e5Sespiethe stack slot will be mentioned in @code{CLOBBER} and @code{USE} 2814*c87b03e5Sespieentries; if it's callee-copied, only a @code{USE} will appear, and the 2815*c87b03e5Sespie@code{MEM} may point to addresses that are not stack slots. These 2816*c87b03e5Sespie@code{MEM}s are used only in libcalls, because, unlike regular function 2817*c87b03e5Sespiecalls, @code{CONST_CALL}s (which libcalls generally are, @pxref{Flags, 2818*c87b03e5SespieCONST_CALL_P}) aren't assumed to read and write all memory, so flow 2819*c87b03e5Sespiewould consider the stores dead and remove them. Note that, since a 2820*c87b03e5Sespielibcall must never return values in memory (@pxref{Aggregate Return, 2821*c87b03e5SespieRETURN_IN_MEMORY}), there will never be a @code{CLOBBER} for a memory 2822*c87b03e5Sespieaddress holding a return value. 2823*c87b03e5Sespie 2824*c87b03e5Sespie@code{CLOBBER}ed registers in this list augment registers specified in 2825*c87b03e5Sespie@code{CALL_USED_REGISTERS} (@pxref{Register Basics}). 2826*c87b03e5Sespie 2827*c87b03e5Sespie@findex code_label 2828*c87b03e5Sespie@findex CODE_LABEL_NUMBER 2829*c87b03e5Sespie@item code_label 2830*c87b03e5SespieA @code{code_label} insn represents a label that a jump insn can jump 2831*c87b03e5Sespieto. It contains two special fields of data in addition to the three 2832*c87b03e5Sespiestandard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label 2833*c87b03e5Sespienumber}, a number that identifies this label uniquely among all the 2834*c87b03e5Sespielabels in the compilation (not just in the current function). 2835*c87b03e5SespieUltimately, the label is represented in the assembler output as an 2836*c87b03e5Sespieassembler label, usually of the form @samp{L@var{n}} where @var{n} is 2837*c87b03e5Sespiethe label number. 2838*c87b03e5Sespie 2839*c87b03e5SespieWhen a @code{code_label} appears in an RTL expression, it normally 2840*c87b03e5Sespieappears within a @code{label_ref} which represents the address of 2841*c87b03e5Sespiethe label, as a number. 2842*c87b03e5Sespie 2843*c87b03e5SespieBesides as a @code{code_label}, a label can also be represented as a 2844*c87b03e5Sespie@code{note} of type @code{NOTE_INSN_DELETED_LABEL}. 2845*c87b03e5Sespie 2846*c87b03e5Sespie@findex LABEL_NUSES 2847*c87b03e5SespieThe field @code{LABEL_NUSES} is only defined once the jump optimization 2848*c87b03e5Sespiephase is completed. It contains the number of times this label is 2849*c87b03e5Sespiereferenced in the current function. 2850*c87b03e5Sespie 2851*c87b03e5Sespie@findex LABEL_KIND 2852*c87b03e5Sespie@findex SET_LABEL_KIND 2853*c87b03e5Sespie@findex LABEL_ALT_ENTRY_P 2854*c87b03e5Sespie@cindex alternate entry points 2855*c87b03e5SespieThe field @code{LABEL_KIND} differentiates four different types of 2856*c87b03e5Sespielabels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY}, 2857*c87b03e5Sespie@code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}. The only labels 2858*c87b03e5Sespiethat do not have type @code{LABEL_NORMAL} are @dfn{alternate entry 2859*c87b03e5Sespiepoints} to the current function. These may be static (visible only in 2860*c87b03e5Sespiethe containing translation unit), global (exposed to all translation 2861*c87b03e5Sespieunits), or weak (global, but can be overridden by another symbol with the 2862*c87b03e5Sespiesame name). 2863*c87b03e5Sespie 2864*c87b03e5SespieMuch of the compiler treats all four kinds of label identically. Some 2865*c87b03e5Sespieof it needs to know whether or not a label is an alternate entry point; 2866*c87b03e5Sespiefor this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided. It is 2867*c87b03e5Sespieequivalent to testing whether @samp{LABEL_KIND (label) == LABEL_NORMAL}. 2868*c87b03e5SespieThe only place that cares about the distinction between static, global, 2869*c87b03e5Sespieand weak alternate entry points, besides the front-end code that creates 2870*c87b03e5Sespiethem, is the function @code{output_alternate_entry_point}, in 2871*c87b03e5Sespie@file{final.c}. 2872*c87b03e5Sespie 2873*c87b03e5SespieTo set the kind of a label, use the @code{SET_LABEL_KIND} macro. 2874*c87b03e5Sespie 2875*c87b03e5Sespie@findex barrier 2876*c87b03e5Sespie@item barrier 2877*c87b03e5SespieBarriers are placed in the instruction stream when control cannot flow 2878*c87b03e5Sespiepast them. They are placed after unconditional jump instructions to 2879*c87b03e5Sespieindicate that the jumps are unconditional and after calls to 2880*c87b03e5Sespie@code{volatile} functions, which do not return (e.g., @code{exit}). 2881*c87b03e5SespieThey contain no information beyond the three standard fields. 2882*c87b03e5Sespie 2883*c87b03e5Sespie@findex note 2884*c87b03e5Sespie@findex NOTE_LINE_NUMBER 2885*c87b03e5Sespie@findex NOTE_SOURCE_FILE 2886*c87b03e5Sespie@item note 2887*c87b03e5Sespie@code{note} insns are used to represent additional debugging and 2888*c87b03e5Sespiedeclarative information. They contain two nonstandard fields, an 2889*c87b03e5Sespieinteger which is accessed with the macro @code{NOTE_LINE_NUMBER} and a 2890*c87b03e5Sespiestring accessed with @code{NOTE_SOURCE_FILE}. 2891*c87b03e5Sespie 2892*c87b03e5SespieIf @code{NOTE_LINE_NUMBER} is positive, the note represents the 2893*c87b03e5Sespieposition of a source line and @code{NOTE_SOURCE_FILE} is the source file name 2894*c87b03e5Sespiethat the line came from. These notes control generation of line 2895*c87b03e5Sespienumber data in the assembler output. 2896*c87b03e5Sespie 2897*c87b03e5SespieOtherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a 2898*c87b03e5Sespiecode with one of the following values (and @code{NOTE_SOURCE_FILE} 2899*c87b03e5Sespiemust contain a null pointer): 2900*c87b03e5Sespie 2901*c87b03e5Sespie@table @code 2902*c87b03e5Sespie@findex NOTE_INSN_DELETED 2903*c87b03e5Sespie@item NOTE_INSN_DELETED 2904*c87b03e5SespieSuch a note is completely ignorable. Some passes of the compiler 2905*c87b03e5Sespiedelete insns by altering them into notes of this kind. 2906*c87b03e5Sespie 2907*c87b03e5Sespie@findex NOTE_INSN_DELETED_LABEL 2908*c87b03e5Sespie@item NOTE_INSN_DELETED_LABEL 2909*c87b03e5SespieThis marks what used to be a @code{code_label}, but was not used for other 2910*c87b03e5Sespiepurposes than taking its address and was transformed to mark that no 2911*c87b03e5Sespiecode jumps to it. 2912*c87b03e5Sespie 2913*c87b03e5Sespie@findex NOTE_INSN_BLOCK_BEG 2914*c87b03e5Sespie@findex NOTE_INSN_BLOCK_END 2915*c87b03e5Sespie@item NOTE_INSN_BLOCK_BEG 2916*c87b03e5Sespie@itemx NOTE_INSN_BLOCK_END 2917*c87b03e5SespieThese types of notes indicate the position of the beginning and end 2918*c87b03e5Sespieof a level of scoping of variable names. They control the output 2919*c87b03e5Sespieof debugging information. 2920*c87b03e5Sespie 2921*c87b03e5Sespie@findex NOTE_INSN_EH_REGION_BEG 2922*c87b03e5Sespie@findex NOTE_INSN_EH_REGION_END 2923*c87b03e5Sespie@item NOTE_INSN_EH_REGION_BEG 2924*c87b03e5Sespie@itemx NOTE_INSN_EH_REGION_END 2925*c87b03e5SespieThese types of notes indicate the position of the beginning and end of a 2926*c87b03e5Sespielevel of scoping for exception handling. @code{NOTE_BLOCK_NUMBER} 2927*c87b03e5Sespieidentifies which @code{CODE_LABEL} or @code{note} of type 2928*c87b03e5Sespie@code{NOTE_INSN_DELETED_LABEL} is associated with the given region. 2929*c87b03e5Sespie 2930*c87b03e5Sespie@findex NOTE_INSN_LOOP_BEG 2931*c87b03e5Sespie@findex NOTE_INSN_LOOP_END 2932*c87b03e5Sespie@item NOTE_INSN_LOOP_BEG 2933*c87b03e5Sespie@itemx NOTE_INSN_LOOP_END 2934*c87b03e5SespieThese types of notes indicate the position of the beginning and end 2935*c87b03e5Sespieof a @code{while} or @code{for} loop. They enable the loop optimizer 2936*c87b03e5Sespieto find loops quickly. 2937*c87b03e5Sespie 2938*c87b03e5Sespie@findex NOTE_INSN_LOOP_CONT 2939*c87b03e5Sespie@item NOTE_INSN_LOOP_CONT 2940*c87b03e5SespieAppears at the place in a loop that @code{continue} statements jump to. 2941*c87b03e5Sespie 2942*c87b03e5Sespie@findex NOTE_INSN_LOOP_VTOP 2943*c87b03e5Sespie@item NOTE_INSN_LOOP_VTOP 2944*c87b03e5SespieThis note indicates the place in a loop where the exit test begins for 2945*c87b03e5Sespiethose loops in which the exit test has been duplicated. This position 2946*c87b03e5Sespiebecomes another virtual start of the loop when considering loop 2947*c87b03e5Sespieinvariants. 2948*c87b03e5Sespie 2949*c87b03e5Sespie@findex NOTE_INSN_FUNCTION_END 2950*c87b03e5Sespie@item NOTE_INSN_FUNCTION_END 2951*c87b03e5SespieAppears near the end of the function body, just before the label that 2952*c87b03e5Sespie@code{return} statements jump to (on machine where a single instruction 2953*c87b03e5Sespiedoes not suffice for returning). This note may be deleted by jump 2954*c87b03e5Sespieoptimization. 2955*c87b03e5Sespie 2956*c87b03e5Sespie@findex NOTE_INSN_SETJMP 2957*c87b03e5Sespie@item NOTE_INSN_SETJMP 2958*c87b03e5SespieAppears following each call to @code{setjmp} or a related function. 2959*c87b03e5Sespie@end table 2960*c87b03e5Sespie 2961*c87b03e5SespieThese codes are printed symbolically when they appear in debugging dumps. 2962*c87b03e5Sespie@end table 2963*c87b03e5Sespie 2964*c87b03e5Sespie@cindex @code{TImode}, in @code{insn} 2965*c87b03e5Sespie@cindex @code{HImode}, in @code{insn} 2966*c87b03e5Sespie@cindex @code{QImode}, in @code{insn} 2967*c87b03e5SespieThe machine mode of an insn is normally @code{VOIDmode}, but some 2968*c87b03e5Sespiephases use the mode for various purposes. 2969*c87b03e5Sespie 2970*c87b03e5SespieThe common subexpression elimination pass sets the mode of an insn to 2971*c87b03e5Sespie@code{QImode} when it is the first insn in a block that has already 2972*c87b03e5Sespiebeen processed. 2973*c87b03e5Sespie 2974*c87b03e5SespieThe second Haifa scheduling pass, for targets that can multiple issue, 2975*c87b03e5Sespiesets the mode of an insn to @code{TImode} when it is believed that the 2976*c87b03e5Sespieinstruction begins an issue group. That is, when the instruction 2977*c87b03e5Sespiecannot issue simultaneously with the previous. This may be relied on 2978*c87b03e5Sespieby later passes, in particular machine-dependent reorg. 2979*c87b03e5Sespie 2980*c87b03e5SespieHere is a table of the extra fields of @code{insn}, @code{jump_insn} 2981*c87b03e5Sespieand @code{call_insn} insns: 2982*c87b03e5Sespie 2983*c87b03e5Sespie@table @code 2984*c87b03e5Sespie@findex PATTERN 2985*c87b03e5Sespie@item PATTERN (@var{i}) 2986*c87b03e5SespieAn expression for the side effect performed by this insn. This must be 2987*c87b03e5Sespieone of the following codes: @code{set}, @code{call}, @code{use}, 2988*c87b03e5Sespie@code{clobber}, @code{return}, @code{asm_input}, @code{asm_output}, 2989*c87b03e5Sespie@code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec}, 2990*c87b03e5Sespie@code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}. If it is a @code{parallel}, 2991*c87b03e5Sespieeach element of the @code{parallel} must be one these codes, except that 2992*c87b03e5Sespie@code{parallel} expressions cannot be nested and @code{addr_vec} and 2993*c87b03e5Sespie@code{addr_diff_vec} are not permitted inside a @code{parallel} expression. 2994*c87b03e5Sespie 2995*c87b03e5Sespie@findex INSN_CODE 2996*c87b03e5Sespie@item INSN_CODE (@var{i}) 2997*c87b03e5SespieAn integer that says which pattern in the machine description matches 2998*c87b03e5Sespiethis insn, or @minus{}1 if the matching has not yet been attempted. 2999*c87b03e5Sespie 3000*c87b03e5SespieSuch matching is never attempted and this field remains @minus{}1 on an insn 3001*c87b03e5Sespiewhose pattern consists of a single @code{use}, @code{clobber}, 3002*c87b03e5Sespie@code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression. 3003*c87b03e5Sespie 3004*c87b03e5Sespie@findex asm_noperands 3005*c87b03e5SespieMatching is also never attempted on insns that result from an @code{asm} 3006*c87b03e5Sespiestatement. These contain at least one @code{asm_operands} expression. 3007*c87b03e5SespieThe function @code{asm_noperands} returns a non-negative value for 3008*c87b03e5Sespiesuch insns. 3009*c87b03e5Sespie 3010*c87b03e5SespieIn the debugging output, this field is printed as a number followed by 3011*c87b03e5Sespiea symbolic representation that locates the pattern in the @file{md} 3012*c87b03e5Sespiefile as some small positive or negative offset from a named pattern. 3013*c87b03e5Sespie 3014*c87b03e5Sespie@findex LOG_LINKS 3015*c87b03e5Sespie@item LOG_LINKS (@var{i}) 3016*c87b03e5SespieA list (chain of @code{insn_list} expressions) giving information about 3017*c87b03e5Sespiedependencies between instructions within a basic block. Neither a jump 3018*c87b03e5Sespienor a label may come between the related insns. 3019*c87b03e5Sespie 3020*c87b03e5Sespie@findex REG_NOTES 3021*c87b03e5Sespie@item REG_NOTES (@var{i}) 3022*c87b03e5SespieA list (chain of @code{expr_list} and @code{insn_list} expressions) 3023*c87b03e5Sespiegiving miscellaneous information about the insn. It is often 3024*c87b03e5Sespieinformation pertaining to the registers used in this insn. 3025*c87b03e5Sespie@end table 3026*c87b03e5Sespie 3027*c87b03e5SespieThe @code{LOG_LINKS} field of an insn is a chain of @code{insn_list} 3028*c87b03e5Sespieexpressions. Each of these has two operands: the first is an insn, 3029*c87b03e5Sespieand the second is another @code{insn_list} expression (the next one in 3030*c87b03e5Sespiethe chain). The last @code{insn_list} in the chain has a null pointer 3031*c87b03e5Sespieas second operand. The significant thing about the chain is which 3032*c87b03e5Sespieinsns appear in it (as first operands of @code{insn_list} 3033*c87b03e5Sespieexpressions). Their order is not significant. 3034*c87b03e5Sespie 3035*c87b03e5SespieThis list is originally set up by the flow analysis pass; it is a null 3036*c87b03e5Sespiepointer until then. Flow only adds links for those data dependencies 3037*c87b03e5Sespiewhich can be used for instruction combination. For each insn, the flow 3038*c87b03e5Sespieanalysis pass adds a link to insns which store into registers values 3039*c87b03e5Sespiethat are used for the first time in this insn. The instruction 3040*c87b03e5Sespiescheduling pass adds extra links so that every dependence will be 3041*c87b03e5Sespierepresented. Links represent data dependencies, antidependencies and 3042*c87b03e5Sespieoutput dependencies; the machine mode of the link distinguishes these 3043*c87b03e5Sespiethree types: antidependencies have mode @code{REG_DEP_ANTI}, output 3044*c87b03e5Sespiedependencies have mode @code{REG_DEP_OUTPUT}, and data dependencies have 3045*c87b03e5Sespiemode @code{VOIDmode}. 3046*c87b03e5Sespie 3047*c87b03e5SespieThe @code{REG_NOTES} field of an insn is a chain similar to the 3048*c87b03e5Sespie@code{LOG_LINKS} field but it includes @code{expr_list} expressions in 3049*c87b03e5Sespieaddition to @code{insn_list} expressions. There are several kinds of 3050*c87b03e5Sespieregister notes, which are distinguished by the machine mode, which in a 3051*c87b03e5Sespieregister note is really understood as being an @code{enum reg_note}. 3052*c87b03e5SespieThe first operand @var{op} of the note is data whose meaning depends on 3053*c87b03e5Sespiethe kind of note. 3054*c87b03e5Sespie 3055*c87b03e5Sespie@findex REG_NOTE_KIND 3056*c87b03e5Sespie@findex PUT_REG_NOTE_KIND 3057*c87b03e5SespieThe macro @code{REG_NOTE_KIND (@var{x})} returns the kind of 3058*c87b03e5Sespieregister note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND 3059*c87b03e5Sespie(@var{x}, @var{newkind})} sets the register note type of @var{x} to be 3060*c87b03e5Sespie@var{newkind}. 3061*c87b03e5Sespie 3062*c87b03e5SespieRegister notes are of three classes: They may say something about an 3063*c87b03e5Sespieinput to an insn, they may say something about an output of an insn, or 3064*c87b03e5Sespiethey may create a linkage between two insns. There are also a set 3065*c87b03e5Sespieof values that are only used in @code{LOG_LINKS}. 3066*c87b03e5Sespie 3067*c87b03e5SespieThese register notes annotate inputs to an insn: 3068*c87b03e5Sespie 3069*c87b03e5Sespie@table @code 3070*c87b03e5Sespie@findex REG_DEAD 3071*c87b03e5Sespie@item REG_DEAD 3072*c87b03e5SespieThe value in @var{op} dies in this insn; that is to say, altering the 3073*c87b03e5Sespievalue immediately after this insn would not affect the future behavior 3074*c87b03e5Sespieof the program. 3075*c87b03e5Sespie 3076*c87b03e5SespieIt does not follow that the register @var{op} has no useful value after 3077*c87b03e5Sespiethis insn since @var{op} is not necessarily modified by this insn. 3078*c87b03e5SespieRather, no subsequent instruction uses the contents of @var{op}. 3079*c87b03e5Sespie 3080*c87b03e5Sespie@findex REG_UNUSED 3081*c87b03e5Sespie@item REG_UNUSED 3082*c87b03e5SespieThe register @var{op} being set by this insn will not be used in a 3083*c87b03e5Sespiesubsequent insn. This differs from a @code{REG_DEAD} note, which 3084*c87b03e5Sespieindicates that the value in an input will not be used subsequently. 3085*c87b03e5SespieThese two notes are independent; both may be present for the same 3086*c87b03e5Sespieregister. 3087*c87b03e5Sespie 3088*c87b03e5Sespie@findex REG_INC 3089*c87b03e5Sespie@item REG_INC 3090*c87b03e5SespieThe register @var{op} is incremented (or decremented; at this level 3091*c87b03e5Sespiethere is no distinction) by an embedded side effect inside this insn. 3092*c87b03e5SespieThis means it appears in a @code{post_inc}, @code{pre_inc}, 3093*c87b03e5Sespie@code{post_dec} or @code{pre_dec} expression. 3094*c87b03e5Sespie 3095*c87b03e5Sespie@findex REG_NONNEG 3096*c87b03e5Sespie@item REG_NONNEG 3097*c87b03e5SespieThe register @var{op} is known to have a nonnegative value when this 3098*c87b03e5Sespieinsn is reached. This is used so that decrement and branch until zero 3099*c87b03e5Sespieinstructions, such as the m68k dbra, can be matched. 3100*c87b03e5Sespie 3101*c87b03e5SespieThe @code{REG_NONNEG} note is added to insns only if the machine 3102*c87b03e5Sespiedescription has a @samp{decrement_and_branch_until_zero} pattern. 3103*c87b03e5Sespie 3104*c87b03e5Sespie@findex REG_NO_CONFLICT 3105*c87b03e5Sespie@item REG_NO_CONFLICT 3106*c87b03e5SespieThis insn does not cause a conflict between @var{op} and the item 3107*c87b03e5Sespiebeing set by this insn even though it might appear that it does. 3108*c87b03e5SespieIn other words, if the destination register and @var{op} could 3109*c87b03e5Sespieotherwise be assigned the same register, this insn does not 3110*c87b03e5Sespieprevent that assignment. 3111*c87b03e5Sespie 3112*c87b03e5SespieInsns with this note are usually part of a block that begins with a 3113*c87b03e5Sespie@code{clobber} insn specifying a multi-word pseudo register (which will 3114*c87b03e5Sespiebe the output of the block), a group of insns that each set one word of 3115*c87b03e5Sespiethe value and have the @code{REG_NO_CONFLICT} note attached, and a final 3116*c87b03e5Sespieinsn that copies the output to itself with an attached @code{REG_EQUAL} 3117*c87b03e5Sespienote giving the expression being computed. This block is encapsulated 3118*c87b03e5Sespiewith @code{REG_LIBCALL} and @code{REG_RETVAL} notes on the first and 3119*c87b03e5Sespielast insns, respectively. 3120*c87b03e5Sespie 3121*c87b03e5Sespie@findex REG_LABEL 3122*c87b03e5Sespie@item REG_LABEL 3123*c87b03e5SespieThis insn uses @var{op}, a @code{code_label} or a @code{note} of type 3124*c87b03e5Sespie@code{NOTE_INSN_DELETED_LABEL}, but is not a 3125*c87b03e5Sespie@code{jump_insn}, or it is a @code{jump_insn} that required the label to 3126*c87b03e5Sespiebe held in a register. The presence of this note allows jump 3127*c87b03e5Sespieoptimization to be aware that @var{op} is, in fact, being used, and flow 3128*c87b03e5Sespieoptimization to build an accurate flow graph. 3129*c87b03e5Sespie@end table 3130*c87b03e5Sespie 3131*c87b03e5SespieThe following notes describe attributes of outputs of an insn: 3132*c87b03e5Sespie 3133*c87b03e5Sespie@table @code 3134*c87b03e5Sespie@findex REG_EQUIV 3135*c87b03e5Sespie@findex REG_EQUAL 3136*c87b03e5Sespie@item REG_EQUIV 3137*c87b03e5Sespie@itemx REG_EQUAL 3138*c87b03e5SespieThis note is only valid on an insn that sets only one register and 3139*c87b03e5Sespieindicates that that register will be equal to @var{op} at run time; the 3140*c87b03e5Sespiescope of this equivalence differs between the two types of notes. The 3141*c87b03e5Sespievalue which the insn explicitly copies into the register may look 3142*c87b03e5Sespiedifferent from @var{op}, but they will be equal at run time. If the 3143*c87b03e5Sespieoutput of the single @code{set} is a @code{strict_low_part} expression, 3144*c87b03e5Sespiethe note refers to the register that is contained in @code{SUBREG_REG} 3145*c87b03e5Sespieof the @code{subreg} expression. 3146*c87b03e5Sespie 3147*c87b03e5SespieFor @code{REG_EQUIV}, the register is equivalent to @var{op} throughout 3148*c87b03e5Sespiethe entire function, and could validly be replaced in all its 3149*c87b03e5Sespieoccurrences by @var{op}. (``Validly'' here refers to the data flow of 3150*c87b03e5Sespiethe program; simple replacement may make some insns invalid.) For 3151*c87b03e5Sespieexample, when a constant is loaded into a register that is never 3152*c87b03e5Sespieassigned any other value, this kind of note is used. 3153*c87b03e5Sespie 3154*c87b03e5SespieWhen a parameter is copied into a pseudo-register at entry to a function, 3155*c87b03e5Sespiea note of this kind records that the register is equivalent to the stack 3156*c87b03e5Sespieslot where the parameter was passed. Although in this case the register 3157*c87b03e5Sespiemay be set by other insns, it is still valid to replace the register 3158*c87b03e5Sespieby the stack slot throughout the function. 3159*c87b03e5Sespie 3160*c87b03e5SespieA @code{REG_EQUIV} note is also used on an instruction which copies a 3161*c87b03e5Sespieregister parameter into a pseudo-register at entry to a function, if 3162*c87b03e5Sespiethere is a stack slot where that parameter could be stored. Although 3163*c87b03e5Sespieother insns may set the pseudo-register, it is valid for the compiler to 3164*c87b03e5Sespiereplace the pseudo-register by stack slot throughout the function, 3165*c87b03e5Sespieprovided the compiler ensures that the stack slot is properly 3166*c87b03e5Sespieinitialized by making the replacement in the initial copy instruction as 3167*c87b03e5Sespiewell. This is used on machines for which the calling convention 3168*c87b03e5Sespieallocates stack space for register parameters. See 3169*c87b03e5Sespie@code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}. 3170*c87b03e5Sespie 3171*c87b03e5SespieIn the case of @code{REG_EQUAL}, the register that is set by this insn 3172*c87b03e5Sespiewill be equal to @var{op} at run time at the end of this insn but not 3173*c87b03e5Sespienecessarily elsewhere in the function. In this case, @var{op} 3174*c87b03e5Sespieis typically an arithmetic expression. For example, when a sequence of 3175*c87b03e5Sespieinsns such as a library call is used to perform an arithmetic operation, 3176*c87b03e5Sespiethis kind of note is attached to the insn that produces or copies the 3177*c87b03e5Sespiefinal value. 3178*c87b03e5Sespie 3179*c87b03e5SespieThese two notes are used in different ways by the compiler passes. 3180*c87b03e5Sespie@code{REG_EQUAL} is used by passes prior to register allocation (such as 3181*c87b03e5Sespiecommon subexpression elimination and loop optimization) to tell them how 3182*c87b03e5Sespieto think of that value. @code{REG_EQUIV} notes are used by register 3183*c87b03e5Sespieallocation to indicate that there is an available substitute expression 3184*c87b03e5Sespie(either a constant or a @code{mem} expression for the location of a 3185*c87b03e5Sespieparameter on the stack) that may be used in place of a register if 3186*c87b03e5Sespieinsufficient registers are available. 3187*c87b03e5Sespie 3188*c87b03e5SespieExcept for stack homes for parameters, which are indicated by a 3189*c87b03e5Sespie@code{REG_EQUIV} note and are not useful to the early optimization 3190*c87b03e5Sespiepasses and pseudo registers that are equivalent to a memory location 3191*c87b03e5Sespiethroughout their entire life, which is not detected until later in 3192*c87b03e5Sespiethe compilation, all equivalences are initially indicated by an attached 3193*c87b03e5Sespie@code{REG_EQUAL} note. In the early stages of register allocation, a 3194*c87b03e5Sespie@code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if 3195*c87b03e5Sespie@var{op} is a constant and the insn represents the only set of its 3196*c87b03e5Sespiedestination register. 3197*c87b03e5Sespie 3198*c87b03e5SespieThus, compiler passes prior to register allocation need only check for 3199*c87b03e5Sespie@code{REG_EQUAL} notes and passes subsequent to register allocation 3200*c87b03e5Sespieneed only check for @code{REG_EQUIV} notes. 3201*c87b03e5Sespie 3202*c87b03e5Sespie@findex REG_WAS_0 3203*c87b03e5Sespie@item REG_WAS_0 3204*c87b03e5SespieThe single output of this insn contained zero before this insn. 3205*c87b03e5Sespie@var{op} is the insn that set it to zero. You can rely on this note if 3206*c87b03e5Sespieit is present and @var{op} has not been deleted or turned into a @code{note}; 3207*c87b03e5Sespieits absence implies nothing. 3208*c87b03e5Sespie@end table 3209*c87b03e5Sespie 3210*c87b03e5SespieThese notes describe linkages between insns. They occur in pairs: one 3211*c87b03e5Sespieinsn has one of a pair of notes that points to a second insn, which has 3212*c87b03e5Sespiethe inverse note pointing back to the first insn. 3213*c87b03e5Sespie 3214*c87b03e5Sespie@table @code 3215*c87b03e5Sespie@findex REG_RETVAL 3216*c87b03e5Sespie@item REG_RETVAL 3217*c87b03e5SespieThis insn copies the value of a multi-insn sequence (for example, a 3218*c87b03e5Sespielibrary call), and @var{op} is the first insn of the sequence (for a 3219*c87b03e5Sespielibrary call, the first insn that was generated to set up the arguments 3220*c87b03e5Sespiefor the library call). 3221*c87b03e5Sespie 3222*c87b03e5SespieLoop optimization uses this note to treat such a sequence as a single 3223*c87b03e5Sespieoperation for code motion purposes and flow analysis uses this note to 3224*c87b03e5Sespiedelete such sequences whose results are dead. 3225*c87b03e5Sespie 3226*c87b03e5SespieA @code{REG_EQUAL} note will also usually be attached to this insn to 3227*c87b03e5Sespieprovide the expression being computed by the sequence. 3228*c87b03e5Sespie 3229*c87b03e5SespieThese notes will be deleted after reload, since they are no longer 3230*c87b03e5Sespieaccurate or useful. 3231*c87b03e5Sespie 3232*c87b03e5Sespie@findex REG_LIBCALL 3233*c87b03e5Sespie@item REG_LIBCALL 3234*c87b03e5SespieThis is the inverse of @code{REG_RETVAL}: it is placed on the first 3235*c87b03e5Sespieinsn of a multi-insn sequence, and it points to the last one. 3236*c87b03e5Sespie 3237*c87b03e5SespieThese notes are deleted after reload, since they are no longer useful or 3238*c87b03e5Sespieaccurate. 3239*c87b03e5Sespie 3240*c87b03e5Sespie@findex REG_CC_SETTER 3241*c87b03e5Sespie@findex REG_CC_USER 3242*c87b03e5Sespie@item REG_CC_SETTER 3243*c87b03e5Sespie@itemx REG_CC_USER 3244*c87b03e5SespieOn machines that use @code{cc0}, the insns which set and use @code{cc0} 3245*c87b03e5Sespieset and use @code{cc0} are adjacent. However, when branch delay slot 3246*c87b03e5Sespiefilling is done, this may no longer be true. In this case a 3247*c87b03e5Sespie@code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to 3248*c87b03e5Sespiepoint to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will 3249*c87b03e5Sespiebe placed on the insn using @code{cc0} to point to the insn setting 3250*c87b03e5Sespie@code{cc0}. 3251*c87b03e5Sespie@end table 3252*c87b03e5Sespie 3253*c87b03e5SespieThese values are only used in the @code{LOG_LINKS} field, and indicate 3254*c87b03e5Sespiethe type of dependency that each link represents. Links which indicate 3255*c87b03e5Sespiea data dependence (a read after write dependence) do not use any code, 3256*c87b03e5Sespiethey simply have mode @code{VOIDmode}, and are printed without any 3257*c87b03e5Sespiedescriptive text. 3258*c87b03e5Sespie 3259*c87b03e5Sespie@table @code 3260*c87b03e5Sespie@findex REG_DEP_ANTI 3261*c87b03e5Sespie@item REG_DEP_ANTI 3262*c87b03e5SespieThis indicates an anti dependence (a write after read dependence). 3263*c87b03e5Sespie 3264*c87b03e5Sespie@findex REG_DEP_OUTPUT 3265*c87b03e5Sespie@item REG_DEP_OUTPUT 3266*c87b03e5SespieThis indicates an output dependence (a write after write dependence). 3267*c87b03e5Sespie@end table 3268*c87b03e5Sespie 3269*c87b03e5SespieThese notes describe information gathered from gcov profile data. They 3270*c87b03e5Sespieare stored in the @code{REG_NOTES} field of an insn as an 3271*c87b03e5Sespie@code{expr_list}. 3272*c87b03e5Sespie 3273*c87b03e5Sespie@table @code 3274*c87b03e5Sespie@findex REG_BR_PROB 3275*c87b03e5Sespie@item REG_BR_PROB 3276*c87b03e5SespieThis is used to specify the ratio of branches to non-branches of a 3277*c87b03e5Sespiebranch insn according to the profile data. The value is stored as a 3278*c87b03e5Sespievalue between 0 and REG_BR_PROB_BASE; larger values indicate a higher 3279*c87b03e5Sespieprobability that the branch will be taken. 3280*c87b03e5Sespie 3281*c87b03e5Sespie@findex REG_BR_PRED 3282*c87b03e5Sespie@item REG_BR_PRED 3283*c87b03e5SespieThese notes are found in JUMP insns after delayed branch scheduling 3284*c87b03e5Sespiehas taken place. They indicate both the direction and the likelihood 3285*c87b03e5Sespieof the JUMP@. The format is a bitmask of ATTR_FLAG_* values. 3286*c87b03e5Sespie 3287*c87b03e5Sespie@findex REG_FRAME_RELATED_EXPR 3288*c87b03e5Sespie@item REG_FRAME_RELATED_EXPR 3289*c87b03e5SespieThis is used on an RTX_FRAME_RELATED_P insn wherein the attached expression 3290*c87b03e5Sespieis used in place of the actual insn pattern. This is done in cases where 3291*c87b03e5Sespiethe pattern is either complex or misleading. 3292*c87b03e5Sespie@end table 3293*c87b03e5Sespie 3294*c87b03e5SespieFor convenience, the machine mode in an @code{insn_list} or 3295*c87b03e5Sespie@code{expr_list} is printed using these symbolic codes in debugging dumps. 3296*c87b03e5Sespie 3297*c87b03e5Sespie@findex insn_list 3298*c87b03e5Sespie@findex expr_list 3299*c87b03e5SespieThe only difference between the expression codes @code{insn_list} and 3300*c87b03e5Sespie@code{expr_list} is that the first operand of an @code{insn_list} is 3301*c87b03e5Sespieassumed to be an insn and is printed in debugging dumps as the insn's 3302*c87b03e5Sespieunique id; the first operand of an @code{expr_list} is printed in the 3303*c87b03e5Sespieordinary way as an expression. 3304*c87b03e5Sespie 3305*c87b03e5Sespie@node Calls 3306*c87b03e5Sespie@section RTL Representation of Function-Call Insns 3307*c87b03e5Sespie@cindex calling functions in RTL 3308*c87b03e5Sespie@cindex RTL function-call insns 3309*c87b03e5Sespie@cindex function-call insns 3310*c87b03e5Sespie 3311*c87b03e5SespieInsns that call subroutines have the RTL expression code @code{call_insn}. 3312*c87b03e5SespieThese insns must satisfy special rules, and their bodies must use a special 3313*c87b03e5SespieRTL expression code, @code{call}. 3314*c87b03e5Sespie 3315*c87b03e5Sespie@cindex @code{call} usage 3316*c87b03e5SespieA @code{call} expression has two operands, as follows: 3317*c87b03e5Sespie 3318*c87b03e5Sespie@example 3319*c87b03e5Sespie(call (mem:@var{fm} @var{addr}) @var{nbytes}) 3320*c87b03e5Sespie@end example 3321*c87b03e5Sespie 3322*c87b03e5Sespie@noindent 3323*c87b03e5SespieHere @var{nbytes} is an operand that represents the number of bytes of 3324*c87b03e5Sespieargument data being passed to the subroutine, @var{fm} is a machine mode 3325*c87b03e5Sespie(which must equal as the definition of the @code{FUNCTION_MODE} macro in 3326*c87b03e5Sespiethe machine description) and @var{addr} represents the address of the 3327*c87b03e5Sespiesubroutine. 3328*c87b03e5Sespie 3329*c87b03e5SespieFor a subroutine that returns no value, the @code{call} expression as 3330*c87b03e5Sespieshown above is the entire body of the insn, except that the insn might 3331*c87b03e5Sespiealso contain @code{use} or @code{clobber} expressions. 3332*c87b03e5Sespie 3333*c87b03e5Sespie@cindex @code{BLKmode}, and function return values 3334*c87b03e5SespieFor a subroutine that returns a value whose mode is not @code{BLKmode}, 3335*c87b03e5Sespiethe value is returned in a hard register. If this register's number is 3336*c87b03e5Sespie@var{r}, then the body of the call insn looks like this: 3337*c87b03e5Sespie 3338*c87b03e5Sespie@example 3339*c87b03e5Sespie(set (reg:@var{m} @var{r}) 3340*c87b03e5Sespie (call (mem:@var{fm} @var{addr}) @var{nbytes})) 3341*c87b03e5Sespie@end example 3342*c87b03e5Sespie 3343*c87b03e5Sespie@noindent 3344*c87b03e5SespieThis RTL expression makes it clear (to the optimizer passes) that the 3345*c87b03e5Sespieappropriate register receives a useful value in this insn. 3346*c87b03e5Sespie 3347*c87b03e5SespieWhen a subroutine returns a @code{BLKmode} value, it is handled by 3348*c87b03e5Sespiepassing to the subroutine the address of a place to store the value. 3349*c87b03e5SespieSo the call insn itself does not ``return'' any value, and it has the 3350*c87b03e5Sespiesame RTL form as a call that returns nothing. 3351*c87b03e5Sespie 3352*c87b03e5SespieOn some machines, the call instruction itself clobbers some register, 3353*c87b03e5Sespiefor example to contain the return address. @code{call_insn} insns 3354*c87b03e5Sespieon these machines should have a body which is a @code{parallel} 3355*c87b03e5Sespiethat contains both the @code{call} expression and @code{clobber} 3356*c87b03e5Sespieexpressions that indicate which registers are destroyed. Similarly, 3357*c87b03e5Sespieif the call instruction requires some register other than the stack 3358*c87b03e5Sespiepointer that is not explicitly mentioned it its RTL, a @code{use} 3359*c87b03e5Sespiesubexpression should mention that register. 3360*c87b03e5Sespie 3361*c87b03e5SespieFunctions that are called are assumed to modify all registers listed in 3362*c87b03e5Sespiethe configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register 3363*c87b03e5SespieBasics}) and, with the exception of @code{const} functions and library 3364*c87b03e5Sespiecalls, to modify all of memory. 3365*c87b03e5Sespie 3366*c87b03e5SespieInsns containing just @code{use} expressions directly precede the 3367*c87b03e5Sespie@code{call_insn} insn to indicate which registers contain inputs to the 3368*c87b03e5Sespiefunction. Similarly, if registers other than those in 3369*c87b03e5Sespie@code{CALL_USED_REGISTERS} are clobbered by the called function, insns 3370*c87b03e5Sespiecontaining a single @code{clobber} follow immediately after the call to 3371*c87b03e5Sespieindicate which registers. 3372*c87b03e5Sespie 3373*c87b03e5Sespie@node Sharing 3374*c87b03e5Sespie@section Structure Sharing Assumptions 3375*c87b03e5Sespie@cindex sharing of RTL components 3376*c87b03e5Sespie@cindex RTL structure sharing assumptions 3377*c87b03e5Sespie 3378*c87b03e5SespieThe compiler assumes that certain kinds of RTL expressions are unique; 3379*c87b03e5Sespiethere do not exist two distinct objects representing the same value. 3380*c87b03e5SespieIn other cases, it makes an opposite assumption: that no RTL expression 3381*c87b03e5Sespieobject of a certain kind appears in more than one place in the 3382*c87b03e5Sespiecontaining structure. 3383*c87b03e5Sespie 3384*c87b03e5SespieThese assumptions refer to a single function; except for the RTL 3385*c87b03e5Sespieobjects that describe global variables and external functions, 3386*c87b03e5Sespieand a few standard objects such as small integer constants, 3387*c87b03e5Sespieno RTL objects are common to two functions. 3388*c87b03e5Sespie 3389*c87b03e5Sespie@itemize @bullet 3390*c87b03e5Sespie@cindex @code{reg}, RTL sharing 3391*c87b03e5Sespie@item 3392*c87b03e5SespieEach pseudo-register has only a single @code{reg} object to represent it, 3393*c87b03e5Sespieand therefore only a single machine mode. 3394*c87b03e5Sespie 3395*c87b03e5Sespie@cindex symbolic label 3396*c87b03e5Sespie@cindex @code{symbol_ref}, RTL sharing 3397*c87b03e5Sespie@item 3398*c87b03e5SespieFor any symbolic label, there is only one @code{symbol_ref} object 3399*c87b03e5Sespiereferring to it. 3400*c87b03e5Sespie 3401*c87b03e5Sespie@cindex @code{const_int}, RTL sharing 3402*c87b03e5Sespie@item 3403*c87b03e5SespieAll @code{const_int} expressions with equal values are shared. 3404*c87b03e5Sespie 3405*c87b03e5Sespie@cindex @code{pc}, RTL sharing 3406*c87b03e5Sespie@item 3407*c87b03e5SespieThere is only one @code{pc} expression. 3408*c87b03e5Sespie 3409*c87b03e5Sespie@cindex @code{cc0}, RTL sharing 3410*c87b03e5Sespie@item 3411*c87b03e5SespieThere is only one @code{cc0} expression. 3412*c87b03e5Sespie 3413*c87b03e5Sespie@cindex @code{const_double}, RTL sharing 3414*c87b03e5Sespie@item 3415*c87b03e5SespieThere is only one @code{const_double} expression with value 0 for 3416*c87b03e5Sespieeach floating point mode. Likewise for values 1 and 2. 3417*c87b03e5Sespie 3418*c87b03e5Sespie@cindex @code{const_vector}, RTL sharing 3419*c87b03e5Sespie@item 3420*c87b03e5SespieThere is only one @code{const_vector} expression with value 0 for 3421*c87b03e5Sespieeach vector mode, be it an integer or a double constant vector. 3422*c87b03e5Sespie 3423*c87b03e5Sespie@cindex @code{label_ref}, RTL sharing 3424*c87b03e5Sespie@cindex @code{scratch}, RTL sharing 3425*c87b03e5Sespie@item 3426*c87b03e5SespieNo @code{label_ref} or @code{scratch} appears in more than one place in 3427*c87b03e5Sespiethe RTL structure; in other words, it is safe to do a tree-walk of all 3428*c87b03e5Sespiethe insns in the function and assume that each time a @code{label_ref} 3429*c87b03e5Sespieor @code{scratch} is seen it is distinct from all others that are seen. 3430*c87b03e5Sespie 3431*c87b03e5Sespie@cindex @code{mem}, RTL sharing 3432*c87b03e5Sespie@item 3433*c87b03e5SespieOnly one @code{mem} object is normally created for each static 3434*c87b03e5Sespievariable or stack slot, so these objects are frequently shared in all 3435*c87b03e5Sespiethe places they appear. However, separate but equal objects for these 3436*c87b03e5Sespievariables are occasionally made. 3437*c87b03e5Sespie 3438*c87b03e5Sespie@cindex @code{asm_operands}, RTL sharing 3439*c87b03e5Sespie@item 3440*c87b03e5SespieWhen a single @code{asm} statement has multiple output operands, a 3441*c87b03e5Sespiedistinct @code{asm_operands} expression is made for each output operand. 3442*c87b03e5SespieHowever, these all share the vector which contains the sequence of input 3443*c87b03e5Sespieoperands. This sharing is used later on to test whether two 3444*c87b03e5Sespie@code{asm_operands} expressions come from the same statement, so all 3445*c87b03e5Sespieoptimizations must carefully preserve the sharing if they copy the 3446*c87b03e5Sespievector at all. 3447*c87b03e5Sespie 3448*c87b03e5Sespie@item 3449*c87b03e5SespieNo RTL object appears in more than one place in the RTL structure 3450*c87b03e5Sespieexcept as described above. Many passes of the compiler rely on this 3451*c87b03e5Sespieby assuming that they can modify RTL objects in place without unwanted 3452*c87b03e5Sespieside-effects on other insns. 3453*c87b03e5Sespie 3454*c87b03e5Sespie@findex unshare_all_rtl 3455*c87b03e5Sespie@item 3456*c87b03e5SespieDuring initial RTL generation, shared structure is freely introduced. 3457*c87b03e5SespieAfter all the RTL for a function has been generated, all shared 3458*c87b03e5Sespiestructure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c}, 3459*c87b03e5Sespieafter which the above rules are guaranteed to be followed. 3460*c87b03e5Sespie 3461*c87b03e5Sespie@findex copy_rtx_if_shared 3462*c87b03e5Sespie@item 3463*c87b03e5SespieDuring the combiner pass, shared structure within an insn can exist 3464*c87b03e5Sespietemporarily. However, the shared structure is copied before the 3465*c87b03e5Sespiecombiner is finished with the insn. This is done by calling 3466*c87b03e5Sespie@code{copy_rtx_if_shared}, which is a subroutine of 3467*c87b03e5Sespie@code{unshare_all_rtl}. 3468*c87b03e5Sespie@end itemize 3469*c87b03e5Sespie 3470*c87b03e5Sespie@node Reading RTL 3471*c87b03e5Sespie@section Reading RTL 3472*c87b03e5Sespie 3473*c87b03e5SespieTo read an RTL object from a file, call @code{read_rtx}. It takes one 3474*c87b03e5Sespieargument, a stdio stream, and returns a single RTL object. This routine 3475*c87b03e5Sespieis defined in @file{read-rtl.c}. It is not available in the compiler 3476*c87b03e5Sespieitself, only the various programs that generate the compiler back end 3477*c87b03e5Sespiefrom the machine description. 3478*c87b03e5Sespie 3479*c87b03e5SespiePeople frequently have the idea of using RTL stored as text in a file as 3480*c87b03e5Sespiean interface between a language front end and the bulk of GCC@. This 3481*c87b03e5Sespieidea is not feasible. 3482*c87b03e5Sespie 3483*c87b03e5SespieGCC was designed to use RTL internally only. Correct RTL for a given 3484*c87b03e5Sespieprogram is very dependent on the particular target machine. And the RTL 3485*c87b03e5Sespiedoes not contain all the information about the program. 3486*c87b03e5Sespie 3487*c87b03e5SespieThe proper way to interface GCC to a new language front end is with 3488*c87b03e5Sespiethe ``tree'' data structure, described in the files @file{tree.h} and 3489*c87b03e5Sespie@file{tree.def}. The documentation for this structure (@pxref{Trees}) 3490*c87b03e5Sespieis incomplete. 3491