1 /* $OpenBSD: fpu_mul.c,v 1.3 2019/03/15 05:42:38 kevlo Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)fpu_mul.c 8.1 (Berkeley) 6/11/93 45 * $NetBSD: fpu_mul.c,v 1.2 1994/11/20 20:52:44 deraadt Exp $ 46 */ 47 48 /* 49 * Perform an FPU multiply (return x * y). 50 */ 51 52 #include <sys/types.h> 53 54 #include <machine/frame.h> 55 56 #include "fpu_arith.h" 57 #include "fpu_emu.h" 58 #include "fpu_extern.h" 59 60 /* 61 * The multiplication algorithm for normal numbers is as follows: 62 * 63 * The fraction of the product is built in the usual stepwise fashion. 64 * Each step consists of shifting the accumulator right one bit 65 * (maintaining any guard bits) and, if the next bit in y is set, 66 * adding the multiplicand (x) to the accumulator. Then, in any case, 67 * we advance one bit leftward in y. Algorithmically: 68 * 69 * A = 0; 70 * for (bit = 0; bit < FP_NMANT; bit++) { 71 * sticky |= A & 1, A >>= 1; 72 * if (Y & (1 << bit)) 73 * A += X; 74 * } 75 * 76 * (X and Y here represent the mantissas of x and y respectively.) 77 * The resultant accumulator (A) is the product's mantissa. It may 78 * be as large as 11.11111... in binary and hence may need to be 79 * shifted right, but at most one bit. 80 * 81 * Since we do not have efficient multiword arithmetic, we code the 82 * accumulator as four separate words, just like any other mantissa. 83 * We use local `register' variables in the hope that this is faster 84 * than memory. We keep x->fp_mant in locals for the same reason. 85 * 86 * In the algorithm above, the bits in y are inspected one at a time. 87 * We will pick them up 32 at a time and then deal with those 32, one 88 * at a time. Note, however, that we know several things about y: 89 * 90 * - the guard and round bits at the bottom are sure to be zero; 91 * 92 * - often many low bits are zero (y is often from a single or double 93 * precision source); 94 * 95 * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word. 96 * 97 * We can also test for 32-zero-bits swiftly. In this case, the center 98 * part of the loop---setting sticky, shifting A, and not adding---will 99 * run 32 times without adding X to A. We can do a 32-bit shift faster 100 * by simply moving words. Since zeros are common, we optimize this case. 101 * Furthermore, since A is initially zero, we can omit the shift as well 102 * until we reach a nonzero word. 103 */ 104 struct fpn * 105 __fpu_mul(fe) 106 struct fpemu *fe; 107 { 108 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; 109 u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m; 110 int sticky; 111 FPU_DECL_CARRY 112 113 /* 114 * Put the `heavier' operand on the right (see fpu_emu.h). 115 * Then we will have one of the following cases, taken in the 116 * following order: 117 * 118 * - y = NaN. Implied: if only one is a signalling NaN, y is. 119 * The result is y. 120 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN 121 * case was taken care of earlier). 122 * If x = 0, the result is NaN. Otherwise the result 123 * is y, with its sign reversed if x is negative. 124 * - x = 0. Implied: y is 0 or number. 125 * The result is 0 (with XORed sign as usual). 126 * - other. Implied: both x and y are numbers. 127 * The result is x * y (XOR sign, multiply bits, add exponents). 128 */ 129 ORDER(x, y); 130 if (ISNAN(y)) { 131 y->fp_sign ^= x->fp_sign; 132 return (y); 133 } 134 if (ISINF(y)) { 135 if (ISZERO(x)) 136 return (__fpu_newnan(fe)); 137 y->fp_sign ^= x->fp_sign; 138 return (y); 139 } 140 if (ISZERO(x)) { 141 x->fp_sign ^= y->fp_sign; 142 return (x); 143 } 144 145 /* 146 * Setup. In the code below, the mask `m' will hold the current 147 * mantissa byte from y. The variable `bit' denotes the bit 148 * within m. We also define some macros to deal with everything. 149 */ 150 x3 = x->fp_mant[3]; 151 x2 = x->fp_mant[2]; 152 x1 = x->fp_mant[1]; 153 x0 = x->fp_mant[0]; 154 sticky = a3 = a2 = a1 = a0 = 0; 155 156 #define ADD /* A += X */ \ 157 FPU_ADDS(a3, a3, x3); \ 158 FPU_ADDCS(a2, a2, x2); \ 159 FPU_ADDCS(a1, a1, x1); \ 160 FPU_ADDC(a0, a0, x0) 161 162 #define SHR1 /* A >>= 1, with sticky */ \ 163 sticky |= a3 & 1, a3 = (a3 >> 1) | (a2 << 31), \ 164 a2 = (a2 >> 1) | (a1 << 31), a1 = (a1 >> 1) | (a0 << 31), a0 >>= 1 165 166 #define SHR32 /* A >>= 32, with sticky */ \ 167 sticky |= a3, a3 = a2, a2 = a1, a1 = a0, a0 = 0 168 169 #define STEP /* each 1-bit step of the multiplication */ \ 170 SHR1; if (bit & m) { ADD; }; bit <<= 1 171 172 /* 173 * We are ready to begin. The multiply loop runs once for each 174 * of the four 32-bit words. Some words, however, are special. 175 * As noted above, the low order bits of Y are often zero. Even 176 * if not, the first loop can certainly skip the guard bits. 177 * The last word of y has its highest 1-bit in position FP_NMANT-1, 178 * so we stop the loop when we move past that bit. 179 */ 180 if ((m = y->fp_mant[3]) == 0) { 181 /* SHR32; */ /* unneeded since A==0 */ 182 } else { 183 bit = 1 << FP_NG; 184 do { 185 STEP; 186 } while (bit != 0); 187 } 188 if ((m = y->fp_mant[2]) == 0) { 189 SHR32; 190 } else { 191 bit = 1; 192 do { 193 STEP; 194 } while (bit != 0); 195 } 196 if ((m = y->fp_mant[1]) == 0) { 197 SHR32; 198 } else { 199 bit = 1; 200 do { 201 STEP; 202 } while (bit != 0); 203 } 204 m = y->fp_mant[0]; /* definitely != 0 */ 205 bit = 1; 206 do { 207 STEP; 208 } while (bit <= m); 209 210 /* 211 * Done with mantissa calculation. Get exponent and handle 212 * 11.111...1 case, then put result in place. We reuse x since 213 * it already has the right class (FP_NUM). 214 */ 215 m = x->fp_exp + y->fp_exp; 216 if (a0 >= FP_2) { 217 SHR1; 218 m++; 219 } 220 x->fp_sign ^= y->fp_sign; 221 x->fp_exp = m; 222 x->fp_sticky = sticky; 223 x->fp_mant[3] = a3; 224 x->fp_mant[2] = a2; 225 x->fp_mant[1] = a1; 226 x->fp_mant[0] = a0; 227 return (x); 228 } 229