xref: /openbsd/share/man/man4/cz.4 (revision 898184e3)
1.\"	$OpenBSD: cz.4,v 1.11 2009/10/31 11:29:52 sobrado Exp $
2.\"	$NetBSD: cz.4,v 1.3 2001/06/12 14:46:11 wiz Exp $
3.\"
4.\" Copyright (c) 2000 Zembu Labs, Inc.
5.\" All rights reserved.
6.\"
7.\" Author: Jason R. Thorpe <thorpej@zembu.com>
8.\"
9.\" Redistribution and use in source and binary forms, with or without
10.\" modification, are permitted provided that the following conditions
11.\" are met:
12.\" 1. Redistributions of source code must retain the above copyright
13.\"    notice, this list of conditions and the following disclaimer.
14.\" 2. Redistributions in binary form must reproduce the above copyright
15.\"    notice, this list of conditions and the following disclaimer in the
16.\"    documentation and/or other materials provided with the distribution.
17.\" 3. All advertising materials mentioning features or use of this software
18.\"    must display the following acknowledgement:
19.\"        This product includes software developed by Zembu Labs, Inc.
20.\" 4. Neither the name of Zembu Labs nor the names of its employees may
21.\"    be used to endorse or promote products derived from this software
22.\"    without specific prior written permission.
23.\"
24.\" THIS SOFTWARE IS PROVIDED BY ZEMBU LABS, INC. ``AS IS'' AND ANY EXPRESS
25.\" OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WAR-
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31.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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33.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34.\"
35.Dd $Mdocdate: October 31 2009 $
36.Dt CZ 4
37.Os
38.Sh NAME
39.Nm cz
40.Nd Cyclades-Z series multi-port serial adapter device
41.Sh SYNOPSIS
42.Cd "cz* at pci?"
43.Sh DESCRIPTION
44The
45.Nm
46device driver supports the Cyclades-Z series of multi-port serial adapters.
47The Cyclades-Z is an intelligent serial controller comprising:
48.Bl -bullet -offset indent
49.It
50PLX9060ES PCI bus interface
51.It
52Xilinx XC5204 FPGA
53.It
54IDT R3052 MIPS CPU
55.El
56.Pp
57The MIPS CPU runs firmware provided by the device driver.
58Communication with the MIPS is performed by modifying data structures located
59in board local RAM or host RAM.
60.Pp
61The Cyclades-Z comes in three basic flavors:
62.Bl -bullet -offset indent
63.It
64Cyclades-8Zo rev. 1 -- This is an older 8-port board with no FPGA.
65The serial ports are provided by an octopus cable.
66.It
67Cyclades-8Zo rev. 2 -- This is the newer 8-port board.
68The serial ports are provided by an octopus cable.
69.It
70Cyclades-Ze -- This is the expandable version of the Cyclades-Z.
71It uses an HD-50 SCSI cable to connect the board to a 1U rack mountable serial
72expansion box.
73Each box has 16 RJ45 serial ports, and up to 4 boxes may be chained together,
74for a total of 64 ports.
75Boxes 3 and 4 require their own external power supply, otherwise the firmware
76will refuse to start (as it cannot communicate with the UARTs in those boxes).
77.El
78.Pp
79The Cyclades-Z has several features to improve performance under
80high serial I/O load:
81.Bl -bullet -offset indent
82.It
83The board may operate in interrupt-driven mode or polled mode to reduce
84interrupt load.
85.It
86Each channel has a large input and output buffer.
87.It
88Each channel may be programmed to generate an interrupt based on
89reception of a specific character, e.g. a PPP End-Of-Frame character.
90.It
91The MIPS CPU on the board performs all flow-control handling.
92.El
93.Sh FILES
94.Bl -tag -width XXXXXXXXXXX -compact
95.It Pa /dev/ttyZ??
96dial-in (normal) TTY device
97.It Pa /dev/cuaZ??
98dial-out TTY device
99.El
100.\" .Sh DIAGNOSTICS
101.\" XXX to be done.
102.Sh SEE ALSO
103.Xr intro 4 ,
104.Xr pci 4 ,
105.Xr termios 4 ,
106.Xr tty 4
107.Sh HISTORY
108The
109.Nm
110driver first appeared in
111.Ox 3.0 .
112.Sh AUTHORS
113.An -nosplit
114The
115.Nm
116driver was written by
117.An Jason R. Thorpe Aq thorpej@zembu.com
118and
119.An Bill Studenmund Aq wrstuden@zembu.com
120of Zembu Labs, Inc.
121.Sh BUGS
122The
123.Nm
124driver does not currently implement communication via host RAM.
125While this may improve performance by reducing the number of PCI memory
126space read/write cycles, it is not straightforward to implement with
127the current
128.Xr bus_dma 9
129API.
130.Pp
131Interrupt mode has not been tested.
132.Pp
133There is no support for reading or writing the EEPROM connected to
134the PLX PCI bus controller.
135