1*16f46ab6Sjmc.\" $OpenBSD: zqreset.4,v 1.2 2021/04/30 13:52:12 jmc Exp $ 25b874c11Svisa.\" 35b874c11Svisa.\" Copyright (c) 2021 Visa Hankala 45b874c11Svisa.\" 55b874c11Svisa.\" Permission to use, copy, modify, and distribute this software for any 65b874c11Svisa.\" purpose with or without fee is hereby granted, provided that the above 75b874c11Svisa.\" copyright notice and this permission notice appear in all copies. 85b874c11Svisa.\" 95b874c11Svisa.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 105b874c11Svisa.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 115b874c11Svisa.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 125b874c11Svisa.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 135b874c11Svisa.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 145b874c11Svisa.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 155b874c11Svisa.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 165b874c11Svisa.\" 175b874c11Svisa.Dd $Mdocdate: April 30 2021 $ 18*16f46ab6Sjmc.Dt ZQRESET 4 armv7 195b874c11Svisa.Os 205b874c11Svisa.Sh NAME 215b874c11Svisa.Nm zqreset 225b874c11Svisa.Nd Xilinx Zynq-7000 reset controller 235b874c11Svisa.Sh SYNOPSIS 245b874c11Svisa.Cd "zqreset* at fdt?" 255b874c11Svisa.Sh DESCRIPTION 265b874c11SvisaThe 275b874c11Svisa.Nm 285b874c11Svisadriver controls the reset signals for the integrated components 295b874c11Svisaof Zynq-7000 SoCs. 305b874c11Svisa.Sh SEE ALSO 315b874c11Svisa.Xr intro 4 , 325b874c11Svisa.Xr zqclock 4 335b874c11Svisa.Sh HISTORY 345b874c11SvisaThe 355b874c11Svisa.Nm 365b874c11Svisadriver first appeared in 375b874c11Svisa.Ox 7.0 . 38