1*b3af768dSjsg /* $OpenBSD: machdep.c,v 1.203 2023/04/11 00:45:06 jsg Exp $ */
22a2685f2Sart /* $NetBSD: machdep.c,v 1.210 2000/06/01 17:12:38 thorpej Exp $ */
3aed035abSart
4aed035abSart /*-
5aed035abSart * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
6aed035abSart * All rights reserved.
7aed035abSart *
8aed035abSart * This code is derived from software contributed to The NetBSD Foundation
9aed035abSart * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10aed035abSart * NASA Ames Research Center and by Chris G. Demetriou.
11aed035abSart *
12aed035abSart * Redistribution and use in source and binary forms, with or without
13aed035abSart * modification, are permitted provided that the following conditions
14aed035abSart * are met:
15aed035abSart * 1. Redistributions of source code must retain the above copyright
16aed035abSart * notice, this list of conditions and the following disclaimer.
17aed035abSart * 2. Redistributions in binary form must reproduce the above copyright
18aed035abSart * notice, this list of conditions and the following disclaimer in the
19aed035abSart * documentation and/or other materials provided with the distribution.
20aed035abSart *
21aed035abSart * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22aed035abSart * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23aed035abSart * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24aed035abSart * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25aed035abSart * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26aed035abSart * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27aed035abSart * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28aed035abSart * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29aed035abSart * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30aed035abSart * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31aed035abSart * POSSIBILITY OF SUCH DAMAGE.
32aed035abSart */
33df930be7Sderaadt
34df930be7Sderaadt /*
35417eba8cSderaadt * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
36df930be7Sderaadt * All rights reserved.
37df930be7Sderaadt *
38df930be7Sderaadt * Author: Chris G. Demetriou
39df930be7Sderaadt *
40df930be7Sderaadt * Permission to use, copy, modify and distribute this software and
41df930be7Sderaadt * its documentation is hereby granted, provided that both the copyright
42df930be7Sderaadt * notice and this permission notice appear in all copies of the
43df930be7Sderaadt * software, derivative works or modified versions, and any portions
44df930be7Sderaadt * thereof, and that both notices appear in supporting documentation.
45df930be7Sderaadt *
46df930be7Sderaadt * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
47df930be7Sderaadt * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
48df930be7Sderaadt * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49df930be7Sderaadt *
50df930be7Sderaadt * Carnegie Mellon requests users of this software to return to
51df930be7Sderaadt *
52df930be7Sderaadt * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
53df930be7Sderaadt * School of Computer Science
54df930be7Sderaadt * Carnegie Mellon University
55df930be7Sderaadt * Pittsburgh PA 15213-3890
56df930be7Sderaadt *
57df930be7Sderaadt * any improvements or extensions that they make and grant Carnegie the
58df930be7Sderaadt * rights to redistribute these changes.
59df930be7Sderaadt */
60df930be7Sderaadt
61df930be7Sderaadt #include <sys/param.h>
62df930be7Sderaadt #include <sys/systm.h>
63df930be7Sderaadt #include <sys/signalvar.h>
64df930be7Sderaadt #include <sys/kernel.h>
65df930be7Sderaadt #include <sys/proc.h>
667d9ca166Sderaadt #include <sys/socket.h>
672a2685f2Sart #include <sys/sched.h>
68df930be7Sderaadt #include <sys/buf.h>
69df930be7Sderaadt #include <sys/reboot.h>
70417eba8cSderaadt #include <sys/device.h>
71df930be7Sderaadt #include <sys/conf.h>
72d66eba84Sart #include <sys/timeout.h>
73df930be7Sderaadt #include <sys/malloc.h>
74df930be7Sderaadt #include <sys/mbuf.h>
75df930be7Sderaadt #include <sys/msgbuf.h>
76df930be7Sderaadt #include <sys/ioctl.h>
77df930be7Sderaadt #include <sys/tty.h>
78df930be7Sderaadt #include <sys/user.h>
79df930be7Sderaadt #include <sys/exec.h>
80df930be7Sderaadt #include <sys/sysctl.h>
8150ce9ee0Sniklas #include <sys/core.h>
8250ce9ee0Sniklas #include <sys/kcore.h>
837d9ca166Sderaadt
847d9ca166Sderaadt #include <net/if.h>
857d9ca166Sderaadt #include <uvm/uvm.h>
867d9ca166Sderaadt
8750ce9ee0Sniklas #include <machine/kcore.h>
88433075b6Spvalchev #ifndef NO_IEEE
89433075b6Spvalchev #include <machine/fpu.h>
90433075b6Spvalchev #endif
911f87e7b7Sart #include <sys/timetc.h>
92df930be7Sderaadt
93df930be7Sderaadt #include <sys/mount.h>
94df930be7Sderaadt #include <sys/syscallargs.h>
95df930be7Sderaadt
96df930be7Sderaadt #include <dev/cons.h>
97df930be7Sderaadt
9850ce9ee0Sniklas #include <machine/autoconf.h>
99df930be7Sderaadt #include <machine/cpu.h>
100df930be7Sderaadt #include <machine/reg.h>
101df930be7Sderaadt #include <machine/rpb.h>
102df930be7Sderaadt #include <machine/prom.h>
1033a630e3fSniklas #include <machine/cpuconf.h>
104433075b6Spvalchev #ifndef NO_IEEE
105433075b6Spvalchev #include <machine/ieeefp.h>
106433075b6Spvalchev #endif
107df930be7Sderaadt
10845e5a1a0Sart #include <dev/pci/pcivar.h>
10945e5a1a0Sart
11012f8bbedSniklas #ifdef DDB
11112f8bbedSniklas #include <machine/db_machdep.h>
11212f8bbedSniklas #include <ddb/db_extern.h>
11321c23d01Smiod #include <ddb/db_interface.h>
11412f8bbedSniklas #endif
11512f8bbedSniklas
116a072164aSmiod #include "ioasic.h"
117a072164aSmiod
118a072164aSmiod #if NIOASIC > 0
119a072164aSmiod #include <machine/tc_machdep.h>
120a072164aSmiod #include <dev/tc/tcreg.h>
121a072164aSmiod #include <dev/tc/ioasicvar.h>
122a072164aSmiod #endif
123a072164aSmiod
124c4071fd1Smillert int cpu_dump(void);
125c4071fd1Smillert int cpu_dumpsize(void);
126c4071fd1Smillert u_long cpu_dump_mempagecnt(void);
127c4071fd1Smillert void dumpsys(void);
128c4071fd1Smillert void identifycpu(void);
129c4071fd1Smillert void regdump(struct trapframe *framep);
130c4071fd1Smillert void printregs(struct reg *);
131df930be7Sderaadt
132b426ab7bSthib struct uvm_constraint_range isa_constraint = { 0x0, 0x00ffffffUL };
133b426ab7bSthib struct uvm_constraint_range dma_constraint = { 0x0, (paddr_t)-1 };
134b426ab7bSthib struct uvm_constraint_range *uvm_md_constraints[] = {
135b426ab7bSthib &isa_constraint,
136b426ab7bSthib NULL
137b426ab7bSthib };
138b426ab7bSthib
139ab8e80c5Sart struct vm_map *exec_map = NULL;
140ab8e80c5Sart struct vm_map *phys_map = NULL;
141aed035abSart
142c72644a3Sderaadt /*
143c72644a3Sderaadt * safepri is a safe priority for sleep to set for a spin-wait
144c72644a3Sderaadt * during autoconfiguration or after a panic.
145c72644a3Sderaadt */
146c72644a3Sderaadt int safepri = 0;
147c72644a3Sderaadt
14827626149Smatthieu #ifdef APERTURE
14927626149Smatthieu int allowaperture = 0;
15027626149Smatthieu #endif
15127626149Smatthieu
152df930be7Sderaadt int totalphysmem; /* total amount of physical memory in system */
15374652a67Sniklas int physmem; /* physical mem used by OpenBSD + some rsvd */
154df930be7Sderaadt int resvmem; /* amount of memory reserved for PROM */
155df930be7Sderaadt int unusedmem; /* amount of memory for OS that we don't use */
156df930be7Sderaadt int unknownmem; /* amount of memory with an unknown use */
157df930be7Sderaadt
158df930be7Sderaadt int cputype; /* system type, from the RPB */
159df930be7Sderaadt
1602a2685f2Sart int bootdev_debug = 0; /* patchable, or from DDB */
1612a2685f2Sart
162df930be7Sderaadt /* the following is used externally (sysctl_hw) */
163aed035abSart char machine[] = MACHINE; /* from <machine/param.h> */
164417eba8cSderaadt char cpu_model[128];
165df930be7Sderaadt
166df930be7Sderaadt struct user *proc0paddr;
167df930be7Sderaadt
168df930be7Sderaadt /* Number of machine cycles per microsecond */
169df930be7Sderaadt u_int64_t cycles_per_usec;
170df930be7Sderaadt
171aed035abSart struct bootinfo_kernel bootinfo;
172aed035abSart
173b1560ceaSmiod struct consdev *cn_tab;
174b1560ceaSmiod
175aed035abSart /* For built-in TCDS */
176aed035abSart #if defined(DEC_3000_300) || defined(DEC_3000_500)
177aed035abSart u_int8_t dec_3000_scsiid[2], dec_3000_scsifast[2];
178aed035abSart #endif
179aed035abSart
180aed035abSart struct platform platform;
181417eba8cSderaadt
182417eba8cSderaadt /* for cpu_sysctl() */
183433075b6Spvalchev #ifndef NO_IEEE
184433075b6Spvalchev int alpha_fp_sync_complete = 0; /* fp fixup if sync even without /s */
185433075b6Spvalchev #endif
186a072164aSmiod #if NIOASIC > 0
18791c0e687Sderaadt int alpha_led_blink = 1;
188a072164aSmiod #endif
18950ce9ee0Sniklas
190aed035abSart /*
191aed035abSart * XXX This should be dynamically sized, but we have the chicken-egg problem!
192aed035abSart * XXX it should also be larger than it is, because not all of the mddt
193aed035abSart * XXX clusters end up being used for VM.
194aed035abSart */
195aed035abSart phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; /* low size bits overloaded */
196aed035abSart int mem_cluster_cnt;
197aed035abSart
1983a630e3fSniklas void
alpha_init(unused,ptb,bim,bip,biv)199dd3e8537Smiod alpha_init(unused, ptb, bim, bip, biv)
200dd3e8537Smiod u_long unused;
201df930be7Sderaadt u_long ptb; /* PFN of current level 1 page table */
202aed035abSart u_long bim; /* bootinfo magic */
203aed035abSart u_long bip; /* bootinfo pointer */
204aed035abSart u_long biv; /* bootinfo version */
205df930be7Sderaadt {
206aed035abSart extern char kernel_text[], _end[];
207df930be7Sderaadt struct mddt *mddtp;
208aed035abSart struct mddt_cluster *memc;
209df930be7Sderaadt int i, mddtweird;
210aed035abSart struct vm_physseg *vps;
211aed035abSart vaddr_t kernstart, kernend;
212aed035abSart paddr_t kernstartpfn, kernendpfn, pfn0, pfn1;
213df930be7Sderaadt char *p;
2142a2685f2Sart const char *bootinfo_msg;
215aed035abSart const struct cpuinit *c;
216aed035abSart extern caddr_t esym;
217aed035abSart struct cpu_info *ci;
218aed035abSart cpuid_t cpu_id;
219df930be7Sderaadt
220aed035abSart /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */
221f3914c62Sniklas
222df930be7Sderaadt /*
223aed035abSart * Turn off interrupts (not mchecks) and floating point.
224df930be7Sderaadt * Make sure the instruction and data streams are consistent.
225df930be7Sderaadt */
226aed035abSart (void)alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH);
22750ce9ee0Sniklas alpha_pal_wrfen(0);
22850ce9ee0Sniklas ALPHA_TBIA();
22950ce9ee0Sniklas alpha_pal_imb();
230df930be7Sderaadt
231c62181b1Sbrad /* Initialize the SCB. */
232c62181b1Sbrad scb_init();
233c62181b1Sbrad
234aed035abSart cpu_id = cpu_number();
235aed035abSart
236aed035abSart #if defined(MULTIPROCESSOR)
237df930be7Sderaadt /*
238aed035abSart * Set our SysValue to the address of our cpu_info structure.
239aed035abSart * Secondary processors do this in their spinup trampoline.
240df930be7Sderaadt */
24121c23d01Smiod alpha_pal_wrval((u_long)&cpu_info_primary);
24221c23d01Smiod cpu_info[cpu_id] = &cpu_info_primary;
243aed035abSart #endif
244aed035abSart
245aed035abSart ci = curcpu();
246aed035abSart ci->ci_cpuid = cpu_id;
247aed035abSart
248aed035abSart /*
249aed035abSart * Get critical system information (if possible, from the
250aed035abSart * information provided by the boot program).
251aed035abSart */
252aed035abSart bootinfo_msg = NULL;
253aed035abSart if (bim == BOOTINFO_MAGIC) {
254aed035abSart if (biv == 0) { /* backward compat */
255aed035abSart biv = *(u_long *)bip;
256aed035abSart bip += 8;
257aed035abSart }
258aed035abSart switch (biv) {
259aed035abSart case 1: {
260aed035abSart struct bootinfo_v1 *v1p = (struct bootinfo_v1 *)bip;
261aed035abSart
262aed035abSart bootinfo.ssym = v1p->ssym;
263aed035abSart bootinfo.esym = v1p->esym;
264aed035abSart /* hwrpb may not be provided by boot block in v1 */
265aed035abSart if (v1p->hwrpb != NULL) {
266aed035abSart bootinfo.hwrpb_phys =
267aed035abSart ((struct rpb *)v1p->hwrpb)->rpb_phys;
268aed035abSart bootinfo.hwrpb_size = v1p->hwrpbsize;
269aed035abSart } else {
270aed035abSart bootinfo.hwrpb_phys =
271aed035abSart ((struct rpb *)HWRPB_ADDR)->rpb_phys;
272aed035abSart bootinfo.hwrpb_size =
273aed035abSart ((struct rpb *)HWRPB_ADDR)->rpb_size;
274aed035abSart }
275aed035abSart bcopy(v1p->boot_flags, bootinfo.boot_flags,
276aed035abSart min(sizeof v1p->boot_flags,
277aed035abSart sizeof bootinfo.boot_flags));
278aed035abSart bcopy(v1p->booted_kernel, bootinfo.booted_kernel,
279aed035abSart min(sizeof v1p->booted_kernel,
280aed035abSart sizeof bootinfo.booted_kernel));
281c2afdefeSderaadt boothowto = v1p->howto;
282aed035abSart /* booted dev not provided in bootinfo */
283aed035abSart init_prom_interface((struct rpb *)
284aed035abSart ALPHA_PHYS_TO_K0SEG(bootinfo.hwrpb_phys));
285aed035abSart prom_getenv(PROM_E_BOOTED_DEV, bootinfo.booted_dev,
286aed035abSart sizeof bootinfo.booted_dev);
287aed035abSart break;
288aed035abSart }
289aed035abSart default:
290aed035abSart bootinfo_msg = "unknown bootinfo version";
291aed035abSart goto nobootinfo;
292aed035abSart }
293aed035abSart } else {
294aed035abSart bootinfo_msg = "boot program did not pass bootinfo";
295aed035abSart nobootinfo:
296aed035abSart bootinfo.ssym = (u_long)_end;
297aed035abSart bootinfo.esym = (u_long)_end;
298aed035abSart bootinfo.hwrpb_phys = ((struct rpb *)HWRPB_ADDR)->rpb_phys;
299aed035abSart bootinfo.hwrpb_size = ((struct rpb *)HWRPB_ADDR)->rpb_size;
300aed035abSart init_prom_interface((struct rpb *)HWRPB_ADDR);
301aed035abSart prom_getenv(PROM_E_BOOTED_OSFLAGS, bootinfo.boot_flags,
302aed035abSart sizeof bootinfo.boot_flags);
303aed035abSart prom_getenv(PROM_E_BOOTED_FILE, bootinfo.booted_kernel,
304aed035abSart sizeof bootinfo.booted_kernel);
305aed035abSart prom_getenv(PROM_E_BOOTED_DEV, bootinfo.booted_dev,
306aed035abSart sizeof bootinfo.booted_dev);
307aed035abSart }
308aed035abSart
309aed035abSart esym = (caddr_t)bootinfo.esym;
310aed035abSart /*
311aed035abSart * Initialize the kernel's mapping of the RPB. It's needed for
312aed035abSart * lots of things.
313aed035abSart */
314aed035abSart hwrpb = (struct rpb *)ALPHA_PHYS_TO_K0SEG(bootinfo.hwrpb_phys);
315aed035abSart
316aed035abSart #if defined(DEC_3000_300) || defined(DEC_3000_500)
317aed035abSart if (hwrpb->rpb_type == ST_DEC_3000_300 ||
318aed035abSart hwrpb->rpb_type == ST_DEC_3000_500) {
319aed035abSart prom_getenv(PROM_E_SCSIID, dec_3000_scsiid,
320aed035abSart sizeof(dec_3000_scsiid));
321aed035abSart prom_getenv(PROM_E_SCSIFAST, dec_3000_scsifast,
322aed035abSart sizeof(dec_3000_scsifast));
323aed035abSart }
324aed035abSart #endif
325df930be7Sderaadt
326df930be7Sderaadt /*
327df930be7Sderaadt * Remember how many cycles there are per microsecond,
328df930be7Sderaadt * so that we can use delay(). Round up, for safety.
329df930be7Sderaadt */
330df930be7Sderaadt cycles_per_usec = (hwrpb->rpb_cc_freq + 999999) / 1000000;
331df930be7Sderaadt
332df930be7Sderaadt /*
3339e71c994Saaron * Initialize the (temporary) bootstrap console interface, so
334aed035abSart * we can use printf until the VM system starts being setup.
335aed035abSart * The real console is initialized before then.
336df930be7Sderaadt */
337aed035abSart init_bootstrap_console();
338aed035abSart
339aed035abSart /* OUTPUT NOW ALLOWED */
340aed035abSart
341aed035abSart /* delayed from above */
342aed035abSart if (bootinfo_msg)
343aed035abSart printf("WARNING: %s (0x%lx, 0x%lx, 0x%lx)\n",
344aed035abSart bootinfo_msg, bim, bip, biv);
345aed035abSart
346aed035abSart /* Initialize the trap vectors on the primary processor. */
347aed035abSart trap_init();
348df930be7Sderaadt
349df930be7Sderaadt /*
350aed035abSart * Find out what hardware we're on, and do basic initialization.
351df930be7Sderaadt */
352aed035abSart cputype = hwrpb->rpb_type;
353aed035abSart if (cputype < 0) {
354aed035abSart /*
355aed035abSart * At least some white-box systems have SRM which
356aed035abSart * reports a systype that's the negative of their
357aed035abSart * blue-box counterpart.
358aed035abSart */
359aed035abSart cputype = -cputype;
360aed035abSart }
361aed035abSart c = platform_lookup(cputype);
362aed035abSart if (c == NULL) {
363aed035abSart platform_not_supported();
364aed035abSart /* NOTREACHED */
365aed035abSart }
366aed035abSart (*c->init)();
367094fa01fSderaadt strlcpy(cpu_model, platform.model, sizeof cpu_model);
36850ce9ee0Sniklas
36950ce9ee0Sniklas /*
3709e71c994Saaron * Initialize the real console, so that the bootstrap console is
371aed035abSart * no longer necessary.
37250ce9ee0Sniklas */
373aed035abSart (*platform.cons_init)();
374aed035abSart
375a55851f4Sderaadt #if 0
376aed035abSart /* Paranoid sanity checking */
377aed035abSart
378aed035abSart assert(hwrpb->rpb_primary_cpu_id == alpha_pal_whami());
379aed035abSart
380aed035abSart /*
381aed035abSart * On single-CPU systypes, the primary should always be CPU 0,
382aed035abSart * except on Alpha 8200 systems where the CPU id is related
383aed035abSart * to the VID, which is related to the Turbo Laser node id.
384aed035abSart */
385aed035abSart if (cputype != ST_DEC_21000)
386aed035abSart assert(hwrpb->rpb_primary_cpu_id == 0);
387aed035abSart #endif
388aed035abSart
389aed035abSart /* NO MORE FIRMWARE ACCESS ALLOWED */
390aed035abSart
391cfcdef40Smiod #ifndef SMALL_KERNEL
392cfcdef40Smiod /*
393cfcdef40Smiod * If we run on a BWX-capable processor, override cpu_switch
394cfcdef40Smiod * with a faster version.
395cfcdef40Smiod * We do this now because the kernel text might be mapped
396cfcdef40Smiod * read-only eventually (although this is not the case at the moment).
397cfcdef40Smiod */
398cfcdef40Smiod if (alpha_implver() >= ALPHA_IMPLVER_EV5) {
399b7cfb05eSmiod if ((~alpha_amask(ALPHA_AMASK_BWX) & ALPHA_AMASK_BWX) != 0) {
400cfcdef40Smiod extern vaddr_t __bwx_switch0, __bwx_switch1,
401cfcdef40Smiod __bwx_switch2, __bwx_switch3;
402cfcdef40Smiod u_int32_t *dst, *src, *end;
403cfcdef40Smiod
404cfcdef40Smiod src = (u_int32_t *)&__bwx_switch2;
405cfcdef40Smiod end = (u_int32_t *)&__bwx_switch3;
406cfcdef40Smiod dst = (u_int32_t *)&__bwx_switch0;
407cfcdef40Smiod while (src != end)
408cfcdef40Smiod *dst++ = *src++;
409cfcdef40Smiod src = (u_int32_t *)&__bwx_switch1;
410cfcdef40Smiod end = (u_int32_t *)&__bwx_switch2;
411cfcdef40Smiod while (src != end)
412cfcdef40Smiod *dst++ = *src++;
413cfcdef40Smiod }
414cfcdef40Smiod }
415cfcdef40Smiod #endif
416cfcdef40Smiod
417aed035abSart /*
418aed035abSart * find out this system's page size
419aed035abSart */
42073b9fe7cSart if ((uvmexp.pagesize = hwrpb->rpb_page_size) != 8192)
42173b9fe7cSart panic("page size %d != 8192?!", uvmexp.pagesize);
422aed035abSart
423aed035abSart uvm_setpagesize();
424aed035abSart
425aed035abSart /*
426aed035abSart * Find the beginning and end of the kernel (and leave a
427aed035abSart * bit of space before the beginning for the bootstrap
428aed035abSart * stack).
429aed035abSart */
430aed035abSart kernstart = trunc_page((vaddr_t)kernel_text) - 2 * PAGE_SIZE;
431aed035abSart kernend = (vaddr_t)round_page((vaddr_t)bootinfo.esym);
432aed035abSart
433aed035abSart kernstartpfn = atop(ALPHA_K0SEG_TO_PHYS(kernstart));
434aed035abSart kernendpfn = atop(ALPHA_K0SEG_TO_PHYS(kernend));
435df930be7Sderaadt
436df930be7Sderaadt /*
437df930be7Sderaadt * Find out how much memory is available, by looking at
438df930be7Sderaadt * the memory cluster descriptors. This also tries to do
439*b3af768dSjsg * its best to detect things that have never been seen
440df930be7Sderaadt * before...
441df930be7Sderaadt */
442df930be7Sderaadt mddtp = (struct mddt *)(((caddr_t)hwrpb) + hwrpb->rpb_memdat_off);
443df930be7Sderaadt
444aed035abSart /* MDDT SANITY CHECKING */
445df930be7Sderaadt mddtweird = 0;
446aed035abSart if (mddtp->mddt_cluster_cnt < 2) {
447df930be7Sderaadt mddtweird = 1;
448aed035abSart printf("WARNING: weird number of mem clusters: %lu\n",
449e86d96d5Smiod (unsigned long)mddtp->mddt_cluster_cnt);
450df930be7Sderaadt }
451df930be7Sderaadt
452aed035abSart #if 0
453aed035abSart printf("Memory cluster count: %d\n", mddtp->mddt_cluster_cnt);
454aed035abSart #endif
455df930be7Sderaadt
456aed035abSart for (i = 0; i < mddtp->mddt_cluster_cnt; i++) {
457aed035abSart memc = &mddtp->mddt_clusters[i];
458aed035abSart #if 0
459aed035abSart printf("MEMC %d: pfn 0x%lx cnt 0x%lx usage 0x%lx\n", i,
460aed035abSart memc->mddt_pfn, memc->mddt_pg_cnt, memc->mddt_usage);
461aed035abSart #endif
462aed035abSart totalphysmem += memc->mddt_pg_cnt;
463aed035abSart if (mem_cluster_cnt < VM_PHYSSEG_MAX) { /* XXX */
464aed035abSart mem_clusters[mem_cluster_cnt].start =
465aed035abSart ptoa(memc->mddt_pfn);
466aed035abSart mem_clusters[mem_cluster_cnt].size =
467aed035abSart ptoa(memc->mddt_pg_cnt);
468aed035abSart if (memc->mddt_usage & MDDT_mbz ||
469aed035abSart memc->mddt_usage & MDDT_NONVOLATILE || /* XXX */
470aed035abSart memc->mddt_usage & MDDT_PALCODE)
471aed035abSart mem_clusters[mem_cluster_cnt].size |=
4721e8cdc2eSderaadt PROT_READ;
473aed035abSart else
474aed035abSart mem_clusters[mem_cluster_cnt].size |=
4751e8cdc2eSderaadt PROT_READ | PROT_WRITE | PROT_EXEC;
476aed035abSart mem_cluster_cnt++;
477ee2d823aSmiod } /* XXX else print something! */
478aed035abSart
479aed035abSart if (memc->mddt_usage & MDDT_mbz) {
480aed035abSart mddtweird = 1;
481aed035abSart printf("WARNING: mem cluster %d has weird "
482e86d96d5Smiod "usage 0x%lx\n", i, (long)memc->mddt_usage);
483aed035abSart unknownmem += memc->mddt_pg_cnt;
484aed035abSart continue;
485aed035abSart }
486aed035abSart if (memc->mddt_usage & MDDT_NONVOLATILE) {
487aed035abSart /* XXX should handle these... */
488aed035abSart printf("WARNING: skipping non-volatile mem "
489aed035abSart "cluster %d\n", i);
490aed035abSart unusedmem += memc->mddt_pg_cnt;
491aed035abSart continue;
492aed035abSart }
493aed035abSart if (memc->mddt_usage & MDDT_PALCODE) {
494aed035abSart resvmem += memc->mddt_pg_cnt;
495aed035abSart continue;
496aed035abSart }
497aed035abSart
498aed035abSart /*
499aed035abSart * We have a memory cluster available for system
500aed035abSart * software use. We must determine if this cluster
501aed035abSart * holds the kernel.
502aed035abSart */
503aed035abSart physmem += memc->mddt_pg_cnt;
504aed035abSart pfn0 = memc->mddt_pfn;
505aed035abSart pfn1 = memc->mddt_pfn + memc->mddt_pg_cnt;
506aed035abSart if (pfn0 <= kernstartpfn && kernendpfn <= pfn1) {
507aed035abSart /*
508aed035abSart * Must compute the location of the kernel
509aed035abSart * within the segment.
510aed035abSart */
511aed035abSart #if 0
512aed035abSart printf("Cluster %d contains kernel\n", i);
513aed035abSart #endif
514aed035abSart if (pfn0 < kernstartpfn) {
515aed035abSart /*
516aed035abSart * There is a chunk before the kernel.
517aed035abSart */
518aed035abSart #if 0
519aed035abSart printf("Loading chunk before kernel: "
520aed035abSart "0x%lx / 0x%lx\n", pfn0, kernstartpfn);
521aed035abSart #endif
522aed035abSart uvm_page_physload(pfn0, kernstartpfn,
5232ce3b4a8Soga pfn0, kernstartpfn, 0);
524aed035abSart }
525aed035abSart if (kernendpfn < pfn1) {
526aed035abSart /*
527aed035abSart * There is a chunk after the kernel.
528aed035abSart */
529aed035abSart #if 0
530aed035abSart printf("Loading chunk after kernel: "
531aed035abSart "0x%lx / 0x%lx\n", kernendpfn, pfn1);
532aed035abSart #endif
533aed035abSart uvm_page_physload(kernendpfn, pfn1,
5342ce3b4a8Soga kernendpfn, pfn1, 0);
535aed035abSart }
536aed035abSart } else {
537aed035abSart /*
538aed035abSart * Just load this cluster as one chunk.
539aed035abSart */
540aed035abSart #if 0
541aed035abSart printf("Loading cluster %d: 0x%lx / 0x%lx\n", i,
542aed035abSart pfn0, pfn1);
543aed035abSart #endif
5442ce3b4a8Soga uvm_page_physload(pfn0, pfn1, pfn0, pfn1, 0);
545aed035abSart }
546aed035abSart }
547aed035abSart
548a37778bcSderaadt #ifdef DEBUG
549aed035abSart /*
550aed035abSart * Dump out the MDDT if it looks odd...
551aed035abSart */
552df930be7Sderaadt if (mddtweird) {
553df930be7Sderaadt printf("\n");
554df930be7Sderaadt printf("complete memory cluster information:\n");
555df930be7Sderaadt for (i = 0; i < mddtp->mddt_cluster_cnt; i++) {
556df930be7Sderaadt printf("mddt %d:\n", i);
557df930be7Sderaadt printf("\tpfn %lx\n",
558df930be7Sderaadt mddtp->mddt_clusters[i].mddt_pfn);
559df930be7Sderaadt printf("\tcnt %lx\n",
560df930be7Sderaadt mddtp->mddt_clusters[i].mddt_pg_cnt);
561df930be7Sderaadt printf("\ttest %lx\n",
562df930be7Sderaadt mddtp->mddt_clusters[i].mddt_pg_test);
563df930be7Sderaadt printf("\tbva %lx\n",
564df930be7Sderaadt mddtp->mddt_clusters[i].mddt_v_bitaddr);
565df930be7Sderaadt printf("\tbpa %lx\n",
566df930be7Sderaadt mddtp->mddt_clusters[i].mddt_p_bitaddr);
567df930be7Sderaadt printf("\tbcksum %lx\n",
568df930be7Sderaadt mddtp->mddt_clusters[i].mddt_bit_cksum);
569df930be7Sderaadt printf("\tusage %lx\n",
570df930be7Sderaadt mddtp->mddt_clusters[i].mddt_usage);
571df930be7Sderaadt }
572df930be7Sderaadt printf("\n");
573df930be7Sderaadt }
574a37778bcSderaadt #endif
575df930be7Sderaadt
576df930be7Sderaadt if (totalphysmem == 0)
577df930be7Sderaadt panic("can't happen: system seems to have no memory!");
578df930be7Sderaadt #if 0
579f46637d1Sderaadt printf("totalphysmem = %u\n", totalphysmem);
580f46637d1Sderaadt printf("physmem = %u\n", physmem);
581df930be7Sderaadt printf("resvmem = %d\n", resvmem);
582df930be7Sderaadt printf("unusedmem = %d\n", unusedmem);
583df930be7Sderaadt printf("unknownmem = %d\n", unknownmem);
584df930be7Sderaadt #endif
585df930be7Sderaadt
586df930be7Sderaadt /*
587aed035abSart * Initialize error message buffer (at end of core).
588df930be7Sderaadt */
589aed035abSart {
590aed035abSart vsize_t sz = (vsize_t)round_page(MSGBUFSIZE);
591aed035abSart vsize_t reqsz = sz;
592df930be7Sderaadt
593aed035abSart vps = &vm_physmem[vm_nphysseg - 1];
594e1da84e1Salex
595aed035abSart /* shrink so that it'll fit in the last segment */
596aed035abSart if ((vps->avail_end - vps->avail_start) < atop(sz))
597aed035abSart sz = ptoa(vps->avail_end - vps->avail_start);
598aed035abSart
599aed035abSart vps->end -= atop(sz);
600aed035abSart vps->avail_end -= atop(sz);
601aed035abSart initmsgbuf((caddr_t) ALPHA_PHYS_TO_K0SEG(ptoa(vps->end)), sz);
602aed035abSart
603aed035abSart /* Remove the last segment if it now has no pages. */
604aed035abSart if (vps->start == vps->end)
605aed035abSart vm_nphysseg--;
606aed035abSart
607aed035abSart /* warn if the message buffer had to be shrunk */
608aed035abSart if (sz != reqsz)
609aed035abSart printf("WARNING: %ld bytes not available for msgbuf "
610aed035abSart "in last cluster (%ld used)\n", reqsz, sz);
611aed035abSart
612aed035abSart }
613aed035abSart
614df930be7Sderaadt /*
615df930be7Sderaadt * Init mapping for u page(s) for proc 0
616df930be7Sderaadt */
617aed035abSart proc0.p_addr = proc0paddr =
618aed035abSart (struct user *)pmap_steal_memory(UPAGES * PAGE_SIZE, NULL, NULL);
619df930be7Sderaadt
620df930be7Sderaadt /*
621df930be7Sderaadt * Initialize the virtual memory system, and set the
622df930be7Sderaadt * page table base register in proc 0's PCB.
623df930be7Sderaadt */
624aed035abSart pmap_bootstrap(ALPHA_PHYS_TO_K0SEG(ptb << PGSHIFT),
625aed035abSart hwrpb->rpb_max_asn, hwrpb->rpb_pcs_cnt);
626df930be7Sderaadt
627df930be7Sderaadt /*
628df930be7Sderaadt * Initialize the rest of proc 0's PCB, and cache its physical
629df930be7Sderaadt * address.
630df930be7Sderaadt */
631df930be7Sderaadt proc0.p_md.md_pcbpaddr =
632aed035abSart (struct pcb *)ALPHA_K0SEG_TO_PHYS((vaddr_t)&proc0paddr->u_pcb);
633df930be7Sderaadt
634df930be7Sderaadt /*
635df930be7Sderaadt * Set the kernel sp, reserving space for an (empty) trapframe,
636df930be7Sderaadt * and make proc0's trapframe pointer point to it for sanity.
637df930be7Sderaadt */
63850ce9ee0Sniklas proc0paddr->u_pcb.pcb_hw.apcb_ksp =
639df930be7Sderaadt (u_int64_t)proc0paddr + USPACE - sizeof(struct trapframe);
64074652a67Sniklas proc0.p_md.md_tf =
64174652a67Sniklas (struct trapframe *)proc0paddr->u_pcb.pcb_hw.apcb_ksp;
64250ce9ee0Sniklas
643aed035abSart /*
644aed035abSart * Initialize the primary CPU's idle PCB to proc0's. In a
645aed035abSart * MULTIPROCESSOR configuration, each CPU will later get
646aed035abSart * its own idle PCB when autoconfiguration runs.
647aed035abSart */
648aed035abSart ci->ci_idle_pcb = &proc0paddr->u_pcb;
649aed035abSart ci->ci_idle_pcb_paddr = (u_long)proc0.p_md.md_pcbpaddr;
650df930be7Sderaadt
651df930be7Sderaadt /*
652df930be7Sderaadt * Look at arguments passed to us and compute boothowto.
653df930be7Sderaadt */
654417eba8cSderaadt
655aed035abSart for (p = bootinfo.boot_flags; p && *p != '\0'; p++) {
656417eba8cSderaadt /*
657417eba8cSderaadt * Note that we'd really like to differentiate case here,
658417eba8cSderaadt * but the Alpha AXP Architecture Reference Manual
659417eba8cSderaadt * says that we shouldn't.
660417eba8cSderaadt */
661df930be7Sderaadt switch (*p) {
662371c77f5Smartin case 'a': /* Ignore */
663417eba8cSderaadt case 'A':
664df930be7Sderaadt break;
665df930be7Sderaadt
66612f8bbedSniklas case 'b': /* Enter DDB as soon as the console is initialised */
66712f8bbedSniklas case 'B':
66812f8bbedSniklas boothowto |= RB_KDB;
66912f8bbedSniklas break;
67012f8bbedSniklas
67150ce9ee0Sniklas case 'c': /* enter user kernel configuration */
67250ce9ee0Sniklas case 'C':
67350ce9ee0Sniklas boothowto |= RB_CONFIG;
67450ce9ee0Sniklas break;
67550ce9ee0Sniklas
67650ce9ee0Sniklas #ifdef DEBUG
67750ce9ee0Sniklas case 'd': /* crash dump immediately after autoconfig */
67850ce9ee0Sniklas case 'D':
67950ce9ee0Sniklas boothowto |= RB_DUMP;
68050ce9ee0Sniklas break;
68150ce9ee0Sniklas #endif
68250ce9ee0Sniklas
68350ce9ee0Sniklas case 'h': /* always halt, never reboot */
68450ce9ee0Sniklas case 'H':
68550ce9ee0Sniklas boothowto |= RB_HALT;
686df930be7Sderaadt break;
687df930be7Sderaadt
68850ce9ee0Sniklas
68950ce9ee0Sniklas case 'n': /* askname */
69050ce9ee0Sniklas case 'N':
69150ce9ee0Sniklas boothowto |= RB_ASKNAME;
69250ce9ee0Sniklas break;
693aed035abSart
694371c77f5Smartin case 's': /* single-user */
695aed035abSart case 'S':
696aed035abSart boothowto |= RB_SINGLE;
697aed035abSart break;
698aed035abSart
699aed035abSart case '-':
700aed035abSart /*
701aed035abSart * Just ignore this. It's not required, but it's
702aed035abSart * common for it to be passed regardless.
703aed035abSart */
704aed035abSart break;
705aed035abSart
706aed035abSart default:
707aed035abSart printf("Unrecognized boot flag '%c'.\n", *p);
708aed035abSart break;
709df930be7Sderaadt }
710df930be7Sderaadt }
711df930be7Sderaadt
712aed035abSart
713df930be7Sderaadt /*
714df930be7Sderaadt * Figure out the number of cpus in the box, from RPB fields.
715df930be7Sderaadt * Really. We mean it.
716df930be7Sderaadt */
71731326ec3Smiod for (ncpusfound = 0, i = 0; i < hwrpb->rpb_pcs_cnt; i++) {
718df930be7Sderaadt struct pcs *pcsp;
719df930be7Sderaadt
720aed035abSart pcsp = LOCATE_PCS(hwrpb, i);
721df930be7Sderaadt if ((pcsp->pcs_flags & PCS_PP) != 0)
72231326ec3Smiod ncpusfound++;
723df930be7Sderaadt }
724aed035abSart
725aed035abSart /*
726aed035abSart * Initialize debuggers, and break into them if appropriate.
727aed035abSart */
728aed035abSart #ifdef DDB
72921c23d01Smiod db_machine_init();
730aed035abSart ddb_init();
731aed035abSart
732aed035abSart if (boothowto & RB_KDB)
733e97088d6Smpi db_enter();
734aed035abSart #endif
735aed035abSart /*
736aed035abSart * Figure out our clock frequency, from RPB fields.
737aed035abSart */
738aed035abSart hz = hwrpb->rpb_intr_freq >> 12;
739aed035abSart if (!(60 <= hz && hz <= 10240)) {
740aed035abSart #ifdef DIAGNOSTIC
741e86d96d5Smiod printf("WARNING: unbelievable rpb_intr_freq: %lu (%d hz)\n",
742e86d96d5Smiod (unsigned long)hwrpb->rpb_intr_freq, hz);
743aed035abSart #endif
744dd3e8537Smiod hz = 1024;
745aed035abSart }
746ee48eda3Scheloha tick = 1000000 / hz;
747ee48eda3Scheloha tick_nsec = 1000000000 / hz;
748aed035abSart }
749aed035abSart
750417eba8cSderaadt void
consinit()751df930be7Sderaadt consinit()
752df930be7Sderaadt {
753aed035abSart /*
754aed035abSart * Everything related to console initialization is done
755aed035abSart * in alpha_init().
756aed035abSart */
757df930be7Sderaadt }
758df930be7Sderaadt
759417eba8cSderaadt void
cpu_startup()760df930be7Sderaadt cpu_startup()
761df930be7Sderaadt {
762aed035abSart vaddr_t minaddr, maxaddr;
76350ce9ee0Sniklas #if defined(DEBUG)
764df930be7Sderaadt extern int pmapdebug;
765df930be7Sderaadt int opmapdebug = pmapdebug;
766df930be7Sderaadt
767df930be7Sderaadt pmapdebug = 0;
768df930be7Sderaadt #endif
769df930be7Sderaadt
770df930be7Sderaadt /*
771df930be7Sderaadt * Good {morning,afternoon,evening,night}.
772df930be7Sderaadt */
77303c4c946Sjsg printf("%s", version);
774df930be7Sderaadt identifycpu();
775701cd583Smiod printf("real mem = %lu (%luMB)\n", ptoa((psize_t)totalphysmem),
776701cd583Smiod ptoa((psize_t)totalphysmem) / 1024 / 1024);
777701cd583Smiod printf("rsvd mem = %lu (%luMB)\n", ptoa((psize_t)resvmem),
778701cd583Smiod ptoa((psize_t)resvmem) / 1024 / 1024);
779aed035abSart if (unusedmem) {
780701cd583Smiod printf("WARNING: unused memory = %lu (%luMB)\n",
781701cd583Smiod ptoa((psize_t)unusedmem),
782701cd583Smiod ptoa((psize_t)unusedmem) / 1024 / 1024);
783aed035abSart }
784aed035abSart if (unknownmem) {
785701cd583Smiod printf("WARNING: %lu (%luMB) of memory with unknown purpose\n",
786701cd583Smiod ptoa((psize_t)unknownmem),
787701cd583Smiod ptoa((psize_t)unknownmem) / 1024 / 1024);
788aed035abSart }
789df930be7Sderaadt
790df930be7Sderaadt /*
791df930be7Sderaadt * Allocate a submap for exec arguments. This map effectively
792df930be7Sderaadt * limits the number of processes exec'ing at any time.
793df930be7Sderaadt */
7947c10a71dSdrahn minaddr = vm_map_min(kernel_map);
795aed035abSart exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
796aed035abSart 16 * NCARGS, VM_MAP_PAGEABLE, FALSE, NULL);
797df930be7Sderaadt
798df930be7Sderaadt /*
799df930be7Sderaadt * Allocate a submap for physio
800df930be7Sderaadt */
801aed035abSart phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
802aed035abSart VM_PHYS_SIZE, 0, FALSE, NULL);
803df930be7Sderaadt
80450ce9ee0Sniklas #if defined(DEBUG)
805df930be7Sderaadt pmapdebug = opmapdebug;
806df930be7Sderaadt #endif
807701cd583Smiod printf("avail mem = %lu (%luMB)\n", ptoa((psize_t)uvmexp.free),
808701cd583Smiod ptoa((psize_t)uvmexp.free) / 1024 / 1024);
809aed035abSart #if 0
810aed035abSart {
811aed035abSart extern u_long pmap_pages_stolen;
812aed035abSart
813aed035abSart printf("stolen memory for VM structures = %d\n", pmap_pages_stolen * PAGE_SIZE);
814aed035abSart }
815aed035abSart #endif
816df930be7Sderaadt
817df930be7Sderaadt /*
818df930be7Sderaadt * Set up buffers, so they can be used to read disk labels.
819df930be7Sderaadt */
820df930be7Sderaadt bufinit();
821df930be7Sderaadt
822df930be7Sderaadt /*
823df930be7Sderaadt * Configure the system.
824df930be7Sderaadt */
82541033391Sderaadt if (boothowto & RB_CONFIG) {
82641033391Sderaadt #ifdef BOOT_CONFIG
82741033391Sderaadt user_config();
82841033391Sderaadt #else
82941033391Sderaadt printf("kernel does not support -c; continuing..\n");
83041033391Sderaadt #endif
83141033391Sderaadt }
83250ce9ee0Sniklas
83350ce9ee0Sniklas /*
834aed035abSart * Set up the HWPCB so that it's safe to configure secondary
835aed035abSart * CPUs.
83650ce9ee0Sniklas */
837aed035abSart hwrpb_primary_init();
838aed035abSart }
839aed035abSart
840aed035abSart /*
841aed035abSart * Retrieve the platform name from the DSR.
842aed035abSart */
843aed035abSart const char *
alpha_dsr_sysname()844aed035abSart alpha_dsr_sysname()
845aed035abSart {
846aed035abSart struct dsrdb *dsr;
847aed035abSart const char *sysname;
848aed035abSart
849aed035abSart /*
850aed035abSart * DSR does not exist on early HWRPB versions.
851aed035abSart */
852aed035abSart if (hwrpb->rpb_version < HWRPB_DSRDB_MINVERS)
853aed035abSart return (NULL);
854aed035abSart
855aed035abSart dsr = (struct dsrdb *)(((caddr_t)hwrpb) + hwrpb->rpb_dsrdb_off);
856aed035abSart sysname = (const char *)((caddr_t)dsr + (dsr->dsr_sysname_off +
857aed035abSart sizeof(u_int64_t)));
858aed035abSart return (sysname);
859aed035abSart }
860aed035abSart
861aed035abSart /*
862aed035abSart * Lookup the system specified system variation in the provided table,
863aed035abSart * returning the model string on match.
864aed035abSart */
865aed035abSart const char *
alpha_variation_name(variation,avtp)866aed035abSart alpha_variation_name(variation, avtp)
867aed035abSart u_int64_t variation;
868aed035abSart const struct alpha_variation_table *avtp;
869aed035abSart {
870aed035abSart int i;
871aed035abSart
872aed035abSart for (i = 0; avtp[i].avt_model != NULL; i++)
873aed035abSart if (avtp[i].avt_variation == variation)
874aed035abSart return (avtp[i].avt_model);
875aed035abSart return (NULL);
876aed035abSart }
877aed035abSart
878aed035abSart /*
879aed035abSart * Generate a default platform name based for unknown system variations.
880aed035abSart */
881aed035abSart const char *
alpha_unknown_sysname()882aed035abSart alpha_unknown_sysname()
883aed035abSart {
884aed035abSart static char s[128]; /* safe size */
885aed035abSart
886d5eb2d9aSderaadt snprintf(s, sizeof s, "%s family, unknown model variation 0x%lx",
887e86d96d5Smiod platform.family, (unsigned long)hwrpb->rpb_variation & SV_ST_MASK);
888aed035abSart return ((const char *)s);
889df930be7Sderaadt }
890df930be7Sderaadt
89150ce9ee0Sniklas void
identifycpu()892df930be7Sderaadt identifycpu()
893df930be7Sderaadt {
894aed035abSart char *s;
895b3cee53eSmartin int slen;
896df930be7Sderaadt
897df930be7Sderaadt /*
898df930be7Sderaadt * print out CPU identification information.
899df930be7Sderaadt */
900aed035abSart printf("%s", cpu_model);
901aed035abSart for(s = cpu_model; *s; ++s)
902aed035abSart if(strncasecmp(s, "MHz", 3) == 0)
903aed035abSart goto skipMHz;
904e86d96d5Smiod printf(", %luMHz", (unsigned long)hwrpb->rpb_cc_freq / 1000000);
905aed035abSart skipMHz:
906b3cee53eSmartin /* fill in hw_serial if a serial number is known */
907b3cee53eSmartin slen = strlen(hwrpb->rpb_ssn) + 1;
908b3cee53eSmartin if (slen > 1) {
909b3cee53eSmartin hw_serial = malloc(slen, M_SYSCTL, M_NOWAIT);
910b3cee53eSmartin if (hw_serial)
911b3cee53eSmartin strlcpy(hw_serial, (char *)hwrpb->rpb_ssn, slen);
912b3cee53eSmartin }
913b3cee53eSmartin
914aed035abSart printf("\n");
915e86d96d5Smiod printf("%lu byte page size, %d processor%s.\n",
916e86d96d5Smiod (unsigned long)hwrpb->rpb_page_size, ncpusfound,
917e86d96d5Smiod ncpusfound == 1 ? "" : "s");
918df930be7Sderaadt #if 0
919b3cee53eSmartin /* this is not particularly useful! */
920df930be7Sderaadt printf("variation: 0x%lx, revision 0x%lx\n",
921df930be7Sderaadt hwrpb->rpb_variation, *(long *)hwrpb->rpb_revision);
922df930be7Sderaadt #endif
923df930be7Sderaadt }
924df930be7Sderaadt
925df930be7Sderaadt int waittime = -1;
926df930be7Sderaadt struct pcb dumppcb;
927df930be7Sderaadt
928ff261808Suebayasi __dead void
boot(int howto)929ff261808Suebayasi boot(int howto)
930df930be7Sderaadt {
931aed035abSart #if defined(MULTIPROCESSOR)
93221c23d01Smiod u_long wait_mask;
93321c23d01Smiod int i;
934aed035abSart #endif
935aed035abSart
9363c291078Stedu if ((howto & RB_RESET) != 0)
9373c291078Stedu goto doreset;
9383c291078Stedu
939df930be7Sderaadt if (cold) {
940c9ad5066Stom if ((howto & RB_USERREQ) == 0)
941df930be7Sderaadt howto |= RB_HALT;
942df930be7Sderaadt goto haltsys;
943df930be7Sderaadt }
944df930be7Sderaadt
94550ce9ee0Sniklas if ((boothowto & RB_HALT) != 0)
94650ce9ee0Sniklas howto |= RB_HALT;
94750ce9ee0Sniklas
948df930be7Sderaadt boothowto = howto;
949df930be7Sderaadt if ((howto & RB_NOSYNC) == 0 && waittime < 0) {
950df930be7Sderaadt waittime = 0;
9517efda1a1Sderaadt vfs_shutdown(curproc);
95215be954bSuebayasi
9532417125dSmiod if ((howto & RB_TIMEBAD) == 0) {
954df930be7Sderaadt resettodr();
9552417125dSmiod } else {
9562417125dSmiod printf("WARNING: not updating battery clock\n");
9572417125dSmiod }
958df930be7Sderaadt }
9597d9ca166Sderaadt if_downall();
960df930be7Sderaadt
961c98e8b29Sderaadt uvm_shutdown();
9629f43f03fSuebayasi splhigh();
96380ce5a38Smpi cold = 1;
964df930be7Sderaadt
96521c23d01Smiod #if defined(MULTIPROCESSOR)
96621c23d01Smiod /*
96721c23d01Smiod * Halt all other CPUs.
96821c23d01Smiod */
96921c23d01Smiod wait_mask = (1UL << hwrpb->rpb_primary_cpu_id);
97021c23d01Smiod alpha_broadcast_ipi(ALPHA_IPI_HALT);
97121c23d01Smiod
97221c23d01Smiod /* Ensure any CPUs paused by DDB resume execution so they can halt */
97321c23d01Smiod cpus_paused = 0;
97421c23d01Smiod
97521c23d01Smiod for (i = 0; i < 10000; i++) {
97621c23d01Smiod alpha_mb();
97721c23d01Smiod if (cpus_running == wait_mask)
97821c23d01Smiod break;
97921c23d01Smiod delay(1000);
98021c23d01Smiod }
98121c23d01Smiod alpha_mb();
98221c23d01Smiod if (cpus_running != wait_mask)
98321c23d01Smiod printf("WARNING: Unable to halt secondary CPUs (0x%lx)\n",
98421c23d01Smiod cpus_running);
98521c23d01Smiod #endif
98621c23d01Smiod
987b19c85f4Suebayasi if ((howto & RB_DUMP) != 0)
988df930be7Sderaadt dumpsys();
989df930be7Sderaadt
99034fbf6deSderaadt haltsys:
99196f419e1Skettenis config_suspend_all(DVACT_POWERDOWN);
992df930be7Sderaadt
993df930be7Sderaadt #ifdef BOOTKEY
994b33b2f20Suebayasi printf("hit any key to %s...\n",
995b33b2f20Suebayasi (howto & RB_HALT) != 0 ? "halt" : "reboot");
996aed035abSart cnpollc(1); /* for proper keyboard command handling */
997df930be7Sderaadt cngetc();
998aed035abSart cnpollc(0);
999df930be7Sderaadt printf("\n");
1000df930be7Sderaadt #endif
1001df930be7Sderaadt
1002aed035abSart /* Finally, powerdown/halt/reboot the system. */
1003b33b2f20Suebayasi if ((howto & RB_POWERDOWN) != 0 &&
1004aed035abSart platform.powerdown != NULL) {
1005aed035abSart (*platform.powerdown)();
1006aed035abSart printf("WARNING: powerdown failed!\n");
1007aed035abSart }
10083c291078Stedu doreset:
1009b33b2f20Suebayasi printf("%s\n\n",
1010b33b2f20Suebayasi (howto & RB_HALT) != 0 ? "halted." : "rebooting...");
1011b33b2f20Suebayasi prom_halt((howto & RB_HALT) != 0);
1012de5ed823Stom for (;;)
1013de5ed823Stom continue;
1014df930be7Sderaadt /* NOTREACHED */
1015df930be7Sderaadt }
1016df930be7Sderaadt
1017df930be7Sderaadt /*
1018df930be7Sderaadt * These variables are needed by /sbin/savecore
1019df930be7Sderaadt */
1020df930be7Sderaadt u_long dumpmag = 0x8fca0101; /* magic number */
1021df930be7Sderaadt int dumpsize = 0; /* pages */
1022df930be7Sderaadt long dumplo = 0; /* blocks */
1023df930be7Sderaadt
1024df930be7Sderaadt /*
102550ce9ee0Sniklas * cpu_dumpsize: calculate size of machine-dependent kernel core dump headers.
102650ce9ee0Sniklas */
102750ce9ee0Sniklas int
cpu_dumpsize()102850ce9ee0Sniklas cpu_dumpsize()
102950ce9ee0Sniklas {
103050ce9ee0Sniklas int size;
103150ce9ee0Sniklas
1032aed035abSart size = ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t)) +
1033aed035abSart ALIGN(mem_cluster_cnt * sizeof(phys_ram_seg_t));
103450ce9ee0Sniklas if (roundup(size, dbtob(1)) != dbtob(1))
103550ce9ee0Sniklas return -1;
103650ce9ee0Sniklas
103750ce9ee0Sniklas return (1);
103850ce9ee0Sniklas }
103950ce9ee0Sniklas
104050ce9ee0Sniklas /*
1041aed035abSart * cpu_dump_mempagecnt: calculate size of RAM (in pages) to be dumped.
1042aed035abSart */
1043aed035abSart u_long
cpu_dump_mempagecnt()1044aed035abSart cpu_dump_mempagecnt()
1045aed035abSart {
1046aed035abSart u_long i, n;
1047aed035abSart
1048aed035abSart n = 0;
1049aed035abSart for (i = 0; i < mem_cluster_cnt; i++)
1050aed035abSart n += atop(mem_clusters[i].size);
1051aed035abSart return (n);
1052aed035abSart }
1053aed035abSart
1054aed035abSart /*
105550ce9ee0Sniklas * cpu_dump: dump machine-dependent kernel core dump headers.
105650ce9ee0Sniklas */
105750ce9ee0Sniklas int
cpu_dump()105850ce9ee0Sniklas cpu_dump()
105950ce9ee0Sniklas {
10601abdbfdeSderaadt int (*dump)(dev_t, daddr_t, caddr_t, size_t);
1061aed035abSart char buf[dbtob(1)];
106250ce9ee0Sniklas kcore_seg_t *segp;
106350ce9ee0Sniklas cpu_kcore_hdr_t *cpuhdrp;
1064aed035abSart phys_ram_seg_t *memsegp;
1065aed035abSart int i;
106650ce9ee0Sniklas
106750ce9ee0Sniklas dump = bdevsw[major(dumpdev)].d_dump;
106850ce9ee0Sniklas
1069aed035abSart bzero(buf, sizeof buf);
107050ce9ee0Sniklas segp = (kcore_seg_t *)buf;
1071aed035abSart cpuhdrp = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*segp))];
1072aed035abSart memsegp = (phys_ram_seg_t *)&buf[ALIGN(sizeof(*segp)) +
1073aed035abSart ALIGN(sizeof(*cpuhdrp))];
107450ce9ee0Sniklas
107550ce9ee0Sniklas /*
107650ce9ee0Sniklas * Generate a segment header.
107750ce9ee0Sniklas */
107850ce9ee0Sniklas CORE_SETMAGIC(*segp, KCORE_MAGIC, MID_MACHINE, CORE_CPU);
107950ce9ee0Sniklas segp->c_size = dbtob(1) - ALIGN(sizeof(*segp));
108050ce9ee0Sniklas
108150ce9ee0Sniklas /*
1082aed035abSart * Add the machine-dependent header info.
108350ce9ee0Sniklas */
1084aed035abSart cpuhdrp->lev1map_pa = ALPHA_K0SEG_TO_PHYS((vaddr_t)kernel_lev1map);
108550ce9ee0Sniklas cpuhdrp->page_size = PAGE_SIZE;
1086aed035abSart cpuhdrp->nmemsegs = mem_cluster_cnt;
1087aed035abSart
1088aed035abSart /*
1089aed035abSart * Fill in the memory segment descriptors.
1090aed035abSart */
1091aed035abSart for (i = 0; i < mem_cluster_cnt; i++) {
1092aed035abSart memsegp[i].start = mem_clusters[i].start;
1093aed035abSart memsegp[i].size = mem_clusters[i].size & ~PAGE_MASK;
1094aed035abSart }
109550ce9ee0Sniklas
109650ce9ee0Sniklas return (dump(dumpdev, dumplo, (caddr_t)buf, dbtob(1)));
109750ce9ee0Sniklas }
109850ce9ee0Sniklas
109950ce9ee0Sniklas /*
1100aed035abSart * This is called by main to set dumplo and dumpsize.
1101194dd68bSbrad * Dumps always skip the first PAGE_SIZE of disk space
1102df930be7Sderaadt * in case there might be a disk label stored there.
1103df930be7Sderaadt * If there is extra space, put dump at the end to
1104df930be7Sderaadt * reduce the chance that swapping trashes it.
1105df930be7Sderaadt */
1106df930be7Sderaadt void
dumpconf(void)1107e17d3b39Sderaadt dumpconf(void)
1108df930be7Sderaadt {
110950ce9ee0Sniklas int nblks, dumpblks; /* size of dump area */
1110df930be7Sderaadt
1111e17d3b39Sderaadt if (dumpdev == NODEV ||
1112e17d3b39Sderaadt (nblks = (bdevsw[major(dumpdev)].d_psize)(dumpdev)) == 0)
1113e17d3b39Sderaadt return;
1114df930be7Sderaadt if (nblks <= ctod(1))
1115e17d3b39Sderaadt return;
111650ce9ee0Sniklas
111750ce9ee0Sniklas dumpblks = cpu_dumpsize();
111850ce9ee0Sniklas if (dumpblks < 0)
1119e17d3b39Sderaadt return;
1120aed035abSart dumpblks += ctod(cpu_dump_mempagecnt());
112150ce9ee0Sniklas
112250ce9ee0Sniklas /* If dump won't fit (incl. room for possible label), punt. */
112350ce9ee0Sniklas if (dumpblks > (nblks - ctod(1)))
1124e17d3b39Sderaadt return;
112550ce9ee0Sniklas
112650ce9ee0Sniklas /* Put dump at end of partition */
112750ce9ee0Sniklas dumplo = nblks - dumpblks;
112850ce9ee0Sniklas
112950ce9ee0Sniklas /* dumpsize is in page units, and doesn't include headers. */
1130aed035abSart dumpsize = cpu_dump_mempagecnt();
1131df930be7Sderaadt }
1132df930be7Sderaadt
1133df930be7Sderaadt /*
113450ce9ee0Sniklas * Dump the kernel's image to the swap partition.
1135df930be7Sderaadt */
1136194dd68bSbrad #define BYTES_PER_DUMP PAGE_SIZE
113750ce9ee0Sniklas
1138df930be7Sderaadt void
dumpsys()1139df930be7Sderaadt dumpsys()
1140df930be7Sderaadt {
1141aed035abSart u_long totalbytesleft, bytes, i, n, memcl;
1142aed035abSart u_long maddr;
1143aed035abSart int psize;
11441abdbfdeSderaadt daddr_t blkno;
11451abdbfdeSderaadt int (*dump)(dev_t, daddr_t, caddr_t, size_t);
114650ce9ee0Sniklas int error;
1147067cbd75Sderaadt extern int msgbufmapped;
1148df930be7Sderaadt
114950ce9ee0Sniklas /* Save registers. */
115050ce9ee0Sniklas savectx(&dumppcb);
115150ce9ee0Sniklas
115250ce9ee0Sniklas msgbufmapped = 0; /* don't record dump msgs in msgbuf */
1153df930be7Sderaadt if (dumpdev == NODEV)
1154df930be7Sderaadt return;
115550ce9ee0Sniklas
115650ce9ee0Sniklas /*
115750ce9ee0Sniklas * For dumps during autoconfiguration,
115850ce9ee0Sniklas * if dump device has already configured...
115950ce9ee0Sniklas */
1160df930be7Sderaadt if (dumpsize == 0)
116150ce9ee0Sniklas dumpconf();
116250ce9ee0Sniklas if (dumplo <= 0) {
1163aed035abSart printf("\ndump to dev %u,%u not possible\n", major(dumpdev),
1164aed035abSart minor(dumpdev));
1165df930be7Sderaadt return;
1166df930be7Sderaadt }
1167aed035abSart printf("\ndumping to dev %u,%u offset %ld\n", major(dumpdev),
1168aed035abSart minor(dumpdev), dumplo);
1169df930be7Sderaadt
117050ce9ee0Sniklas psize = (*bdevsw[major(dumpdev)].d_psize)(dumpdev);
1171df930be7Sderaadt printf("dump ");
117250ce9ee0Sniklas if (psize == -1) {
117350ce9ee0Sniklas printf("area unavailable\n");
117450ce9ee0Sniklas return;
117550ce9ee0Sniklas }
117650ce9ee0Sniklas
117750ce9ee0Sniklas /* XXX should purge all outstanding keystrokes. */
117850ce9ee0Sniklas
117950ce9ee0Sniklas if ((error = cpu_dump()) != 0)
118050ce9ee0Sniklas goto err;
118150ce9ee0Sniklas
1182aed035abSart totalbytesleft = ptoa(cpu_dump_mempagecnt());
118350ce9ee0Sniklas blkno = dumplo + cpu_dumpsize();
118450ce9ee0Sniklas dump = bdevsw[major(dumpdev)].d_dump;
118550ce9ee0Sniklas error = 0;
1186aed035abSart
1187aed035abSart for (memcl = 0; memcl < mem_cluster_cnt; memcl++) {
1188aed035abSart maddr = mem_clusters[memcl].start;
1189aed035abSart bytes = mem_clusters[memcl].size & ~PAGE_MASK;
1190aed035abSart
1191aed035abSart for (i = 0; i < bytes; i += n, totalbytesleft -= n) {
119250ce9ee0Sniklas
119350ce9ee0Sniklas /* Print out how many MBs we to go. */
1194aed035abSart if ((totalbytesleft % (1024*1024)) == 0)
1195aed035abSart printf("%ld ", totalbytesleft / (1024 * 1024));
119650ce9ee0Sniklas
119750ce9ee0Sniklas /* Limit size for next transfer. */
1198aed035abSart n = bytes - i;
119950ce9ee0Sniklas if (n > BYTES_PER_DUMP)
120050ce9ee0Sniklas n = BYTES_PER_DUMP;
120150ce9ee0Sniklas
120250ce9ee0Sniklas error = (*dump)(dumpdev, blkno,
120350ce9ee0Sniklas (caddr_t)ALPHA_PHYS_TO_K0SEG(maddr), n);
120450ce9ee0Sniklas if (error)
1205aed035abSart goto err;
120650ce9ee0Sniklas maddr += n;
120750ce9ee0Sniklas blkno += btodb(n); /* XXX? */
120850ce9ee0Sniklas
120950ce9ee0Sniklas /* XXX should look for keystrokes, to cancel. */
121050ce9ee0Sniklas }
1211aed035abSart }
121250ce9ee0Sniklas
121350ce9ee0Sniklas err:
121450ce9ee0Sniklas switch (error) {
1215a37778bcSderaadt #ifdef DEBUG
1216df930be7Sderaadt case ENXIO:
1217df930be7Sderaadt printf("device bad\n");
1218df930be7Sderaadt break;
1219df930be7Sderaadt
1220df930be7Sderaadt case EFAULT:
1221df930be7Sderaadt printf("device not ready\n");
1222df930be7Sderaadt break;
1223df930be7Sderaadt
1224df930be7Sderaadt case EINVAL:
1225df930be7Sderaadt printf("area improper\n");
1226df930be7Sderaadt break;
1227df930be7Sderaadt
1228df930be7Sderaadt case EIO:
1229df930be7Sderaadt printf("i/o error\n");
1230df930be7Sderaadt break;
1231df930be7Sderaadt
1232df930be7Sderaadt case EINTR:
1233df930be7Sderaadt printf("aborted from console\n");
1234df930be7Sderaadt break;
1235a37778bcSderaadt #endif /* DEBUG */
123650ce9ee0Sniklas case 0:
1237df930be7Sderaadt printf("succeeded\n");
1238df930be7Sderaadt break;
123950ce9ee0Sniklas
124050ce9ee0Sniklas default:
124150ce9ee0Sniklas printf("error %d\n", error);
124250ce9ee0Sniklas break;
1243df930be7Sderaadt }
1244df930be7Sderaadt printf("\n\n");
1245df930be7Sderaadt delay(1000);
1246df930be7Sderaadt }
1247df930be7Sderaadt
1248df930be7Sderaadt void
frametoreg(framep,regp)1249df930be7Sderaadt frametoreg(framep, regp)
1250df930be7Sderaadt struct trapframe *framep;
1251df930be7Sderaadt struct reg *regp;
1252df930be7Sderaadt {
1253df930be7Sderaadt
1254df930be7Sderaadt regp->r_regs[R_V0] = framep->tf_regs[FRAME_V0];
1255df930be7Sderaadt regp->r_regs[R_T0] = framep->tf_regs[FRAME_T0];
1256df930be7Sderaadt regp->r_regs[R_T1] = framep->tf_regs[FRAME_T1];
1257df930be7Sderaadt regp->r_regs[R_T2] = framep->tf_regs[FRAME_T2];
1258df930be7Sderaadt regp->r_regs[R_T3] = framep->tf_regs[FRAME_T3];
1259df930be7Sderaadt regp->r_regs[R_T4] = framep->tf_regs[FRAME_T4];
1260df930be7Sderaadt regp->r_regs[R_T5] = framep->tf_regs[FRAME_T5];
1261df930be7Sderaadt regp->r_regs[R_T6] = framep->tf_regs[FRAME_T6];
1262df930be7Sderaadt regp->r_regs[R_T7] = framep->tf_regs[FRAME_T7];
1263df930be7Sderaadt regp->r_regs[R_S0] = framep->tf_regs[FRAME_S0];
1264df930be7Sderaadt regp->r_regs[R_S1] = framep->tf_regs[FRAME_S1];
1265df930be7Sderaadt regp->r_regs[R_S2] = framep->tf_regs[FRAME_S2];
1266df930be7Sderaadt regp->r_regs[R_S3] = framep->tf_regs[FRAME_S3];
1267df930be7Sderaadt regp->r_regs[R_S4] = framep->tf_regs[FRAME_S4];
1268df930be7Sderaadt regp->r_regs[R_S5] = framep->tf_regs[FRAME_S5];
1269df930be7Sderaadt regp->r_regs[R_S6] = framep->tf_regs[FRAME_S6];
127050ce9ee0Sniklas regp->r_regs[R_A0] = framep->tf_regs[FRAME_A0];
127150ce9ee0Sniklas regp->r_regs[R_A1] = framep->tf_regs[FRAME_A1];
127250ce9ee0Sniklas regp->r_regs[R_A2] = framep->tf_regs[FRAME_A2];
1273df930be7Sderaadt regp->r_regs[R_A3] = framep->tf_regs[FRAME_A3];
1274df930be7Sderaadt regp->r_regs[R_A4] = framep->tf_regs[FRAME_A4];
1275df930be7Sderaadt regp->r_regs[R_A5] = framep->tf_regs[FRAME_A5];
1276df930be7Sderaadt regp->r_regs[R_T8] = framep->tf_regs[FRAME_T8];
1277df930be7Sderaadt regp->r_regs[R_T9] = framep->tf_regs[FRAME_T9];
1278df930be7Sderaadt regp->r_regs[R_T10] = framep->tf_regs[FRAME_T10];
1279df930be7Sderaadt regp->r_regs[R_T11] = framep->tf_regs[FRAME_T11];
1280df930be7Sderaadt regp->r_regs[R_RA] = framep->tf_regs[FRAME_RA];
1281df930be7Sderaadt regp->r_regs[R_T12] = framep->tf_regs[FRAME_T12];
1282df930be7Sderaadt regp->r_regs[R_AT] = framep->tf_regs[FRAME_AT];
128350ce9ee0Sniklas regp->r_regs[R_GP] = framep->tf_regs[FRAME_GP];
128450ce9ee0Sniklas /* regp->r_regs[R_SP] = framep->tf_regs[FRAME_SP]; XXX */
1285df930be7Sderaadt regp->r_regs[R_ZERO] = 0;
1286df930be7Sderaadt }
1287df930be7Sderaadt
1288df930be7Sderaadt void
regtoframe(regp,framep)1289df930be7Sderaadt regtoframe(regp, framep)
1290df930be7Sderaadt struct reg *regp;
1291df930be7Sderaadt struct trapframe *framep;
1292df930be7Sderaadt {
1293df930be7Sderaadt
1294df930be7Sderaadt framep->tf_regs[FRAME_V0] = regp->r_regs[R_V0];
1295df930be7Sderaadt framep->tf_regs[FRAME_T0] = regp->r_regs[R_T0];
1296df930be7Sderaadt framep->tf_regs[FRAME_T1] = regp->r_regs[R_T1];
1297df930be7Sderaadt framep->tf_regs[FRAME_T2] = regp->r_regs[R_T2];
1298df930be7Sderaadt framep->tf_regs[FRAME_T3] = regp->r_regs[R_T3];
1299df930be7Sderaadt framep->tf_regs[FRAME_T4] = regp->r_regs[R_T4];
1300df930be7Sderaadt framep->tf_regs[FRAME_T5] = regp->r_regs[R_T5];
1301df930be7Sderaadt framep->tf_regs[FRAME_T6] = regp->r_regs[R_T6];
1302df930be7Sderaadt framep->tf_regs[FRAME_T7] = regp->r_regs[R_T7];
1303df930be7Sderaadt framep->tf_regs[FRAME_S0] = regp->r_regs[R_S0];
1304df930be7Sderaadt framep->tf_regs[FRAME_S1] = regp->r_regs[R_S1];
1305df930be7Sderaadt framep->tf_regs[FRAME_S2] = regp->r_regs[R_S2];
1306df930be7Sderaadt framep->tf_regs[FRAME_S3] = regp->r_regs[R_S3];
1307df930be7Sderaadt framep->tf_regs[FRAME_S4] = regp->r_regs[R_S4];
1308df930be7Sderaadt framep->tf_regs[FRAME_S5] = regp->r_regs[R_S5];
1309df930be7Sderaadt framep->tf_regs[FRAME_S6] = regp->r_regs[R_S6];
131050ce9ee0Sniklas framep->tf_regs[FRAME_A0] = regp->r_regs[R_A0];
131150ce9ee0Sniklas framep->tf_regs[FRAME_A1] = regp->r_regs[R_A1];
131250ce9ee0Sniklas framep->tf_regs[FRAME_A2] = regp->r_regs[R_A2];
1313df930be7Sderaadt framep->tf_regs[FRAME_A3] = regp->r_regs[R_A3];
1314df930be7Sderaadt framep->tf_regs[FRAME_A4] = regp->r_regs[R_A4];
1315df930be7Sderaadt framep->tf_regs[FRAME_A5] = regp->r_regs[R_A5];
1316df930be7Sderaadt framep->tf_regs[FRAME_T8] = regp->r_regs[R_T8];
1317df930be7Sderaadt framep->tf_regs[FRAME_T9] = regp->r_regs[R_T9];
1318df930be7Sderaadt framep->tf_regs[FRAME_T10] = regp->r_regs[R_T10];
1319df930be7Sderaadt framep->tf_regs[FRAME_T11] = regp->r_regs[R_T11];
1320df930be7Sderaadt framep->tf_regs[FRAME_RA] = regp->r_regs[R_RA];
1321df930be7Sderaadt framep->tf_regs[FRAME_T12] = regp->r_regs[R_T12];
1322df930be7Sderaadt framep->tf_regs[FRAME_AT] = regp->r_regs[R_AT];
132350ce9ee0Sniklas framep->tf_regs[FRAME_GP] = regp->r_regs[R_GP];
132450ce9ee0Sniklas /* framep->tf_regs[FRAME_SP] = regp->r_regs[R_SP]; XXX */
1325df930be7Sderaadt /* ??? = regp->r_regs[R_ZERO]; */
1326df930be7Sderaadt }
1327df930be7Sderaadt
1328df930be7Sderaadt void
printregs(regp)1329df930be7Sderaadt printregs(regp)
1330df930be7Sderaadt struct reg *regp;
1331df930be7Sderaadt {
1332df930be7Sderaadt int i;
1333df930be7Sderaadt
1334df930be7Sderaadt for (i = 0; i < 32; i++)
1335df930be7Sderaadt printf("R%d:\t0x%016lx%s", i, regp->r_regs[i],
1336df930be7Sderaadt i & 1 ? "\n" : "\t");
1337df930be7Sderaadt }
1338df930be7Sderaadt
1339df930be7Sderaadt void
regdump(framep)1340df930be7Sderaadt regdump(framep)
1341df930be7Sderaadt struct trapframe *framep;
1342df930be7Sderaadt {
1343df930be7Sderaadt struct reg reg;
1344df930be7Sderaadt
1345df930be7Sderaadt frametoreg(framep, ®);
134650ce9ee0Sniklas reg.r_regs[R_SP] = alpha_pal_rdusp();
134750ce9ee0Sniklas
1348df930be7Sderaadt printf("REGISTERS:\n");
1349df930be7Sderaadt printregs(®);
1350df930be7Sderaadt }
1351df930be7Sderaadt
1352df930be7Sderaadt /*
1353df930be7Sderaadt * Send an interrupt to process.
1354df930be7Sderaadt */
13551e286331Smpi int
sendsig(sig_t catcher,int sig,sigset_t mask,const siginfo_t * ksip,int info,int onstack)1356ba203458Sclaudio sendsig(sig_t catcher, int sig, sigset_t mask, const siginfo_t *ksip,
1357ba203458Sclaudio int info, int onstack)
1358df930be7Sderaadt {
1359df930be7Sderaadt struct proc *p = curproc;
1360e99873aaSderaadt struct sigcontext ksc, *scp;
1361e7e08221Smiod struct fpreg *fpregs = (struct fpreg *)&ksc.sc_fpregs;
1362df930be7Sderaadt struct trapframe *frame;
13631eaa59e7Sguenther unsigned long oldsp;
13641eaa59e7Sguenther int fsize, rndfsize, kscsize;
13654cf51ffbSguenther siginfo_t *sip;
1366df930be7Sderaadt
13671eaa59e7Sguenther oldsp = alpha_pal_rdusp();
1368df930be7Sderaadt frame = p->p_md.md_tf;
1369df930be7Sderaadt fsize = sizeof ksc;
1370df930be7Sderaadt rndfsize = ((fsize + 15) / 16) * 16;
13712bf9c155Sderaadt kscsize = rndfsize;
1372ba203458Sclaudio
1373ba203458Sclaudio if (info) {
13744cf51ffbSguenther fsize += sizeof *ksip;
13752bf9c155Sderaadt rndfsize = ((fsize + 15) / 16) * 16;
13762bf9c155Sderaadt }
137774652a67Sniklas
1378df930be7Sderaadt /*
13796e870393Smiod * Allocate space for the signal handler context.
1380df930be7Sderaadt */
13811eaa59e7Sguenther if ((p->p_sigstk.ss_flags & SS_DISABLE) == 0 &&
1382ba203458Sclaudio !sigonstack(oldsp) && onstack)
1383003f5e42Sderaadt scp = (struct sigcontext *)
1384003f5e42Sderaadt (trunc_page((vaddr_t)p->p_sigstk.ss_sp + p->p_sigstk.ss_size)
1385003f5e42Sderaadt - rndfsize);
13861eaa59e7Sguenther else
13871eaa59e7Sguenther scp = (struct sigcontext *)(oldsp - rndfsize);
1388df930be7Sderaadt
1389df930be7Sderaadt /*
1390df930be7Sderaadt * Build the signal context to be used by sigreturn.
1391df930be7Sderaadt */
13921eaa59e7Sguenther bzero(&ksc, sizeof(ksc));
1393df930be7Sderaadt ksc.sc_mask = mask;
139450ce9ee0Sniklas ksc.sc_pc = frame->tf_regs[FRAME_PC];
139550ce9ee0Sniklas ksc.sc_ps = frame->tf_regs[FRAME_PS];
1396df930be7Sderaadt
1397df930be7Sderaadt /* copy the registers. */
1398df930be7Sderaadt frametoreg(frame, (struct reg *)ksc.sc_regs);
13991eaa59e7Sguenther ksc.sc_regs[R_SP] = oldsp;
1400df930be7Sderaadt
1401df930be7Sderaadt /* save the floating-point state, if necessary, then copy it. */
1402433075b6Spvalchev if (p->p_addr->u_pcb.pcb_fpcpu != NULL)
1403433075b6Spvalchev fpusave_proc(p, 1);
1404df930be7Sderaadt ksc.sc_ownedfp = p->p_md.md_flags & MDP_FPUSED;
1405e7e08221Smiod memcpy(/*ksc.sc_*/fpregs, &p->p_addr->u_pcb.pcb_fp,
1406df930be7Sderaadt sizeof(struct fpreg));
1407433075b6Spvalchev #ifndef NO_IEEE
1408433075b6Spvalchev ksc.sc_fp_control = alpha_read_fp_c(p);
1409433075b6Spvalchev #else
1410433075b6Spvalchev ksc.sc_fp_control = 0;
1411433075b6Spvalchev #endif
1412433075b6Spvalchev memset(ksc.sc_reserved, 0, sizeof ksc.sc_reserved); /* XXX */
1413433075b6Spvalchev memset(ksc.sc_xxx, 0, sizeof ksc.sc_xxx); /* XXX */
1414df930be7Sderaadt
1415ba203458Sclaudio if (info) {
14162bf9c155Sderaadt sip = (void *)scp + kscsize;
14174cf51ffbSguenther if (copyout(ksip, (caddr_t)sip, fsize - kscsize) != 0)
14181e286331Smpi return 1;
1419aa540fb8Sart } else
1420aa540fb8Sart sip = NULL;
14212bf9c155Sderaadt
14227730d1d9Sderaadt ksc.sc_cookie = (long)scp ^ p->p_p->ps_sigcookie;
14231e286331Smpi if (copyout((caddr_t)&ksc, (caddr_t)scp, kscsize) != 0)
14241e286331Smpi return 1;
1425df930be7Sderaadt
1426df930be7Sderaadt /*
1427df930be7Sderaadt * Set up the registers to return to sigcode.
1428df930be7Sderaadt */
14298f76f5adSguenther frame->tf_regs[FRAME_PC] = p->p_p->ps_sigcode;
143050ce9ee0Sniklas frame->tf_regs[FRAME_A0] = sig;
1431aa540fb8Sart frame->tf_regs[FRAME_A1] = (u_int64_t)sip;
143250ce9ee0Sniklas frame->tf_regs[FRAME_A2] = (u_int64_t)scp;
1433df930be7Sderaadt frame->tf_regs[FRAME_T12] = (u_int64_t)catcher; /* t12 is pv */
143450ce9ee0Sniklas alpha_pal_wrusp((unsigned long)scp);
14351e286331Smpi
14361e286331Smpi return 0;
1437df930be7Sderaadt }
1438df930be7Sderaadt
1439df930be7Sderaadt /*
1440df930be7Sderaadt * System call to cleanup state after a signal
1441df930be7Sderaadt * has been taken. Reset signal mask and
1442df930be7Sderaadt * stack state from context left by sendsig (above).
1443df930be7Sderaadt * Return to previous pc and psl as specified by
1444df930be7Sderaadt * context left by sendsig. Check carefully to
1445df930be7Sderaadt * make sure that the user has not modified the
1446125cd19fSderaadt * psl to gain improper privileges or to cause
1447df930be7Sderaadt * a machine fault.
1448df930be7Sderaadt */
1449df930be7Sderaadt int
sys_sigreturn(struct proc * p,void * v,register_t * retval)1450e99873aaSderaadt sys_sigreturn(struct proc *p, void *v, register_t *retval)
1451df930be7Sderaadt {
1452df930be7Sderaadt struct sys_sigreturn_args /* {
1453df930be7Sderaadt syscallarg(struct sigcontext *) sigcntxp;
1454df930be7Sderaadt } */ *uap = v;
1455e99873aaSderaadt struct sigcontext ksc, *scp = SCARG(uap, sigcntxp);
1456e7e08221Smiod struct fpreg *fpregs = (struct fpreg *)&ksc.sc_fpregs;
1457aa540fb8Sart int error;
1458df930be7Sderaadt
14597730d1d9Sderaadt if (PROC_PC(p) != p->p_p->ps_sigcoderet) {
14607730d1d9Sderaadt sigexit(p, SIGILL);
14617730d1d9Sderaadt return (EPERM);
14627730d1d9Sderaadt }
14637730d1d9Sderaadt
14647730d1d9Sderaadt if ((error = copyin(scp, &ksc, sizeof(ksc))) != 0)
1465aa540fb8Sart return (error);
1466df930be7Sderaadt
14677730d1d9Sderaadt if (ksc.sc_cookie != ((long)scp ^ p->p_p->ps_sigcookie)) {
14687730d1d9Sderaadt sigexit(p, SIGILL);
14697730d1d9Sderaadt return (EFAULT);
14707730d1d9Sderaadt }
14717730d1d9Sderaadt
14724a064f11Sderaadt /* Prevent reuse of the sigcontext cookie */
14734a064f11Sderaadt ksc.sc_cookie = 0;
14744a064f11Sderaadt (void)copyout(&ksc.sc_cookie, (caddr_t)scp +
1475e99873aaSderaadt offsetof(struct sigcontext, sc_cookie), sizeof (ksc.sc_cookie));
14764a064f11Sderaadt
1477df930be7Sderaadt /*
1478df930be7Sderaadt * Restore the user-supplied information
1479df930be7Sderaadt */
1480df930be7Sderaadt p->p_sigmask = ksc.sc_mask &~ sigcantmask;
1481df930be7Sderaadt
148250ce9ee0Sniklas p->p_md.md_tf->tf_regs[FRAME_PC] = ksc.sc_pc;
148350ce9ee0Sniklas p->p_md.md_tf->tf_regs[FRAME_PS] =
148450ce9ee0Sniklas (ksc.sc_ps | ALPHA_PSL_USERSET) & ~ALPHA_PSL_USERCLR;
1485df930be7Sderaadt
1486df930be7Sderaadt regtoframe((struct reg *)ksc.sc_regs, p->p_md.md_tf);
148750ce9ee0Sniklas alpha_pal_wrusp(ksc.sc_regs[R_SP]);
1488df930be7Sderaadt
1489df930be7Sderaadt /* XXX ksc.sc_ownedfp ? */
1490433075b6Spvalchev if (p->p_addr->u_pcb.pcb_fpcpu != NULL)
1491433075b6Spvalchev fpusave_proc(p, 0);
1492e7e08221Smiod memcpy(&p->p_addr->u_pcb.pcb_fp, /*ksc.sc_*/fpregs,
1493df930be7Sderaadt sizeof(struct fpreg));
1494433075b6Spvalchev #ifndef NO_IEEE
1495433075b6Spvalchev p->p_addr->u_pcb.pcb_fp.fpr_cr = ksc.sc_fpcr;
1496433075b6Spvalchev p->p_md.md_flags = ksc.sc_fp_control & MDP_FP_C;
1497433075b6Spvalchev #endif
1498df930be7Sderaadt return (EJUSTRETURN);
1499df930be7Sderaadt }
1500df930be7Sderaadt
1501df930be7Sderaadt /*
1502df930be7Sderaadt * machine dependent system variables.
1503df930be7Sderaadt */
150450ce9ee0Sniklas int
cpu_sysctl(int * name,u_int namelen,void * oldp,size_t * oldlenp,void * newp,size_t newlen,struct proc * p)150569e3e61aSfcambus cpu_sysctl(int *name, u_int namelen, void *oldp, size_t *oldlenp, void *newp,
150669e3e61aSfcambus size_t newlen, struct proc *p)
1507df930be7Sderaadt {
1508df930be7Sderaadt dev_t consdev;
1509a072164aSmiod #if NIOASIC > 0
1510a072164aSmiod int oldval, ret;
1511a072164aSmiod #endif
1512df930be7Sderaadt
151345e5a1a0Sart if (name[0] != CPU_CHIPSET && namelen != 1)
1514df930be7Sderaadt return (ENOTDIR); /* overloaded */
1515df930be7Sderaadt
1516df930be7Sderaadt switch (name[0]) {
1517df930be7Sderaadt case CPU_CONSDEV:
1518df930be7Sderaadt if (cn_tab != NULL)
1519df930be7Sderaadt consdev = cn_tab->cn_dev;
1520df930be7Sderaadt else
1521df930be7Sderaadt consdev = NODEV;
1522df930be7Sderaadt return (sysctl_rdstruct(oldp, oldlenp, newp, &consdev,
1523df930be7Sderaadt sizeof consdev));
1524417eba8cSderaadt
1525a37778bcSderaadt #ifndef SMALL_KERNEL
15263a630e3fSniklas case CPU_BOOTED_KERNEL:
1527aed035abSart return (sysctl_rdstring(oldp, oldlenp, newp,
1528aed035abSart bootinfo.booted_kernel));
15293a630e3fSniklas
153045e5a1a0Sart case CPU_CHIPSET:
153145e5a1a0Sart return (alpha_sysctl_chipset(name + 1, namelen - 1, oldp,
153245e5a1a0Sart oldlenp));
1533a37778bcSderaadt #endif /* SMALL_KERNEL */
1534433075b6Spvalchev
1535433075b6Spvalchev #ifndef NO_IEEE
1536433075b6Spvalchev case CPU_FP_SYNC_COMPLETE:
1537433075b6Spvalchev return (sysctl_int(oldp, oldlenp, newp, newlen,
1538433075b6Spvalchev &alpha_fp_sync_complete));
1539433075b6Spvalchev #endif
154027626149Smatthieu case CPU_ALLOWAPERTURE:
154127626149Smatthieu #ifdef APERTURE
154227626149Smatthieu if (securelevel > 0)
15431546ceefSderaadt return (sysctl_int_lower(oldp, oldlenp, newp, newlen,
15441546ceefSderaadt &allowaperture));
154527626149Smatthieu else
154627626149Smatthieu return (sysctl_int(oldp, oldlenp, newp, newlen,
154727626149Smatthieu &allowaperture));
154827626149Smatthieu #else
154927626149Smatthieu return (sysctl_rdint(oldp, oldlenp, newp, 0));
155027626149Smatthieu #endif
1551a072164aSmiod #if NIOASIC > 0
1552a072164aSmiod case CPU_LED_BLINK:
1553a072164aSmiod oldval = alpha_led_blink;
1554a072164aSmiod ret = sysctl_int(oldp, oldlenp, newp, newlen, &alpha_led_blink);
1555a072164aSmiod if (oldval != alpha_led_blink)
1556a072164aSmiod ioasic_led_blink(NULL);
1557a072164aSmiod return (ret);
1558a072164aSmiod #endif
1559df930be7Sderaadt default:
1560df930be7Sderaadt return (EOPNOTSUPP);
1561df930be7Sderaadt }
1562df930be7Sderaadt /* NOTREACHED */
1563df930be7Sderaadt }
1564df930be7Sderaadt
1565df930be7Sderaadt /*
1566df930be7Sderaadt * Set registers on exec.
1567df930be7Sderaadt */
1568df930be7Sderaadt void
setregs(struct proc * p,struct exec_package * pack,u_long stack,struct ps_strings * arginfo)15691b4a394fSguenther setregs(struct proc *p, struct exec_package *pack, u_long stack,
15701b4a394fSguenther struct ps_strings *arginfo)
1571df930be7Sderaadt {
1572df930be7Sderaadt struct trapframe *tfp = p->p_md.md_tf;
15733a630e3fSniklas #ifdef DEBUG
15743a630e3fSniklas int i;
15753a630e3fSniklas #endif
1576df930be7Sderaadt
1577df930be7Sderaadt #ifdef DEBUG
157850ce9ee0Sniklas /*
157950ce9ee0Sniklas * Crash and dump, if the user requested it.
158050ce9ee0Sniklas */
158150ce9ee0Sniklas if (boothowto & RB_DUMP)
158250ce9ee0Sniklas panic("crash requested by boot flags");
158350ce9ee0Sniklas #endif
158450ce9ee0Sniklas
158550ce9ee0Sniklas #ifdef DEBUG
158650ce9ee0Sniklas for (i = 0; i < FRAME_SIZE; i++)
1587df930be7Sderaadt tfp->tf_regs[i] = 0xbabefacedeadbeef;
15886334622bSguenther tfp->tf_regs[FRAME_A1] = 0;
1589df930be7Sderaadt #else
15901b4a394fSguenther memset(tfp->tf_regs, 0, FRAME_SIZE * sizeof tfp->tf_regs[0]);
1591df930be7Sderaadt #endif
15921b4a394fSguenther memset(&p->p_addr->u_pcb.pcb_fp, 0, sizeof p->p_addr->u_pcb.pcb_fp);
159350ce9ee0Sniklas alpha_pal_wrusp(stack);
159450ce9ee0Sniklas tfp->tf_regs[FRAME_PS] = ALPHA_PSL_USERSET;
159550ce9ee0Sniklas tfp->tf_regs[FRAME_PC] = pack->ep_entry & ~3;
1596df930be7Sderaadt
159750ce9ee0Sniklas tfp->tf_regs[FRAME_A0] = stack;
159850ce9ee0Sniklas /* a1 and a2 already zeroed */
159950ce9ee0Sniklas tfp->tf_regs[FRAME_T12] = tfp->tf_regs[FRAME_PC]; /* a.k.a. PV */
160050ce9ee0Sniklas
160150ce9ee0Sniklas p->p_md.md_flags &= ~MDP_FPUSED;
1602433075b6Spvalchev #ifndef NO_IEEE
1603433075b6Spvalchev if (__predict_true((p->p_md.md_flags & IEEE_INHERIT) == 0)) {
1604433075b6Spvalchev p->p_md.md_flags &= ~MDP_FP_C;
1605433075b6Spvalchev p->p_addr->u_pcb.pcb_fp.fpr_cr = FPCR_DYN(FP_RN);
1606433075b6Spvalchev }
1607433075b6Spvalchev #endif
1608433075b6Spvalchev if (p->p_addr->u_pcb.pcb_fpcpu != NULL)
1609433075b6Spvalchev fpusave_proc(p, 0);
1610433075b6Spvalchev }
1611df930be7Sderaadt
1612433075b6Spvalchev /*
1613433075b6Spvalchev * Release the FPU.
1614433075b6Spvalchev */
1615433075b6Spvalchev void
fpusave_cpu(struct cpu_info * ci,int save)1616433075b6Spvalchev fpusave_cpu(struct cpu_info *ci, int save)
1617433075b6Spvalchev {
1618433075b6Spvalchev struct proc *p;
161921c23d01Smiod #if defined(MULTIPROCESSOR)
162021c23d01Smiod int s;
162121c23d01Smiod #endif
1622433075b6Spvalchev
1623433075b6Spvalchev KDASSERT(ci == curcpu());
1624433075b6Spvalchev
1625433075b6Spvalchev #if defined(MULTIPROCESSOR)
162621c23d01Smiod /* Need to block IPIs */
16272d7472daSmiod s = splipi();
1628433075b6Spvalchev atomic_setbits_ulong(&ci->ci_flags, CPUF_FPUSAVE);
1629433075b6Spvalchev #endif
1630433075b6Spvalchev
1631433075b6Spvalchev p = ci->ci_fpcurproc;
1632433075b6Spvalchev if (p == NULL)
1633433075b6Spvalchev goto out;
1634433075b6Spvalchev
1635433075b6Spvalchev if (save) {
1636433075b6Spvalchev alpha_pal_wrfen(1);
1637433075b6Spvalchev savefpstate(&p->p_addr->u_pcb.pcb_fp);
1638433075b6Spvalchev }
1639433075b6Spvalchev
1640433075b6Spvalchev alpha_pal_wrfen(0);
1641433075b6Spvalchev
1642433075b6Spvalchev p->p_addr->u_pcb.pcb_fpcpu = NULL;
1643433075b6Spvalchev ci->ci_fpcurproc = NULL;
1644433075b6Spvalchev
1645433075b6Spvalchev out:
1646433075b6Spvalchev #if defined(MULTIPROCESSOR)
1647433075b6Spvalchev atomic_clearbits_ulong(&ci->ci_flags, CPUF_FPUSAVE);
16484fa86cc0Smiod alpha_pal_swpipl(s);
1649433075b6Spvalchev #endif
1650433075b6Spvalchev return;
1651433075b6Spvalchev }
1652433075b6Spvalchev
1653433075b6Spvalchev /*
1654433075b6Spvalchev * Synchronize FP state for this process.
1655433075b6Spvalchev */
1656433075b6Spvalchev void
fpusave_proc(struct proc * p,int save)1657433075b6Spvalchev fpusave_proc(struct proc *p, int save)
1658433075b6Spvalchev {
1659433075b6Spvalchev struct cpu_info *ci = curcpu();
1660433075b6Spvalchev struct cpu_info *oci;
1661433075b6Spvalchev #if defined(MULTIPROCESSOR)
1662433075b6Spvalchev u_long ipi = save ? ALPHA_IPI_SYNCH_FPU : ALPHA_IPI_DISCARD_FPU;
16632d7472daSmiod int s;
1664433075b6Spvalchev #endif
1665433075b6Spvalchev
1666433075b6Spvalchev KDASSERT(p->p_addr != NULL);
1667433075b6Spvalchev
16682d7472daSmiod for (;;) {
166921c23d01Smiod #if defined(MULTIPROCESSOR)
167021c23d01Smiod /* Need to block IPIs */
16712d7472daSmiod s = splipi();
167221c23d01Smiod #endif
167321c23d01Smiod
1674433075b6Spvalchev oci = p->p_addr->u_pcb.pcb_fpcpu;
1675433075b6Spvalchev if (oci == NULL) {
167621c23d01Smiod #if defined(MULTIPROCESSOR)
16774fa86cc0Smiod alpha_pal_swpipl(s);
167821c23d01Smiod #endif
1679433075b6Spvalchev return;
1680433075b6Spvalchev }
1681433075b6Spvalchev
1682433075b6Spvalchev #if defined(MULTIPROCESSOR)
1683433075b6Spvalchev if (oci == ci) {
1684433075b6Spvalchev KASSERT(ci->ci_fpcurproc == p);
16854fa86cc0Smiod alpha_pal_swpipl(s);
1686433075b6Spvalchev fpusave_cpu(ci, save);
1687433075b6Spvalchev return;
1688433075b6Spvalchev }
1689433075b6Spvalchev
16902d7472daSmiod /*
16912d7472daSmiod * The other cpu may still be running and could have
16922d7472daSmiod * discarded the fpu context on its own.
16932d7472daSmiod */
169489043825Smiod if (oci->ci_fpcurproc != p) {
169589043825Smiod alpha_pal_swpipl(s);
16962d7472daSmiod continue;
169789043825Smiod }
16982d7472daSmiod
1699433075b6Spvalchev alpha_send_ipi(oci->ci_cpuid, ipi);
17004fa86cc0Smiod alpha_pal_swpipl(s);
1701433075b6Spvalchev
17022d7472daSmiod while (p->p_addr->u_pcb.pcb_fpcpu != NULL)
1703275e6a2fSmpi CPU_BUSY_CYCLE();
1704433075b6Spvalchev #else
1705433075b6Spvalchev KASSERT(ci->ci_fpcurproc == p);
1706433075b6Spvalchev fpusave_cpu(ci, save);
1707433075b6Spvalchev #endif /* MULTIPROCESSOR */
17082d7472daSmiod
17092d7472daSmiod break;
17102d7472daSmiod }
1711df930be7Sderaadt }
1712df930be7Sderaadt
1713df930be7Sderaadt int
spl0()1714df930be7Sderaadt spl0()
1715df930be7Sderaadt {
1716df930be7Sderaadt
1717aed035abSart if (ssir) {
1718aed035abSart (void) alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT);
17192a2685f2Sart softintr_dispatch();
1720aed035abSart }
1721df930be7Sderaadt
172250ce9ee0Sniklas return (alpha_pal_swpipl(ALPHA_PSL_IPL_0));
1723df930be7Sderaadt }
1724df930be7Sderaadt
1725df930be7Sderaadt /*
1726417eba8cSderaadt * Wait "n" microseconds.
1727417eba8cSderaadt */
172850ce9ee0Sniklas void
delay(n)1729417eba8cSderaadt delay(n)
173050ce9ee0Sniklas unsigned long n;
1731417eba8cSderaadt {
17325d097e9eSmiod unsigned long pcc0, pcc1, curcycle, cycles, usec;
17335d097e9eSmiod
17345d097e9eSmiod if (n == 0)
17355d097e9eSmiod return;
17365d097e9eSmiod
17375d097e9eSmiod pcc0 = alpha_rpcc() & 0xffffffffUL;
17385d097e9eSmiod cycles = 0;
17395d097e9eSmiod usec = 0;
17405d097e9eSmiod
17415d097e9eSmiod while (usec <= n) {
17425d097e9eSmiod /*
17435d097e9eSmiod * Get the next CPU cycle count - assumes that we can not
17445d097e9eSmiod * have had more than one 32 bit overflow.
17455d097e9eSmiod */
17465d097e9eSmiod pcc1 = alpha_rpcc() & 0xffffffffUL;
17475d097e9eSmiod if (pcc1 < pcc0)
17485d097e9eSmiod curcycle = (pcc1 + 0x100000000UL) - pcc0;
17495d097e9eSmiod else
17505d097e9eSmiod curcycle = pcc1 - pcc0;
1751417eba8cSderaadt
1752aed035abSart /*
17535d097e9eSmiod * We now have the number of processor cycles since we
17545d097e9eSmiod * last checked. Add the current cycle count to the
17555d097e9eSmiod * running total. If it's over cycles_per_usec, increment
17565d097e9eSmiod * the usec counter.
1757aed035abSart */
17585d097e9eSmiod cycles += curcycle;
175921c23d01Smiod while (cycles >= cycles_per_usec) {
17605d097e9eSmiod usec++;
17615d097e9eSmiod cycles -= cycles_per_usec;
17625d097e9eSmiod }
17635d097e9eSmiod pcc0 = pcc1;
17645d097e9eSmiod }
1765417eba8cSderaadt }
1766417eba8cSderaadt
1767aed035abSart int
alpha_pa_access(pa)1768aed035abSart alpha_pa_access(pa)
1769aed035abSart u_long pa;
1770aed035abSart {
1771aed035abSart int i;
1772aed035abSart
1773aed035abSart for (i = 0; i < mem_cluster_cnt; i++) {
1774aed035abSart if (pa < mem_clusters[i].start)
1775aed035abSart continue;
1776aed035abSart if ((pa - mem_clusters[i].start) >=
1777aed035abSart (mem_clusters[i].size & ~PAGE_MASK))
1778aed035abSart continue;
1779aed035abSart return (mem_clusters[i].size & PAGE_MASK); /* prot */
1780aed035abSart }
1781aed035abSart
1782aed035abSart /*
1783aed035abSart * Address is not a memory address. If we're secure, disallow
1784aed035abSart * access. Otherwise, grant read/write.
1785aed035abSart */
1786aed035abSart if (securelevel > 0)
17871e8cdc2eSderaadt return (PROT_NONE);
1788aed035abSart else
17891e8cdc2eSderaadt return (PROT_READ | PROT_WRITE);
1790aed035abSart }
1791aed035abSart
1792e464495eSniklas /* XXX XXX BEGIN XXX XXX */
1793aed035abSart paddr_t alpha_XXX_dmamap_or; /* XXX */
1794e464495eSniklas /* XXX */
1795aed035abSart paddr_t /* XXX */
alpha_XXX_dmamap(v)1796e464495eSniklas alpha_XXX_dmamap(v) /* XXX */
1797aed035abSart vaddr_t v; /* XXX */
1798e464495eSniklas { /* XXX */
1799e464495eSniklas /* XXX */
1800e464495eSniklas return (vtophys(v) | alpha_XXX_dmamap_or); /* XXX */
1801e464495eSniklas } /* XXX */
1802e464495eSniklas /* XXX XXX END XXX XXX */
1803