xref: /openbsd/sys/arch/alpha/pci/cia_pci.c (revision 133306f0)
1 /* $OpenBSD: cia_pci.c,v 1.7 2000/11/08 20:59:25 ericj Exp $ */
2 /* $NetBSD: cia_pci.c,v 1.25 2000/06/29 08:58:46 mrg Exp $ */
3 
4 /*
5  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6  * All rights reserved.
7  *
8  * Author: Chris G. Demetriou
9  *
10  * Permission to use, copy, modify and distribute this software and
11  * its documentation is hereby granted, provided that both the copyright
12  * notice and this permission notice appear in all copies of the
13  * software, derivative works or modified versions, and any portions
14  * thereof, and that both notices appear in supporting documentation.
15  *
16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19  *
20  * Carnegie Mellon requests users of this software to return to
21  *
22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23  *  School of Computer Science
24  *  Carnegie Mellon University
25  *  Pittsburgh PA 15213-3890
26  *
27  * any improvements or extensions that they make and grant Carnegie the
28  * rights to redistribute these changes.
29  */
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/device.h>
35 
36 #include <vm/vm.h>
37 #include <uvm/uvm_extern.h>
38 
39 #include <dev/pci/pcireg.h>
40 #include <dev/pci/pcivar.h>
41 #include <alpha/pci/ciareg.h>
42 #include <alpha/pci/ciavar.h>
43 
44 void		cia_attach_hook __P((struct device *, struct device *,
45 		    struct pcibus_attach_args *));
46 int		cia_bus_maxdevs __P((void *, int));
47 pcitag_t	cia_make_tag __P((void *, int, int, int));
48 void		cia_decompose_tag __P((void *, pcitag_t, int *, int *,
49 		    int *));
50 pcireg_t	cia_conf_read __P((void *, pcitag_t, int));
51 void		cia_conf_write __P((void *, pcitag_t, int, pcireg_t));
52 
53 void
54 cia_pci_init(pc, v)
55 	pci_chipset_tag_t pc;
56 	void *v;
57 {
58 
59 	pc->pc_conf_v = v;
60 	pc->pc_attach_hook = cia_attach_hook;
61 	pc->pc_bus_maxdevs = cia_bus_maxdevs;
62 	pc->pc_make_tag = cia_make_tag;
63 	pc->pc_decompose_tag = cia_decompose_tag;
64 	pc->pc_conf_read = cia_conf_read;
65 	pc->pc_conf_write = cia_conf_write;
66 }
67 
68 void
69 cia_attach_hook(parent, self, pba)
70 	struct device *parent, *self;
71 	struct pcibus_attach_args *pba;
72 {
73 }
74 
75 int
76 cia_bus_maxdevs(cpv, busno)
77 	void *cpv;
78 	int busno;
79 {
80 
81 	return 32;
82 }
83 
84 pcitag_t
85 cia_make_tag(cpv, b, d, f)
86 	void *cpv;
87 	int b, d, f;
88 {
89 
90 	return (b << 16) | (d << 11) | (f << 8);
91 }
92 
93 void
94 cia_decompose_tag(cpv, tag, bp, dp, fp)
95 	void *cpv;
96 	pcitag_t tag;
97 	int *bp, *dp, *fp;
98 {
99 
100 	if (bp != NULL)
101 		*bp = (tag >> 16) & 0xff;
102 	if (dp != NULL)
103 		*dp = (tag >> 11) & 0x1f;
104 	if (fp != NULL)
105 		*fp = (tag >> 8) & 0x7;
106 }
107 
108 pcireg_t
109 cia_conf_read(cpv, tag, offset)
110 	void *cpv;
111 	pcitag_t tag;
112 	int offset;
113 {
114 	struct cia_config *ccp = cpv;
115 	pcireg_t *datap, data;
116 	int s, secondary, ba;
117 	u_int32_t old_cfg, errbits;
118 
119 #ifdef __GNUC__
120 	s = 0;					/* XXX gcc -Wuninitialized */
121 	old_cfg = 0;				/* XXX gcc -Wuninitialized */
122 #endif
123 
124 	/*
125 	 * Some (apparently-common) revisions of EB164 and AlphaStation
126 	 * firmware do the Wrong thing with PCI master and target aborts,
127 	 * which are caused by accesing the configuration space of devices
128 	 * that don't exist (for example).
129 	 *
130 	 * To work around this, we clear the CIA error register's PCI
131 	 * master and target abort bits before touching PCI configuration
132 	 * space and check it afterwards.  If it indicates a master or target
133 	 * abort, the device wasn't there so we return 0xffffffff.
134 	 */
135 	REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
136 	alpha_mb();
137 	alpha_pal_draina();
138 
139 	/* secondary if bus # != 0 */
140 	alpha_pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
141 	if (secondary) {
142 		s = splhigh();
143 		old_cfg = REGVAL(CIA_CSR_CFG);
144 		alpha_mb();
145 		REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
146 		alpha_mb();
147 	}
148 
149 	/*
150 	 * We just inline the BWX support, since this is the only
151 	 * difference between BWX and swiz for config space.
152 	 */
153 	if (ccp->cc_flags & CCF_PCI_USE_BWX) {
154 		if (secondary) {
155 			datap =
156 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
157 				tag | (offset & ~0x03));
158 		} else {
159 			datap =
160 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
161 				tag | (offset & ~0x03));
162 		}
163 	} else {
164 		datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
165 		    tag << 5UL |				/* XXX */
166 		    (offset & ~0x03) << 5 |			/* XXX */
167 		    0 << 5 |					/* XXX */
168 		    0x3 << 3);					/* XXX */
169 	}
170 	data = (pcireg_t)-1;
171 	alpha_mb();
172 	if (!(ba = badaddr(datap, sizeof *datap)))
173 		data = *datap;
174 	alpha_mb();
175 	alpha_mb();
176 
177 	if (secondary) {
178 		alpha_mb();
179 		REGVAL(CIA_CSR_CFG) = old_cfg;
180 		alpha_mb();
181 		splx(s);
182 	}
183 
184 	alpha_pal_draina();
185 	alpha_mb();
186 	errbits = REGVAL(CIA_CSR_CIA_ERR);
187 	if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) {
188 		ba = 1;
189 		data = 0xffffffff;
190 	}
191 
192 	if (errbits) {
193 		REGVAL(CIA_CSR_CIA_ERR) = errbits;
194 		alpha_mb();
195 		alpha_pal_draina();
196 	}
197 
198 #if 0
199 	printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
200 	    data, datap, ba ? " (badaddr)" : "");
201 #endif
202 
203 	return data;
204 }
205 
206 void
207 cia_conf_write(cpv, tag, offset, data)
208 	void *cpv;
209 	pcitag_t tag;
210 	int offset;
211 	pcireg_t data;
212 {
213 	struct cia_config *ccp = cpv;
214 	pcireg_t *datap;
215 	int s, secondary;
216 	u_int32_t old_cfg;
217 
218 #ifdef __GNUC__
219 	s = 0;					/* XXX gcc -Wuninitialized */
220 	old_cfg = 0;				/* XXX gcc -Wuninitialized */
221 #endif
222 
223 	/* secondary if bus # != 0 */
224 	alpha_pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
225 	if (secondary) {
226 		s = splhigh();
227 		old_cfg = REGVAL(CIA_CSR_CFG);
228 		alpha_mb();
229 		REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
230 		alpha_mb();
231 	}
232 
233 	/*
234 	 * We just inline the BWX support, since this is the only
235 	 * difference between BWX and swiz for config space.
236 	 */
237 	if (ccp->cc_flags & CCF_PCI_USE_BWX) {
238 		if (secondary) {
239 			datap =
240 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
241 				tag | (offset & ~0x03));
242 		} else {
243 			datap =
244 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
245 				tag | (offset & ~0x03));
246 		}
247 	} else {
248 		datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
249 		    tag << 5UL |				/* XXX */
250 		    (offset & ~0x03) << 5 |			/* XXX */
251 		    0 << 5 |					/* XXX */
252 		    0x3 << 3);					/* XXX */
253 	}
254 	alpha_mb();
255 	*datap = data;
256 	alpha_mb();
257 	alpha_mb();
258 
259 	if (secondary) {
260 		alpha_mb();
261 		REGVAL(CIA_CSR_CFG) = old_cfg;
262 		alpha_mb();
263 		splx(s);
264 	}
265 
266 #if 0
267 	printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
268 	    reg, data, datap);
269 #endif
270 }
271