xref: /openbsd/sys/arch/alpha/pci/cia_pci.c (revision 898184e3)
1 /* $OpenBSD: cia_pci.c,v 1.12 2010/12/04 17:06:31 miod Exp $ */
2 /* $NetBSD: cia_pci.c,v 1.25 2000/06/29 08:58:46 mrg Exp $ */
3 
4 /*
5  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6  * All rights reserved.
7  *
8  * Author: Chris G. Demetriou
9  *
10  * Permission to use, copy, modify and distribute this software and
11  * its documentation is hereby granted, provided that both the copyright
12  * notice and this permission notice appear in all copies of the
13  * software, derivative works or modified versions, and any portions
14  * thereof, and that both notices appear in supporting documentation.
15  *
16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19  *
20  * Carnegie Mellon requests users of this software to return to
21  *
22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23  *  School of Computer Science
24  *  Carnegie Mellon University
25  *  Pittsburgh PA 15213-3890
26  *
27  * any improvements or extensions that they make and grant Carnegie the
28  * rights to redistribute these changes.
29  */
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/device.h>
35 
36 #include <uvm/uvm_extern.h>
37 
38 #include <dev/pci/pcireg.h>
39 #include <dev/pci/pcivar.h>
40 #include <alpha/pci/ciareg.h>
41 #include <alpha/pci/ciavar.h>
42 
43 void		cia_attach_hook(struct device *, struct device *,
44 		    struct pcibus_attach_args *);
45 int		cia_bus_maxdevs(void *, int);
46 pcitag_t	cia_make_tag(void *, int, int, int);
47 void		cia_decompose_tag(void *, pcitag_t, int *, int *,
48 		    int *);
49 int		cia_conf_size(void *, pcitag_t);
50 pcireg_t	cia_conf_read(void *, pcitag_t, int);
51 void		cia_conf_write(void *, pcitag_t, int, pcireg_t);
52 
53 void
54 cia_pci_init(pc, v)
55 	pci_chipset_tag_t pc;
56 	void *v;
57 {
58 
59 	pc->pc_conf_v = v;
60 	pc->pc_attach_hook = cia_attach_hook;
61 	pc->pc_bus_maxdevs = cia_bus_maxdevs;
62 	pc->pc_make_tag = cia_make_tag;
63 	pc->pc_decompose_tag = cia_decompose_tag;
64 	pc->pc_conf_size = cia_conf_size;
65 	pc->pc_conf_read = cia_conf_read;
66 	pc->pc_conf_write = cia_conf_write;
67 }
68 
69 void
70 cia_attach_hook(parent, self, pba)
71 	struct device *parent, *self;
72 	struct pcibus_attach_args *pba;
73 {
74 }
75 
76 int
77 cia_bus_maxdevs(cpv, busno)
78 	void *cpv;
79 	int busno;
80 {
81 
82 	return 32;
83 }
84 
85 pcitag_t
86 cia_make_tag(cpv, b, d, f)
87 	void *cpv;
88 	int b, d, f;
89 {
90 
91 	return (b << 16) | (d << 11) | (f << 8);
92 }
93 
94 void
95 cia_decompose_tag(cpv, tag, bp, dp, fp)
96 	void *cpv;
97 	pcitag_t tag;
98 	int *bp, *dp, *fp;
99 {
100 
101 	if (bp != NULL)
102 		*bp = (tag >> 16) & 0xff;
103 	if (dp != NULL)
104 		*dp = (tag >> 11) & 0x1f;
105 	if (fp != NULL)
106 		*fp = (tag >> 8) & 0x7;
107 }
108 
109 int
110 cia_conf_size(void *cpv, pcitag_t tag)
111 {
112 	return PCI_CONFIG_SPACE_SIZE;
113 }
114 
115 pcireg_t
116 cia_conf_read(cpv, tag, offset)
117 	void *cpv;
118 	pcitag_t tag;
119 	int offset;
120 {
121 	struct cia_config *ccp = cpv;
122 	pcireg_t *datap, data;
123 	int s, secondary, ba;
124 	u_int32_t old_cfg, errbits;
125 
126 #ifdef __GNUC__
127 	s = 0;					/* XXX gcc -Wuninitialized */
128 	old_cfg = 0;				/* XXX gcc -Wuninitialized */
129 #endif
130 
131 	/*
132 	 * Some (apparently common) revisions of EB164 and AlphaStation
133 	 * firmware do the Wrong thing with PCI master and target aborts,
134 	 * which are caused by accessing the configuration space of devices
135 	 * that don't exist (for example).
136 	 *
137 	 * To work around this, we clear the CIA error register's PCI
138 	 * master and target abort bits before touching PCI configuration
139 	 * space and check it afterwards.  If it indicates a master or target
140 	 * abort, the device wasn't there so we return 0xffffffff.
141 	 */
142 	REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
143 	alpha_mb();
144 	alpha_pal_draina();
145 
146 	/* secondary if bus # != 0 */
147 	pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
148 	if (secondary) {
149 		s = splhigh();
150 		old_cfg = REGVAL(CIA_CSR_CFG);
151 		alpha_mb();
152 		REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
153 		alpha_mb();
154 	}
155 
156 	/*
157 	 * We just inline the BWX support, since this is the only
158 	 * difference between BWX and swiz for config space.
159 	 */
160 	if (ccp->cc_flags & CCF_PCI_USE_BWX) {
161 		if (secondary) {
162 			datap =
163 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
164 				tag | (offset & ~0x03));
165 		} else {
166 			datap =
167 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
168 				tag | (offset & ~0x03));
169 		}
170 	} else {
171 		datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
172 		    tag << 5UL |				/* XXX */
173 		    (offset & ~0x03) << 5 |			/* XXX */
174 		    0 << 5 |					/* XXX */
175 		    0x3 << 3);					/* XXX */
176 	}
177 	data = (pcireg_t)-1;
178 	alpha_mb();
179 	if (!(ba = badaddr(datap, sizeof *datap)))
180 		data = *datap;
181 	alpha_mb();
182 	alpha_mb();
183 
184 	if (secondary) {
185 		alpha_mb();
186 		REGVAL(CIA_CSR_CFG) = old_cfg;
187 		alpha_mb();
188 		splx(s);
189 	}
190 
191 	alpha_pal_draina();
192 	alpha_mb();
193 	errbits = REGVAL(CIA_CSR_CIA_ERR);
194 	if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) {
195 		ba = 1;
196 		data = 0xffffffff;
197 	}
198 
199 	if (errbits) {
200 		REGVAL(CIA_CSR_CIA_ERR) = errbits;
201 		alpha_mb();
202 		alpha_pal_draina();
203 	}
204 
205 #if 0
206 	printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
207 	    data, datap, ba ? " (badaddr)" : "");
208 #endif
209 
210 	return data;
211 }
212 
213 void
214 cia_conf_write(cpv, tag, offset, data)
215 	void *cpv;
216 	pcitag_t tag;
217 	int offset;
218 	pcireg_t data;
219 {
220 	struct cia_config *ccp = cpv;
221 	pcireg_t *datap;
222 	int s, secondary;
223 	u_int32_t old_cfg;
224 
225 #ifdef __GNUC__
226 	s = 0;					/* XXX gcc -Wuninitialized */
227 	old_cfg = 0;				/* XXX gcc -Wuninitialized */
228 #endif
229 
230 	/* secondary if bus # != 0 */
231 	pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
232 	if (secondary) {
233 		s = splhigh();
234 		old_cfg = REGVAL(CIA_CSR_CFG);
235 		alpha_mb();
236 		REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
237 		alpha_mb();
238 	}
239 
240 	/*
241 	 * We just inline the BWX support, since this is the only
242 	 * difference between BWX and swiz for config space.
243 	 */
244 	if (ccp->cc_flags & CCF_PCI_USE_BWX) {
245 		if (secondary) {
246 			datap =
247 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
248 				tag | (offset & ~0x03));
249 		} else {
250 			datap =
251 			    (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
252 				tag | (offset & ~0x03));
253 		}
254 	} else {
255 		datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
256 		    tag << 5UL |				/* XXX */
257 		    (offset & ~0x03) << 5 |			/* XXX */
258 		    0 << 5 |					/* XXX */
259 		    0x3 << 3);					/* XXX */
260 	}
261 	alpha_mb();
262 	*datap = data;
263 	alpha_mb();
264 	alpha_mb();
265 
266 	if (secondary) {
267 		alpha_mb();
268 		REGVAL(CIA_CSR_CFG) = old_cfg;
269 		alpha_mb();
270 		splx(s);
271 	}
272 
273 #if 0
274 	printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
275 	    reg, data, datap);
276 #endif
277 }
278