1 /* $OpenBSD: irongatereg.h,v 1.3 2008/06/26 05:42:08 ray Exp $ */ 2 /* $NetBSD: irongatereg.h,v 1.2 2000/06/26 02:42:10 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Register definitions for the AMD 751 (``Irongate'') core logic 35 * chipset. 36 */ 37 38 /* 39 * Address map. 40 * 41 * This from the Tsunami address map: 42 * EV6 has a new superpage which can pass through 44 address bits. (Umm, a 43 * superduperpage?) But, the firmware doesn't turn it on, so we use the old 44 * one and let the HW sign extend va/pa<40> to get us the pa<43> that makes 45 * the needed I/O space access. This is just as well; it means we don't have 46 * to worry about which GENERIC code might get called on other CPU models. 47 * 48 * E.g., we want this: 0x0801##fc00##0000 49 * We use this: 0x0101##fc00##0000 50 * ...mix in the old SP: 0xffff##fc00##0000##0000 51 * ...after PA sign ext: 0xffff##ff01##fc00##0000 52 * (PA<42:41> ignored) 53 * 54 * PCI memory and RAM: 0000.0000.0000 55 * IACK 0001.f800.0000 56 * PCI I/O: 0001.fc00.0000 57 * AMD 751 (also in PCI config space): 0001.fe00.0000 58 */ 59 60 /* 61 * This hack allows us to map the I/O address space without using 62 * the KSEG sign extension hack. 63 */ 64 #define IRONGATE_PHYSADDR(x) \ 65 (((x) & ~0x0100##0000##0000) | 0x0800##0000##0000) 66 67 #define IRONGATE_KSEG_BIAS 0x0100##0000##0000UL 68 69 #define IRONGATE_MEM_BASE (IRONGATE_KSEG_BIAS | 0x0000##0000##0000UL) 70 #define IRONGATE_IACK_BASE (IRONGATE_KSEG_BIAS | 0x0001##f800##0000UL) 71 #define IRONGATE_IO_BASE (IRONGATE_KSEG_BIAS | 0x0001##fc00##0000UL) 72 #define IRONGATE_SELF_BASE (IRONGATE_KSEG_BIAS | 0x0001##fe00##0000UL) 73 74 /* 75 * PCI configuration register access using done by using 76 * ``configuration mode 1'' (in PC lingo), using the I/O 77 * space addresses described in the PCI Local Bus Specification 78 * Revision 2.2. 79 */ 80 #define IRONGATE_CONFADDR 0x0cf8 81 #define IRONGATE_CONFDATA 0x0cfc 82 83 #define CONFADDR_ENABLE 0x80000000U 84 85 /* 86 * The AMD 751 PCI-Host bridge is located at device 0, and the 87 * AGP controller (seen as a PCI-PCI bridge) is at device 1. 88 */ 89 #define IRONGATE_PCIHOST_DEV 0 90 #define IRONGATE_PCIAGP_DEV 1 91