xref: /openbsd/sys/arch/alpha/pci/pci_2100_a50.c (revision fd84ef7e)
1 /*	$OpenBSD: pci_2100_a50.c,v 1.17 2001/12/14 00:44:59 nate Exp $	*/
2 /*	$NetBSD: pci_2100_a50.c,v 1.12 1996/11/13 21:13:29 cgd Exp $	*/
3 
4 /*
5  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6  * All rights reserved.
7  *
8  * Author: Chris G. Demetriou
9  *
10  * Permission to use, copy, modify and distribute this software and
11  * its documentation is hereby granted, provided that both the copyright
12  * notice and this permission notice appear in all copies of the
13  * software, derivative works or modified versions, and any portions
14  * thereof, and that both notices appear in supporting documentation.
15  *
16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19  *
20  * Carnegie Mellon requests users of this software to return to
21  *
22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23  *  School of Computer Science
24  *  Carnegie Mellon University
25  *  Pittsburgh PA 15213-3890
26  *
27  * any improvements or extensions that they make and grant Carnegie the
28  * rights to redistribute these changes.
29  */
30 
31 #include <sys/types.h>
32 #include <sys/param.h>
33 #include <sys/time.h>
34 #include <sys/systm.h>
35 #include <sys/errno.h>
36 #include <sys/device.h>
37 #include <uvm/uvm_extern.h>
38 
39 #include <machine/autoconf.h>
40 #include <machine/bus.h>
41 #include <machine/intr.h>
42 
43 #include <dev/isa/isavar.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 
47 #include <alpha/pci/apecsvar.h>
48 
49 #include <alpha/pci/pci_2100_a50.h>
50 #include <alpha/pci/siovar.h>
51 #include <alpha/pci/sioreg.h>
52 
53 #include "sio.h"
54 
55 int	dec_2100_a50_intr_map __P((void *, pcitag_t, int, int,
56 	    pci_intr_handle_t *));
57 const char *dec_2100_a50_intr_string __P((void *, pci_intr_handle_t));
58 int	 dec_2100_a50_intr_line __P((void *, pci_intr_handle_t));
59 void    *dec_2100_a50_intr_establish __P((void *, pci_intr_handle_t,
60 	    int, int (*func)(void *), void *, char *));
61 void    dec_2100_a50_intr_disestablish __P((void *, void *));
62 
63 #define	APECS_SIO_DEVICE	7	/* XXX */
64 
65 void
66 pci_2100_a50_pickintr(acp)
67 	struct apecs_config *acp;
68 {
69 	bus_space_tag_t iot = &acp->ac_iot;
70 	pci_chipset_tag_t pc = &acp->ac_pc;
71 	pcireg_t sioclass;
72 	int sioII;
73 
74 	/* XXX MAGIC NUMBER */
75 	sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG);
76         sioII = (sioclass & 0xff) >= 3;
77 
78 	if (!sioII)
79 		printf("WARNING: SIO NOT SIO II... NO BETS...\n");
80 
81 	pc->pc_intr_v = acp;
82 	pc->pc_intr_map = dec_2100_a50_intr_map;
83 	pc->pc_intr_string = dec_2100_a50_intr_string;
84 	pc->pc_intr_line = dec_2100_a50_intr_line;
85 	pc->pc_intr_establish = dec_2100_a50_intr_establish;
86 	pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish;
87 
88 	/* Not supported on 2100 A50. */
89 	pc->pc_pciide_compat_intr_establish = NULL;
90 	pc->pc_pciide_compat_intr_disestablish = NULL;
91 
92 #if NSIO
93         sio_intr_setup(pc, iot);
94 	set_iointr(&sio_iointr);
95 #else
96 	panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)");
97 #endif
98 }
99 
100 int
101 dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp)
102 	void *acv;
103         pcitag_t bustag;
104 	int buspin, line;
105 	pci_intr_handle_t *ihp;
106 {
107 	struct apecs_config *acp = acv;
108 	pci_chipset_tag_t pc = &acp->ac_pc;
109 	int device, pirq;
110 	pcireg_t pirqreg;
111 	u_int8_t pirqline;
112 
113         if (buspin == 0) {
114                 /* No IRQ used. */
115                 return 1;
116         }
117         if (buspin > 4) {
118                 printf("dec_2100_a50_intr_map: bad interrupt pin %d\n",
119 		    buspin);
120                 return 1;
121         }
122 
123 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
124 
125 	switch (device) {
126 	case 6:					/* NCR SCSI */
127 		pirq = 3;
128 		break;
129 
130 	case 11:				/* slot 1 */
131 	case 14:				/* slot 3 */
132 		switch (buspin) {
133 		case PCI_INTERRUPT_PIN_A:
134 		case PCI_INTERRUPT_PIN_D:
135 			pirq = 0;
136 			break;
137 		case PCI_INTERRUPT_PIN_B:
138 			pirq = 2;
139 			break;
140 		case PCI_INTERRUPT_PIN_C:
141 			pirq = 1;
142 			break;
143 #ifdef DIAGNOSTIC
144 		default:			/* XXX gcc -Wuninitialized */
145 			panic("dec_2100_a50_intr_map bogus PCI pin %d",
146 			    buspin);
147 #endif
148 		};
149 		break;
150 
151 	case 12:				/* slot 2 */
152 		switch (buspin) {
153 		case PCI_INTERRUPT_PIN_A:
154 		case PCI_INTERRUPT_PIN_D:
155 			pirq = 1;
156 			break;
157 		case PCI_INTERRUPT_PIN_B:
158 			pirq = 0;
159 			break;
160 		case PCI_INTERRUPT_PIN_C:
161 			pirq = 2;
162 			break;
163 #ifdef DIAGNOSTIC
164 		default:			/* XXX gcc -Wuninitialized */
165 			panic("dec_2100_a50_intr_map bogus PCI pin %d",
166 			    buspin);
167 #endif
168 		};
169 		break;
170 
171 	case 13:				/* slot 3 */
172 		switch (buspin) {
173 		case PCI_INTERRUPT_PIN_A:
174 		case PCI_INTERRUPT_PIN_D:
175 			pirq = 2;
176 			break;
177 		case PCI_INTERRUPT_PIN_B:
178 			pirq = 1;
179 			break;
180 		case PCI_INTERRUPT_PIN_C:
181 			pirq = 0;
182 			break;
183 #ifdef DIAGNOSTIC
184 		default:			/* XXX gcc -Wuninitialized */
185 			panic("dec_2100_a50_intr_map bogus PCI pin %d",
186 			    buspin);
187 #endif
188 		};
189 		break;
190 
191 	default:
192                 printf("dec_2100_a50_intr_map: weird device number %d\n",
193 		    device);
194                 return 1;
195 	}
196 
197 	pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0),
198 	    SIO_PCIREG_PIRQ_RTCTRL);
199 #if 0
200 	printf("pci_2100_a50_map_int: device %d pin %c: pirq %d, reg = %x\n",
201 		device, '@' + buspin, pirq, pirqreg);
202 #endif
203 	pirqline = (pirqreg >> (pirq * 8)) & 0xff;
204 	if ((pirqline & 0x80) != 0)
205 		return 1;
206 	pirqline &= 0xf;
207 
208 #if 0
209 	printf("pci_2100_a50_map_int: device %d pin %c: mapped to line %d\n",
210 	    device, '@' + buspin, pirqline);
211 #endif
212 
213 	*ihp = pirqline;
214 	return (0);
215 }
216 
217 const char *
218 dec_2100_a50_intr_string(acv, ih)
219 	void *acv;
220 	pci_intr_handle_t ih;
221 {
222 	return sio_intr_string(NULL /*XXX*/, ih);
223 }
224 
225 int
226 dec_2100_a50_intr_line(acv, ih)
227 	void *acv;
228 	pci_intr_handle_t ih;
229 {
230 	return sio_intr_line(NULL /*XXX*/, ih);
231 }
232 
233 void *
234 dec_2100_a50_intr_establish(acv, ih, level, func, arg, name)
235 	void *acv, *arg;
236 	pci_intr_handle_t ih;
237 	int level;
238 	int (*func) __P((void *));
239 	char *name;
240 {
241 	return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func,
242 	    arg, name);
243 }
244 
245 void
246 dec_2100_a50_intr_disestablish(acv, cookie)
247 	void *acv, *cookie;
248 {
249 	sio_intr_disestablish(NULL /*XXX*/, cookie);
250 }
251