1*f8ac741cSmiod /*	$OpenBSD: pci_swiz_bus_mem_chipdep.c,v 1.8 2009/12/25 20:52:34 miod Exp $	*/
2ceb909c3Sart /*	$NetBSD: pcs_bus_mem_common.c,v 1.15 1996/12/02 22:19:36 cgd Exp $	*/
3ceb909c3Sart 
4ceb909c3Sart /*
5ceb909c3Sart  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6ceb909c3Sart  * All rights reserved.
7ceb909c3Sart  *
8ceb909c3Sart  * Author: Chris G. Demetriou
9ceb909c3Sart  *
10ceb909c3Sart  * Permission to use, copy, modify and distribute this software and
11ceb909c3Sart  * its documentation is hereby granted, provided that both the copyright
12ceb909c3Sart  * notice and this permission notice appear in all copies of the
13ceb909c3Sart  * software, derivative works or modified versions, and any portions
14ceb909c3Sart  * thereof, and that both notices appear in supporting documentation.
15ceb909c3Sart  *
16ceb909c3Sart  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17ceb909c3Sart  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18ceb909c3Sart  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19ceb909c3Sart  *
20ceb909c3Sart  * Carnegie Mellon requests users of this software to return to
21ceb909c3Sart  *
22ceb909c3Sart  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23ceb909c3Sart  *  School of Computer Science
24ceb909c3Sart  *  Carnegie Mellon University
25ceb909c3Sart  *  Pittsburgh PA 15213-3890
26ceb909c3Sart  *
27ceb909c3Sart  * any improvements or extensions that they make and grant Carnegie the
28ceb909c3Sart  * rights to redistribute these changes.
29ceb909c3Sart  */
30ceb909c3Sart 
31ceb909c3Sart /*
32ceb909c3Sart  * Common PCI Chipset "bus I/O" functions, for chipsets which have to
33ceb909c3Sart  * deal with only a single PCI interface chip in a machine.
34ceb909c3Sart  *
35ceb909c3Sart  * uses:
36ceb909c3Sart  *	CHIP		name of the 'chip' it's being compiled for.
37ceb909c3Sart  *	CHIP_D_MEM_BASE	Dense Mem space base to use.
38ceb909c3Sart  *	CHIP_S_MEM_BASE	Sparse Mem space base to use.
39ceb909c3Sart  */
40ceb909c3Sart 
41ceb909c3Sart #include <sys/extent.h>
42ceb909c3Sart 
43ceb909c3Sart #define	__C(A,B)	__CONCAT(A,B)
44ceb909c3Sart #define	__S(S)		__STRING(S)
45ceb909c3Sart 
462f4de8e4Srobert #ifndef	CHIP_EXTENT_DNAME
472f4de8e4Srobert #define	CHIP_EXTENT_DNAME(v)	__S(__C(CHIP,_bus_dmem))
482f4de8e4Srobert #endif
492f4de8e4Srobert #ifndef CHIP_EXTENT_SNAME
502f4de8e4Srobert #define CHIP_EXTENT_SNAME(v)	__S(__C(CHIP,_bus_smem))
512f4de8e4Srobert #endif
522f4de8e4Srobert 
532f4de8e4Srobert #ifndef	CHIP_EXTENT_DSTORAGE
542f4de8e4Srobert #define CHIP_EXTENT_DSTORAGE(v)	__C(CHIP,_dmem_ex_storage)
552f4de8e4Srobert static long
562f4de8e4Srobert     __C(CHIP,_dmem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
572f4de8e4Srobert #endif
582f4de8e4Srobert #ifndef CHIP_EXTENT_SSTORAGE
592f4de8e4Srobert #define CHIP_EXTENT_SSTORAGE(v)	__C(CHIP,_smem_ex_storage)
602f4de8e4Srobert static long
612f4de8e4Srobert     __C(CHIP,_smem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
622f4de8e4Srobert 
632f4de8e4Srobert #endif
642f4de8e4Srobert 
65ceb909c3Sart /* mapping/unmapping */
66c4071fd1Smillert int		__C(CHIP,_mem_map)(void *, bus_addr_t, bus_size_t, int,
67c4071fd1Smillert 		    bus_space_handle_t *);
68c4071fd1Smillert void		__C(CHIP,_mem_unmap)(void *, bus_space_handle_t,
69c4071fd1Smillert 		    bus_size_t);
70c4071fd1Smillert int		__C(CHIP,_mem_subregion)(void *, bus_space_handle_t,
71c4071fd1Smillert 		    bus_size_t, bus_size_t, bus_space_handle_t *);
72ceb909c3Sart 
73ceb909c3Sart /* allocation/deallocation */
74c4071fd1Smillert int		__C(CHIP,_mem_alloc)(void *, bus_addr_t, bus_addr_t,
75ceb909c3Sart 		    bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *,
76c4071fd1Smillert                     bus_space_handle_t *);
77c4071fd1Smillert void		__C(CHIP,_mem_free)(void *, bus_space_handle_t,
78c4071fd1Smillert 		    bus_size_t);
79ceb909c3Sart 
80*f8ac741cSmiod /* get kernel virtual address */
81*f8ac741cSmiod void *		__C(CHIP,_mem_vaddr)(void *, bus_space_handle_t);
82*f8ac741cSmiod 
83ceb909c3Sart /* barrier */
84c4071fd1Smillert inline void	__C(CHIP,_mem_barrier)(void *, bus_space_handle_t,
85c4071fd1Smillert 		    bus_size_t, bus_size_t, int);
86ceb909c3Sart 
87ceb909c3Sart /* read (single) */
88c4071fd1Smillert inline u_int8_t	__C(CHIP,_mem_read_1)(void *, bus_space_handle_t,
89c4071fd1Smillert 		    bus_size_t);
90c4071fd1Smillert inline u_int16_t __C(CHIP,_mem_read_2)(void *, bus_space_handle_t,
91c4071fd1Smillert 		    bus_size_t);
92c4071fd1Smillert inline u_int32_t __C(CHIP,_mem_read_4)(void *, bus_space_handle_t,
93c4071fd1Smillert 		    bus_size_t);
94c4071fd1Smillert inline u_int64_t __C(CHIP,_mem_read_8)(void *, bus_space_handle_t,
95c4071fd1Smillert 		    bus_size_t);
96ceb909c3Sart 
97ceb909c3Sart /* read multiple */
98c4071fd1Smillert void		__C(CHIP,_mem_read_multi_1)(void *, bus_space_handle_t,
99c4071fd1Smillert 		    bus_size_t, u_int8_t *, bus_size_t);
100c4071fd1Smillert void		__C(CHIP,_mem_read_multi_2)(void *, bus_space_handle_t,
101c4071fd1Smillert 		    bus_size_t, u_int16_t *, bus_size_t);
102c4071fd1Smillert void		__C(CHIP,_mem_read_multi_4)(void *, bus_space_handle_t,
103c4071fd1Smillert 		    bus_size_t, u_int32_t *, bus_size_t);
104c4071fd1Smillert void		__C(CHIP,_mem_read_multi_8)(void *, bus_space_handle_t,
105c4071fd1Smillert 		    bus_size_t, u_int64_t *, bus_size_t);
106ceb909c3Sart 
107ceb909c3Sart /* read region */
108c4071fd1Smillert void		__C(CHIP,_mem_read_region_1)(void *, bus_space_handle_t,
109c4071fd1Smillert 		    bus_size_t, u_int8_t *, bus_size_t);
110c4071fd1Smillert void		__C(CHIP,_mem_read_region_2)(void *, bus_space_handle_t,
111c4071fd1Smillert 		    bus_size_t, u_int16_t *, bus_size_t);
112c4071fd1Smillert void		__C(CHIP,_mem_read_region_4)(void *, bus_space_handle_t,
113c4071fd1Smillert 		    bus_size_t, u_int32_t *, bus_size_t);
114c4071fd1Smillert void		__C(CHIP,_mem_read_region_8)(void *, bus_space_handle_t,
115c4071fd1Smillert 		    bus_size_t, u_int64_t *, bus_size_t);
116ceb909c3Sart 
117ceb909c3Sart /* write (single) */
118c4071fd1Smillert inline void	__C(CHIP,_mem_write_1)(void *, bus_space_handle_t,
119c4071fd1Smillert 		    bus_size_t, u_int8_t);
120c4071fd1Smillert inline void	__C(CHIP,_mem_write_2)(void *, bus_space_handle_t,
121c4071fd1Smillert 		    bus_size_t, u_int16_t);
122c4071fd1Smillert inline void	__C(CHIP,_mem_write_4)(void *, bus_space_handle_t,
123c4071fd1Smillert 		    bus_size_t, u_int32_t);
124c4071fd1Smillert inline void	__C(CHIP,_mem_write_8)(void *, bus_space_handle_t,
125c4071fd1Smillert 		    bus_size_t, u_int64_t);
126ceb909c3Sart 
127ceb909c3Sart /* write multiple */
128c4071fd1Smillert void		__C(CHIP,_mem_write_multi_1)(void *, bus_space_handle_t,
129c4071fd1Smillert 		    bus_size_t, const u_int8_t *, bus_size_t);
130c4071fd1Smillert void		__C(CHIP,_mem_write_multi_2)(void *, bus_space_handle_t,
131c4071fd1Smillert 		    bus_size_t, const u_int16_t *, bus_size_t);
132c4071fd1Smillert void		__C(CHIP,_mem_write_multi_4)(void *, bus_space_handle_t,
133c4071fd1Smillert 		    bus_size_t, const u_int32_t *, bus_size_t);
134c4071fd1Smillert void		__C(CHIP,_mem_write_multi_8)(void *, bus_space_handle_t,
135c4071fd1Smillert 		    bus_size_t, const u_int64_t *, bus_size_t);
136ceb909c3Sart 
137ceb909c3Sart /* write region */
138c4071fd1Smillert void		__C(CHIP,_mem_write_region_1)(void *, bus_space_handle_t,
139c4071fd1Smillert 		    bus_size_t, const u_int8_t *, bus_size_t);
140c4071fd1Smillert void		__C(CHIP,_mem_write_region_2)(void *, bus_space_handle_t,
141c4071fd1Smillert 		    bus_size_t, const u_int16_t *, bus_size_t);
142c4071fd1Smillert void		__C(CHIP,_mem_write_region_4)(void *, bus_space_handle_t,
143c4071fd1Smillert 		    bus_size_t, const u_int32_t *, bus_size_t);
144c4071fd1Smillert void		__C(CHIP,_mem_write_region_8)(void *, bus_space_handle_t,
145c4071fd1Smillert 		    bus_size_t, const u_int64_t *, bus_size_t);
146ceb909c3Sart 
147ceb909c3Sart /* set multiple */
148c4071fd1Smillert void		__C(CHIP,_mem_set_multi_1)(void *, bus_space_handle_t,
149c4071fd1Smillert 		    bus_size_t, u_int8_t, bus_size_t);
150c4071fd1Smillert void		__C(CHIP,_mem_set_multi_2)(void *, bus_space_handle_t,
151c4071fd1Smillert 		    bus_size_t, u_int16_t, bus_size_t);
152c4071fd1Smillert void		__C(CHIP,_mem_set_multi_4)(void *, bus_space_handle_t,
153c4071fd1Smillert 		    bus_size_t, u_int32_t, bus_size_t);
154c4071fd1Smillert void		__C(CHIP,_mem_set_multi_8)(void *, bus_space_handle_t,
155c4071fd1Smillert 		    bus_size_t, u_int64_t, bus_size_t);
156ceb909c3Sart 
157ceb909c3Sart /* set region */
158c4071fd1Smillert void		__C(CHIP,_mem_set_region_1)(void *, bus_space_handle_t,
159c4071fd1Smillert 		    bus_size_t, u_int8_t, bus_size_t);
160c4071fd1Smillert void		__C(CHIP,_mem_set_region_2)(void *, bus_space_handle_t,
161c4071fd1Smillert 		    bus_size_t, u_int16_t, bus_size_t);
162c4071fd1Smillert void		__C(CHIP,_mem_set_region_4)(void *, bus_space_handle_t,
163c4071fd1Smillert 		    bus_size_t, u_int32_t, bus_size_t);
164c4071fd1Smillert void		__C(CHIP,_mem_set_region_8)(void *, bus_space_handle_t,
165c4071fd1Smillert 		    bus_size_t, u_int64_t, bus_size_t);
166ceb909c3Sart 
167ceb909c3Sart /* copy */
168c4071fd1Smillert void		__C(CHIP,_mem_copy_1)(void *, bus_space_handle_t,
169c4071fd1Smillert 		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
170c4071fd1Smillert void		__C(CHIP,_mem_copy_2)(void *, bus_space_handle_t,
171c4071fd1Smillert 		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
172c4071fd1Smillert void		__C(CHIP,_mem_copy_4)(void *, bus_space_handle_t,
173c4071fd1Smillert 		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
174c4071fd1Smillert void		__C(CHIP,_mem_copy_8)(void *, bus_space_handle_t,
175c4071fd1Smillert 		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
176ceb909c3Sart 
177ceb909c3Sart /* read multiple raw */
178c4071fd1Smillert void		__C(CHIP,_mem_read_raw_multi_2)(void *,
179c4071fd1Smillert 		    bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
180c4071fd1Smillert void		__C(CHIP,_mem_read_raw_multi_4)(void *,
181c4071fd1Smillert 		    bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
182c4071fd1Smillert void		__C(CHIP,_mem_read_raw_multi_8)(void *,
183c4071fd1Smillert 		    bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
184ceb909c3Sart 
185ceb909c3Sart /* write multiple raw */
186c4071fd1Smillert void		__C(CHIP,_mem_write_raw_multi_2)(void *,
187ceb909c3Sart 		    bus_space_handle_t, bus_size_t, const u_int8_t *,
188c4071fd1Smillert 		    bus_size_t);
189c4071fd1Smillert void		__C(CHIP,_mem_write_raw_multi_4)(void *,
190ceb909c3Sart 		    bus_space_handle_t, bus_size_t, const u_int8_t *,
191c4071fd1Smillert 		    bus_size_t);
192c4071fd1Smillert void		__C(CHIP,_mem_write_raw_multi_8)(void *,
193ceb909c3Sart 		    bus_space_handle_t, bus_size_t, const u_int8_t *,
194c4071fd1Smillert 		    bus_size_t);
195ceb909c3Sart 
19670048494Snate void
19770048494Snate __C(CHIP,_bus_mem_init)(t, v)
19870048494Snate 	bus_space_tag_t t;
199ceb909c3Sart 	void *v;
200ceb909c3Sart {
201ceb909c3Sart 	struct extent *dex, *sex;
202ceb909c3Sart 
20370048494Snate 	/*
20470048494Snate 	 * Initialize the bus space tag.
20570048494Snate 	 */
20670048494Snate 
20770048494Snate 	/* cookie */
208ceb909c3Sart 	t->abs_cookie = v;
209ceb909c3Sart 
21070048494Snate 	/* mapping/unmapping */
21170048494Snate 	t->abs_map =		__C(CHIP,_mem_map);
21270048494Snate 	t->abs_unmap =		__C(CHIP,_mem_unmap);
21370048494Snate 	t->abs_subregion =	__C(CHIP,_mem_subregion);
21470048494Snate 
21570048494Snate 	/* allocation/deallocation */
21670048494Snate 	t->abs_alloc =		__C(CHIP,_mem_alloc);
21770048494Snate 	t->abs_free = 		__C(CHIP,_mem_free);
21870048494Snate 
219*f8ac741cSmiod 	/* get kernel virtual address */
220*f8ac741cSmiod 	t->abs_vaddr =		__C(CHIP,_mem_vaddr);
22170048494Snate 	/* barrier */
22270048494Snate 	t->abs_barrier =	__C(CHIP,_mem_barrier);
22370048494Snate 
22470048494Snate 	/* read (single) */
22570048494Snate 	t->abs_r_1 =		__C(CHIP,_mem_read_1);
22670048494Snate 	t->abs_r_2 =		__C(CHIP,_mem_read_2);
22770048494Snate 	t->abs_r_4 =		__C(CHIP,_mem_read_4);
22870048494Snate 	t->abs_r_8 =		__C(CHIP,_mem_read_8);
22970048494Snate 
23070048494Snate 	/* read multiple */
23170048494Snate 	t->abs_rm_1 =		__C(CHIP,_mem_read_multi_1);
23270048494Snate 	t->abs_rm_2 =		__C(CHIP,_mem_read_multi_2);
23370048494Snate 	t->abs_rm_4 =		__C(CHIP,_mem_read_multi_4);
23470048494Snate 	t->abs_rm_8 =		__C(CHIP,_mem_read_multi_8);
23570048494Snate 
23670048494Snate 	/* read region */
23770048494Snate 	t->abs_rr_1 =		__C(CHIP,_mem_read_region_1);
23870048494Snate 	t->abs_rr_2 =		__C(CHIP,_mem_read_region_2);
23970048494Snate 	t->abs_rr_4 =		__C(CHIP,_mem_read_region_4);
24070048494Snate 	t->abs_rr_8 =		__C(CHIP,_mem_read_region_8);
24170048494Snate 
24270048494Snate 	/* write (single) */
24370048494Snate 	t->abs_w_1 =		__C(CHIP,_mem_write_1);
24470048494Snate 	t->abs_w_2 =		__C(CHIP,_mem_write_2);
24570048494Snate 	t->abs_w_4 =		__C(CHIP,_mem_write_4);
24670048494Snate 	t->abs_w_8 =		__C(CHIP,_mem_write_8);
24770048494Snate 
24870048494Snate 	/* write multiple */
24970048494Snate 	t->abs_wm_1 =		__C(CHIP,_mem_write_multi_1);
25070048494Snate 	t->abs_wm_2 =		__C(CHIP,_mem_write_multi_2);
25170048494Snate 	t->abs_wm_4 =		__C(CHIP,_mem_write_multi_4);
25270048494Snate 	t->abs_wm_8 =		__C(CHIP,_mem_write_multi_8);
25370048494Snate 
25470048494Snate 	/* write region */
25570048494Snate 	t->abs_wr_1 =		__C(CHIP,_mem_write_region_1);
25670048494Snate 	t->abs_wr_2 =		__C(CHIP,_mem_write_region_2);
25770048494Snate 	t->abs_wr_4 =		__C(CHIP,_mem_write_region_4);
25870048494Snate 	t->abs_wr_8 =		__C(CHIP,_mem_write_region_8);
25970048494Snate 
26070048494Snate 	/* set multiple */
26170048494Snate 	t->abs_sm_1 =		__C(CHIP,_mem_set_multi_1);
26270048494Snate 	t->abs_sm_2 =		__C(CHIP,_mem_set_multi_2);
26370048494Snate 	t->abs_sm_4 =		__C(CHIP,_mem_set_multi_4);
26470048494Snate 	t->abs_sm_8 =		__C(CHIP,_mem_set_multi_8);
26570048494Snate 
26670048494Snate 	/* set region */
26770048494Snate 	t->abs_sr_1 =		__C(CHIP,_mem_set_region_1);
26870048494Snate 	t->abs_sr_2 =		__C(CHIP,_mem_set_region_2);
26970048494Snate 	t->abs_sr_4 =		__C(CHIP,_mem_set_region_4);
27070048494Snate 	t->abs_sr_8 =		__C(CHIP,_mem_set_region_8);
27170048494Snate 
27270048494Snate 	/* copy */
27370048494Snate 	t->abs_c_1 =		__C(CHIP,_mem_copy_1);
27470048494Snate 	t->abs_c_2 =		__C(CHIP,_mem_copy_2);
27570048494Snate 	t->abs_c_4 =		__C(CHIP,_mem_copy_4);
27670048494Snate 	t->abs_c_8 =		__C(CHIP,_mem_copy_8);
27770048494Snate 
27870048494Snate 	/* read multiple raw */
27970048494Snate 	t->abs_rrm_2 =		__C(CHIP,_mem_read_raw_multi_2);
28070048494Snate 	t->abs_rrm_4 =		__C(CHIP,_mem_read_raw_multi_4);
28170048494Snate 	t->abs_rrm_8 =		__C(CHIP,_mem_read_raw_multi_8);
28270048494Snate 
28370048494Snate 	/* write multiple raw*/
28470048494Snate 	t->abs_wrm_2 =		__C(CHIP,_mem_write_raw_multi_2);
28570048494Snate 	t->abs_wrm_4 =		__C(CHIP,_mem_write_raw_multi_4);
28670048494Snate 	t->abs_wrm_8 =		__C(CHIP,_mem_write_raw_multi_8);
28770048494Snate 
288ceb909c3Sart 	/* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
2892f4de8e4Srobert 	dex = extent_create(CHIP_EXTENT_DNAME(v), 0x0UL,
290ceb909c3Sart 	    0xffffffffffffffffUL, M_DEVBUF,
2912f4de8e4Srobert 	    (caddr_t)CHIP_EXTENT_DSTORAGE(v),
2922f4de8e4Srobert 	    sizeof(CHIP_EXTENT_DSTORAGE(v)), EX_NOWAIT);
293ceb909c3Sart 	extent_alloc_region(dex, 0, 0xffffffffffffffffUL, EX_NOWAIT);
294ceb909c3Sart 
295ceb909c3Sart #ifdef CHIP_D_MEM_W1_BUS_START
296ceb909c3Sart #ifdef EXTENT_DEBUG
297ceb909c3Sart 	printf("dmem: freeing from 0x%lx to 0x%lx\n",
298ceb909c3Sart 	    CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v));
299ceb909c3Sart #endif
300ceb909c3Sart 	extent_free(dex, CHIP_D_MEM_W1_BUS_START(v),
301ceb909c3Sart 	    CHIP_D_MEM_W1_BUS_END(v) - CHIP_D_MEM_W1_BUS_START(v) + 1,
302ceb909c3Sart 	    EX_NOWAIT);
303ceb909c3Sart #endif
304ceb909c3Sart 
305ceb909c3Sart #ifdef EXTENT_DEBUG
306ceb909c3Sart         extent_print(dex);
307ceb909c3Sart #endif
308ceb909c3Sart         CHIP_D_MEM_EXTENT(v) = dex;
309ceb909c3Sart 
310ceb909c3Sart 	/* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
3112f4de8e4Srobert 	sex = extent_create(CHIP_EXTENT_SNAME(v), 0x0UL,
312ceb909c3Sart 	    0xffffffffffffffffUL, M_DEVBUF,
3132f4de8e4Srobert 	    (caddr_t)CHIP_EXTENT_SSTORAGE(v),
3142f4de8e4Srobert 	    sizeof(CHIP_EXTENT_SSTORAGE(v)), EX_NOWAIT);
315ceb909c3Sart 	extent_alloc_region(sex, 0, 0xffffffffffffffffUL, EX_NOWAIT);
316ceb909c3Sart 
317ceb909c3Sart #ifdef CHIP_S_MEM_W1_BUS_START
318ceb909c3Sart #ifdef EXTENT_DEBUG
319ceb909c3Sart 	printf("smem: freeing from 0x%lx to 0x%lx\n",
320ceb909c3Sart 	    CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v));
321ceb909c3Sart #endif
322ceb909c3Sart 	extent_free(sex, CHIP_S_MEM_W1_BUS_START(v),
323ceb909c3Sart 	    CHIP_S_MEM_W1_BUS_END(v) - CHIP_S_MEM_W1_BUS_START(v) + 1,
324ceb909c3Sart 	    EX_NOWAIT);
325ceb909c3Sart #endif
326ceb909c3Sart #ifdef CHIP_S_MEM_W2_BUS_START
327ceb909c3Sart 	if (CHIP_S_MEM_W2_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v)) {
328ceb909c3Sart #ifdef EXTENT_DEBUG
329ceb909c3Sart 		printf("smem: freeing from 0x%lx to 0x%lx\n",
330ceb909c3Sart 		    CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
331ceb909c3Sart #endif
332ceb909c3Sart 		extent_free(sex, CHIP_S_MEM_W2_BUS_START(v),
333ceb909c3Sart 		    CHIP_S_MEM_W2_BUS_END(v) - CHIP_S_MEM_W2_BUS_START(v) + 1,
334ceb909c3Sart 		    EX_NOWAIT);
335ceb909c3Sart 	} else {
336ceb909c3Sart #ifdef EXTENT_DEBUG
337ceb909c3Sart 		printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n",
338ceb909c3Sart 		    CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
339ceb909c3Sart #endif
340ceb909c3Sart 	}
341ceb909c3Sart #endif
342ceb909c3Sart #ifdef CHIP_S_MEM_W3_BUS_START
343ceb909c3Sart 	if (CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v) &&
344ceb909c3Sart 	    CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W2_BUS_START(v)) {
345ceb909c3Sart #ifdef EXTENT_DEBUG
346ceb909c3Sart 		printf("smem: freeing from 0x%lx to 0x%lx\n",
347ceb909c3Sart 		    CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v));
348ceb909c3Sart #endif
349ceb909c3Sart 		extent_free(sex, CHIP_S_MEM_W3_BUS_START(v),
350ceb909c3Sart 		    CHIP_S_MEM_W3_BUS_END(v) - CHIP_S_MEM_W3_BUS_START(v) + 1,
351ceb909c3Sart 		    EX_NOWAIT);
352ceb909c3Sart 	} else {
353ceb909c3Sart #ifdef EXTENT_DEBUG
354ceb909c3Sart 		printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n",
355ceb909c3Sart 		    CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
356ceb909c3Sart #endif
357ceb909c3Sart 	}
358ceb909c3Sart #endif
359ceb909c3Sart 
360ceb909c3Sart #ifdef EXTENT_DEBUG
361ceb909c3Sart         extent_print(sex);
362ceb909c3Sart #endif
363ceb909c3Sart         CHIP_S_MEM_EXTENT(v) = sex;
364ceb909c3Sart }
365ceb909c3Sart 
366c4071fd1Smillert static int	__C(CHIP,_xlate_addr_to_dense_handle)(void *,
367c4071fd1Smillert 		    bus_addr_t, bus_space_handle_t *);
368c4071fd1Smillert static int	__C(CHIP,_xlate_dense_handle_to_addr)(void *,
369c4071fd1Smillert 		    bus_space_handle_t, bus_addr_t *);
370c4071fd1Smillert static int	__C(CHIP,_xlate_addr_to_sparse_handle)(void *,
371c4071fd1Smillert 		    bus_addr_t, bus_space_handle_t *);
372c4071fd1Smillert static int	__C(CHIP,_xlate_sparse_handle_to_addr)(void *,
373c4071fd1Smillert 		    bus_space_handle_t, bus_addr_t *);
374ceb909c3Sart 
375ceb909c3Sart static int
376ceb909c3Sart __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, memhp)
377ceb909c3Sart 	void *v;
378ceb909c3Sart 	bus_addr_t memaddr;
379ceb909c3Sart 	bus_space_handle_t *memhp;
380ceb909c3Sart {
381ceb909c3Sart #ifdef CHIP_D_MEM_W1_BUS_START
382ceb909c3Sart 	if (memaddr >= CHIP_D_MEM_W1_BUS_START(v) &&
383ceb909c3Sart 	    memaddr <= CHIP_D_MEM_W1_BUS_END(v)) {
384ceb909c3Sart 		*memhp = ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_SYS_START(v)) +
385ceb909c3Sart 		    (memaddr - CHIP_D_MEM_W1_BUS_START(v));
386ceb909c3Sart 		return (1);
387ceb909c3Sart 	} else
388ceb909c3Sart #endif
389ceb909c3Sart 		return (0);
390ceb909c3Sart }
391ceb909c3Sart 
392ceb909c3Sart static int
393ceb909c3Sart __C(CHIP,_xlate_dense_handle_to_addr)(v, memh, memaddrp)
394ceb909c3Sart 	void *v;
395ceb909c3Sart 	bus_space_handle_t memh;
396ceb909c3Sart 	bus_addr_t *memaddrp;
397ceb909c3Sart {
398ceb909c3Sart 
399ceb909c3Sart 	memh = ALPHA_K0SEG_TO_PHYS(memh);
400ceb909c3Sart 
401ceb909c3Sart #ifdef CHIP_D_MEM_W1_BUS_START
402ceb909c3Sart 	if (memh >= CHIP_D_MEM_W1_SYS_START(v) &&
403ceb909c3Sart 	    memh <= CHIP_D_MEM_W1_SYS_END(v)) {
404ceb909c3Sart 		*memaddrp = CHIP_D_MEM_W1_BUS_START(v) +
405ceb909c3Sart 		    (memh - CHIP_D_MEM_W1_SYS_START(v));
406ceb909c3Sart 		return (1);
407ceb909c3Sart 	} else
408ceb909c3Sart #endif
409ceb909c3Sart 		return (0);
410ceb909c3Sart }
411ceb909c3Sart 
412ceb909c3Sart static int
413ceb909c3Sart __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
414ceb909c3Sart 	void *v;
415ceb909c3Sart 	bus_addr_t memaddr;
416ceb909c3Sart 	bus_space_handle_t *memhp;
417ceb909c3Sart {
418ceb909c3Sart 
419ceb909c3Sart #ifdef CHIP_S_MEM_W1_BUS_START
420ceb909c3Sart 	if (memaddr >= CHIP_S_MEM_W1_BUS_START(v) &&
421ceb909c3Sart 	    memaddr <= CHIP_S_MEM_W1_BUS_END(v)) {
422ceb909c3Sart 		*memhp =
423ceb909c3Sart 		    (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >> 5) +
424ceb909c3Sart 		    (memaddr - CHIP_S_MEM_W1_BUS_START(v));
425ceb909c3Sart 		return (1);
426ceb909c3Sart 	} else
427ceb909c3Sart #endif
428ceb909c3Sart #ifdef CHIP_S_MEM_W2_BUS_START
429ceb909c3Sart 	if (memaddr >= CHIP_S_MEM_W2_BUS_START(v) &&
430ceb909c3Sart 	    memaddr <= CHIP_S_MEM_W2_BUS_END(v)) {
431ceb909c3Sart 		*memhp =
432ceb909c3Sart 		    (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >> 5) +
433ceb909c3Sart 		    (memaddr - CHIP_S_MEM_W2_BUS_START(v));
434ceb909c3Sart 		return (1);
435ceb909c3Sart 	} else
436ceb909c3Sart #endif
437ceb909c3Sart #ifdef CHIP_S_MEM_W3_BUS_START
438ceb909c3Sart 	if (memaddr >= CHIP_S_MEM_W3_BUS_START(v) &&
439ceb909c3Sart 	    memaddr <= CHIP_S_MEM_W3_BUS_END(v)) {
440ceb909c3Sart 		*memhp =
441ceb909c3Sart 		    (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >> 5) +
442ceb909c3Sart 		    (memaddr - CHIP_S_MEM_W3_BUS_START(v));
443ceb909c3Sart 		return (1);
444ceb909c3Sart 	} else
445ceb909c3Sart #endif
446ceb909c3Sart 		return (0);
447ceb909c3Sart }
448ceb909c3Sart 
449ceb909c3Sart static int
450ceb909c3Sart __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, memaddrp)
451ceb909c3Sart 	void *v;
452ceb909c3Sart 	bus_space_handle_t memh;
453ceb909c3Sart 	bus_addr_t *memaddrp;
454ceb909c3Sart {
455ceb909c3Sart 
456ceb909c3Sart 	memh = ALPHA_K0SEG_TO_PHYS(memh << 5) >> 5;
457ceb909c3Sart 
458ceb909c3Sart #ifdef CHIP_S_MEM_W1_BUS_START
459ceb909c3Sart 	if ((memh << 5) >= CHIP_S_MEM_W1_SYS_START(v) &&
460ceb909c3Sart 	    (memh << 5) <= CHIP_S_MEM_W1_SYS_END(v)) {
461ceb909c3Sart 		*memaddrp = CHIP_S_MEM_W1_BUS_START(v) +
462ceb909c3Sart 		    (memh - (CHIP_S_MEM_W1_SYS_START(v) >> 5));
463ceb909c3Sart 		return (1);
464ceb909c3Sart 	} else
465ceb909c3Sart #endif
466ceb909c3Sart #ifdef CHIP_S_MEM_W2_BUS_START
467ceb909c3Sart 	if ((memh << 5) >= CHIP_S_MEM_W2_SYS_START(v) &&
468ceb909c3Sart 	    (memh << 5) <= CHIP_S_MEM_W2_SYS_END(v)) {
469ceb909c3Sart 		*memaddrp = CHIP_S_MEM_W2_BUS_START(v) +
470ceb909c3Sart 		    (memh - (CHIP_S_MEM_W2_SYS_START(v) >> 5));
471ceb909c3Sart 		return (1);
472ceb909c3Sart 	} else
473ceb909c3Sart #endif
474ceb909c3Sart #ifdef CHIP_S_MEM_W3_BUS_START
475ceb909c3Sart 	if ((memh << 5) >= CHIP_S_MEM_W3_SYS_START(v) &&
476ceb909c3Sart 	    (memh << 5) <= CHIP_S_MEM_W3_SYS_END(v)) {
477ceb909c3Sart 		*memaddrp = CHIP_S_MEM_W3_BUS_START(v) +
478ceb909c3Sart 		    (memh - (CHIP_S_MEM_W3_SYS_START(v) >> 5));
479ceb909c3Sart 		return (1);
480ceb909c3Sart 	} else
481ceb909c3Sart #endif
482ceb909c3Sart 		return (0);
483ceb909c3Sart }
484ceb909c3Sart 
485ceb909c3Sart int
4862ab138fdSmiod __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp)
487ceb909c3Sart 	void *v;
488ceb909c3Sart 	bus_addr_t memaddr;
489ceb909c3Sart 	bus_size_t memsize;
4902ab138fdSmiod 	int flags;
491ceb909c3Sart 	bus_space_handle_t *memhp;
492ceb909c3Sart {
493ceb909c3Sart 	bus_space_handle_t dh = 0, sh = 0;	/* XXX -Wuninitialized */
494ceb909c3Sart 	int didd, dids, errord, errors, mustd, musts;
495f2a903b1Smiod 	int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE;
496f2a903b1Smiod 	int linear = flags & BUS_SPACE_MAP_LINEAR;
497ceb909c3Sart 
498ceb909c3Sart 	mustd = 1;
499f2a903b1Smiod 	musts = prefetchable == 0;
500f2a903b1Smiod 
501f2a903b1Smiod 	/*
502f2a903b1Smiod 	 * We must have dense space to map memory linearly.
503f2a903b1Smiod 	 */
504f2a903b1Smiod 	if (linear && !prefetchable)
505f2a903b1Smiod 		return (EOPNOTSUPP);
506ceb909c3Sart 
507ceb909c3Sart #ifdef EXTENT_DEBUG
508ceb909c3Sart 	printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
509ceb909c3Sart 	    memaddr + memsize - 1);
510ceb909c3Sart 	printf("mem: %s dense, %s sparse\n", mustd ? "need" : "want",
511ceb909c3Sart 	    musts ? "need" : "want");
512ceb909c3Sart #endif
513ceb909c3Sart 	errord = extent_alloc_region(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
514ceb909c3Sart 	    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
515ceb909c3Sart 	didd = (errord == 0);
516ceb909c3Sart 	errors = extent_alloc_region(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
517ceb909c3Sart 	    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
518ceb909c3Sart 	dids = (errors == 0);
519ceb909c3Sart 
520ceb909c3Sart #ifdef EXTENT_DEBUG
521ceb909c3Sart 	if (!didd)
522ceb909c3Sart 		printf("mem: failed to get dense (%d)\n", errord);
523ceb909c3Sart 	if (!dids)
524ceb909c3Sart 		printf("mem: failed to get sparse (%d)\n", errors);
525ceb909c3Sart #endif
526ceb909c3Sart 
527ceb909c3Sart 	if ((mustd && !didd) || (musts && !dids))
528ceb909c3Sart 		goto bad;
529ceb909c3Sart 
530ceb909c3Sart 	if (didd && !__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, &dh)) {
531ceb909c3Sart 		printf("\n");
532ceb909c3Sart #ifdef CHIP_D_MEM_W1_BUS_START
533ceb909c3Sart 		printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
534ceb909c3Sart 		    CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v));
535ceb909c3Sart #endif
536ceb909c3Sart 		panic("%s: don't know how to map %lx cacheable",
537ceb909c3Sart 		    __S(__C(CHIP,_mem_map)), memaddr);
538ceb909c3Sart 	}
539ceb909c3Sart 
540ceb909c3Sart 	if (dids && !__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, &sh)) {
541ceb909c3Sart 		printf("\n");
542ceb909c3Sart #ifdef CHIP_S_MEM_W1_BUS_START
543ceb909c3Sart 		printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
544ceb909c3Sart 		    CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v));
545ceb909c3Sart #endif
546ceb909c3Sart #ifdef CHIP_S_MEM_W2_BUS_START
547ceb909c3Sart 		printf("%s: window[2]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
548ceb909c3Sart 		    CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
549ceb909c3Sart #endif
550ceb909c3Sart #ifdef CHIP_S_MEM_W3_BUS_START
551ceb909c3Sart 		printf("%s: window[3]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
552ceb909c3Sart 		    CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v));
553ceb909c3Sart #endif
554ceb909c3Sart 		panic("%s: don't know how to map %lx non-cacheable",
555ceb909c3Sart 		    __S(__C(CHIP,_mem_map)), memaddr);
556ceb909c3Sart 	}
557ceb909c3Sart 
558f2a903b1Smiod 	if (prefetchable)
559ceb909c3Sart 		*memhp = dh;
560ceb909c3Sart 	else
561ceb909c3Sart 		*memhp = sh;
562ceb909c3Sart 	return (0);
563ceb909c3Sart 
564ceb909c3Sart bad:
565ceb909c3Sart #ifdef EXTENT_DEBUG
566ceb909c3Sart 	printf("mem: failed\n");
567ceb909c3Sart #endif
568ceb909c3Sart 	if (didd) {
569ceb909c3Sart #ifdef EXTENT_DEBUG
570ceb909c3Sart 	printf("mem: freeing dense\n");
571ceb909c3Sart #endif
572ceb909c3Sart 		if (extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
573ceb909c3Sart 		    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
574ceb909c3Sart 			printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n",
575ceb909c3Sart 			    __S(__C(CHIP,_mem_map)), memaddr,
576ceb909c3Sart 			    memaddr + memsize - 1);
577ceb909c3Sart 		}
578ceb909c3Sart 	}
579ceb909c3Sart 	if (dids) {
580ceb909c3Sart #ifdef EXTENT_DEBUG
581ceb909c3Sart 	printf("mem: freeing sparse\n");
582ceb909c3Sart #endif
583ceb909c3Sart 		if (extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
584ceb909c3Sart 		    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
585ceb909c3Sart 			printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n",
586ceb909c3Sart 			    __S(__C(CHIP,_mem_map)), memaddr,
587ceb909c3Sart 			    memaddr + memsize - 1);
588ceb909c3Sart 		}
589ceb909c3Sart 	}
590ceb909c3Sart 
591ceb909c3Sart #ifdef EXTENT_DEBUG
592ceb909c3Sart 	extent_print(CHIP_D_MEM_EXTENT(v));
593ceb909c3Sart 	extent_print(CHIP_S_MEM_EXTENT(v));
594ceb909c3Sart #endif
595ceb909c3Sart 
596ceb909c3Sart 	/*
597ceb909c3Sart 	 * return dense error if we needed it but couldn't get it, else
598ceb909c3Sart 	 * sparse error.  The error _has_ to be one of the two...
599ceb909c3Sart 	 */
600ceb909c3Sart 	return (mustd && !didd ? errord : (musts && !dids ? errors : EINVAL));
601ceb909c3Sart }
602ceb909c3Sart 
603ceb909c3Sart void
604ceb909c3Sart __C(CHIP,_mem_unmap)(v, memh, memsize)
605ceb909c3Sart 	void *v;
606ceb909c3Sart 	bus_space_handle_t memh;
607ceb909c3Sart 	bus_size_t memsize;
608ceb909c3Sart {
609ceb909c3Sart 	bus_addr_t memaddr;
610ceb909c3Sart 	bus_space_handle_t temph;
611ceb909c3Sart 	int sparse, haves, haved;
612ceb909c3Sart 
613ceb909c3Sart #ifdef EXTENT_DEBUG
614ceb909c3Sart 	printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize);
615ceb909c3Sart #endif
616ceb909c3Sart 
617ceb909c3Sart 	/*
618ceb909c3Sart 	 * Find out what space we're in.
619ceb909c3Sart 	 */
620ceb909c3Sart 	sparse = ((memh >> 63) == 0);
621ceb909c3Sart 
622ceb909c3Sart 	/*
623ceb909c3Sart 	 * Find out what address we're in in that space.
624ceb909c3Sart 	 */
625ceb909c3Sart 	haves = haved = 0;
626ceb909c3Sart 	if (sparse)
627ceb909c3Sart 		haves = __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh,
628ceb909c3Sart 		    &memaddr);
629ceb909c3Sart 	else
630ceb909c3Sart 		haved = __C(CHIP,_xlate_dense_handle_to_addr)(v, memh,
631ceb909c3Sart 		    &memaddr);
632ceb909c3Sart 
633ceb909c3Sart 	if (!haves && !haved)
634ceb909c3Sart 		panic("%s: couldn't get addr from %s handle 0x%lx",
635ceb909c3Sart 		    __S(__C(CHIP,_mem_unmap)), sparse ? "sparse" : "dense",
636ceb909c3Sart 		    memh);
637ceb909c3Sart 
638ceb909c3Sart 	/*
639ceb909c3Sart 	 * Find out were/if that address lives in the other space.
640ceb909c3Sart 	 */
641ceb909c3Sart 	if (sparse)
642ceb909c3Sart 		haved = __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr,
643ceb909c3Sart 		    &temph);
644ceb909c3Sart 	else
645ceb909c3Sart 		haves = __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr,
646ceb909c3Sart 		    &temph);
647ceb909c3Sart 
648ceb909c3Sart 	/*
649ceb909c3Sart 	 * Free any ranges we have.
650ceb909c3Sart 	 */
651ceb909c3Sart #ifdef EXTENT_DEBUG
652ceb909c3Sart 	printf("mem: it's at 0x%lx (%sdense, %ssparse)\n", memaddr,
653ceb909c3Sart 	    haved ? "" : "not ", haves ? "" : "not ");
654ceb909c3Sart #endif
655ceb909c3Sart 	if (haved && extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
656ceb909c3Sart 	    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
657ceb909c3Sart 		printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n",
658ceb909c3Sart 		    __S(__C(CHIP,_mem_map)), memaddr,
659ceb909c3Sart 		    memaddr + memsize - 1);
660ceb909c3Sart 	}
661ceb909c3Sart 	if (haves && extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
662ceb909c3Sart 	    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
663ceb909c3Sart 		printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n",
664ceb909c3Sart 		    __S(__C(CHIP,_mem_map)), memaddr,
665ceb909c3Sart 		    memaddr + memsize - 1);
666ceb909c3Sart 	}
667ceb909c3Sart }
668ceb909c3Sart 
669ceb909c3Sart int
670ceb909c3Sart __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh)
671ceb909c3Sart 	void *v;
672ceb909c3Sart 	bus_space_handle_t memh, *nmemh;
673ceb909c3Sart 	bus_size_t offset, size;
674ceb909c3Sart {
675ceb909c3Sart 
676ceb909c3Sart 	*nmemh = memh + offset;
677ceb909c3Sart 	return (0);
678ceb909c3Sart }
679ceb909c3Sart 
680ceb909c3Sart int
6812ab138fdSmiod __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags,
682ceb909c3Sart     addrp, bshp)
683ceb909c3Sart 	void *v;
684ceb909c3Sart 	bus_addr_t rstart, rend, *addrp;
685ceb909c3Sart 	bus_size_t size, align, boundary;
6862ab138fdSmiod 	int flags;
687ceb909c3Sart 	bus_space_handle_t *bshp;
688ceb909c3Sart {
689ceb909c3Sart 
690ceb909c3Sart 	/* XXX XXX XXX XXX XXX XXX */
691ceb909c3Sart 	panic("%s not implemented", __S(__C(CHIP,_mem_alloc)));
692ceb909c3Sart }
693ceb909c3Sart 
694ceb909c3Sart void
695ceb909c3Sart __C(CHIP,_mem_free)(v, bsh, size)
696ceb909c3Sart 	void *v;
697ceb909c3Sart 	bus_space_handle_t bsh;
698ceb909c3Sart 	bus_size_t size;
699ceb909c3Sart {
700ceb909c3Sart 
701ceb909c3Sart 	/* XXX XXX XXX XXX XXX XXX */
702ceb909c3Sart 	panic("%s not implemented", __S(__C(CHIP,_mem_free)));
703ceb909c3Sart }
704ceb909c3Sart 
705*f8ac741cSmiod void *
706*f8ac741cSmiod __C(CHIP,_mem_vaddr)(v, bsh)
707*f8ac741cSmiod 	void *v;
708*f8ac741cSmiod 	bus_space_handle_t bsh;
709*f8ac741cSmiod {
710*f8ac741cSmiod 	/*
711*f8ac741cSmiod 	 * XXX should check that the range was mapped
712*f8ac741cSmiod 	 * with BUS_SPACE_MAP_LINEAR for sanity
713*f8ac741cSmiod 	 */
714*f8ac741cSmiod 	if ((bsh >> 63) != 0)
715*f8ac741cSmiod 		return ((void *)bsh);
716*f8ac741cSmiod 
717*f8ac741cSmiod 	return (0);
718*f8ac741cSmiod }
719*f8ac741cSmiod 
720ceb909c3Sart inline void
721ceb909c3Sart __C(CHIP,_mem_barrier)(v, h, o, l, f)
722ceb909c3Sart 	void *v;
723ceb909c3Sart 	bus_space_handle_t h;
724ceb909c3Sart 	bus_size_t o, l;
725ceb909c3Sart 	int f;
726ceb909c3Sart {
727ceb909c3Sart 
7287107682fSmiod 	if ((f & BUS_SPACE_BARRIER_READ) != 0)
729ceb909c3Sart 		alpha_mb();
7307107682fSmiod 	else if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
731ceb909c3Sart 		alpha_wmb();
732ceb909c3Sart }
733ceb909c3Sart 
734ceb909c3Sart inline u_int8_t
735ceb909c3Sart __C(CHIP,_mem_read_1)(v, memh, off)
736ceb909c3Sart 	void *v;
737ceb909c3Sart 	bus_space_handle_t memh;
738ceb909c3Sart 	bus_size_t off;
739ceb909c3Sart {
740ceb909c3Sart 	register bus_space_handle_t tmpmemh;
741ceb909c3Sart 	register u_int32_t *port, val;
742ceb909c3Sart 	register u_int8_t rval;
743ceb909c3Sart 	register int offset;
744ceb909c3Sart 
745ceb909c3Sart 	alpha_mb();
746ceb909c3Sart 
747ceb909c3Sart 	if ((memh >> 63) != 0)
748ceb909c3Sart 		return (*(u_int8_t *)(memh + off));
749ceb909c3Sart 
750ceb909c3Sart 	tmpmemh = memh + off;
751ceb909c3Sart 	offset = tmpmemh & 3;
752ceb909c3Sart 	port = (u_int32_t *)((tmpmemh << 5) | (0 << 3));
753ceb909c3Sart 	val = *port;
754ceb909c3Sart 	rval = ((val) >> (8 * offset)) & 0xff;
755ceb909c3Sart 
756ceb909c3Sart 	return rval;
757ceb909c3Sart }
758ceb909c3Sart 
759ceb909c3Sart inline u_int16_t
760ceb909c3Sart __C(CHIP,_mem_read_2)(v, memh, off)
761ceb909c3Sart 	void *v;
762ceb909c3Sart 	bus_space_handle_t memh;
763ceb909c3Sart 	bus_size_t off;
764ceb909c3Sart {
765ceb909c3Sart 	register bus_space_handle_t tmpmemh;
766ceb909c3Sart 	register u_int32_t *port, val;
767ceb909c3Sart 	register u_int16_t rval;
768ceb909c3Sart 	register int offset;
769ceb909c3Sart 
770ceb909c3Sart 	alpha_mb();
771ceb909c3Sart 
772ceb909c3Sart 	if ((memh >> 63) != 0)
773ceb909c3Sart 		return (*(u_int16_t *)(memh + off));
774ceb909c3Sart 
775ceb909c3Sart 	tmpmemh = memh + off;
776ceb909c3Sart 	offset = tmpmemh & 3;
777ceb909c3Sart 	port = (u_int32_t *)((tmpmemh << 5) | (1 << 3));
778ceb909c3Sart 	val = *port;
779ceb909c3Sart 	rval = ((val) >> (8 * offset)) & 0xffff;
780ceb909c3Sart 
781ceb909c3Sart 	return rval;
782ceb909c3Sart }
783ceb909c3Sart 
784ceb909c3Sart inline u_int32_t
785ceb909c3Sart __C(CHIP,_mem_read_4)(v, memh, off)
786ceb909c3Sart 	void *v;
787ceb909c3Sart 	bus_space_handle_t memh;
788ceb909c3Sart 	bus_size_t off;
789ceb909c3Sart {
790ceb909c3Sart 	register bus_space_handle_t tmpmemh;
791ceb909c3Sart 	register u_int32_t *port, val;
792ceb909c3Sart 	register u_int32_t rval;
793ceb909c3Sart 	register int offset;
794ceb909c3Sart 
795ceb909c3Sart 	alpha_mb();
796ceb909c3Sart 
797ceb909c3Sart 	if ((memh >> 63) != 0)
798ceb909c3Sart 		return (*(u_int32_t *)(memh + off));
799ceb909c3Sart 
800ceb909c3Sart 	tmpmemh = memh + off;
801ceb909c3Sart 	offset = tmpmemh & 3;
802ceb909c3Sart 	port = (u_int32_t *)((tmpmemh << 5) | (3 << 3));
803ceb909c3Sart 	val = *port;
804ceb909c3Sart #if 0
805ceb909c3Sart 	rval = ((val) >> (8 * offset)) & 0xffffffff;
806ceb909c3Sart #else
807ceb909c3Sart 	rval = val;
808ceb909c3Sart #endif
809ceb909c3Sart 
810ceb909c3Sart 	return rval;
811ceb909c3Sart }
812ceb909c3Sart 
813ceb909c3Sart inline u_int64_t
814ceb909c3Sart __C(CHIP,_mem_read_8)(v, memh, off)
815ceb909c3Sart 	void *v;
816ceb909c3Sart 	bus_space_handle_t memh;
817ceb909c3Sart 	bus_size_t off;
818ceb909c3Sart {
819ceb909c3Sart 
820ceb909c3Sart 	alpha_mb();
821ceb909c3Sart 
822ceb909c3Sart         if ((memh >> 63) != 0)
823ceb909c3Sart                 return (*(u_int64_t *)(memh + off));
824ceb909c3Sart 
825ceb909c3Sart 	/* XXX XXX XXX */
826ceb909c3Sart 	panic("%s not implemented", __S(__C(CHIP,_mem_read_8)));
827ceb909c3Sart }
828ceb909c3Sart 
829ceb909c3Sart #define CHIP_mem_read_multi_N(BYTES,TYPE)				\
830ceb909c3Sart void									\
831ceb909c3Sart __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c)			\
832ceb909c3Sart 	void *v;							\
833ceb909c3Sart 	bus_space_handle_t h;						\
834ceb909c3Sart 	bus_size_t o, c;						\
835ceb909c3Sart 	TYPE *a;							\
836ceb909c3Sart {									\
837ceb909c3Sart 									\
838ceb909c3Sart 	while (c-- > 0) {						\
839ceb909c3Sart 		__C(CHIP,_mem_barrier)(v, h, o, sizeof *a,		\
8407107682fSmiod 		    BUS_SPACE_BARRIER_READ);				\
841ceb909c3Sart 		*a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o);	\
842ceb909c3Sart 	}								\
843ceb909c3Sart }
844ceb909c3Sart CHIP_mem_read_multi_N(1,u_int8_t)
845ceb909c3Sart CHIP_mem_read_multi_N(2,u_int16_t)
846ceb909c3Sart CHIP_mem_read_multi_N(4,u_int32_t)
847ceb909c3Sart CHIP_mem_read_multi_N(8,u_int64_t)
848ceb909c3Sart 
849ceb909c3Sart #define CHIP_mem_read_region_N(BYTES,TYPE)				\
850ceb909c3Sart void									\
851ceb909c3Sart __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c)			\
852ceb909c3Sart 	void *v;							\
853ceb909c3Sart 	bus_space_handle_t h;						\
854ceb909c3Sart 	bus_size_t o, c;						\
855ceb909c3Sart 	TYPE *a;							\
856ceb909c3Sart {									\
857ceb909c3Sart 									\
858ceb909c3Sart 	while (c-- > 0) {						\
859ceb909c3Sart 		*a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o);	\
860ceb909c3Sart 		o += sizeof *a;						\
861ceb909c3Sart 	}								\
862ceb909c3Sart }
863ceb909c3Sart CHIP_mem_read_region_N(1,u_int8_t)
864ceb909c3Sart CHIP_mem_read_region_N(2,u_int16_t)
865ceb909c3Sart CHIP_mem_read_region_N(4,u_int32_t)
866ceb909c3Sart CHIP_mem_read_region_N(8,u_int64_t)
867ceb909c3Sart 
868ceb909c3Sart inline void
869ceb909c3Sart __C(CHIP,_mem_write_1)(v, memh, off, val)
870ceb909c3Sart 	void *v;
871ceb909c3Sart 	bus_space_handle_t memh;
872ceb909c3Sart 	bus_size_t off;
873ceb909c3Sart 	u_int8_t val;
874ceb909c3Sart {
875ceb909c3Sart 	register bus_space_handle_t tmpmemh;
876ceb909c3Sart 	register u_int32_t *port, nval;
877ceb909c3Sart 	register int offset;
878ceb909c3Sart 
879ceb909c3Sart 	if ((memh >> 63) != 0)
880ceb909c3Sart 		(*(u_int8_t *)(memh + off)) = val;
881ceb909c3Sart 	else {
882ceb909c3Sart 		tmpmemh = memh + off;
883ceb909c3Sart 		offset = tmpmemh & 3;
884ceb909c3Sart 		nval = val << (8 * offset);
885ceb909c3Sart 		port = (u_int32_t *)((tmpmemh << 5) | (0 << 3));
886ceb909c3Sart 		*port = nval;
887ceb909c3Sart 	}
888ceb909c3Sart         alpha_mb();
889ceb909c3Sart }
890ceb909c3Sart 
891ceb909c3Sart inline void
892ceb909c3Sart __C(CHIP,_mem_write_2)(v, memh, off, val)
893ceb909c3Sart 	void *v;
894ceb909c3Sart 	bus_space_handle_t memh;
895ceb909c3Sart 	bus_size_t off;
896ceb909c3Sart 	u_int16_t val;
897ceb909c3Sart {
898ceb909c3Sart 	register bus_space_handle_t tmpmemh;
899ceb909c3Sart 	register u_int32_t *port, nval;
900ceb909c3Sart 	register int offset;
901ceb909c3Sart 
902ceb909c3Sart 	if ((memh >> 63) != 0)
903ceb909c3Sart 		(*(u_int16_t *)(memh + off)) = val;
904ceb909c3Sart 	else {
905ceb909c3Sart 		tmpmemh = memh + off;
906ceb909c3Sart 		offset = tmpmemh & 3;
907ceb909c3Sart 	        nval = val << (8 * offset);
908ceb909c3Sart 	        port = (u_int32_t *)((tmpmemh << 5) | (1 << 3));
909ceb909c3Sart 	        *port = nval;
910ceb909c3Sart 	}
911ceb909c3Sart         alpha_mb();
912ceb909c3Sart }
913ceb909c3Sart 
914ceb909c3Sart inline void
915ceb909c3Sart __C(CHIP,_mem_write_4)(v, memh, off, val)
916ceb909c3Sart 	void *v;
917ceb909c3Sart 	bus_space_handle_t memh;
918ceb909c3Sart 	bus_size_t off;
919ceb909c3Sart 	u_int32_t val;
920ceb909c3Sart {
921ceb909c3Sart 	register bus_space_handle_t tmpmemh;
922ceb909c3Sart 	register u_int32_t *port, nval;
923ceb909c3Sart 	register int offset;
924ceb909c3Sart 
925ceb909c3Sart 	if ((memh >> 63) != 0)
926ceb909c3Sart 		(*(u_int32_t *)(memh + off)) = val;
927ceb909c3Sart 	else {
928ceb909c3Sart 		tmpmemh = memh + off;
929ceb909c3Sart 		offset = tmpmemh & 3;
930ceb909c3Sart 	        nval = val /*<< (8 * offset)*/;
931ceb909c3Sart 	        port = (u_int32_t *)((tmpmemh << 5) | (3 << 3));
932ceb909c3Sart 	        *port = nval;
933ceb909c3Sart 	}
934ceb909c3Sart         alpha_mb();
935ceb909c3Sart }
936ceb909c3Sart 
937ceb909c3Sart inline void
938ceb909c3Sart __C(CHIP,_mem_write_8)(v, memh, off, val)
939ceb909c3Sart 	void *v;
940ceb909c3Sart 	bus_space_handle_t memh;
941ceb909c3Sart 	bus_size_t off;
942ceb909c3Sart 	u_int64_t val;
943ceb909c3Sart {
944ceb909c3Sart 
945ceb909c3Sart 	if ((memh >> 63) != 0)
946ceb909c3Sart 		(*(u_int64_t *)(memh + off)) = val;
947ceb909c3Sart 	else {
948ceb909c3Sart 		/* XXX XXX XXX */
949ceb909c3Sart 		panic("%s not implemented",
950ceb909c3Sart 		    __S(__C(CHIP,_mem_write_8)));
951ceb909c3Sart 	}
952ceb909c3Sart 	alpha_mb();
953ceb909c3Sart }
954ceb909c3Sart 
955ceb909c3Sart #define CHIP_mem_write_multi_N(BYTES,TYPE)				\
956ceb909c3Sart void									\
957ceb909c3Sart __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c)			\
958ceb909c3Sart 	void *v;							\
959ceb909c3Sart 	bus_space_handle_t h;						\
960ceb909c3Sart 	bus_size_t o, c;						\
961ceb909c3Sart 	const TYPE *a;							\
962ceb909c3Sart {									\
963ceb909c3Sart 									\
964ceb909c3Sart 	while (c-- > 0) {						\
965ceb909c3Sart 		__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++);	\
966ceb909c3Sart 		__C(CHIP,_mem_barrier)(v, h, o, sizeof *a,		\
9677107682fSmiod 		    BUS_SPACE_BARRIER_WRITE);				\
968ceb909c3Sart 	}								\
969ceb909c3Sart }
970ceb909c3Sart CHIP_mem_write_multi_N(1,u_int8_t)
971ceb909c3Sart CHIP_mem_write_multi_N(2,u_int16_t)
972ceb909c3Sart CHIP_mem_write_multi_N(4,u_int32_t)
973ceb909c3Sart CHIP_mem_write_multi_N(8,u_int64_t)
974ceb909c3Sart 
975ceb909c3Sart #define CHIP_mem_write_region_N(BYTES,TYPE)				\
976ceb909c3Sart void									\
977ceb909c3Sart __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c)			\
978ceb909c3Sart 	void *v;							\
979ceb909c3Sart 	bus_space_handle_t h;						\
980ceb909c3Sart 	bus_size_t o, c;						\
981ceb909c3Sart 	const TYPE *a;							\
982ceb909c3Sart {									\
983ceb909c3Sart 									\
984ceb909c3Sart 	while (c-- > 0) {						\
985ceb909c3Sart 		__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++);	\
986ceb909c3Sart 		o += sizeof *a;						\
987ceb909c3Sart 	}								\
988ceb909c3Sart }
989ceb909c3Sart CHIP_mem_write_region_N(1,u_int8_t)
990ceb909c3Sart CHIP_mem_write_region_N(2,u_int16_t)
991ceb909c3Sart CHIP_mem_write_region_N(4,u_int32_t)
992ceb909c3Sart CHIP_mem_write_region_N(8,u_int64_t)
993ceb909c3Sart 
994ceb909c3Sart #define CHIP_mem_set_multi_N(BYTES,TYPE)				\
995ceb909c3Sart void									\
996ceb909c3Sart __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c)			\
997ceb909c3Sart 	void *v;							\
998ceb909c3Sart 	bus_space_handle_t h;						\
999ceb909c3Sart 	bus_size_t o, c;						\
1000ceb909c3Sart 	TYPE val;							\
1001ceb909c3Sart {									\
1002ceb909c3Sart 									\
1003ceb909c3Sart 	while (c-- > 0) {						\
1004ceb909c3Sart 		__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val);		\
1005ceb909c3Sart 		__C(CHIP,_mem_barrier)(v, h, o, sizeof val,		\
10067107682fSmiod 		    BUS_SPACE_BARRIER_WRITE);				\
1007ceb909c3Sart 	}								\
1008ceb909c3Sart }
1009ceb909c3Sart CHIP_mem_set_multi_N(1,u_int8_t)
1010ceb909c3Sart CHIP_mem_set_multi_N(2,u_int16_t)
1011ceb909c3Sart CHIP_mem_set_multi_N(4,u_int32_t)
1012ceb909c3Sart CHIP_mem_set_multi_N(8,u_int64_t)
1013ceb909c3Sart 
1014ceb909c3Sart #define CHIP_mem_set_region_N(BYTES,TYPE)				\
1015ceb909c3Sart void									\
1016ceb909c3Sart __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c)			\
1017ceb909c3Sart 	void *v;							\
1018ceb909c3Sart 	bus_space_handle_t h;						\
1019ceb909c3Sart 	bus_size_t o, c;						\
1020ceb909c3Sart 	TYPE val;							\
1021ceb909c3Sart {									\
1022ceb909c3Sart 									\
1023ceb909c3Sart 	while (c-- > 0) {						\
1024ceb909c3Sart 		__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val);		\
1025ceb909c3Sart 		o += sizeof val;					\
1026ceb909c3Sart 	}								\
1027ceb909c3Sart }
1028ceb909c3Sart CHIP_mem_set_region_N(1,u_int8_t)
1029ceb909c3Sart CHIP_mem_set_region_N(2,u_int16_t)
1030ceb909c3Sart CHIP_mem_set_region_N(4,u_int32_t)
1031ceb909c3Sart CHIP_mem_set_region_N(8,u_int64_t)
1032ceb909c3Sart 
1033ceb909c3Sart #define	CHIP_mem_copy_N(BYTES)						\
1034ceb909c3Sart void									\
1035ceb909c3Sart __C(__C(CHIP,_mem_copy_),BYTES)(v, h1, o1, h2, o2, c)			\
1036ceb909c3Sart 	void *v;							\
1037ceb909c3Sart 	bus_space_handle_t h1, h2;					\
1038ceb909c3Sart 	bus_size_t o1, o2, c;						\
1039ceb909c3Sart {									\
1040ceb909c3Sart 	bus_size_t i, o;						\
1041ceb909c3Sart 									\
1042ceb909c3Sart 	if ((h1 >> 63) != 0 && (h2 >> 63) != 0) {			\
1043ceb909c3Sart 		bcopy((void *)(h1 + o1), (void *)(h2 + o2), c * BYTES);	\
1044ceb909c3Sart 		return;							\
1045ceb909c3Sart 	}								\
1046ceb909c3Sart 									\
1047ceb909c3Sart 	/* Circumvent a common case of overlapping problems */		\
1048ceb909c3Sart 	if (h1 == h2 && o2 > o1)					\
1049ceb909c3Sart 		for (i = 0, o = (c - 1) * BYTES; i < c; i++, o -= BYTES)\
1050ceb909c3Sart 			__C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o,	\
1051ceb909c3Sart 			    __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));\
1052ceb909c3Sart 	else								\
1053ceb909c3Sart 		for (i = 0, o = 0; i < c; i++, o += BYTES)		\
1054ceb909c3Sart 			__C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o,	\
1055ceb909c3Sart 			    __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));\
1056ceb909c3Sart }
1057ceb909c3Sart CHIP_mem_copy_N(1)
1058ceb909c3Sart CHIP_mem_copy_N(2)
1059ceb909c3Sart CHIP_mem_copy_N(4)
1060ceb909c3Sart CHIP_mem_copy_N(8)
1061ceb909c3Sart 
1062ceb909c3Sart #define CHIP_mem_read_raw_multi_N(BYTES,TYPE)				\
1063ceb909c3Sart void									\
1064ceb909c3Sart __C(__C(CHIP,_mem_read_raw_multi_),BYTES)(v, h, o, a, c)			\
1065ceb909c3Sart 	void *v;							\
1066ceb909c3Sart 	bus_space_handle_t h;						\
1067ceb909c3Sart 	bus_size_t o, c;						\
1068ceb909c3Sart 	u_int8_t *a;							\
1069ceb909c3Sart {									\
1070ceb909c3Sart 	TYPE temp;							\
1071ceb909c3Sart 	int i;								\
1072ceb909c3Sart 									\
1073ceb909c3Sart 	while (c > 0) {							\
10747107682fSmiod 		__C(CHIP,_mem_barrier)(v, h, o, BYTES,			\
10757107682fSmiod 		    BUS_SPACE_BARRIER_READ);				\
1076ceb909c3Sart 		temp = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o);	\
1077ceb909c3Sart 		i = MIN(c, BYTES);					\
1078ceb909c3Sart 		c -= i;							\
1079ceb909c3Sart 		while (i--) {						\
1080ceb909c3Sart 			*a++ = temp & 0xff;				\
1081ceb909c3Sart 			temp >>= 8;					\
1082ceb909c3Sart 		}							\
1083ceb909c3Sart 	}								\
1084ceb909c3Sart }
1085ceb909c3Sart CHIP_mem_read_raw_multi_N(2,u_int16_t)
1086ceb909c3Sart CHIP_mem_read_raw_multi_N(4,u_int32_t)
1087ceb909c3Sart CHIP_mem_read_raw_multi_N(8,u_int64_t)
1088ceb909c3Sart 
1089ceb909c3Sart #define CHIP_mem_write_raw_multi_N(BYTES,TYPE)				\
1090ceb909c3Sart void									\
1091ceb909c3Sart __C(__C(CHIP,_mem_write_raw_multi_),BYTES)(v, h, o, a, c)		\
1092ceb909c3Sart 	void *v;							\
1093ceb909c3Sart 	bus_space_handle_t h;						\
1094ceb909c3Sart 	bus_size_t o, c;						\
1095ceb909c3Sart 	const u_int8_t *a;						\
1096ceb909c3Sart {									\
1097ceb909c3Sart 	TYPE temp;							\
1098ceb909c3Sart 	int i;								\
1099ceb909c3Sart 									\
1100ceb909c3Sart 	while (c > 0) {							\
1101ceb909c3Sart 		temp = 0;						\
1102ceb909c3Sart 		for (i = BYTES - 1; i >= 0; i--) {			\
1103ceb909c3Sart 			temp <<= 8;					\
1104ceb909c3Sart 			if (i < c)					\
1105ceb909c3Sart 				temp |= *(a + i);			\
1106ceb909c3Sart 		}							\
1107ceb909c3Sart 		__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, temp);	\
11087107682fSmiod 		__C(CHIP,_mem_barrier)(v, h, o, BYTES,			\
11097107682fSmiod 		    BUS_SPACE_BARRIER_WRITE);				\
1110ceb909c3Sart 		i = MIN(c, BYTES);					\
1111ceb909c3Sart 		c -= i;							\
1112ceb909c3Sart 		a += i;							\
1113ceb909c3Sart 	}								\
1114ceb909c3Sart }
1115ceb909c3Sart CHIP_mem_write_raw_multi_N(2,u_int16_t)
1116ceb909c3Sart CHIP_mem_write_raw_multi_N(4,u_int32_t)
1117ceb909c3Sart CHIP_mem_write_raw_multi_N(8,u_int64_t)
1118