1 /* $OpenBSD: pci_swiz_bus_mem_chipdep.c,v 1.8 2009/12/25 20:52:34 miod Exp $ */ 2 /* $NetBSD: pcs_bus_mem_common.c,v 1.15 1996/12/02 22:19:36 cgd Exp $ */ 3 4 /* 5 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 6 * All rights reserved. 7 * 8 * Author: Chris G. Demetriou 9 * 10 * Permission to use, copy, modify and distribute this software and 11 * its documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 18 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 */ 30 31 /* 32 * Common PCI Chipset "bus I/O" functions, for chipsets which have to 33 * deal with only a single PCI interface chip in a machine. 34 * 35 * uses: 36 * CHIP name of the 'chip' it's being compiled for. 37 * CHIP_D_MEM_BASE Dense Mem space base to use. 38 * CHIP_S_MEM_BASE Sparse Mem space base to use. 39 */ 40 41 #include <sys/extent.h> 42 43 #define __C(A,B) __CONCAT(A,B) 44 #define __S(S) __STRING(S) 45 46 #ifndef CHIP_EXTENT_DNAME 47 #define CHIP_EXTENT_DNAME(v) __S(__C(CHIP,_bus_dmem)) 48 #endif 49 #ifndef CHIP_EXTENT_SNAME 50 #define CHIP_EXTENT_SNAME(v) __S(__C(CHIP,_bus_smem)) 51 #endif 52 53 #ifndef CHIP_EXTENT_DSTORAGE 54 #define CHIP_EXTENT_DSTORAGE(v) __C(CHIP,_dmem_ex_storage) 55 static long 56 __C(CHIP,_dmem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 57 #endif 58 #ifndef CHIP_EXTENT_SSTORAGE 59 #define CHIP_EXTENT_SSTORAGE(v) __C(CHIP,_smem_ex_storage) 60 static long 61 __C(CHIP,_smem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 62 63 #endif 64 65 /* mapping/unmapping */ 66 int __C(CHIP,_mem_map)(void *, bus_addr_t, bus_size_t, int, 67 bus_space_handle_t *); 68 void __C(CHIP,_mem_unmap)(void *, bus_space_handle_t, 69 bus_size_t); 70 int __C(CHIP,_mem_subregion)(void *, bus_space_handle_t, 71 bus_size_t, bus_size_t, bus_space_handle_t *); 72 73 /* allocation/deallocation */ 74 int __C(CHIP,_mem_alloc)(void *, bus_addr_t, bus_addr_t, 75 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *, 76 bus_space_handle_t *); 77 void __C(CHIP,_mem_free)(void *, bus_space_handle_t, 78 bus_size_t); 79 80 /* get kernel virtual address */ 81 void * __C(CHIP,_mem_vaddr)(void *, bus_space_handle_t); 82 83 /* barrier */ 84 inline void __C(CHIP,_mem_barrier)(void *, bus_space_handle_t, 85 bus_size_t, bus_size_t, int); 86 87 /* read (single) */ 88 inline u_int8_t __C(CHIP,_mem_read_1)(void *, bus_space_handle_t, 89 bus_size_t); 90 inline u_int16_t __C(CHIP,_mem_read_2)(void *, bus_space_handle_t, 91 bus_size_t); 92 inline u_int32_t __C(CHIP,_mem_read_4)(void *, bus_space_handle_t, 93 bus_size_t); 94 inline u_int64_t __C(CHIP,_mem_read_8)(void *, bus_space_handle_t, 95 bus_size_t); 96 97 /* read multiple */ 98 void __C(CHIP,_mem_read_multi_1)(void *, bus_space_handle_t, 99 bus_size_t, u_int8_t *, bus_size_t); 100 void __C(CHIP,_mem_read_multi_2)(void *, bus_space_handle_t, 101 bus_size_t, u_int16_t *, bus_size_t); 102 void __C(CHIP,_mem_read_multi_4)(void *, bus_space_handle_t, 103 bus_size_t, u_int32_t *, bus_size_t); 104 void __C(CHIP,_mem_read_multi_8)(void *, bus_space_handle_t, 105 bus_size_t, u_int64_t *, bus_size_t); 106 107 /* read region */ 108 void __C(CHIP,_mem_read_region_1)(void *, bus_space_handle_t, 109 bus_size_t, u_int8_t *, bus_size_t); 110 void __C(CHIP,_mem_read_region_2)(void *, bus_space_handle_t, 111 bus_size_t, u_int16_t *, bus_size_t); 112 void __C(CHIP,_mem_read_region_4)(void *, bus_space_handle_t, 113 bus_size_t, u_int32_t *, bus_size_t); 114 void __C(CHIP,_mem_read_region_8)(void *, bus_space_handle_t, 115 bus_size_t, u_int64_t *, bus_size_t); 116 117 /* write (single) */ 118 inline void __C(CHIP,_mem_write_1)(void *, bus_space_handle_t, 119 bus_size_t, u_int8_t); 120 inline void __C(CHIP,_mem_write_2)(void *, bus_space_handle_t, 121 bus_size_t, u_int16_t); 122 inline void __C(CHIP,_mem_write_4)(void *, bus_space_handle_t, 123 bus_size_t, u_int32_t); 124 inline void __C(CHIP,_mem_write_8)(void *, bus_space_handle_t, 125 bus_size_t, u_int64_t); 126 127 /* write multiple */ 128 void __C(CHIP,_mem_write_multi_1)(void *, bus_space_handle_t, 129 bus_size_t, const u_int8_t *, bus_size_t); 130 void __C(CHIP,_mem_write_multi_2)(void *, bus_space_handle_t, 131 bus_size_t, const u_int16_t *, bus_size_t); 132 void __C(CHIP,_mem_write_multi_4)(void *, bus_space_handle_t, 133 bus_size_t, const u_int32_t *, bus_size_t); 134 void __C(CHIP,_mem_write_multi_8)(void *, bus_space_handle_t, 135 bus_size_t, const u_int64_t *, bus_size_t); 136 137 /* write region */ 138 void __C(CHIP,_mem_write_region_1)(void *, bus_space_handle_t, 139 bus_size_t, const u_int8_t *, bus_size_t); 140 void __C(CHIP,_mem_write_region_2)(void *, bus_space_handle_t, 141 bus_size_t, const u_int16_t *, bus_size_t); 142 void __C(CHIP,_mem_write_region_4)(void *, bus_space_handle_t, 143 bus_size_t, const u_int32_t *, bus_size_t); 144 void __C(CHIP,_mem_write_region_8)(void *, bus_space_handle_t, 145 bus_size_t, const u_int64_t *, bus_size_t); 146 147 /* set multiple */ 148 void __C(CHIP,_mem_set_multi_1)(void *, bus_space_handle_t, 149 bus_size_t, u_int8_t, bus_size_t); 150 void __C(CHIP,_mem_set_multi_2)(void *, bus_space_handle_t, 151 bus_size_t, u_int16_t, bus_size_t); 152 void __C(CHIP,_mem_set_multi_4)(void *, bus_space_handle_t, 153 bus_size_t, u_int32_t, bus_size_t); 154 void __C(CHIP,_mem_set_multi_8)(void *, bus_space_handle_t, 155 bus_size_t, u_int64_t, bus_size_t); 156 157 /* set region */ 158 void __C(CHIP,_mem_set_region_1)(void *, bus_space_handle_t, 159 bus_size_t, u_int8_t, bus_size_t); 160 void __C(CHIP,_mem_set_region_2)(void *, bus_space_handle_t, 161 bus_size_t, u_int16_t, bus_size_t); 162 void __C(CHIP,_mem_set_region_4)(void *, bus_space_handle_t, 163 bus_size_t, u_int32_t, bus_size_t); 164 void __C(CHIP,_mem_set_region_8)(void *, bus_space_handle_t, 165 bus_size_t, u_int64_t, bus_size_t); 166 167 /* copy */ 168 void __C(CHIP,_mem_copy_1)(void *, bus_space_handle_t, 169 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t); 170 void __C(CHIP,_mem_copy_2)(void *, bus_space_handle_t, 171 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t); 172 void __C(CHIP,_mem_copy_4)(void *, bus_space_handle_t, 173 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t); 174 void __C(CHIP,_mem_copy_8)(void *, bus_space_handle_t, 175 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t); 176 177 /* read multiple raw */ 178 void __C(CHIP,_mem_read_raw_multi_2)(void *, 179 bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t); 180 void __C(CHIP,_mem_read_raw_multi_4)(void *, 181 bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t); 182 void __C(CHIP,_mem_read_raw_multi_8)(void *, 183 bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t); 184 185 /* write multiple raw */ 186 void __C(CHIP,_mem_write_raw_multi_2)(void *, 187 bus_space_handle_t, bus_size_t, const u_int8_t *, 188 bus_size_t); 189 void __C(CHIP,_mem_write_raw_multi_4)(void *, 190 bus_space_handle_t, bus_size_t, const u_int8_t *, 191 bus_size_t); 192 void __C(CHIP,_mem_write_raw_multi_8)(void *, 193 bus_space_handle_t, bus_size_t, const u_int8_t *, 194 bus_size_t); 195 196 void 197 __C(CHIP,_bus_mem_init)(t, v) 198 bus_space_tag_t t; 199 void *v; 200 { 201 struct extent *dex, *sex; 202 203 /* 204 * Initialize the bus space tag. 205 */ 206 207 /* cookie */ 208 t->abs_cookie = v; 209 210 /* mapping/unmapping */ 211 t->abs_map = __C(CHIP,_mem_map); 212 t->abs_unmap = __C(CHIP,_mem_unmap); 213 t->abs_subregion = __C(CHIP,_mem_subregion); 214 215 /* allocation/deallocation */ 216 t->abs_alloc = __C(CHIP,_mem_alloc); 217 t->abs_free = __C(CHIP,_mem_free); 218 219 /* get kernel virtual address */ 220 t->abs_vaddr = __C(CHIP,_mem_vaddr); 221 /* barrier */ 222 t->abs_barrier = __C(CHIP,_mem_barrier); 223 224 /* read (single) */ 225 t->abs_r_1 = __C(CHIP,_mem_read_1); 226 t->abs_r_2 = __C(CHIP,_mem_read_2); 227 t->abs_r_4 = __C(CHIP,_mem_read_4); 228 t->abs_r_8 = __C(CHIP,_mem_read_8); 229 230 /* read multiple */ 231 t->abs_rm_1 = __C(CHIP,_mem_read_multi_1); 232 t->abs_rm_2 = __C(CHIP,_mem_read_multi_2); 233 t->abs_rm_4 = __C(CHIP,_mem_read_multi_4); 234 t->abs_rm_8 = __C(CHIP,_mem_read_multi_8); 235 236 /* read region */ 237 t->abs_rr_1 = __C(CHIP,_mem_read_region_1); 238 t->abs_rr_2 = __C(CHIP,_mem_read_region_2); 239 t->abs_rr_4 = __C(CHIP,_mem_read_region_4); 240 t->abs_rr_8 = __C(CHIP,_mem_read_region_8); 241 242 /* write (single) */ 243 t->abs_w_1 = __C(CHIP,_mem_write_1); 244 t->abs_w_2 = __C(CHIP,_mem_write_2); 245 t->abs_w_4 = __C(CHIP,_mem_write_4); 246 t->abs_w_8 = __C(CHIP,_mem_write_8); 247 248 /* write multiple */ 249 t->abs_wm_1 = __C(CHIP,_mem_write_multi_1); 250 t->abs_wm_2 = __C(CHIP,_mem_write_multi_2); 251 t->abs_wm_4 = __C(CHIP,_mem_write_multi_4); 252 t->abs_wm_8 = __C(CHIP,_mem_write_multi_8); 253 254 /* write region */ 255 t->abs_wr_1 = __C(CHIP,_mem_write_region_1); 256 t->abs_wr_2 = __C(CHIP,_mem_write_region_2); 257 t->abs_wr_4 = __C(CHIP,_mem_write_region_4); 258 t->abs_wr_8 = __C(CHIP,_mem_write_region_8); 259 260 /* set multiple */ 261 t->abs_sm_1 = __C(CHIP,_mem_set_multi_1); 262 t->abs_sm_2 = __C(CHIP,_mem_set_multi_2); 263 t->abs_sm_4 = __C(CHIP,_mem_set_multi_4); 264 t->abs_sm_8 = __C(CHIP,_mem_set_multi_8); 265 266 /* set region */ 267 t->abs_sr_1 = __C(CHIP,_mem_set_region_1); 268 t->abs_sr_2 = __C(CHIP,_mem_set_region_2); 269 t->abs_sr_4 = __C(CHIP,_mem_set_region_4); 270 t->abs_sr_8 = __C(CHIP,_mem_set_region_8); 271 272 /* copy */ 273 t->abs_c_1 = __C(CHIP,_mem_copy_1); 274 t->abs_c_2 = __C(CHIP,_mem_copy_2); 275 t->abs_c_4 = __C(CHIP,_mem_copy_4); 276 t->abs_c_8 = __C(CHIP,_mem_copy_8); 277 278 /* read multiple raw */ 279 t->abs_rrm_2 = __C(CHIP,_mem_read_raw_multi_2); 280 t->abs_rrm_4 = __C(CHIP,_mem_read_raw_multi_4); 281 t->abs_rrm_8 = __C(CHIP,_mem_read_raw_multi_8); 282 283 /* write multiple raw*/ 284 t->abs_wrm_2 = __C(CHIP,_mem_write_raw_multi_2); 285 t->abs_wrm_4 = __C(CHIP,_mem_write_raw_multi_4); 286 t->abs_wrm_8 = __C(CHIP,_mem_write_raw_multi_8); 287 288 /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */ 289 dex = extent_create(CHIP_EXTENT_DNAME(v), 0x0UL, 290 0xffffffffffffffffUL, M_DEVBUF, 291 (caddr_t)CHIP_EXTENT_DSTORAGE(v), 292 sizeof(CHIP_EXTENT_DSTORAGE(v)), EX_NOWAIT); 293 extent_alloc_region(dex, 0, 0xffffffffffffffffUL, EX_NOWAIT); 294 295 #ifdef CHIP_D_MEM_W1_BUS_START 296 #ifdef EXTENT_DEBUG 297 printf("dmem: freeing from 0x%lx to 0x%lx\n", 298 CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v)); 299 #endif 300 extent_free(dex, CHIP_D_MEM_W1_BUS_START(v), 301 CHIP_D_MEM_W1_BUS_END(v) - CHIP_D_MEM_W1_BUS_START(v) + 1, 302 EX_NOWAIT); 303 #endif 304 305 #ifdef EXTENT_DEBUG 306 extent_print(dex); 307 #endif 308 CHIP_D_MEM_EXTENT(v) = dex; 309 310 /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */ 311 sex = extent_create(CHIP_EXTENT_SNAME(v), 0x0UL, 312 0xffffffffffffffffUL, M_DEVBUF, 313 (caddr_t)CHIP_EXTENT_SSTORAGE(v), 314 sizeof(CHIP_EXTENT_SSTORAGE(v)), EX_NOWAIT); 315 extent_alloc_region(sex, 0, 0xffffffffffffffffUL, EX_NOWAIT); 316 317 #ifdef CHIP_S_MEM_W1_BUS_START 318 #ifdef EXTENT_DEBUG 319 printf("smem: freeing from 0x%lx to 0x%lx\n", 320 CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v)); 321 #endif 322 extent_free(sex, CHIP_S_MEM_W1_BUS_START(v), 323 CHIP_S_MEM_W1_BUS_END(v) - CHIP_S_MEM_W1_BUS_START(v) + 1, 324 EX_NOWAIT); 325 #endif 326 #ifdef CHIP_S_MEM_W2_BUS_START 327 if (CHIP_S_MEM_W2_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v)) { 328 #ifdef EXTENT_DEBUG 329 printf("smem: freeing from 0x%lx to 0x%lx\n", 330 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 331 #endif 332 extent_free(sex, CHIP_S_MEM_W2_BUS_START(v), 333 CHIP_S_MEM_W2_BUS_END(v) - CHIP_S_MEM_W2_BUS_START(v) + 1, 334 EX_NOWAIT); 335 } else { 336 #ifdef EXTENT_DEBUG 337 printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n", 338 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 339 #endif 340 } 341 #endif 342 #ifdef CHIP_S_MEM_W3_BUS_START 343 if (CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v) && 344 CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W2_BUS_START(v)) { 345 #ifdef EXTENT_DEBUG 346 printf("smem: freeing from 0x%lx to 0x%lx\n", 347 CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v)); 348 #endif 349 extent_free(sex, CHIP_S_MEM_W3_BUS_START(v), 350 CHIP_S_MEM_W3_BUS_END(v) - CHIP_S_MEM_W3_BUS_START(v) + 1, 351 EX_NOWAIT); 352 } else { 353 #ifdef EXTENT_DEBUG 354 printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n", 355 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 356 #endif 357 } 358 #endif 359 360 #ifdef EXTENT_DEBUG 361 extent_print(sex); 362 #endif 363 CHIP_S_MEM_EXTENT(v) = sex; 364 } 365 366 static int __C(CHIP,_xlate_addr_to_dense_handle)(void *, 367 bus_addr_t, bus_space_handle_t *); 368 static int __C(CHIP,_xlate_dense_handle_to_addr)(void *, 369 bus_space_handle_t, bus_addr_t *); 370 static int __C(CHIP,_xlate_addr_to_sparse_handle)(void *, 371 bus_addr_t, bus_space_handle_t *); 372 static int __C(CHIP,_xlate_sparse_handle_to_addr)(void *, 373 bus_space_handle_t, bus_addr_t *); 374 375 static int 376 __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, memhp) 377 void *v; 378 bus_addr_t memaddr; 379 bus_space_handle_t *memhp; 380 { 381 #ifdef CHIP_D_MEM_W1_BUS_START 382 if (memaddr >= CHIP_D_MEM_W1_BUS_START(v) && 383 memaddr <= CHIP_D_MEM_W1_BUS_END(v)) { 384 *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_SYS_START(v)) + 385 (memaddr - CHIP_D_MEM_W1_BUS_START(v)); 386 return (1); 387 } else 388 #endif 389 return (0); 390 } 391 392 static int 393 __C(CHIP,_xlate_dense_handle_to_addr)(v, memh, memaddrp) 394 void *v; 395 bus_space_handle_t memh; 396 bus_addr_t *memaddrp; 397 { 398 399 memh = ALPHA_K0SEG_TO_PHYS(memh); 400 401 #ifdef CHIP_D_MEM_W1_BUS_START 402 if (memh >= CHIP_D_MEM_W1_SYS_START(v) && 403 memh <= CHIP_D_MEM_W1_SYS_END(v)) { 404 *memaddrp = CHIP_D_MEM_W1_BUS_START(v) + 405 (memh - CHIP_D_MEM_W1_SYS_START(v)); 406 return (1); 407 } else 408 #endif 409 return (0); 410 } 411 412 static int 413 __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp) 414 void *v; 415 bus_addr_t memaddr; 416 bus_space_handle_t *memhp; 417 { 418 419 #ifdef CHIP_S_MEM_W1_BUS_START 420 if (memaddr >= CHIP_S_MEM_W1_BUS_START(v) && 421 memaddr <= CHIP_S_MEM_W1_BUS_END(v)) { 422 *memhp = 423 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >> 5) + 424 (memaddr - CHIP_S_MEM_W1_BUS_START(v)); 425 return (1); 426 } else 427 #endif 428 #ifdef CHIP_S_MEM_W2_BUS_START 429 if (memaddr >= CHIP_S_MEM_W2_BUS_START(v) && 430 memaddr <= CHIP_S_MEM_W2_BUS_END(v)) { 431 *memhp = 432 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >> 5) + 433 (memaddr - CHIP_S_MEM_W2_BUS_START(v)); 434 return (1); 435 } else 436 #endif 437 #ifdef CHIP_S_MEM_W3_BUS_START 438 if (memaddr >= CHIP_S_MEM_W3_BUS_START(v) && 439 memaddr <= CHIP_S_MEM_W3_BUS_END(v)) { 440 *memhp = 441 (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >> 5) + 442 (memaddr - CHIP_S_MEM_W3_BUS_START(v)); 443 return (1); 444 } else 445 #endif 446 return (0); 447 } 448 449 static int 450 __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, memaddrp) 451 void *v; 452 bus_space_handle_t memh; 453 bus_addr_t *memaddrp; 454 { 455 456 memh = ALPHA_K0SEG_TO_PHYS(memh << 5) >> 5; 457 458 #ifdef CHIP_S_MEM_W1_BUS_START 459 if ((memh << 5) >= CHIP_S_MEM_W1_SYS_START(v) && 460 (memh << 5) <= CHIP_S_MEM_W1_SYS_END(v)) { 461 *memaddrp = CHIP_S_MEM_W1_BUS_START(v) + 462 (memh - (CHIP_S_MEM_W1_SYS_START(v) >> 5)); 463 return (1); 464 } else 465 #endif 466 #ifdef CHIP_S_MEM_W2_BUS_START 467 if ((memh << 5) >= CHIP_S_MEM_W2_SYS_START(v) && 468 (memh << 5) <= CHIP_S_MEM_W2_SYS_END(v)) { 469 *memaddrp = CHIP_S_MEM_W2_BUS_START(v) + 470 (memh - (CHIP_S_MEM_W2_SYS_START(v) >> 5)); 471 return (1); 472 } else 473 #endif 474 #ifdef CHIP_S_MEM_W3_BUS_START 475 if ((memh << 5) >= CHIP_S_MEM_W3_SYS_START(v) && 476 (memh << 5) <= CHIP_S_MEM_W3_SYS_END(v)) { 477 *memaddrp = CHIP_S_MEM_W3_BUS_START(v) + 478 (memh - (CHIP_S_MEM_W3_SYS_START(v) >> 5)); 479 return (1); 480 } else 481 #endif 482 return (0); 483 } 484 485 int 486 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp) 487 void *v; 488 bus_addr_t memaddr; 489 bus_size_t memsize; 490 int flags; 491 bus_space_handle_t *memhp; 492 { 493 bus_space_handle_t dh = 0, sh = 0; /* XXX -Wuninitialized */ 494 int didd, dids, errord, errors, mustd, musts; 495 int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE; 496 int linear = flags & BUS_SPACE_MAP_LINEAR; 497 498 mustd = 1; 499 musts = prefetchable == 0; 500 501 /* 502 * We must have dense space to map memory linearly. 503 */ 504 if (linear && !prefetchable) 505 return (EOPNOTSUPP); 506 507 #ifdef EXTENT_DEBUG 508 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr, 509 memaddr + memsize - 1); 510 printf("mem: %s dense, %s sparse\n", mustd ? "need" : "want", 511 musts ? "need" : "want"); 512 #endif 513 errord = extent_alloc_region(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 514 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 515 didd = (errord == 0); 516 errors = extent_alloc_region(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 517 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); 518 dids = (errors == 0); 519 520 #ifdef EXTENT_DEBUG 521 if (!didd) 522 printf("mem: failed to get dense (%d)\n", errord); 523 if (!dids) 524 printf("mem: failed to get sparse (%d)\n", errors); 525 #endif 526 527 if ((mustd && !didd) || (musts && !dids)) 528 goto bad; 529 530 if (didd && !__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, &dh)) { 531 printf("\n"); 532 #ifdef CHIP_D_MEM_W1_BUS_START 533 printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 534 CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v)); 535 #endif 536 panic("%s: don't know how to map %lx cacheable", 537 __S(__C(CHIP,_mem_map)), memaddr); 538 } 539 540 if (dids && !__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, &sh)) { 541 printf("\n"); 542 #ifdef CHIP_S_MEM_W1_BUS_START 543 printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 544 CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v)); 545 #endif 546 #ifdef CHIP_S_MEM_W2_BUS_START 547 printf("%s: window[2]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 548 CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v)); 549 #endif 550 #ifdef CHIP_S_MEM_W3_BUS_START 551 printf("%s: window[3]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)), 552 CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v)); 553 #endif 554 panic("%s: don't know how to map %lx non-cacheable", 555 __S(__C(CHIP,_mem_map)), memaddr); 556 } 557 558 if (prefetchable) 559 *memhp = dh; 560 else 561 *memhp = sh; 562 return (0); 563 564 bad: 565 #ifdef EXTENT_DEBUG 566 printf("mem: failed\n"); 567 #endif 568 if (didd) { 569 #ifdef EXTENT_DEBUG 570 printf("mem: freeing dense\n"); 571 #endif 572 if (extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 573 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 574 printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n", 575 __S(__C(CHIP,_mem_map)), memaddr, 576 memaddr + memsize - 1); 577 } 578 } 579 if (dids) { 580 #ifdef EXTENT_DEBUG 581 printf("mem: freeing sparse\n"); 582 #endif 583 if (extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 584 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 585 printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n", 586 __S(__C(CHIP,_mem_map)), memaddr, 587 memaddr + memsize - 1); 588 } 589 } 590 591 #ifdef EXTENT_DEBUG 592 extent_print(CHIP_D_MEM_EXTENT(v)); 593 extent_print(CHIP_S_MEM_EXTENT(v)); 594 #endif 595 596 /* 597 * return dense error if we needed it but couldn't get it, else 598 * sparse error. The error _has_ to be one of the two... 599 */ 600 return (mustd && !didd ? errord : (musts && !dids ? errors : EINVAL)); 601 } 602 603 void 604 __C(CHIP,_mem_unmap)(v, memh, memsize) 605 void *v; 606 bus_space_handle_t memh; 607 bus_size_t memsize; 608 { 609 bus_addr_t memaddr; 610 bus_space_handle_t temph; 611 int sparse, haves, haved; 612 613 #ifdef EXTENT_DEBUG 614 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize); 615 #endif 616 617 /* 618 * Find out what space we're in. 619 */ 620 sparse = ((memh >> 63) == 0); 621 622 /* 623 * Find out what address we're in in that space. 624 */ 625 haves = haved = 0; 626 if (sparse) 627 haves = __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, 628 &memaddr); 629 else 630 haved = __C(CHIP,_xlate_dense_handle_to_addr)(v, memh, 631 &memaddr); 632 633 if (!haves && !haved) 634 panic("%s: couldn't get addr from %s handle 0x%lx", 635 __S(__C(CHIP,_mem_unmap)), sparse ? "sparse" : "dense", 636 memh); 637 638 /* 639 * Find out were/if that address lives in the other space. 640 */ 641 if (sparse) 642 haved = __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, 643 &temph); 644 else 645 haves = __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, 646 &temph); 647 648 /* 649 * Free any ranges we have. 650 */ 651 #ifdef EXTENT_DEBUG 652 printf("mem: it's at 0x%lx (%sdense, %ssparse)\n", memaddr, 653 haved ? "" : "not ", haves ? "" : "not "); 654 #endif 655 if (haved && extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize, 656 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 657 printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n", 658 __S(__C(CHIP,_mem_map)), memaddr, 659 memaddr + memsize - 1); 660 } 661 if (haves && extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize, 662 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) { 663 printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n", 664 __S(__C(CHIP,_mem_map)), memaddr, 665 memaddr + memsize - 1); 666 } 667 } 668 669 int 670 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh) 671 void *v; 672 bus_space_handle_t memh, *nmemh; 673 bus_size_t offset, size; 674 { 675 676 *nmemh = memh + offset; 677 return (0); 678 } 679 680 int 681 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags, 682 addrp, bshp) 683 void *v; 684 bus_addr_t rstart, rend, *addrp; 685 bus_size_t size, align, boundary; 686 int flags; 687 bus_space_handle_t *bshp; 688 { 689 690 /* XXX XXX XXX XXX XXX XXX */ 691 panic("%s not implemented", __S(__C(CHIP,_mem_alloc))); 692 } 693 694 void 695 __C(CHIP,_mem_free)(v, bsh, size) 696 void *v; 697 bus_space_handle_t bsh; 698 bus_size_t size; 699 { 700 701 /* XXX XXX XXX XXX XXX XXX */ 702 panic("%s not implemented", __S(__C(CHIP,_mem_free))); 703 } 704 705 void * 706 __C(CHIP,_mem_vaddr)(v, bsh) 707 void *v; 708 bus_space_handle_t bsh; 709 { 710 /* 711 * XXX should check that the range was mapped 712 * with BUS_SPACE_MAP_LINEAR for sanity 713 */ 714 if ((bsh >> 63) != 0) 715 return ((void *)bsh); 716 717 return (0); 718 } 719 720 inline void 721 __C(CHIP,_mem_barrier)(v, h, o, l, f) 722 void *v; 723 bus_space_handle_t h; 724 bus_size_t o, l; 725 int f; 726 { 727 728 if ((f & BUS_SPACE_BARRIER_READ) != 0) 729 alpha_mb(); 730 else if ((f & BUS_SPACE_BARRIER_WRITE) != 0) 731 alpha_wmb(); 732 } 733 734 inline u_int8_t 735 __C(CHIP,_mem_read_1)(v, memh, off) 736 void *v; 737 bus_space_handle_t memh; 738 bus_size_t off; 739 { 740 register bus_space_handle_t tmpmemh; 741 register u_int32_t *port, val; 742 register u_int8_t rval; 743 register int offset; 744 745 alpha_mb(); 746 747 if ((memh >> 63) != 0) 748 return (*(u_int8_t *)(memh + off)); 749 750 tmpmemh = memh + off; 751 offset = tmpmemh & 3; 752 port = (u_int32_t *)((tmpmemh << 5) | (0 << 3)); 753 val = *port; 754 rval = ((val) >> (8 * offset)) & 0xff; 755 756 return rval; 757 } 758 759 inline u_int16_t 760 __C(CHIP,_mem_read_2)(v, memh, off) 761 void *v; 762 bus_space_handle_t memh; 763 bus_size_t off; 764 { 765 register bus_space_handle_t tmpmemh; 766 register u_int32_t *port, val; 767 register u_int16_t rval; 768 register int offset; 769 770 alpha_mb(); 771 772 if ((memh >> 63) != 0) 773 return (*(u_int16_t *)(memh + off)); 774 775 tmpmemh = memh + off; 776 offset = tmpmemh & 3; 777 port = (u_int32_t *)((tmpmemh << 5) | (1 << 3)); 778 val = *port; 779 rval = ((val) >> (8 * offset)) & 0xffff; 780 781 return rval; 782 } 783 784 inline u_int32_t 785 __C(CHIP,_mem_read_4)(v, memh, off) 786 void *v; 787 bus_space_handle_t memh; 788 bus_size_t off; 789 { 790 register bus_space_handle_t tmpmemh; 791 register u_int32_t *port, val; 792 register u_int32_t rval; 793 register int offset; 794 795 alpha_mb(); 796 797 if ((memh >> 63) != 0) 798 return (*(u_int32_t *)(memh + off)); 799 800 tmpmemh = memh + off; 801 offset = tmpmemh & 3; 802 port = (u_int32_t *)((tmpmemh << 5) | (3 << 3)); 803 val = *port; 804 #if 0 805 rval = ((val) >> (8 * offset)) & 0xffffffff; 806 #else 807 rval = val; 808 #endif 809 810 return rval; 811 } 812 813 inline u_int64_t 814 __C(CHIP,_mem_read_8)(v, memh, off) 815 void *v; 816 bus_space_handle_t memh; 817 bus_size_t off; 818 { 819 820 alpha_mb(); 821 822 if ((memh >> 63) != 0) 823 return (*(u_int64_t *)(memh + off)); 824 825 /* XXX XXX XXX */ 826 panic("%s not implemented", __S(__C(CHIP,_mem_read_8))); 827 } 828 829 #define CHIP_mem_read_multi_N(BYTES,TYPE) \ 830 void \ 831 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \ 832 void *v; \ 833 bus_space_handle_t h; \ 834 bus_size_t o, c; \ 835 TYPE *a; \ 836 { \ 837 \ 838 while (c-- > 0) { \ 839 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 840 BUS_SPACE_BARRIER_READ); \ 841 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 842 } \ 843 } 844 CHIP_mem_read_multi_N(1,u_int8_t) 845 CHIP_mem_read_multi_N(2,u_int16_t) 846 CHIP_mem_read_multi_N(4,u_int32_t) 847 CHIP_mem_read_multi_N(8,u_int64_t) 848 849 #define CHIP_mem_read_region_N(BYTES,TYPE) \ 850 void \ 851 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \ 852 void *v; \ 853 bus_space_handle_t h; \ 854 bus_size_t o, c; \ 855 TYPE *a; \ 856 { \ 857 \ 858 while (c-- > 0) { \ 859 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 860 o += sizeof *a; \ 861 } \ 862 } 863 CHIP_mem_read_region_N(1,u_int8_t) 864 CHIP_mem_read_region_N(2,u_int16_t) 865 CHIP_mem_read_region_N(4,u_int32_t) 866 CHIP_mem_read_region_N(8,u_int64_t) 867 868 inline void 869 __C(CHIP,_mem_write_1)(v, memh, off, val) 870 void *v; 871 bus_space_handle_t memh; 872 bus_size_t off; 873 u_int8_t val; 874 { 875 register bus_space_handle_t tmpmemh; 876 register u_int32_t *port, nval; 877 register int offset; 878 879 if ((memh >> 63) != 0) 880 (*(u_int8_t *)(memh + off)) = val; 881 else { 882 tmpmemh = memh + off; 883 offset = tmpmemh & 3; 884 nval = val << (8 * offset); 885 port = (u_int32_t *)((tmpmemh << 5) | (0 << 3)); 886 *port = nval; 887 } 888 alpha_mb(); 889 } 890 891 inline void 892 __C(CHIP,_mem_write_2)(v, memh, off, val) 893 void *v; 894 bus_space_handle_t memh; 895 bus_size_t off; 896 u_int16_t val; 897 { 898 register bus_space_handle_t tmpmemh; 899 register u_int32_t *port, nval; 900 register int offset; 901 902 if ((memh >> 63) != 0) 903 (*(u_int16_t *)(memh + off)) = val; 904 else { 905 tmpmemh = memh + off; 906 offset = tmpmemh & 3; 907 nval = val << (8 * offset); 908 port = (u_int32_t *)((tmpmemh << 5) | (1 << 3)); 909 *port = nval; 910 } 911 alpha_mb(); 912 } 913 914 inline void 915 __C(CHIP,_mem_write_4)(v, memh, off, val) 916 void *v; 917 bus_space_handle_t memh; 918 bus_size_t off; 919 u_int32_t val; 920 { 921 register bus_space_handle_t tmpmemh; 922 register u_int32_t *port, nval; 923 register int offset; 924 925 if ((memh >> 63) != 0) 926 (*(u_int32_t *)(memh + off)) = val; 927 else { 928 tmpmemh = memh + off; 929 offset = tmpmemh & 3; 930 nval = val /*<< (8 * offset)*/; 931 port = (u_int32_t *)((tmpmemh << 5) | (3 << 3)); 932 *port = nval; 933 } 934 alpha_mb(); 935 } 936 937 inline void 938 __C(CHIP,_mem_write_8)(v, memh, off, val) 939 void *v; 940 bus_space_handle_t memh; 941 bus_size_t off; 942 u_int64_t val; 943 { 944 945 if ((memh >> 63) != 0) 946 (*(u_int64_t *)(memh + off)) = val; 947 else { 948 /* XXX XXX XXX */ 949 panic("%s not implemented", 950 __S(__C(CHIP,_mem_write_8))); 951 } 952 alpha_mb(); 953 } 954 955 #define CHIP_mem_write_multi_N(BYTES,TYPE) \ 956 void \ 957 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \ 958 void *v; \ 959 bus_space_handle_t h; \ 960 bus_size_t o, c; \ 961 const TYPE *a; \ 962 { \ 963 \ 964 while (c-- > 0) { \ 965 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 966 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \ 967 BUS_SPACE_BARRIER_WRITE); \ 968 } \ 969 } 970 CHIP_mem_write_multi_N(1,u_int8_t) 971 CHIP_mem_write_multi_N(2,u_int16_t) 972 CHIP_mem_write_multi_N(4,u_int32_t) 973 CHIP_mem_write_multi_N(8,u_int64_t) 974 975 #define CHIP_mem_write_region_N(BYTES,TYPE) \ 976 void \ 977 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \ 978 void *v; \ 979 bus_space_handle_t h; \ 980 bus_size_t o, c; \ 981 const TYPE *a; \ 982 { \ 983 \ 984 while (c-- > 0) { \ 985 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \ 986 o += sizeof *a; \ 987 } \ 988 } 989 CHIP_mem_write_region_N(1,u_int8_t) 990 CHIP_mem_write_region_N(2,u_int16_t) 991 CHIP_mem_write_region_N(4,u_int32_t) 992 CHIP_mem_write_region_N(8,u_int64_t) 993 994 #define CHIP_mem_set_multi_N(BYTES,TYPE) \ 995 void \ 996 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \ 997 void *v; \ 998 bus_space_handle_t h; \ 999 bus_size_t o, c; \ 1000 TYPE val; \ 1001 { \ 1002 \ 1003 while (c-- > 0) { \ 1004 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 1005 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \ 1006 BUS_SPACE_BARRIER_WRITE); \ 1007 } \ 1008 } 1009 CHIP_mem_set_multi_N(1,u_int8_t) 1010 CHIP_mem_set_multi_N(2,u_int16_t) 1011 CHIP_mem_set_multi_N(4,u_int32_t) 1012 CHIP_mem_set_multi_N(8,u_int64_t) 1013 1014 #define CHIP_mem_set_region_N(BYTES,TYPE) \ 1015 void \ 1016 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \ 1017 void *v; \ 1018 bus_space_handle_t h; \ 1019 bus_size_t o, c; \ 1020 TYPE val; \ 1021 { \ 1022 \ 1023 while (c-- > 0) { \ 1024 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \ 1025 o += sizeof val; \ 1026 } \ 1027 } 1028 CHIP_mem_set_region_N(1,u_int8_t) 1029 CHIP_mem_set_region_N(2,u_int16_t) 1030 CHIP_mem_set_region_N(4,u_int32_t) 1031 CHIP_mem_set_region_N(8,u_int64_t) 1032 1033 #define CHIP_mem_copy_N(BYTES) \ 1034 void \ 1035 __C(__C(CHIP,_mem_copy_),BYTES)(v, h1, o1, h2, o2, c) \ 1036 void *v; \ 1037 bus_space_handle_t h1, h2; \ 1038 bus_size_t o1, o2, c; \ 1039 { \ 1040 bus_size_t i, o; \ 1041 \ 1042 if ((h1 >> 63) != 0 && (h2 >> 63) != 0) { \ 1043 bcopy((void *)(h1 + o1), (void *)(h2 + o2), c * BYTES); \ 1044 return; \ 1045 } \ 1046 \ 1047 /* Circumvent a common case of overlapping problems */ \ 1048 if (h1 == h2 && o2 > o1) \ 1049 for (i = 0, o = (c - 1) * BYTES; i < c; i++, o -= BYTES)\ 1050 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 1051 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));\ 1052 else \ 1053 for (i = 0, o = 0; i < c; i++, o += BYTES) \ 1054 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \ 1055 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));\ 1056 } 1057 CHIP_mem_copy_N(1) 1058 CHIP_mem_copy_N(2) 1059 CHIP_mem_copy_N(4) 1060 CHIP_mem_copy_N(8) 1061 1062 #define CHIP_mem_read_raw_multi_N(BYTES,TYPE) \ 1063 void \ 1064 __C(__C(CHIP,_mem_read_raw_multi_),BYTES)(v, h, o, a, c) \ 1065 void *v; \ 1066 bus_space_handle_t h; \ 1067 bus_size_t o, c; \ 1068 u_int8_t *a; \ 1069 { \ 1070 TYPE temp; \ 1071 int i; \ 1072 \ 1073 while (c > 0) { \ 1074 __C(CHIP,_mem_barrier)(v, h, o, BYTES, \ 1075 BUS_SPACE_BARRIER_READ); \ 1076 temp = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \ 1077 i = MIN(c, BYTES); \ 1078 c -= i; \ 1079 while (i--) { \ 1080 *a++ = temp & 0xff; \ 1081 temp >>= 8; \ 1082 } \ 1083 } \ 1084 } 1085 CHIP_mem_read_raw_multi_N(2,u_int16_t) 1086 CHIP_mem_read_raw_multi_N(4,u_int32_t) 1087 CHIP_mem_read_raw_multi_N(8,u_int64_t) 1088 1089 #define CHIP_mem_write_raw_multi_N(BYTES,TYPE) \ 1090 void \ 1091 __C(__C(CHIP,_mem_write_raw_multi_),BYTES)(v, h, o, a, c) \ 1092 void *v; \ 1093 bus_space_handle_t h; \ 1094 bus_size_t o, c; \ 1095 const u_int8_t *a; \ 1096 { \ 1097 TYPE temp; \ 1098 int i; \ 1099 \ 1100 while (c > 0) { \ 1101 temp = 0; \ 1102 for (i = BYTES - 1; i >= 0; i--) { \ 1103 temp <<= 8; \ 1104 if (i < c) \ 1105 temp |= *(a + i); \ 1106 } \ 1107 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, temp); \ 1108 __C(CHIP,_mem_barrier)(v, h, o, BYTES, \ 1109 BUS_SPACE_BARRIER_WRITE); \ 1110 i = MIN(c, BYTES); \ 1111 c -= i; \ 1112 a += i; \ 1113 } \ 1114 } 1115 CHIP_mem_write_raw_multi_N(2,u_int16_t) 1116 CHIP_mem_write_raw_multi_N(4,u_int32_t) 1117 CHIP_mem_write_raw_multi_N(8,u_int64_t) 1118