1 /* $OpenBSD: tc_3000_300.c,v 1.10 2003/05/13 21:32:17 deraadt Exp $ */ 2 /* $NetBSD: tc_3000_300.c,v 1.26 2001/07/27 00:25:21 thorpej Exp $ */ 3 4 /* 5 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 6 * All rights reserved. 7 * 8 * Author: Chris G. Demetriou 9 * 10 * Permission to use, copy, modify and distribute this software and 11 * its documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 18 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 #include <sys/malloc.h> 35 36 #include <machine/autoconf.h> 37 #include <machine/pte.h> 38 #include <machine/intrcnt.h> 39 40 #include <dev/tc/tcvar.h> 41 #include <dev/tc/ioasicreg.h> 42 #include <alpha/tc/tc_conf.h> 43 #include <alpha/tc/tc_3000_300.h> 44 45 #include "wsdisplay.h" 46 #include "sfb.h" 47 48 #if NSFB > 0 49 extern int sfb_cnattach(tc_addr_t); 50 #endif 51 52 int tc_3000_300_intrnull(void *); 53 54 #define C(x) ((void *)(u_long)x) 55 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 56 57 /* 58 * We have to read and modify the IOASIC registers directly, because 59 * the TC option slot interrupt request and mask bits are stored there, 60 * and the ioasic code isn't initted when we need to frob some interrupt 61 * bits. 62 */ 63 #define DEC_3000_300_IOASIC_ADDR KV(0x1a0000000) 64 65 struct tc_slotdesc tc_3000_300_slots[] = { 66 { KV(0x100000000), C(TC_3000_300_DEV_OPT0), }, /* 0 - opt slot 0 */ 67 { KV(0x120000000), C(TC_3000_300_DEV_OPT1), }, /* 1 - opt slot 1 */ 68 { KV(0x140000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - unused */ 69 { KV(0x160000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - unused */ 70 { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 4 - TCDS ASIC */ 71 { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 5 - IOCTL ASIC */ 72 { KV(0x1c0000000), C(TC_3000_300_DEV_BOGUS), }, /* 6 - CXTurbo */ 73 }; 74 int tc_3000_300_nslots = 75 sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]); 76 77 struct tc_builtin tc_3000_300_builtins[] = { 78 { "PMAGB-BA", 6, 0x02000000, C(TC_3000_300_DEV_CXTURBO), }, 79 { "FLAMG-IO", 5, 0x00000000, C(TC_3000_300_DEV_IOASIC), }, 80 { "PMAZ-DS ", 4, 0x00000000, C(TC_3000_300_DEV_TCDS), }, 81 }; 82 int tc_3000_300_nbuiltins = 83 sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]); 84 85 struct tcintr { 86 int (*tci_func)(void *); 87 void *tci_arg; 88 struct evcnt tci_evcnt; 89 } tc_3000_300_intr[TC_3000_300_NCOOKIES]; 90 91 void 92 tc_3000_300_intr_setup() 93 { 94 volatile u_int32_t *imskp; 95 char *cp; 96 u_long i; 97 98 /* 99 * Disable all interrupts that we can (can't disable builtins). 100 */ 101 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 102 *imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1); 103 104 /* 105 * Set up interrupt handlers. 106 */ 107 for (i = 0; i < TC_3000_300_NCOOKIES; i++) { 108 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull; 109 tc_3000_300_intr[i].tci_arg = (void *)i; 110 111 cp = malloc(12, M_DEVBUF, M_NOWAIT); 112 if (cp == NULL) 113 panic("tc_3000_300_intr_setup"); 114 snprintf(cp, 12, "slot %lu", i); 115 #ifdef EVCNT_COUNTERS 116 evcnt_attach_dynamic(&tc_3000_300_intr[i].tci_evcnt, 117 EVCNT_TYPE_INTR, NULL, "tc", cp); 118 #endif 119 } 120 } 121 122 const struct evcnt * 123 tc_3000_300_intr_evcnt(tcadev, cookie) 124 struct device *tcadev; 125 void *cookie; 126 { 127 u_long dev = (u_long)cookie; 128 129 #ifdef DIAGNOSTIC 130 /* XXX bounds-check cookie. */ 131 #endif 132 133 return (&tc_3000_300_intr[dev].tci_evcnt); 134 } 135 136 void 137 tc_3000_300_intr_establish(tcadev, cookie, level, func, arg) 138 struct device *tcadev; 139 void *cookie, *arg; 140 tc_intrlevel_t level; 141 int (*func)(void *); 142 { 143 volatile u_int32_t *imskp; 144 u_long dev = (u_long)cookie; 145 146 #ifdef DIAGNOSTIC 147 /* XXX bounds-check cookie. */ 148 #endif 149 150 if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull) 151 panic("tc_3000_300_intr_establish: cookie %lu twice", dev); 152 153 tc_3000_300_intr[dev].tci_func = func; 154 tc_3000_300_intr[dev].tci_arg = arg; 155 156 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 157 switch (dev) { 158 case TC_3000_300_DEV_OPT0: 159 *imskp |= IOASIC_INTR_300_OPT0; 160 break; 161 case TC_3000_300_DEV_OPT1: 162 *imskp |= IOASIC_INTR_300_OPT1; 163 break; 164 default: 165 /* interrupts for builtins always enabled */ 166 break; 167 } 168 } 169 170 void 171 tc_3000_300_intr_disestablish(tcadev, cookie) 172 struct device *tcadev; 173 void *cookie; 174 { 175 volatile u_int32_t *imskp; 176 u_long dev = (u_long)cookie; 177 178 #ifdef DIAGNOSTIC 179 /* XXX bounds-check cookie. */ 180 #endif 181 182 if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull) 183 panic("tc_3000_300_intr_disestablish: cookie %lu bad intr", 184 dev); 185 186 imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 187 switch (dev) { 188 case TC_3000_300_DEV_OPT0: 189 *imskp &= ~IOASIC_INTR_300_OPT0; 190 break; 191 case TC_3000_300_DEV_OPT1: 192 *imskp &= ~IOASIC_INTR_300_OPT1; 193 break; 194 default: 195 /* interrupts for builtins always enabled */ 196 break; 197 } 198 199 tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull; 200 tc_3000_300_intr[dev].tci_arg = (void *)dev; 201 } 202 203 int 204 tc_3000_300_intrnull(val) 205 void *val; 206 { 207 208 panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld", 209 (u_long)val); 210 } 211 212 void 213 tc_3000_300_iointr(arg, vec) 214 void *arg; 215 unsigned long vec; 216 { 217 u_int32_t tcir, ioasicir, ioasicimr; 218 int ifound; 219 220 #ifdef DIAGNOSTIC 221 int s; 222 if (vec != 0x800) 223 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec); 224 s = splhigh(); 225 if (s != ALPHA_PSL_IPL_IO) 226 panic("INVALID ASSUMPTION: IPL %d, not %d", s, 227 ALPHA_PSL_IPL_IO); 228 splx(s); 229 #endif 230 231 do { 232 tc_syncbus(); 233 234 /* find out what interrupts/errors occurred */ 235 tcir = *(volatile u_int32_t *)TC_3000_300_IR; 236 ioasicir = *(volatile u_int32_t *) 237 (DEC_3000_300_IOASIC_ADDR + IOASIC_INTR); 238 ioasicimr = *(volatile u_int32_t *) 239 (DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK); 240 tc_mb(); 241 242 /* Ignore interrupts that aren't enabled out. */ 243 ioasicir &= ioasicimr; 244 245 /* clear the interrupts/errors we found. */ 246 *(volatile u_int32_t *)TC_3000_300_IR = tcir; 247 /* XXX can't clear TC option slot interrupts here? */ 248 tc_wmb(); 249 250 ifound = 0; 251 252 #ifdef EVCNT_COUNTERS 253 #define INCRINTRCNT(slot) tc_3000_300_intr[slot].tci_evcnt.ev_count++ 254 #else 255 #define INCRINTRCNT(slot) intrcnt[INTRCNT_KN16 + slot]++ 256 #endif 257 258 #define CHECKINTR(slot, flag) \ 259 if (flag) { \ 260 ifound = 1; \ 261 INCRINTRCNT(slot); \ 262 (*tc_3000_300_intr[slot].tci_func) \ 263 (tc_3000_300_intr[slot].tci_arg); \ 264 } 265 /* Do them in order of priority; highest slot # first. */ 266 CHECKINTR(TC_3000_300_DEV_CXTURBO, 267 tcir & TC_3000_300_IR_CXTURBO); 268 CHECKINTR(TC_3000_300_DEV_IOASIC, 269 (tcir & TC_3000_300_IR_IOASIC) && 270 (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0))); 271 CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS); 272 CHECKINTR(TC_3000_300_DEV_OPT1, 273 ioasicir & IOASIC_INTR_300_OPT1); 274 CHECKINTR(TC_3000_300_DEV_OPT0, 275 ioasicir & IOASIC_INTR_300_OPT0); 276 #undef CHECKINTR 277 278 #ifdef DIAGNOSTIC 279 #define PRINTINTR(msg, bits) \ 280 if (tcir & bits) \ 281 printf(msg); 282 PRINTINTR("BCache tag parity error\n", 283 TC_3000_300_IR_BCTAGPARITY); 284 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN); 285 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT); 286 PRINTINTR("Bcache parity error\n", 287 TC_3000_300_IR_BCACHEPARITY); 288 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY); 289 #undef PRINTINTR 290 #endif 291 } while (ifound); 292 } 293 294 #if NWSDISPLAY > 0 295 /* 296 * tc_3000_300_fb_cnattach -- 297 * Attempt to map the CTB output device to a slot and attach the 298 * framebuffer as the output side of the console. 299 */ 300 int 301 tc_3000_300_fb_cnattach(turbo_slot) 302 u_int64_t turbo_slot; 303 { 304 u_int32_t output_slot; 305 306 output_slot = turbo_slot & 0xffffffff; 307 308 if (output_slot >= tc_3000_300_nslots) { 309 return EINVAL; 310 } 311 312 if (output_slot == 0) { 313 #if NSFB > 0 314 sfb_cnattach(KV(0x1c0000000) + 0x02000000); 315 return 0; 316 #else 317 return ENXIO; 318 #endif 319 } 320 321 return tc_fb_cnattach(tc_3000_300_slots[output_slot-1].tcs_addr); 322 } 323 #endif /* NWSDISPLAY */ 324