1 /* $OpenBSD: tc_3000_500.c,v 1.21 2017/11/02 14:04:24 mpi Exp $ */ 2 /* $NetBSD: tc_3000_500.c,v 1.24 2001/07/27 00:25:21 thorpej Exp $ */ 3 4 /* 5 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 6 * All rights reserved. 7 * 8 * Author: Chris G. Demetriou 9 * 10 * Permission to use, copy, modify and distribute this software and 11 * its documentation is hereby granted, provided that both the copyright 12 * notice and this permission notice appear in all copies of the 13 * software, derivative works or modified versions, and any portions 14 * thereof, and that both notices appear in supporting documentation. 15 * 16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 18 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * Carnegie Mellon requests users of this software to return to 21 * 22 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 23 * School of Computer Science 24 * Carnegie Mellon University 25 * Pittsburgh PA 15213-3890 26 * 27 * any improvements or extensions that they make and grant Carnegie the 28 * rights to redistribute these changes. 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 #include <sys/malloc.h> 35 36 #include <machine/autoconf.h> 37 #include <machine/pte.h> 38 #include <machine/rpb.h> 39 40 #include <dev/tc/tcvar.h> 41 #include <alpha/tc/tc_conf.h> 42 #include <alpha/tc/tc_3000_500.h> 43 44 #include "wsdisplay.h" 45 46 int tc_3000_500_intrnull(void *); 47 int tc_3000_500_fb_cnattach(u_int64_t); 48 49 #define C(x) ((void *)(u_long)x) 50 #define KV(x) (ALPHA_PHYS_TO_K0SEG(x)) 51 52 struct tc_slotdesc tc_3000_500_slots[] = { 53 { KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */ 54 { KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */ 55 { KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */ 56 { KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */ 57 { KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */ 58 { KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */ 59 { KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */ 60 { KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */ 61 }; 62 int tc_3000_500_nslots = 63 sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]); 64 65 struct tc_builtin tc_3000_500_graphics_builtins[] = { 66 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 67 { "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), }, 68 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 69 }; 70 int tc_3000_500_graphics_nbuiltins = sizeof(tc_3000_500_graphics_builtins) / 71 sizeof(tc_3000_500_graphics_builtins[0]); 72 73 struct tc_builtin tc_3000_500_nographics_builtins[] = { 74 { "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), }, 75 { "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), }, 76 }; 77 int tc_3000_500_nographics_nbuiltins = sizeof(tc_3000_500_nographics_builtins) / 78 sizeof(tc_3000_500_nographics_builtins[0]); 79 80 u_int32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = { 81 TC_3000_500_IR_OPT0, 82 TC_3000_500_IR_OPT1, 83 TC_3000_500_IR_OPT2, 84 TC_3000_500_IR_OPT3, 85 TC_3000_500_IR_OPT4, 86 TC_3000_500_IR_OPT5, 87 TC_3000_500_IR_TCDS, 88 TC_3000_500_IR_IOASIC, 89 TC_3000_500_IR_CXTURBO, 90 }; 91 92 struct tcintr { 93 int (*tci_func)(void *); 94 void *tci_arg; 95 int tci_level; 96 struct evcount tci_count; 97 } tc_3000_500_intr[TC_3000_500_NCOOKIES]; 98 99 u_int32_t tc_3000_500_imask; /* intrs we want to ignore; mirrors IMR. */ 100 101 void 102 tc_3000_500_intr_setup() 103 { 104 u_long i; 105 106 /* 107 * Disable all slot interrupts. Note that this cannot 108 * actually disable CXTurbo, TCDS, and IOASIC interrupts. 109 */ 110 tc_3000_500_imask = *(volatile u_int32_t *)TC_3000_500_IMR_READ; 111 for (i = 0; i < TC_3000_500_NCOOKIES; i++) 112 tc_3000_500_imask |= tc_3000_500_intrbits[i]; 113 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 114 tc_mb(); 115 116 /* 117 * Set up interrupt handlers. 118 */ 119 for (i = 0; i < TC_3000_500_NCOOKIES; i++) { 120 tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull; 121 tc_3000_500_intr[i].tci_arg = (void *)i; 122 tc_3000_500_intr[i].tci_level = IPL_HIGH; 123 } 124 } 125 126 void 127 tc_3000_500_intr_establish(tcadev, cookie, level, func, arg, name) 128 struct device *tcadev; 129 void *cookie, *arg; 130 int level; 131 int (*func)(void *); 132 const char *name; 133 { 134 u_long dev = (u_long)cookie; 135 136 #ifdef DIAGNOSTIC 137 /* XXX bounds-check cookie. */ 138 #endif 139 140 if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull) 141 panic("tc_3000_500_intr_establish: cookie %lu twice", dev); 142 143 tc_3000_500_intr[dev].tci_func = func; 144 tc_3000_500_intr[dev].tci_arg = arg; 145 tc_3000_500_intr[dev].tci_level = level; 146 if (name != NULL) 147 evcount_attach(&tc_3000_500_intr[dev].tci_count, name, NULL); 148 149 tc_3000_500_imask &= ~tc_3000_500_intrbits[dev]; 150 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 151 tc_mb(); 152 } 153 154 void 155 tc_3000_500_intr_disestablish(tcadev, cookie, name) 156 struct device *tcadev; 157 void *cookie; 158 const char *name; 159 { 160 u_long dev = (u_long)cookie; 161 162 #ifdef DIAGNOSTIC 163 /* XXX bounds-check cookie. */ 164 #endif 165 166 if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull) 167 panic("tc_3000_500_intr_disestablish: cookie %lu bad intr", 168 dev); 169 170 tc_3000_500_imask |= tc_3000_500_intrbits[dev]; 171 *(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask; 172 tc_mb(); 173 174 tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull; 175 tc_3000_500_intr[dev].tci_arg = (void *)dev; 176 tc_3000_500_intr[dev].tci_level = IPL_HIGH; 177 if (name != NULL) 178 evcount_detach(&tc_3000_500_intr[dev].tci_count); 179 } 180 181 int 182 tc_3000_500_intrnull(val) 183 void *val; 184 { 185 186 panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld", 187 (u_long)val); 188 } 189 190 void 191 tc_3000_500_iointr(arg, vec) 192 void *arg; 193 unsigned long vec; 194 { 195 u_int32_t ir; 196 int ifound; 197 198 do { 199 tc_syncbus(); 200 ir = *(volatile u_int32_t *)TC_3000_500_IR_CLEAR; 201 202 /* Ignore interrupts that we haven't enabled. */ 203 ir &= ~(tc_3000_500_imask & 0x1ff); 204 205 ifound = 0; 206 207 #ifdef MULTIPROCESSOR 208 #define INTRLOCK(slot) \ 209 if (tc_3000_500_intr[slot].tci_level < IPL_CLOCK) \ 210 __mp_lock(&kernel_lock) 211 #define INTRUNLOCK(slot) \ 212 if (tc_3000_500_intr[slot].tci_level < IPL_CLOCK) \ 213 __mp_unlock(&kernel_lock) 214 #else 215 #define INTRLOCK(slot) do { } while (0) 216 #define INTRUNLOCK(slot) do { } while (0) 217 #endif 218 #define CHECKINTR(slot) \ 219 if (ir & tc_3000_500_intrbits[slot]) { \ 220 ifound = 1; \ 221 INTRLOCK(slot); \ 222 (*tc_3000_500_intr[slot].tci_func) \ 223 (tc_3000_500_intr[slot].tci_arg); \ 224 tc_3000_500_intr[slot].tci_count.ec_count++; \ 225 INTRUNLOCK(slot); \ 226 } 227 228 /* Do them in order of priority; highest slot # first. */ 229 CHECKINTR(TC_3000_500_DEV_CXTURBO); 230 CHECKINTR(TC_3000_500_DEV_IOASIC); 231 CHECKINTR(TC_3000_500_DEV_TCDS); 232 CHECKINTR(TC_3000_500_DEV_OPT5); 233 CHECKINTR(TC_3000_500_DEV_OPT4); 234 CHECKINTR(TC_3000_500_DEV_OPT3); 235 CHECKINTR(TC_3000_500_DEV_OPT2); 236 CHECKINTR(TC_3000_500_DEV_OPT1); 237 CHECKINTR(TC_3000_500_DEV_OPT0); 238 239 #undef INTRUNLOCK 240 #undef INTRLOCK 241 #undef CHECKINTR 242 243 #ifdef DIAGNOSTIC 244 #define PRINTINTR(msg, bits) \ 245 if (ir & bits) \ 246 printf(msg); 247 248 PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2); 249 PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE); 250 PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K); 251 PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET); 252 PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR); 253 PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG); 254 PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE); 255 PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE); 256 PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT); 257 PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK); 258 PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR); 259 PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG); 260 PRINTINTR("Scatter/gather parity error\n", 261 TC_3000_500_IR_SGPAR); 262 263 #undef PRINTINTR 264 #endif 265 } while (ifound); 266 } 267 268 #if NWSDISPLAY > 0 269 /* 270 * tc_3000_500_fb_cnattach -- 271 * Attempt to map the CTB output device to a slot and attach the 272 * framebuffer as the output side of the console. 273 */ 274 int 275 tc_3000_500_fb_cnattach(turbo_slot) 276 u_int64_t turbo_slot; 277 { 278 u_int32_t output_slot; 279 280 output_slot = turbo_slot & 0xffffffff; 281 282 if (output_slot >= tc_3000_500_nslots) { 283 return EINVAL; 284 } 285 286 if (hwrpb->rpb_variation & SV_GRAPHICS) { 287 if (output_slot == 0) { 288 return ENXIO; 289 } 290 } else { 291 /* 292 * Slots 0-2 in the tc_3000_500_slots array are only 293 * on the 500 models that also have the CXTurbo 294 * (500/800/900) and a total of 6 TC slots. For the 295 * 400/600/700, slots 0-2 are in table locations 3-5, so 296 * offset the CTB slot by 3 to get the address in our table. 297 */ 298 output_slot += 3; 299 } 300 return tc_fb_cnattach(tc_3000_500_slots[output_slot-1].tcs_addr); 301 } 302 #endif /* NWSDISPLAY */ 303 304 /* 305 * tc_3000_500_ioslot -- 306 * Set the PBS bits for devices on the TC. 307 */ 308 void 309 tc_3000_500_ioslot(slot, flags, set) 310 u_int32_t slot, flags; 311 int set; 312 { 313 volatile u_int32_t *iosp; 314 u_int32_t ios; 315 int s; 316 317 iosp = (volatile u_int32_t *)TC_3000_500_IOSLOT; 318 ios = *iosp; 319 flags <<= (slot * 3); 320 if (set) 321 ios |= flags; 322 else 323 ios &= ~flags; 324 s = splhigh(); 325 *iosp = ios; 326 tc_mb(); 327 splx(s); 328 } 329 330 int 331 tc_3000_500_activate(struct device *self, int act) 332 { 333 int rc = config_activate_children(self, act); 334 int slot; 335 336 /* 337 * Reset all slots to non-sgmap when halting. 338 */ 339 if (act == DVACT_POWERDOWN) { 340 for (slot = 0; slot < tc_3000_500_nslots; slot++) 341 tc_3000_500_ioslot(slot, IOSLOT_S, 0); 342 } 343 344 return rc; 345 } 346