1 /* $OpenBSD: cpu.h,v 1.164 2024/04/03 02:01:21 guenther Exp $ */ 2 /* $NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_CPU_H_ 39 #define _MACHINE_CPU_H_ 40 41 /* 42 * Definitions unique to x86-64 cpu support. 43 */ 44 #ifdef _KERNEL 45 #include <machine/frame.h> 46 #include <machine/segments.h> /* USERMODE */ 47 #include <machine/intrdefs.h> 48 #endif /* _KERNEL */ 49 50 #include <sys/clockintr.h> 51 #include <sys/device.h> 52 #include <sys/rwlock.h> 53 #include <sys/sched.h> 54 #include <sys/sensors.h> 55 #include <sys/srp.h> 56 57 #ifdef _KERNEL 58 59 /* VMXON region (Intel) */ 60 struct vmxon_region { 61 uint32_t vr_revision; 62 }; 63 64 /* 65 * VMX for Intel CPUs 66 */ 67 struct vmx { 68 uint64_t vmx_cr0_fixed0; 69 uint64_t vmx_cr0_fixed1; 70 uint64_t vmx_cr4_fixed0; 71 uint64_t vmx_cr4_fixed1; 72 uint32_t vmx_vmxon_revision; 73 uint32_t vmx_msr_table_size; 74 uint32_t vmx_cr3_tgt_count; 75 uint64_t vmx_vm_func; 76 uint8_t vmx_has_l1_flush_msr; 77 }; 78 79 /* 80 * SVM for AMD CPUs 81 */ 82 struct svm { 83 uint32_t svm_max_asid; 84 uint8_t svm_flush_by_asid; 85 uint8_t svm_vmcb_clean; 86 uint8_t svm_decode_assist; 87 }; 88 89 union vmm_cpu_cap { 90 struct vmx vcc_vmx; 91 struct svm vcc_svm; 92 }; 93 94 enum cpu_vendor { 95 CPUV_UNKNOWN, 96 CPUV_AMD, 97 CPUV_INTEL, 98 CPUV_VIA, 99 }; 100 101 /* 102 * Locks used to protect struct members in this file: 103 * I immutable after creation 104 * a atomic operations 105 * o owned (read/modified only) by this CPU 106 */ 107 struct x86_64_tss; 108 struct vcpu; 109 struct cpu_info { 110 /* 111 * The beginning of this structure in mapped in the userspace "u-k" 112 * page tables, so that these first couple members can be accessed 113 * from the trampoline code. The ci_PAGEALIGN member defines where 114 * the part that is *not* visible begins, so don't put anything 115 * above it that must be kept hidden from userspace! 116 */ 117 u_int64_t ci_kern_cr3; /* [o] U+K page table */ 118 u_int64_t ci_scratch; /* [o] for U<-->K transition */ 119 120 #define ci_PAGEALIGN ci_dev 121 struct device *ci_dev; /* [I] */ 122 struct cpu_info *ci_self; /* [I] */ 123 struct cpu_info *ci_next; /* [I] */ 124 125 u_int ci_cpuid; /* [I] */ 126 u_int ci_apicid; /* [I] */ 127 u_int ci_acpi_proc_id; /* [I] */ 128 u_int32_t ci_randseed; /* [o] */ 129 130 u_int64_t ci_kern_rsp; /* [o] kernel-only stack */ 131 u_int64_t ci_intr_rsp; /* [o] U<-->K trampoline stack */ 132 u_int64_t ci_user_cr3; /* [o] U-K page table */ 133 134 /* bits for mitigating Micro-architectural Data Sampling */ 135 char ci_mds_tmp[32]; /* [o] 32byte aligned */ 136 void *ci_mds_buf; /* [I] */ 137 138 struct proc *ci_curproc; /* [o] */ 139 struct schedstate_percpu ci_schedstate; /* scheduler state */ 140 141 struct pmap *ci_proc_pmap; /* active, non-kernel pmap */ 142 struct pmap *ci_user_pmap; /* [o] last pmap used in userspace */ 143 struct pcb *ci_curpcb; /* [o] */ 144 struct pcb *ci_idle_pcb; /* [o] */ 145 146 u_int ci_pflags; /* [o] */ 147 #define CPUPF_USERSEGS 0x01 /* CPU has curproc's segs and FS.base */ 148 #define CPUPF_USERXSTATE 0x02 /* CPU has curproc's xsave state */ 149 150 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 151 u_int64_t ci_ipending; 152 int ci_ilevel; 153 int ci_idepth; 154 int ci_handled_intr_level; 155 u_int64_t ci_imask[NIPL]; 156 u_int64_t ci_iunmask[NIPL]; 157 #ifdef DIAGNOSTIC 158 int ci_mutex_level; 159 #endif 160 161 volatile u_int ci_flags; /* [a] */ 162 u_int32_t ci_ipis; /* [a] */ 163 164 enum cpu_vendor ci_vendor; /* [I] mapped from cpuid(0) */ 165 u_int32_t ci_cpuid_level; /* [I] cpuid(0).eax */ 166 u_int32_t ci_feature_flags; /* [I] */ 167 u_int32_t ci_feature_eflags; /* [I] */ 168 u_int32_t ci_feature_sefflags_ebx;/* [I] */ 169 u_int32_t ci_feature_sefflags_ecx;/* [I] */ 170 u_int32_t ci_feature_sefflags_edx;/* [I] */ 171 u_int32_t ci_feature_amdspec_ebx; /* [I] */ 172 u_int32_t ci_feature_tpmflags; /* [I] */ 173 u_int32_t ci_pnfeatset; /* [I] */ 174 u_int32_t ci_efeature_eax; /* [I] */ 175 u_int32_t ci_efeature_ecx; /* [I] */ 176 u_int32_t ci_brand[12]; /* [I] */ 177 u_int32_t ci_signature; /* [I] */ 178 u_int32_t ci_family; /* [I] */ 179 u_int32_t ci_model; /* [I] */ 180 u_int32_t ci_cflushsz; /* [I] */ 181 182 int ci_inatomic; /* [o] */ 183 184 #define __HAVE_CPU_TOPOLOGY 185 u_int32_t ci_smt_id; /* [I] */ 186 u_int32_t ci_core_id; /* [I] */ 187 u_int32_t ci_pkg_id; /* [I] */ 188 189 struct cpu_functions *ci_func; /* [I] */ 190 void (*cpu_setup)(struct cpu_info *); /* [I] */ 191 192 struct device *ci_acpicpudev; /* [I] */ 193 volatile u_int ci_mwait; /* [a] */ 194 #define MWAIT_IN_IDLE 0x1 /* don't need IPI to wake */ 195 #define MWAIT_KEEP_IDLING 0x2 /* cleared by other cpus to wake me */ 196 #define MWAIT_ONLY 0x4 /* set if all idle states use mwait */ 197 #define MWAIT_IDLING (MWAIT_IN_IDLE | MWAIT_KEEP_IDLING) 198 199 int ci_want_resched; 200 201 struct x86_64_tss *ci_tss; /* [o] */ 202 void *ci_gdt; /* [o] */ 203 204 volatile int ci_ddb_paused; 205 #define CI_DDB_RUNNING 0 206 #define CI_DDB_SHOULDSTOP 1 207 #define CI_DDB_STOPPED 2 208 #define CI_DDB_ENTERDDB 3 209 #define CI_DDB_INDDB 4 210 211 #ifdef MULTIPROCESSOR 212 struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM]; 213 #endif 214 215 struct ksensordev ci_sensordev; 216 struct ksensor ci_sensor; 217 struct ksensor ci_hz_sensor; 218 u_int64_t ci_hz_mperf; 219 u_int64_t ci_hz_aperf; 220 #if defined(GPROF) || defined(DDBPROF) 221 struct gmonparam *ci_gmon; 222 struct clockintr ci_gmonclock; 223 #endif 224 u_int32_t ci_vmm_flags; 225 #define CI_VMM_VMX (1 << 0) 226 #define CI_VMM_SVM (1 << 1) 227 #define CI_VMM_RVI (1 << 2) 228 #define CI_VMM_EPT (1 << 3) 229 #define CI_VMM_DIS (1 << 4) 230 union vmm_cpu_cap ci_vmm_cap; 231 paddr_t ci_vmxon_region_pa; 232 struct vmxon_region *ci_vmxon_region; 233 struct vcpu *ci_guest_vcpu; /* [o] last vcpu resumed */ 234 235 char ci_panicbuf[512]; 236 237 paddr_t ci_vmcs_pa; 238 struct rwlock ci_vmcs_lock; 239 240 struct clockqueue ci_queue; 241 }; 242 243 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 244 #define CPUF_AP 0x0002 /* CPU is an AP */ 245 #define CPUF_SP 0x0004 /* CPU is only processor */ 246 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 247 248 #define CPUF_IDENTIFY 0x0010 /* CPU may now identify */ 249 #define CPUF_IDENTIFIED 0x0020 /* CPU has been identified */ 250 251 #define CPUF_CONST_TSC 0x0040 /* CPU has constant TSC */ 252 #define CPUF_INVAR_TSC 0x0100 /* CPU has invariant TSC */ 253 254 #define CPUF_PRESENT 0x1000 /* CPU is present */ 255 #define CPUF_RUNNING 0x2000 /* CPU is running */ 256 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 257 #define CPUF_GO 0x8000 /* CPU should start running */ 258 #define CPUF_PARK 0x10000 /* CPU should self-park in real mode */ 259 #define CPUF_VMM 0x20000 /* CPU is executing in VMM mode */ 260 261 #define PROC_PC(p) ((p)->p_md.md_regs->tf_rip) 262 #define PROC_STACK(p) ((p)->p_md.md_regs->tf_rsp) 263 264 struct cpu_info_full; 265 extern struct cpu_info_full cpu_info_full_primary; 266 #define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + 4096*2 - offsetof(struct cpu_info, ci_PAGEALIGN))) 267 268 extern struct cpu_info *cpu_info_list; 269 270 #define CPU_INFO_ITERATOR int 271 #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \ 272 ci != NULL; ci = ci->ci_next) 273 274 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0) 275 276 /* 277 * Preempt the current process if in interrupt from user mode, 278 * or after the current trap/syscall if in system mode. 279 */ 280 extern void need_resched(struct cpu_info *); 281 #define clear_resched(ci) (ci)->ci_want_resched = 0 282 283 #if defined(MULTIPROCESSOR) 284 285 #define MAXCPUS 64 /* bitmask */ 286 287 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 288 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 289 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 290 291 #define curcpu() ({struct cpu_info *__ci; \ 292 asm volatile("movq %%gs:%P1,%0" : "=r" (__ci) \ 293 :"n" (offsetof(struct cpu_info, ci_self))); \ 294 __ci;}) 295 #define cpu_number() (curcpu()->ci_cpuid) 296 297 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 298 #define CPU_IS_RUNNING(ci) ((ci)->ci_flags & CPUF_RUNNING) 299 300 extern struct cpu_info *cpu_info[MAXCPUS]; 301 302 void cpu_boot_secondary_processors(void); 303 304 void cpu_kick(struct cpu_info *); 305 void cpu_unidle(struct cpu_info *); 306 307 #define CPU_BUSY_CYCLE() __asm volatile("pause": : : "memory") 308 309 #else /* !MULTIPROCESSOR */ 310 311 #define MAXCPUS 1 312 313 #ifdef _KERNEL 314 #define curcpu() (&cpu_info_primary) 315 316 #define cpu_kick(ci) 317 #define cpu_unidle(ci) 318 319 #define CPU_BUSY_CYCLE() do {} while (0) 320 321 #endif 322 323 /* 324 * definitions of cpu-dependent requirements 325 * referenced in generic code 326 */ 327 #define cpu_number() 0 328 #define CPU_IS_PRIMARY(ci) 1 329 #define CPU_IS_RUNNING(ci) 1 330 331 #endif /* MULTIPROCESSOR */ 332 333 #include <machine/cpufunc.h> 334 #include <machine/psl.h> 335 336 static inline unsigned int 337 cpu_rnd_messybits(void) 338 { 339 unsigned int hi, lo; 340 341 __asm volatile("rdtsc" : "=d" (hi), "=a" (lo)); 342 343 return (hi ^ lo); 344 } 345 346 #endif /* _KERNEL */ 347 348 #ifdef MULTIPROCESSOR 349 #include <sys/mplock.h> 350 #endif 351 352 #define aston(p) ((p)->p_md.md_astpending = 1) 353 354 #define curpcb curcpu()->ci_curpcb 355 356 /* 357 * Arguments to hardclock, softclock and statclock 358 * encapsulate the previous machine state in an opaque 359 * clockframe; for now, use generic intrframe. 360 */ 361 #define clockframe intrframe 362 363 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_rflags) 364 #define CLKF_PC(frame) ((frame)->if_rip) 365 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 366 367 /* 368 * Give a profiling tick to the current process when the user profiling 369 * buffer pages are invalid. On the i386, request an ast to send us 370 * through usertrap(), marking the proc as needing a profiling tick. 371 */ 372 #define need_proftick(p) aston(p) 373 374 void signotify(struct proc *); 375 376 /* 377 * We need a machine-independent name for this. 378 */ 379 extern void (*delay_func)(int); 380 void delay_fini(void (*)(int)); 381 void delay_init(void (*)(int), int); 382 struct timeval; 383 384 #define DELAY(x) (*delay_func)(x) 385 #define delay(x) (*delay_func)(x) 386 387 388 #ifdef _KERNEL 389 /* cpu.c */ 390 extern int cpu_feature; 391 extern int cpu_ebxfeature; 392 extern int cpu_ecxfeature; 393 extern int cpu_perf_eax; 394 extern int cpu_perf_ebx; 395 extern int cpu_perf_edx; 396 extern int cpu_apmi_edx; 397 extern int ecpu_ecxfeature; 398 extern int cpu_id; 399 extern char cpu_vendor[]; 400 extern int cpuid_level; 401 extern int cpu_meltdown; 402 extern u_int cpu_mwait_size; 403 extern u_int cpu_mwait_states; 404 405 /* cacheinfo.c */ 406 void x86_print_cacheinfo(struct cpu_info *); 407 408 /* identcpu.c */ 409 void identifycpu(struct cpu_info *); 410 int cpu_amd64speed(int *); 411 extern int cpuspeed; 412 413 /* machdep.c */ 414 void dumpconf(void); 415 void cpu_set_vendor(struct cpu_info *, int _level, const char *_vendor); 416 void cpu_reset(void); 417 void x86_64_proc0_tss_ldt_init(void); 418 void cpu_proc_fork(struct proc *, struct proc *); 419 int amd64_pa_used(paddr_t); 420 #define cpu_idle_enter() do { /* nothing */ } while (0) 421 extern void (*cpu_idle_cycle_fcn)(void); 422 #define cpu_idle_cycle() (*cpu_idle_cycle_fcn)() 423 #define cpu_idle_leave() do { /* nothing */ } while (0) 424 extern void (*initclock_func)(void); 425 extern void (*startclock_func)(void); 426 427 struct region_descriptor; 428 void lgdt(struct region_descriptor *); 429 430 struct pcb; 431 void savectx(struct pcb *); 432 void switch_exit(struct proc *, void (*)(struct proc *)); 433 void proc_trampoline(void); 434 435 /* clock.c */ 436 void startclocks(void); 437 void rtcinit(void); 438 void rtcstart(void); 439 void rtcstop(void); 440 void i8254_delay(int); 441 void i8254_initclocks(void); 442 void i8254_startclock(void); 443 void i8254_start_both_clocks(void); 444 void i8254_inittimecounter(void); 445 void i8254_inittimecounter_simple(void); 446 447 /* i8259.c */ 448 void i8259_default_setup(void); 449 450 void cpu_init_msrs(struct cpu_info *); 451 void cpu_fix_msrs(struct cpu_info *); 452 void cpu_tsx_disable(struct cpu_info *); 453 454 /* dkcsum.c */ 455 void dkcsumattach(void); 456 457 /* bus_machdep.c */ 458 void x86_bus_space_init(void); 459 void x86_bus_space_mallocok(void); 460 461 /* powernow-k8.c */ 462 void k8_powernow_init(struct cpu_info *); 463 void k8_powernow_setperf(int); 464 465 /* k1x-pstate.c */ 466 void k1x_init(struct cpu_info *); 467 void k1x_setperf(int); 468 469 void est_init(struct cpu_info *); 470 void est_setperf(int); 471 472 #ifdef MULTIPROCESSOR 473 /* mp_setperf.c */ 474 void mp_setperf_init(void); 475 #endif 476 477 #endif /* _KERNEL */ 478 479 /* 480 * CTL_MACHDEP definitions. 481 */ 482 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 483 #define CPU_BIOS 2 /* BIOS variables */ 484 #define CPU_BLK2CHR 3 /* convert blk maj into chr one */ 485 #define CPU_CHR2BLK 4 /* convert chr maj into blk one */ 486 #define CPU_ALLOWAPERTURE 5 /* allow mmap of /dev/xf86 */ 487 #define CPU_CPUVENDOR 6 /* cpuid vendor string */ 488 #define CPU_CPUID 7 /* cpuid */ 489 #define CPU_CPUFEATURE 8 /* cpuid features */ 490 #define CPU_KBDRESET 10 /* keyboard reset under pcvt */ 491 #define CPU_XCRYPT 12 /* supports VIA xcrypt in userland */ 492 #define CPU_LIDACTION 14 /* action caused by lid close */ 493 #define CPU_FORCEUKBD 15 /* Force ukbd(4) as console keyboard */ 494 #define CPU_TSCFREQ 16 /* TSC frequency */ 495 #define CPU_INVARIANTTSC 17 /* has invariant TSC */ 496 #define CPU_PWRACTION 18 /* action caused by power button */ 497 #define CPU_RETPOLINE 19 /* cpu requires retpoline pattern */ 498 #define CPU_MAXID 20 /* number of valid machdep ids */ 499 500 #define CTL_MACHDEP_NAMES { \ 501 { 0, 0 }, \ 502 { "console_device", CTLTYPE_STRUCT }, \ 503 { "bios", CTLTYPE_INT }, \ 504 { "blk2chr", CTLTYPE_STRUCT }, \ 505 { "chr2blk", CTLTYPE_STRUCT }, \ 506 { "allowaperture", CTLTYPE_INT }, \ 507 { "cpuvendor", CTLTYPE_STRING }, \ 508 { "cpuid", CTLTYPE_INT }, \ 509 { "cpufeature", CTLTYPE_INT }, \ 510 { 0, 0 }, \ 511 { "kbdreset", CTLTYPE_INT }, \ 512 { 0, 0 }, \ 513 { "xcrypt", CTLTYPE_INT }, \ 514 { 0, 0 }, \ 515 { "lidaction", CTLTYPE_INT }, \ 516 { "forceukbd", CTLTYPE_INT }, \ 517 { "tscfreq", CTLTYPE_QUAD }, \ 518 { "invarianttsc", CTLTYPE_INT }, \ 519 { "pwraction", CTLTYPE_INT }, \ 520 { "retpoline", CTLTYPE_INT }, \ 521 } 522 523 #endif /* !_MACHINE_CPU_H_ */ 524